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1 /*
2  * Copyright © 2020 Valve Corporation
3  *
4  * SPDX-License-Identifier: MIT
5  */
6 #ifndef ACO_TEST_HELPERS_H
7 #define ACO_TEST_HELPERS_H
8 
9 #include "vulkan/vulkan.h"
10 
11 #include "framework.h"
12 #include "ac_gpu_info.h"
13 #include "nir_builder.h"
14 #include <functional>
15 
16 enum QoShaderDeclType {
17    QoShaderDeclType_ubo,
18    QoShaderDeclType_ssbo,
19    QoShaderDeclType_img_buf,
20    QoShaderDeclType_img,
21    QoShaderDeclType_tex_buf,
22    QoShaderDeclType_combined,
23    QoShaderDeclType_tex,
24    QoShaderDeclType_samp,
25    QoShaderDeclType_in,
26    QoShaderDeclType_out,
27 };
28 
29 struct QoShaderDecl {
30    const char* name;
31    const char* type;
32    QoShaderDeclType decl_type;
33    // TODO: array size?
34    unsigned location;
35    unsigned component;
36    unsigned binding;
37    unsigned set;
38 };
39 
40 struct QoShaderModuleCreateInfo {
41    void* pNext;
42    size_t spirvSize;
43    const void* pSpirv;
44    uint32_t declarationCount;
45    const QoShaderDecl* pDeclarations;
46    VkShaderStageFlagBits stage;
47 };
48 
49 extern ac_shader_config config;
50 extern aco_shader_info info;
51 extern std::unique_ptr<aco::Program> program;
52 extern aco::Builder bld;
53 extern aco::Temp inputs[16];
54 extern nir_builder *nb;
55 
56 namespace aco {
57 struct ra_test_policy;
58 }
59 
60 void create_program(enum amd_gfx_level gfx_level, aco::Stage stage, unsigned wave_size = 64,
61                     enum radeon_family family = CHIP_UNKNOWN);
62 bool setup_cs(const char* input_spec, enum amd_gfx_level gfx_level,
63               enum radeon_family family = CHIP_UNKNOWN, const char* subvariant = "",
64               unsigned wave_size = 64);
65 bool
66 setup_nir_cs(enum amd_gfx_level gfx_level, gl_shader_stage stage = MESA_SHADER_COMPUTE,
67              enum radeon_family family = CHIP_UNKNOWN, const char* subvariant = "");
68 
69 void finish_program(aco::Program* program, bool endpgm = true, bool dominance = false);
70 void finish_validator_test();
71 void finish_opt_test();
72 void finish_setup_reduce_temp_test();
73 void finish_lower_subdword_test();
74 void finish_ra_test(aco::ra_test_policy);
75 void finish_optimizer_postRA_test();
76 void finish_to_hw_instr_test();
77 void finish_schedule_vopd_test();
78 void finish_waitcnt_test();
79 void finish_insert_nops_test(bool endpgm = true);
80 void finish_form_hard_clause_test();
81 void finish_assembler_test();
82 void finish_isel_test(enum ac_hw_stage hw_stage = AC_HW_COMPUTE_SHADER, unsigned wave_size = 64);
83 
84 void writeout(unsigned i, aco::Temp tmp = aco::Temp(0, aco::s1));
85 void writeout(unsigned i, aco::Builder::Result res);
86 void writeout(unsigned i, aco::Operand op);
87 void writeout(unsigned i, aco::Operand op0, aco::Operand op1);
88 
89 aco::Temp fneg(aco::Temp src, aco::Builder b = bld);
90 aco::Temp fabs(aco::Temp src, aco::Builder b = bld);
91 aco::Temp f2f32(aco::Temp src, aco::Builder b = bld);
92 aco::Temp f2f16(aco::Temp src, aco::Builder b = bld);
93 aco::Temp u2u16(aco::Temp src, aco::Builder b = bld);
94 aco::Temp fadd(aco::Temp src0, aco::Temp src1, aco::Builder b = bld);
95 aco::Temp fmul(aco::Temp src0, aco::Temp src1, aco::Builder b = bld);
96 aco::Temp fma(aco::Temp src0, aco::Temp src1, aco::Temp src2, aco::Builder b = bld);
97 aco::Temp fsat(aco::Temp src, aco::Builder b = bld);
98 aco::Temp fmin(aco::Temp src0, aco::Temp src1, aco::Builder b = bld);
99 aco::Temp fmax(aco::Temp src0, aco::Temp src1, aco::Builder b = bld);
100 aco::Temp ext_ushort(aco::Temp src, unsigned idx, aco::Builder b = bld);
101 aco::Temp ext_sshort(aco::Temp src, unsigned idx, aco::Builder b = bld);
102 aco::Temp ext_ubyte(aco::Temp src, unsigned idx, aco::Builder b = bld);
103 aco::Temp ext_sbyte(aco::Temp src, unsigned idx, aco::Builder b = bld);
104 void emit_divergent_if_else(aco::Program* prog, aco::Builder& b, aco::Operand cond,
105                             std::function<void()> then, std::function<void()> els);
106 
107 /* vulkan helpers */
108 VkDevice get_vk_device(enum amd_gfx_level gfx_level);
109 VkDevice get_vk_device(enum radeon_family family);
110 
111 void print_pipeline_ir(VkDevice device, VkPipeline pipeline, VkShaderStageFlagBits stages,
112                        const char* name, bool remove_encoding = false);
113 
114 VkShaderModule __qoCreateShaderModule(VkDevice dev, const QoShaderModuleCreateInfo* info);
115 
116 class PipelineBuilder {
117 public:
118    /* inputs */
119    VkDevice device;
120    VkFormat color_outputs[16];
121    VkFormat ds_output;
122    VkPrimitiveTopology topology;
123    VkSampleCountFlagBits samples;
124    bool sample_shading_enable;
125    float min_sample_shading;
126    uint32_t patch_size;
127    VkPipelineVertexInputStateCreateInfo vs_input;
128    VkVertexInputBindingDescription vs_bindings[16];
129    VkVertexInputAttributeDescription vs_attributes[16];
130    VkPushConstantRange push_constant_range;
131    uint64_t desc_layouts_used;
132    unsigned num_desc_bindings[64];
133    VkDescriptorSetLayoutBinding desc_bindings[64][64];
134    VkPipelineShaderStageCreateInfo stages[5];
135    VkShaderStageFlags owned_stages;
136 
137    /* outputs */
138    VkGraphicsPipelineCreateInfo gfx_pipeline_info;
139    VkComputePipelineCreateInfo cs_pipeline_info;
140    VkDescriptorSetLayout desc_layouts[64];
141    VkPipelineLayout pipeline_layout;
142    VkRenderPass render_pass;
143    VkPipeline pipeline;
144 
145    PipelineBuilder(VkDevice dev);
146    ~PipelineBuilder();
147 
148    PipelineBuilder(const PipelineBuilder&) = delete;
149    PipelineBuilder& operator=(const PipelineBuilder&) = delete;
150 
151    void add_desc_binding(VkShaderStageFlags stage_flags, uint32_t layout, uint32_t binding,
152                          VkDescriptorType type, uint32_t count = 1);
153 
154    void add_vertex_binding(uint32_t binding, uint32_t stride,
155                            VkVertexInputRate rate = VK_VERTEX_INPUT_RATE_VERTEX);
156    void add_vertex_attribute(uint32_t location, uint32_t binding, VkFormat format, uint32_t offset);
157 
158    void add_resource_decls(QoShaderModuleCreateInfo* module);
159    void add_io_decls(QoShaderModuleCreateInfo* module);
160 
161    void add_stage(VkShaderStageFlagBits stage, VkShaderModule module, const char* name = "main");
162    void add_stage(VkShaderStageFlagBits stage, QoShaderModuleCreateInfo module,
163                   const char* name = "main");
164    void add_vsfs(VkShaderModule vs, VkShaderModule fs);
165    void add_vsfs(QoShaderModuleCreateInfo vs, QoShaderModuleCreateInfo fs);
166    void add_cs(VkShaderModule cs);
167    void add_cs(QoShaderModuleCreateInfo cs);
168 
169    bool is_compute();
170 
171    void create_pipeline();
172 
173    void print_ir(VkShaderStageFlagBits stages, const char* name, bool remove_encoding = false);
174 
175 private:
176    void create_compute_pipeline();
177    void create_graphics_pipeline();
178 };
179 
180 #endif /* ACO_TEST_HELPERS_H */
181