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1 /*
2  * Copyright 2017 Advanced Micro Devices, Inc.
3  *
4  * SPDX-License-Identifier: MIT
5  */
6 
7 #ifndef AC_SHADER_ABI_H
8 #define AC_SHADER_ABI_H
9 
10 #include "ac_shader_args.h"
11 #include "ac_shader_util.h"
12 #include "compiler/shader_enums.h"
13 #include "nir.h"
14 #include <llvm-c/Core.h>
15 
16 #include <assert.h>
17 
18 #define AC_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
19 
20 /* Document the shader ABI during compilation. This is what allows radeonsi and
21  * radv to share a compiler backend.
22  */
23 struct ac_shader_abi {
24    /* Each entry is a pointer to a f32 or a f16 value (only possible for FS) */
25    LLVMValueRef outputs[AC_LLVM_MAX_OUTPUTS * 4];
26    bool is_16bit[AC_LLVM_MAX_OUTPUTS * 4];
27 
28    LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi, LLVMTypeRef type,
29                                       unsigned driver_location, unsigned component,
30                                       unsigned num_components);
31 
32    LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
33 
34    /**
35     * Load the descriptor for the given buffer.
36     *
37     * \param buffer the buffer as presented in NIR: this is the descriptor
38     *               in Vulkan, and the buffer index in OpenGL/Gallium
39     * \param write whether buffer contents will be written
40     * \param non_uniform whether the buffer descriptor is not assumed to be uniform
41     */
42    LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi, LLVMValueRef buffer, bool write, bool non_uniform);
43 
44    /**
45     * Load a descriptor associated to a sampler.
46     *
47     * \param index of the descriptor
48     * \param desc_type the type of descriptor to load
49     */
50    LLVMValueRef (*load_sampler_desc)(struct ac_shader_abi *abi, LLVMValueRef index,
51                                      enum ac_descriptor_type desc_type);
52 
53    LLVMValueRef (*intrinsic_load)(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin);
54 
55    /* Whether to clamp the shadow reference value to [0,1]on GFX8. Radeonsi currently
56     * uses it due to promoting D16 to D32, but radv needs it off. */
57    bool clamp_shadow_reference;
58 
59    /* Whether bounds checks are required */
60    bool robust_buffer_access;
61 
62    /* Check for Inf interpolation coeff */
63    bool kill_ps_if_inf_interp;
64 
65    /* Clamp div by 0 (so it won't produce NaN) */
66    bool clamp_div_by_zero;
67 
68    /* Whether to inline the compute dispatch size in user sgprs. */
69    bool load_grid_size_from_user_sgpr;
70 
71    /* Whether to disable anisotropic filtering. */
72    bool disable_aniso_single_level;
73 };
74 
75 #endif /* AC_SHADER_ABI_H */
76