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1 /*
2  * Copyright © 2024 Igalia S.L.
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #ifndef __FREEDRENO_LRZ_H__
7 #define __FREEDRENO_LRZ_H__
8 
9 #include "adreno_common.xml.h"
10 
11 enum fd_lrz_gpu_dir : uint8_t {
12    FD_LRZ_GPU_DIR_DISABLED = 0,
13    FD_LRZ_GPU_DIR_LESS = 1,
14    FD_LRZ_GPU_DIR_GREATER = 2,
15    FD_LRZ_GPU_DIR_NOT_SET = 3,
16 };
17 
18 UNUSED static const char *
fd_lrz_gpu_dir_to_str(enum fd_lrz_gpu_dir dir)19 fd_lrz_gpu_dir_to_str(enum fd_lrz_gpu_dir dir)
20 {
21    switch (dir) {
22    case FD_LRZ_GPU_DIR_DISABLED:
23       return "DISABLED";
24    case FD_LRZ_GPU_DIR_LESS:
25       return "DIR_LESS";
26    case FD_LRZ_GPU_DIR_GREATER:
27       return "DIR_GREATER";
28    case FD_LRZ_GPU_DIR_NOT_SET:
29       return "DIR_NOT_SET";
30    default:
31       return "INVALID";
32    }
33 }
34 
35 /* Layout of LRZ fast-clear buffer templated on the generation, the
36  * members are as follows:
37  * - fc1: The first FC buffer, always present. This may contain multiple
38  *        sub-buffers with _a/_b suffixes for concurrent binning which
39  *        can be checked using HAS_CB.
40  * - fc2: The second FC buffer, used for bidirectional LRZ and only present
41  *        when HAS_BIDIR set. It has suffixes for CB like fc1.
42  * - metadata: Metadata buffer for LRZ fast-clear. The contents are not
43  *             always known, since they're handled by the hardware.
44  */
45 template <chip CHIP>
46 struct fd_lrzfc_layout;
47 
48 template <>
49 struct PACKED fd_lrzfc_layout<A6XX> {
50    static const bool HAS_BIDIR = false;
51    static const bool HAS_CB = false;
52    static const size_t FC_SIZE = 512;
53 
54    uint8_t fc1[FC_SIZE];
55    union {
56       struct {
57          enum fd_lrz_gpu_dir dir_track;
58          uint8_t _pad_;
59          uint32_t gras_lrz_depth_view;
60       };
61       uint8_t metadata[6];
62    };
63 };
64 
65 template <>
66 struct PACKED fd_lrzfc_layout<A7XX> {
67    static const bool HAS_BIDIR = true;
68    static const bool HAS_CB = true;
69    static const size_t FC_SIZE = 1024;
70 
71    union {
72       struct {
73          uint8_t fc1_a[FC_SIZE];
74          uint8_t fc1_b[FC_SIZE];
75       };
76       uint8_t fc1[FC_SIZE * 2];
77    };
78    union {
79       struct {
80          enum fd_lrz_gpu_dir dir_track;
81          uint8_t _padding0;
82          uint32_t gras_lrz_depth_view;
83       };
84       uint8_t metadata[512];
85    };
86    uint8_t _padding1[1536];
87    union {
88       struct {
89          uint8_t fc2_a[FC_SIZE];
90          uint8_t fc2_b[FC_SIZE];
91       };
92       uint8_t fc2[FC_SIZE * 2];
93    };
94 };
95 
96 static_assert(sizeof(fd_lrzfc_layout<A7XX>) == 0x1800);
97 static_assert(offsetof(fd_lrzfc_layout<A7XX>, fc1) == 0x0);
98 static_assert(offsetof(fd_lrzfc_layout<A7XX>, fc2) == 0x1000);
99 
100 #endif
101