1 /*
2 * Copyright 2005 Ben Skeggs.
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "r300_fragprog.h"
7
8 #include <stdio.h>
9
10 #include "r300_reg.h"
11
12 static void
presub_string(char out[10],unsigned int inst)13 presub_string(char out[10], unsigned int inst)
14 {
15 switch (inst & 0x600000) {
16 case R300_ALU_SRCP_1_MINUS_2_SRC0:
17 sprintf(out, "bias");
18 break;
19 case R300_ALU_SRCP_SRC1_MINUS_SRC0:
20 sprintf(out, "sub");
21 break;
22 case R300_ALU_SRCP_SRC1_PLUS_SRC0:
23 sprintf(out, "add");
24 break;
25 case R300_ALU_SRCP_1_MINUS_SRC0:
26 sprintf(out, "inv ");
27 break;
28 }
29 }
30
31 static int
get_msb(unsigned int bit,unsigned int r400_ext_addr)32 get_msb(unsigned int bit, unsigned int r400_ext_addr)
33 {
34 return (r400_ext_addr & bit) ? 1 << 5 : 0;
35 }
36
37 /* just some random things... */
38 void
r300FragmentProgramDump(struct radeon_compiler * c,void * user)39 r300FragmentProgramDump(struct radeon_compiler *c, void *user)
40 {
41 struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler *)c;
42 struct r300_fragment_program_code *code = &compiler->code->code.r300;
43 int n, i, j;
44 static int pc = 0;
45
46 fprintf(stderr, "pc=%d*************************************\n", pc++);
47
48 fprintf(stderr, "Hardware program\n");
49 fprintf(stderr, "----------------\n");
50 if (c->is_r400) {
51 fprintf(stderr, "code_offset_ext: %08x\n", code->r400_code_offset_ext);
52 }
53
54 for (n = 0; n <= (code->config & 3); n++) {
55 uint32_t code_addr = code->code_addr[3 - (code->config & 3) + n];
56 unsigned int alu_offset = ((code_addr & R300_ALU_START_MASK) >> R300_ALU_START_SHIFT) +
57 (((code->r400_code_offset_ext >> (24 - (n * 6))) & 0x7) << 6);
58 unsigned int alu_end = ((code_addr & R300_ALU_SIZE_MASK) >> R300_ALU_SIZE_SHIFT) +
59 (((code->r400_code_offset_ext >> (27 - (n * 6))) & 0x7) << 6);
60 int tex_offset = (code_addr & R300_TEX_START_MASK) >> R300_TEX_START_SHIFT;
61 int tex_end = (code_addr & R300_TEX_SIZE_MASK) >> R300_TEX_SIZE_SHIFT;
62
63 fprintf(stderr,
64 "NODE %d: alu_offset: %u, tex_offset: %d, "
65 "alu_end: %u, tex_end: %d (code_addr: %08x)\n",
66 n, alu_offset, tex_offset, alu_end, tex_end, code_addr);
67
68 if (n > 0 || (code->config & R300_PFS_CNTL_FIRST_NODE_HAS_TEX)) {
69 fprintf(stderr, " TEX:\n");
70 for (i = tex_offset; i <= tex_offset + tex_end; ++i) {
71 const char *instr;
72
73 switch ((code->tex.inst[i] >> R300_TEX_INST_SHIFT) & 15) {
74 case R300_TEX_OP_LD:
75 instr = "TEX";
76 break;
77 case R300_TEX_OP_KIL:
78 instr = "KIL";
79 break;
80 case R300_TEX_OP_TXP:
81 instr = "TXP";
82 break;
83 case R300_TEX_OP_TXB:
84 instr = "TXB";
85 break;
86 default:
87 instr = "UNKNOWN";
88 }
89
90 fprintf(stderr, " %s t%i, %c%i, texture[%i] (%08x)\n", instr,
91 (code->tex.inst[i] >> R300_DST_ADDR_SHIFT) & 31, 't',
92 (code->tex.inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
93 (code->tex.inst[i] & R300_TEX_ID_MASK) >> R300_TEX_ID_SHIFT, code->tex.inst[i]);
94 }
95 }
96
97 for (i = alu_offset; i <= alu_offset + alu_end; ++i) {
98 char srcc[4][10], dstc[20];
99 char srca[4][10], dsta[20];
100 char argc[3][20];
101 char arga[3][20];
102 char flags[5], tmp[10];
103
104 for (j = 0; j < 3; ++j) {
105 int regc = code->alu.inst[i].rgb_addr >> (j * 6);
106 int rega = code->alu.inst[i].alpha_addr >> (j * 6);
107 int msbc = get_msb(R400_ADDR_EXT_RGB_MSB_BIT(j), code->alu.inst[i].r400_ext_addr);
108 int msba = get_msb(R400_ADDR_EXT_A_MSB_BIT(j), code->alu.inst[i].r400_ext_addr);
109
110 sprintf(srcc[j], "%c%i", (regc & 32) ? 'c' : 't', (regc & 31) | msbc);
111 sprintf(srca[j], "%c%i", (rega & 32) ? 'c' : 't', (rega & 31) | msba);
112 }
113
114 dstc[0] = 0;
115 sprintf(flags, "%s%s%s", (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_REG_X) ? "x" : "",
116 (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_REG_Y) ? "y" : "",
117 (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_REG_Z) ? "z" : "");
118 if (flags[0] != 0) {
119 unsigned int msb = get_msb(R400_ADDRD_EXT_RGB_MSB_BIT, code->alu.inst[i].r400_ext_addr);
120
121 sprintf(dstc, "t%i.%s ",
122 ((code->alu.inst[i].rgb_addr >> R300_ALU_DSTC_SHIFT) & 31) | msb, flags);
123 }
124 sprintf(flags, "%s%s%s", (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_OUTPUT_X) ? "x" : "",
125 (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "",
126 (code->alu.inst[i].rgb_addr & R300_ALU_DSTC_OUTPUT_Z) ? "z" : "");
127 if (flags[0] != 0) {
128 sprintf(tmp, "o%i.%s", (code->alu.inst[i].rgb_addr >> 29) & 3, flags);
129 strcat(dstc, tmp);
130 }
131 /* Presub */
132 presub_string(srcc[3], code->alu.inst[i].rgb_inst);
133 presub_string(srca[3], code->alu.inst[i].alpha_inst);
134
135 dsta[0] = 0;
136 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_REG) {
137 unsigned int msb = get_msb(R400_ADDRD_EXT_A_MSB_BIT, code->alu.inst[i].r400_ext_addr);
138 sprintf(dsta, "t%i.w ",
139 ((code->alu.inst[i].alpha_addr >> R300_ALU_DSTA_SHIFT) & 31) | msb);
140 }
141 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_OUTPUT) {
142 sprintf(tmp, "o%i.w ", (code->alu.inst[i].alpha_addr >> 25) & 3);
143 strcat(dsta, tmp);
144 }
145 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_DEPTH) {
146 strcat(dsta, "Z");
147 }
148
149 fprintf(stderr,
150 "%3i: xyz: %3s %3s %3s %5s-> %-20s (%08x)\n"
151 " w: %3s %3s %3s %5s-> %-20s (%08x)\n",
152 i, srcc[0], srcc[1], srcc[2], srcc[3], dstc, code->alu.inst[i].rgb_addr, srca[0],
153 srca[1], srca[2], srca[3], dsta, code->alu.inst[i].alpha_addr);
154
155 for (j = 0; j < 3; ++j) {
156 int regc = code->alu.inst[i].rgb_inst >> (j * 7);
157 int rega = code->alu.inst[i].alpha_inst >> (j * 7);
158 int d;
159 char buf[20];
160
161 d = regc & 31;
162 if (d < 12) {
163 switch (d % 4) {
164 case R300_ALU_ARGC_SRC0C_XYZ:
165 sprintf(buf, "%s.xyz", srcc[d / 4]);
166 break;
167 case R300_ALU_ARGC_SRC0C_XXX:
168 sprintf(buf, "%s.xxx", srcc[d / 4]);
169 break;
170 case R300_ALU_ARGC_SRC0C_YYY:
171 sprintf(buf, "%s.yyy", srcc[d / 4]);
172 break;
173 case R300_ALU_ARGC_SRC0C_ZZZ:
174 sprintf(buf, "%s.zzz", srcc[d / 4]);
175 break;
176 }
177 } else if (d < 15) {
178 sprintf(buf, "%s.www", srca[d - 12]);
179 } else if (d < 20) {
180 switch (d) {
181 case R300_ALU_ARGC_SRCP_XYZ:
182 sprintf(buf, "srcp.xyz");
183 break;
184 case R300_ALU_ARGC_SRCP_XXX:
185 sprintf(buf, "srcp.xxx");
186 break;
187 case R300_ALU_ARGC_SRCP_YYY:
188 sprintf(buf, "srcp.yyy");
189 break;
190 case R300_ALU_ARGC_SRCP_ZZZ:
191 sprintf(buf, "srcp.zzz");
192 break;
193 case R300_ALU_ARGC_SRCP_WWW:
194 sprintf(buf, "srcp.www");
195 break;
196 }
197 } else if (d == 20) {
198 sprintf(buf, "0.0");
199 } else if (d == 21) {
200 sprintf(buf, "1.0");
201 } else if (d == 22) {
202 sprintf(buf, "0.5");
203 } else if (d >= 23 && d < 32) {
204 d -= 23;
205 switch (d / 3) {
206 case 0:
207 sprintf(buf, "%s.yzx", srcc[d % 3]);
208 break;
209 case 1:
210 sprintf(buf, "%s.zxy", srcc[d % 3]);
211 break;
212 case 2:
213 sprintf(buf, "%s.Wzy", srcc[d % 3]);
214 break;
215 }
216 } else {
217 sprintf(buf, "%i", d);
218 }
219
220 sprintf(argc[j], "%s%s%s%s", (regc & 32) ? "-" : "", (regc & 64) ? "|" : "", buf,
221 (regc & 64) ? "|" : "");
222
223 d = rega & 31;
224 if (d < 9) {
225 sprintf(buf, "%s.%c", srcc[d / 3], 'x' + (char)(d % 3));
226 } else if (d < 12) {
227 sprintf(buf, "%s.w", srca[d - 9]);
228 } else if (d < 16) {
229 switch (d) {
230 case R300_ALU_ARGA_SRCP_X:
231 sprintf(buf, "srcp.x");
232 break;
233 case R300_ALU_ARGA_SRCP_Y:
234 sprintf(buf, "srcp.y");
235 break;
236 case R300_ALU_ARGA_SRCP_Z:
237 sprintf(buf, "srcp.z");
238 break;
239 case R300_ALU_ARGA_SRCP_W:
240 sprintf(buf, "srcp.w");
241 break;
242 }
243 } else if (d == 16) {
244 sprintf(buf, "0.0");
245 } else if (d == 17) {
246 sprintf(buf, "1.0");
247 } else if (d == 18) {
248 sprintf(buf, "0.5");
249 } else {
250 sprintf(buf, "%i", d);
251 }
252
253 sprintf(arga[j], "%s%s%s%s", (rega & 32) ? "-" : "", (rega & 64) ? "|" : "", buf,
254 (rega & 64) ? "|" : "");
255 }
256
257 fprintf(stderr,
258 " xyz: %8s %8s %8s op: %08x %s\n"
259 " w: %8s %8s %8s op: %08x\n",
260 argc[0], argc[1], argc[2], code->alu.inst[i].rgb_inst,
261 code->alu.inst[i].rgb_inst & R300_ALU_INSERT_NOP ? "NOP" : "", arga[0], arga[1],
262 arga[2], code->alu.inst[i].alpha_inst);
263 }
264 }
265 }
266