1 /*
2 * Copyright © 2022 Advanced Micro Devices, Inc.
3 *
4 * SPDX-License-Identifier: MIT
5 */
6
7 #include "radeon_vcn.h"
8
9 /* vcn unified queue (sq) ib header */
rvcn_sq_header(struct radeon_cmdbuf * cs,struct rvcn_sq_var * sq,bool enc)10 void rvcn_sq_header(struct radeon_cmdbuf *cs,
11 struct rvcn_sq_var *sq,
12 bool enc)
13 {
14 /* vcn ib signature */
15 radeon_emit(cs, RADEON_VCN_SIGNATURE_SIZE);
16 radeon_emit(cs, RADEON_VCN_SIGNATURE);
17 sq->signature_ib_checksum = &cs->current.buf[cs->current.cdw];
18 radeon_emit(cs, 0);
19 sq->signature_ib_total_size_in_dw = &cs->current.buf[cs->current.cdw];
20 radeon_emit(cs, 0);
21
22 /* vcn ib engine info */
23 radeon_emit(cs, RADEON_VCN_ENGINE_INFO_SIZE);
24 radeon_emit(cs, RADEON_VCN_ENGINE_INFO);
25 radeon_emit(cs, enc ? RADEON_VCN_ENGINE_TYPE_ENCODE
26 : RADEON_VCN_ENGINE_TYPE_DECODE);
27 sq->engine_ib_size_of_packages = &cs->current.buf[cs->current.cdw];
28 radeon_emit(cs, 0);
29 }
30
rvcn_sq_tail(struct radeon_cmdbuf * cs,struct rvcn_sq_var * sq)31 void rvcn_sq_tail(struct radeon_cmdbuf *cs,
32 struct rvcn_sq_var *sq)
33 {
34 uint32_t *end;
35 uint32_t size_in_dw;
36 uint32_t checksum = 0;
37
38 if (sq->signature_ib_checksum == NULL || sq->signature_ib_total_size_in_dw == NULL ||
39 sq->engine_ib_size_of_packages == NULL)
40 return;
41
42 end = &cs->current.buf[cs->current.cdw];
43 size_in_dw = end - sq->signature_ib_total_size_in_dw - 1;
44 *sq->signature_ib_total_size_in_dw = size_in_dw;
45 *sq->engine_ib_size_of_packages = size_in_dw * sizeof(uint32_t);
46
47 for (int i = 0; i < size_in_dw; i++)
48 checksum += *(sq->signature_ib_checksum + 2 + i);
49
50 *sq->signature_ib_checksum = checksum;
51 }
52