1 /*
2 * Copyright © 2010 Intel Corporation
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "brw_cfg.h"
7 #include "brw_disasm.h"
8 #include "brw_fs.h"
9 #include "brw_private.h"
10 #include "dev/intel_debug.h"
11 #include "util/half_float.h"
12
13 using namespace brw;
14
15 void
brw_print_instructions(const fs_visitor & s,FILE * file)16 brw_print_instructions(const fs_visitor &s, FILE *file)
17 {
18 if (s.cfg && s.grf_used == 0) {
19 const brw::def_analysis &defs = s.def_analysis.require();
20 const register_pressure *rp =
21 INTEL_DEBUG(DEBUG_REG_PRESSURE) ? &s.regpressure_analysis.require() : NULL;
22
23 unsigned ip = 0, max_pressure = 0;
24 unsigned cf_count = 0;
25 foreach_block(block, s.cfg) {
26 fprintf(file, "START B%d", block->num);
27 foreach_list_typed(bblock_link, link, link, &block->parents) {
28 fprintf(file, " <%cB%d",
29 link->kind == bblock_link_logical ? '-' : '~',
30 link->block->num);
31 }
32 fprintf(file, "\n");
33
34 foreach_inst_in_block(fs_inst, inst, block) {
35 if (inst->is_control_flow_end())
36 cf_count -= 1;
37
38 if (rp) {
39 max_pressure = MAX2(max_pressure, rp->regs_live_at_ip[ip]);
40 fprintf(file, "{%3d} ", rp->regs_live_at_ip[ip]);
41 }
42
43 for (unsigned i = 0; i < cf_count; i++)
44 fprintf(file, " ");
45 brw_print_instruction(s, inst, file, &defs);
46 ip++;
47
48 if (inst->is_control_flow_begin())
49 cf_count += 1;
50 }
51
52 fprintf(file, "END B%d", block->num);
53 foreach_list_typed(bblock_link, link, link, &block->children) {
54 fprintf(file, " %c>B%d",
55 link->kind == bblock_link_logical ? '-' : '~',
56 link->block->num);
57 }
58 fprintf(file, "\n");
59 }
60 if (rp)
61 fprintf(file, "Maximum %3d registers live at once.\n", max_pressure);
62 } else if (s.cfg && exec_list_is_empty(&s.instructions)) {
63 foreach_block_and_inst(block, fs_inst, inst, s.cfg) {
64 brw_print_instruction(s, inst, file);
65 }
66 } else {
67 foreach_in_list(fs_inst, inst, &s.instructions) {
68 brw_print_instruction(s, inst, file);
69 }
70 }
71 }
72
73 static const char *
brw_instruction_name(const struct brw_isa_info * isa,enum opcode op)74 brw_instruction_name(const struct brw_isa_info *isa, enum opcode op)
75 {
76 const struct intel_device_info *devinfo = isa->devinfo;
77
78 switch (op) {
79 case 0 ... NUM_BRW_OPCODES - 1:
80 /* The DO instruction doesn't exist on Gfx9+, but we use it to mark the
81 * start of a loop in the IR.
82 */
83 if (op == BRW_OPCODE_DO)
84 return "do";
85
86 /* DPAS instructions may transiently exist on platforms that do not
87 * support DPAS. They will eventually be lowered, but in the meantime it
88 * must be possible to query the instruction name.
89 */
90 if (devinfo->verx10 < 125 && op == BRW_OPCODE_DPAS)
91 return "dpas";
92
93 assert(brw_opcode_desc(isa, op)->name);
94 return brw_opcode_desc(isa, op)->name;
95 case FS_OPCODE_FB_WRITE_LOGICAL:
96 return "fb_write_logical";
97 case FS_OPCODE_FB_READ_LOGICAL:
98 return "fb_read_logical";
99
100 case SHADER_OPCODE_RCP:
101 return "rcp";
102 case SHADER_OPCODE_RSQ:
103 return "rsq";
104 case SHADER_OPCODE_SQRT:
105 return "sqrt";
106 case SHADER_OPCODE_EXP2:
107 return "exp2";
108 case SHADER_OPCODE_LOG2:
109 return "log2";
110 case SHADER_OPCODE_POW:
111 return "pow";
112 case SHADER_OPCODE_INT_QUOTIENT:
113 return "int_quot";
114 case SHADER_OPCODE_INT_REMAINDER:
115 return "int_rem";
116 case SHADER_OPCODE_SIN:
117 return "sin";
118 case SHADER_OPCODE_COS:
119 return "cos";
120
121 case SHADER_OPCODE_SEND:
122 return "send";
123
124 case SHADER_OPCODE_UNDEF:
125 return "undef";
126
127 case SHADER_OPCODE_TEX_LOGICAL:
128 return "tex_logical";
129 case SHADER_OPCODE_TXD_LOGICAL:
130 return "txd_logical";
131 case SHADER_OPCODE_TXF_LOGICAL:
132 return "txf_logical";
133 case SHADER_OPCODE_TXL_LOGICAL:
134 return "txl_logical";
135 case SHADER_OPCODE_TXS_LOGICAL:
136 return "txs_logical";
137 case FS_OPCODE_TXB_LOGICAL:
138 return "txb_logical";
139 case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
140 return "txf_cms_w_logical";
141 case SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL:
142 return "txf_cms_w_gfx12_logical";
143 case SHADER_OPCODE_TXF_MCS_LOGICAL:
144 return "txf_mcs_logical";
145 case SHADER_OPCODE_LOD_LOGICAL:
146 return "lod_logical";
147 case SHADER_OPCODE_TG4_LOGICAL:
148 return "tg4_logical";
149 case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
150 return "tg4_offset_logical";
151 case SHADER_OPCODE_TG4_OFFSET_LOD_LOGICAL:
152 return "tg4_offset_lod_logical";
153 case SHADER_OPCODE_TG4_OFFSET_BIAS_LOGICAL:
154 return "tg4_offset_bias_logical";
155 case SHADER_OPCODE_TG4_BIAS_LOGICAL:
156 return "tg4_b_logical";
157 case SHADER_OPCODE_TG4_EXPLICIT_LOD_LOGICAL:
158 return "tg4_l_logical";
159 case SHADER_OPCODE_TG4_IMPLICIT_LOD_LOGICAL:
160 return "tg4_i_logical";
161 case SHADER_OPCODE_SAMPLEINFO_LOGICAL:
162 return "sampleinfo_logical";
163
164 case SHADER_OPCODE_IMAGE_SIZE_LOGICAL:
165 return "image_size_logical";
166
167 case SHADER_OPCODE_MEMORY_FENCE:
168 return "memory_fence";
169 case FS_OPCODE_SCHEDULING_FENCE:
170 return "scheduling_fence";
171 case SHADER_OPCODE_INTERLOCK:
172 /* For an interlock we actually issue a memory fence via sendc. */
173 return "interlock";
174
175 case SHADER_OPCODE_LOAD_PAYLOAD:
176 return "load_payload";
177 case FS_OPCODE_PACK:
178 return "pack";
179
180 case SHADER_OPCODE_SCRATCH_HEADER:
181 return "scratch_header";
182
183 case SHADER_OPCODE_URB_WRITE_LOGICAL:
184 return "urb_write_logical";
185 case SHADER_OPCODE_URB_READ_LOGICAL:
186 return "urb_read_logical";
187
188 case SHADER_OPCODE_FIND_LIVE_CHANNEL:
189 return "find_live_channel";
190 case SHADER_OPCODE_FIND_LAST_LIVE_CHANNEL:
191 return "find_last_live_channel";
192 case SHADER_OPCODE_LOAD_LIVE_CHANNELS:
193 return "load_live_channels";
194 case FS_OPCODE_LOAD_LIVE_CHANNELS:
195 return "fs_load_live_channels";
196
197 case SHADER_OPCODE_BROADCAST:
198 return "broadcast";
199 case SHADER_OPCODE_SHUFFLE:
200 return "shuffle";
201 case SHADER_OPCODE_SEL_EXEC:
202 return "sel_exec";
203 case SHADER_OPCODE_QUAD_SWIZZLE:
204 return "quad_swizzle";
205 case SHADER_OPCODE_CLUSTER_BROADCAST:
206 return "cluster_broadcast";
207
208 case SHADER_OPCODE_GET_BUFFER_SIZE:
209 return "get_buffer_size";
210
211 case FS_OPCODE_DDX_COARSE:
212 return "ddx_coarse";
213 case FS_OPCODE_DDX_FINE:
214 return "ddx_fine";
215 case FS_OPCODE_DDY_COARSE:
216 return "ddy_coarse";
217 case FS_OPCODE_DDY_FINE:
218 return "ddy_fine";
219
220 case FS_OPCODE_PIXEL_X:
221 return "pixel_x";
222 case FS_OPCODE_PIXEL_Y:
223 return "pixel_y";
224
225 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
226 return "uniform_pull_const";
227 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
228 return "varying_pull_const_logical";
229
230 case FS_OPCODE_PACK_HALF_2x16_SPLIT:
231 return "pack_half_2x16_split";
232
233 case SHADER_OPCODE_HALT_TARGET:
234 return "halt_target";
235
236 case FS_OPCODE_INTERPOLATE_AT_SAMPLE:
237 return "interp_sample";
238 case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET:
239 return "interp_shared_offset";
240 case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
241 return "interp_per_slot_offset";
242
243 case SHADER_OPCODE_BARRIER:
244 return "barrier";
245 case SHADER_OPCODE_MULH:
246 return "mulh";
247 case SHADER_OPCODE_ISUB_SAT:
248 return "isub_sat";
249 case SHADER_OPCODE_USUB_SAT:
250 return "usub_sat";
251 case SHADER_OPCODE_MOV_INDIRECT:
252 return "mov_indirect";
253 case SHADER_OPCODE_MOV_RELOC_IMM:
254 return "mov_reloc_imm";
255
256 case RT_OPCODE_TRACE_RAY_LOGICAL:
257 return "rt_trace_ray_logical";
258
259 case SHADER_OPCODE_RND_MODE:
260 return "rnd_mode";
261 case SHADER_OPCODE_FLOAT_CONTROL_MODE:
262 return "float_control_mode";
263 case SHADER_OPCODE_BTD_SPAWN_LOGICAL:
264 return "btd_spawn_logical";
265 case SHADER_OPCODE_BTD_RETIRE_LOGICAL:
266 return "btd_retire_logical";
267 case SHADER_OPCODE_READ_ARCH_REG:
268 return "read_arch_reg";
269 case SHADER_OPCODE_LOAD_SUBGROUP_INVOCATION:
270 return "load_subgroup_invocation";
271 case SHADER_OPCODE_MEMORY_LOAD_LOGICAL:
272 return "memory_load";
273 case SHADER_OPCODE_MEMORY_STORE_LOGICAL:
274 return "memory_store";
275 case SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL:
276 return "memory_atomic";
277 case SHADER_OPCODE_REDUCE:
278 return "reduce";
279 case SHADER_OPCODE_INCLUSIVE_SCAN:
280 return "inclusive_scan";
281 case SHADER_OPCODE_EXCLUSIVE_SCAN:
282 return "exclusive_scan";
283 case SHADER_OPCODE_VOTE_ANY:
284 return "vote_any";
285 case SHADER_OPCODE_VOTE_ALL:
286 return "vote_all";
287 case SHADER_OPCODE_VOTE_EQUAL:
288 return "vote_equal";
289 case SHADER_OPCODE_BALLOT:
290 return "ballot";
291 case SHADER_OPCODE_QUAD_SWAP:
292 return "quad_swap";
293 case SHADER_OPCODE_READ_FROM_LIVE_CHANNEL:
294 return "read_from_live_channel";
295 case SHADER_OPCODE_READ_FROM_CHANNEL:
296 return "read_from_channel";
297 }
298
299 unreachable("not reached");
300 }
301
302 /**
303 * Pretty-print a source for a SHADER_OPCODE_MEMORY_LOGICAL instruction.
304 *
305 * Returns true if the value is fully printed (i.e. an enum) and false if
306 * we only printed a label, and the actual source value still needs printing.
307 */
308 static bool
print_memory_logical_source(FILE * file,const fs_inst * inst,unsigned i)309 print_memory_logical_source(FILE *file, const fs_inst *inst, unsigned i)
310 {
311 if (inst->is_control_source(i)) {
312 assert(inst->src[i].file == IMM && inst->src[i].type == BRW_TYPE_UD);
313 assert(!inst->src[i].negate);
314 assert(!inst->src[i].abs);
315 }
316
317 switch (i) {
318 case MEMORY_LOGICAL_OPCODE:
319 fprintf(file, " %s", brw_lsc_op_to_string(inst->src[i].ud));
320 return true;
321 case MEMORY_LOGICAL_MODE: {
322 static const char *modes[] = {
323 [MEMORY_MODE_TYPED] = "typed",
324 [MEMORY_MODE_UNTYPED] = "untyped",
325 [MEMORY_MODE_SHARED_LOCAL] = "shared",
326 [MEMORY_MODE_SCRATCH] = "scratch",
327 [MEMORY_MODE_CONSTANT] = "const",
328 };
329 assert(inst->src[i].ud < ARRAY_SIZE(modes));
330 fprintf(file, " %s", modes[inst->src[i].ud]);
331 return true;
332 }
333 case MEMORY_LOGICAL_BINDING_TYPE:
334 fprintf(file, " %s", brw_lsc_addr_surftype_to_string(inst->src[i].ud));
335 if (inst->src[i].ud != LSC_ADDR_SURFTYPE_FLAT)
336 fprintf(file, ":");
337 return true;
338 case MEMORY_LOGICAL_BINDING:
339 return inst->src[i].file == BAD_FILE;
340 case MEMORY_LOGICAL_ADDRESS:
341 fprintf(file, " addr: ");
342 return false;
343 case MEMORY_LOGICAL_COORD_COMPONENTS:
344 fprintf(file, " coord_comps:");
345 return false;
346 case MEMORY_LOGICAL_ALIGNMENT:
347 fprintf(file, " align:");
348 return false;
349 case MEMORY_LOGICAL_DATA_SIZE:
350 fprintf(file, " %s", brw_lsc_data_size_to_string(inst->src[i].ud));
351 return true;
352 case MEMORY_LOGICAL_COMPONENTS:
353 fprintf(file, " comps:");
354 return false;
355 case MEMORY_LOGICAL_FLAGS:
356 if (inst->src[i].ud & MEMORY_FLAG_TRANSPOSE)
357 fprintf(file, " transpose");
358 if (inst->src[i].ud & MEMORY_FLAG_INCLUDE_HELPERS)
359 fprintf(file, " helpers");
360 return true;
361 case MEMORY_LOGICAL_DATA0:
362 fprintf(file, " data0: ");
363 return false;
364 case MEMORY_LOGICAL_DATA1:
365 if (inst->src[i].file == BAD_FILE)
366 return true;
367 fprintf(file, " data1: ");
368 return false;
369 default:
370 unreachable("invalid source");
371 }
372 }
373
374 void
brw_print_instruction(const fs_visitor & s,const fs_inst * inst,FILE * file,const brw::def_analysis * defs)375 brw_print_instruction(const fs_visitor &s, const fs_inst *inst, FILE *file, const brw::def_analysis *defs)
376 {
377 if (inst->predicate) {
378 fprintf(file, "(%cf%d.%d) ",
379 inst->predicate_inverse ? '-' : '+',
380 inst->flag_subreg / 2,
381 inst->flag_subreg % 2);
382 }
383
384 fprintf(file, "%s", brw_instruction_name(&s.compiler->isa, inst->opcode));
385 if (inst->saturate)
386 fprintf(file, ".sat");
387 if (inst->conditional_mod) {
388 fprintf(file, "%s", conditional_modifier[inst->conditional_mod]);
389 if (!inst->predicate &&
390 (inst->opcode != BRW_OPCODE_SEL &&
391 inst->opcode != BRW_OPCODE_CSEL &&
392 inst->opcode != BRW_OPCODE_IF &&
393 inst->opcode != BRW_OPCODE_WHILE)) {
394 fprintf(file, ".f%d.%d", inst->flag_subreg / 2,
395 inst->flag_subreg % 2);
396 }
397 }
398 fprintf(file, "(%d) ", inst->exec_size);
399
400 if (inst->mlen) {
401 fprintf(file, "(mlen: %d) ", inst->mlen);
402 }
403
404 if (inst->ex_mlen) {
405 fprintf(file, "(ex_mlen: %d) ", inst->ex_mlen);
406 }
407
408 if (inst->eot) {
409 fprintf(file, "(EOT) ");
410 }
411
412 const bool is_send = inst->opcode == BRW_OPCODE_SEND ||
413 inst->opcode == SHADER_OPCODE_SEND;
414
415 switch (inst->dst.file) {
416 case VGRF:
417 if (defs && defs->get(inst->dst))
418 fprintf(file, "%%%d", inst->dst.nr);
419 else
420 fprintf(file, "v%d", inst->dst.nr);
421 break;
422 case FIXED_GRF:
423 fprintf(file, "g%d", inst->dst.nr);
424 if (inst->dst.subnr != 0)
425 fprintf(file, ".%d", inst->dst.subnr / brw_type_size_bytes(inst->dst.type));
426 break;
427 case BAD_FILE:
428 fprintf(file, "(null)");
429 break;
430 case UNIFORM:
431 fprintf(file, "***u%d***", inst->dst.nr);
432 break;
433 case ATTR:
434 fprintf(file, "***attr%d***", inst->dst.nr);
435 break;
436 case ADDRESS:
437 if (inst->dst.nr == 0)
438 fprintf(file, "a0.%d", inst->dst.subnr);
439 else
440 fprintf(file, "va%u.%d", inst->dst.nr, inst->dst.subnr);
441 break;
442 case ARF:
443 switch (inst->dst.nr & 0xF0) {
444 case BRW_ARF_NULL:
445 fprintf(file, "null");
446 break;
447 case BRW_ARF_ACCUMULATOR:
448 if (inst->dst.subnr == 0)
449 fprintf(file, "acc%d", inst->dst.nr & 0x0F);
450 else
451 fprintf(file, "acc%d.%d", inst->dst.nr & 0x0F, inst->dst.subnr);
452 break;
453 case BRW_ARF_FLAG:
454 fprintf(file, "f%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
455 break;
456 default:
457 fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
458 break;
459 }
460 break;
461 case IMM:
462 unreachable("not reached");
463 }
464
465 if (inst->dst.offset ||
466 (!s.grf_used && inst->dst.file == VGRF &&
467 s.alloc.sizes[inst->dst.nr] * REG_SIZE != inst->size_written)) {
468 const unsigned reg_size = (inst->dst.file == UNIFORM ? 4 : REG_SIZE);
469 fprintf(file, "+%d.%d", inst->dst.offset / reg_size,
470 inst->dst.offset % reg_size);
471 }
472
473 if (!is_send) {
474 if (inst->dst.stride != 1)
475 fprintf(file, "<%u>", inst->dst.stride);
476 fprintf(file, ":%s", brw_reg_type_to_letters(inst->dst.type));
477 }
478
479 for (int i = 0; i < inst->sources; i++) {
480 if (inst->opcode == SHADER_OPCODE_MEMORY_LOAD_LOGICAL ||
481 inst->opcode == SHADER_OPCODE_MEMORY_STORE_LOGICAL ||
482 inst->opcode == SHADER_OPCODE_MEMORY_ATOMIC_LOGICAL) {
483 if (print_memory_logical_source(file, inst, i))
484 continue;
485 } else {
486 fprintf(file, ", ");
487 }
488
489 if (inst->src[i].negate)
490 fprintf(file, "-");
491 if (inst->src[i].abs)
492 fprintf(file, "|");
493 switch (inst->src[i].file) {
494 case VGRF:
495 if (defs && defs->get(inst->src[i]))
496 fprintf(file, "%%%d", inst->src[i].nr);
497 else
498 fprintf(file, "v%d", inst->src[i].nr);
499 break;
500 case FIXED_GRF:
501 fprintf(file, "g%d", inst->src[i].nr);
502 break;
503 case ADDRESS:
504 if (inst->src[i].nr == 0)
505 fprintf(file, "a0.%d", inst->src[i].subnr);
506 else
507 fprintf(file, "va%u.%d", inst->src[i].nr, inst->src[i].subnr);
508 break;
509 case ATTR:
510 fprintf(file, "attr%d", inst->src[i].nr);
511 break;
512 case UNIFORM:
513 fprintf(file, "u%d", inst->src[i].nr);
514 break;
515 case BAD_FILE:
516 fprintf(file, "(null)");
517 break;
518 case IMM:
519 switch (inst->src[i].type) {
520 case BRW_TYPE_HF:
521 fprintf(file, "%-ghf", _mesa_half_to_float(inst->src[i].ud & 0xffff));
522 break;
523 case BRW_TYPE_F:
524 fprintf(file, "%-gf", inst->src[i].f);
525 break;
526 case BRW_TYPE_DF:
527 fprintf(file, "%fdf", inst->src[i].df);
528 break;
529 case BRW_TYPE_W:
530 fprintf(file, "%dw", (int)(int16_t)inst->src[i].d);
531 break;
532 case BRW_TYPE_D:
533 fprintf(file, "%dd", inst->src[i].d);
534 break;
535 case BRW_TYPE_UW:
536 fprintf(file, "%duw", inst->src[i].ud & 0xffff);
537 break;
538 case BRW_TYPE_UD:
539 fprintf(file, "%uu", inst->src[i].ud);
540 break;
541 case BRW_TYPE_Q:
542 fprintf(file, "%" PRId64 "q", inst->src[i].d64);
543 break;
544 case BRW_TYPE_UQ:
545 fprintf(file, "%" PRIu64 "uq", inst->src[i].u64);
546 break;
547 case BRW_TYPE_VF:
548 fprintf(file, "[%-gF, %-gF, %-gF, %-gF]",
549 brw_vf_to_float((inst->src[i].ud >> 0) & 0xff),
550 brw_vf_to_float((inst->src[i].ud >> 8) & 0xff),
551 brw_vf_to_float((inst->src[i].ud >> 16) & 0xff),
552 brw_vf_to_float((inst->src[i].ud >> 24) & 0xff));
553 break;
554 case BRW_TYPE_V:
555 case BRW_TYPE_UV:
556 fprintf(file, "%08x%s", inst->src[i].ud,
557 inst->src[i].type == BRW_TYPE_V ? "V" : "UV");
558 break;
559 default:
560 fprintf(file, "???");
561 break;
562 }
563 break;
564 case ARF:
565 switch (inst->src[i].nr & 0xF0) {
566 case BRW_ARF_NULL:
567 fprintf(file, "null");
568 break;
569 case BRW_ARF_ACCUMULATOR:
570 if (inst->src[i].subnr == 0)
571 fprintf(file, "acc%d", inst->src[i].nr & 0x0F);
572 else
573 fprintf(file, "acc%d.%d", inst->src[i].nr & 0x0F, inst->src[i].subnr);
574
575 break;
576 case BRW_ARF_FLAG:
577 fprintf(file, "f%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr);
578 break;
579 default:
580 fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr);
581 break;
582 }
583 break;
584 }
585
586 if (inst->src[i].file == FIXED_GRF && inst->src[i].subnr != 0) {
587 assert(inst->src[i].offset == 0);
588
589 fprintf(file, ".%d", inst->src[i].subnr / brw_type_size_bytes(inst->src[i].type));
590 } else if (inst->src[i].offset ||
591 (!s.grf_used && inst->src[i].file == VGRF &&
592 s.alloc.sizes[inst->src[i].nr] * REG_SIZE != inst->size_read(s.devinfo, i))) {
593 const unsigned reg_size = (inst->src[i].file == UNIFORM ? 4 : REG_SIZE);
594 fprintf(file, "+%d.%d", inst->src[i].offset / reg_size,
595 inst->src[i].offset % reg_size);
596 }
597
598 if (inst->src[i].abs)
599 fprintf(file, "|");
600
601 /* Just print register numbers for payload sources. */
602 const bool omit_src_type_and_region = is_send && i >= 2;
603
604 if (inst->src[i].file != IMM && !omit_src_type_and_region) {
605 unsigned stride;
606 if (inst->src[i].file == ARF || inst->src[i].file == FIXED_GRF) {
607 fprintf(file, "<%u,%u,%u>", inst->src[i].vstride == 0 ? 0 : (1 << (inst->src[i].vstride - 1)),
608 1 << inst->src[i].width,
609 inst->src[i].hstride == 0 ? 0 : (1 << (inst->src[i].hstride - 1)));
610 } else {
611 stride = inst->src[i].stride;
612 if (stride != 1)
613 fprintf(file, "<%u>", stride);
614 }
615
616 fprintf(file, ":%s", brw_reg_type_to_letters(inst->src[i].type));
617 }
618
619 if (inst->opcode == SHADER_OPCODE_QUAD_SWAP && i == 1) {
620 assert(inst->src[i].file == IMM);
621 const char *name = NULL;
622 switch (inst->src[i].ud) {
623 case BRW_SWAP_HORIZONTAL: name = "horizontal"; break;
624 case BRW_SWAP_VERTICAL: name = "vertical"; break;
625 case BRW_SWAP_DIAGONAL: name = "diagonal"; break;
626 default:
627 unreachable("invalid brw_swap_direction");
628 }
629 fprintf(file, " (%s)", name);
630 }
631 }
632
633 fprintf(file, " ");
634
635 if (inst->force_writemask_all)
636 fprintf(file, "NoMask ");
637
638 if (inst->exec_size != s.dispatch_width)
639 fprintf(file, "group%d ", inst->group);
640
641 if (inst->has_no_mask_send_params)
642 fprintf(file, "NoMaskParams ");
643
644 if (inst->sched.regdist || inst->sched.mode) {
645 fprintf(file, "{ ");
646 brw_print_swsb(file, s.devinfo, inst->sched);
647 fprintf(file, " } ");
648 }
649
650 fprintf(file, "\n");
651 }
652
653
654 void
brw_print_swsb(FILE * f,const struct intel_device_info * devinfo,const tgl_swsb swsb)655 brw_print_swsb(FILE *f, const struct intel_device_info *devinfo, const tgl_swsb swsb)
656 {
657 if (swsb.regdist) {
658 fprintf(f, "%s@%d",
659 (devinfo && devinfo->verx10 < 125 ? "" :
660 swsb.pipe == TGL_PIPE_FLOAT ? "F" :
661 swsb.pipe == TGL_PIPE_INT ? "I" :
662 swsb.pipe == TGL_PIPE_LONG ? "L" :
663 swsb.pipe == TGL_PIPE_ALL ? "A" :
664 swsb.pipe == TGL_PIPE_MATH ? "M" :
665 swsb.pipe == TGL_PIPE_SCALAR ? "S" : "" ),
666 swsb.regdist);
667 }
668
669 if (swsb.mode) {
670 if (swsb.regdist)
671 fprintf(f, " ");
672
673 fprintf(f, "$%d%s", swsb.sbid,
674 (swsb.mode & TGL_SBID_SET ? "" :
675 swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));
676 }
677 }
678