1 /******************************************************************************* 2 Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. 3 4 Permission is hereby granted, free of charge, to any person obtaining a 5 copy of this software and associated documentation files (the "Software"), 6 to deal in the Software without restriction, including without limitation 7 the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 and/or sell copies of the Software, and to permit persons to whom the 9 Software is furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included in 12 all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 DEALINGS IN THE SOFTWARE. 21 22 *******************************************************************************/ 23 24 #include "nvtypes.h" 25 26 #ifndef _cl90b5_h_ 27 #define _cl90b5_h_ 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #define GF100_DMA_COPY (0x000090B5) 34 35 #define NV90B5_LL_CMD1 (0x00000000) 36 #define NV90B5_LL_CMD1_SRC_MAX_GOBLINE_PAD_POLICY 1:0 37 #define NV90B5_LL_CMD1_DST_MAX_GOBLINE_PAD_POLICY 3:2 38 #define NV90B5_LL_CMD1_SRC_NONCROSSING_BOUNDARY 7:4 39 #define NV90B5_LL_CMD1_DST_NONCROSSING_BOUNDARY 11:8 40 #define NV90B5_LL_CMD1_P2_P_1_LINE_TRAVERSAL 12:12 41 #define NV90B5_LL_CMD1_NO_WRITE_B14 17:17 42 #define NV90B5_LL_CMD1_SELECT_OUT_B15 22:18 43 #define NV90B5_LL_CMD1_NO_WRITE_B15 23:23 44 #define NV90B5_LL_CMD1_COPY_TYPE_SWIZ 9:9 45 #define NV90B5_LL_CMD1_COPY_TYPE_BIGMEM 10:10 46 #define NV90B5_LL_CMD1_BURSTSIZE_SRC 13:11 47 #define NV90B5_LL_CMD1_BURSTSIZE_DST 16:14 48 #define NV90B5_LL_CMD1_GOBWIDTH_SRC 17:17 49 #define NV90B5_LL_CMD1_GOBWIDTH_DST 18:18 50 #define NV90B5_LL_CMD1_PIPELINED_READS 19:19 51 #define NV90B5_LL_CMD1_SRC_CTXDMA 22:20 52 #define NV90B5_LL_CMD1_DST_CTXDMA 25:23 53 #define NV90B5_NOP (0x00000100) 54 #define NV90B5_NOP_PARAMETER 31:0 55 #define NV90B5_PM_TRIGGER (0x00000140) 56 #define NV90B5_PM_TRIGGER_V 31:0 57 #define NV90B5_SET_APPLICATION_ID (0x00000200) 58 #define NV90B5_SET_APPLICATION_ID_ID 31:0 59 #define NV90B5_SET_APPLICATION_ID_ID_NORMAL (0x00000001) 60 #define NV90B5_SET_APPLICATION_ID_ID_LOW_LEVEL_CLASS (0x00000003) 61 #define NV90B5_SET_WATCHDOG_TIMER (0x00000204) 62 #define NV90B5_SET_WATCHDOG_TIMER_TIMER 31:0 63 #define NV90B5_SET_SEMAPHORE_A (0x00000240) 64 #define NV90B5_SET_SEMAPHORE_A_UPPER 7:0 65 #define NV90B5_SET_SEMAPHORE_B (0x00000244) 66 #define NV90B5_SET_SEMAPHORE_B_LOWER 31:0 67 #define NV90B5_SET_SEMAPHORE_PAYLOAD (0x00000248) 68 #define NV90B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 69 #define NV90B5_ADDRESSING_MODE (0x00000250) 70 #define NV90B5_ADDRESSING_MODE_SRC_TYPE 0:0 71 #define NV90B5_ADDRESSING_MODE_SRC_TYPE_VIRTUAL (0x00000000) 72 #define NV90B5_ADDRESSING_MODE_SRC_TYPE_PHYSICAL (0x00000001) 73 #define NV90B5_ADDRESSING_MODE_SRC_TARGET 5:4 74 #define NV90B5_ADDRESSING_MODE_SRC_TARGET_LOCAL_FB (0x00000000) 75 #define NV90B5_ADDRESSING_MODE_SRC_TARGET_COHERENT_SYSMEM (0x00000001) 76 #define NV90B5_ADDRESSING_MODE_SRC_TARGET_NONCOHERENT_SYSMEM (0x00000002) 77 #define NV90B5_ADDRESSING_MODE_DST_TYPE 8:8 78 #define NV90B5_ADDRESSING_MODE_DST_TYPE_VIRTUAL (0x00000000) 79 #define NV90B5_ADDRESSING_MODE_DST_TYPE_PHYSICAL (0x00000001) 80 #define NV90B5_ADDRESSING_MODE_DST_TARGET 13:12 81 #define NV90B5_ADDRESSING_MODE_DST_TARGET_LOCAL_FB (0x00000000) 82 #define NV90B5_ADDRESSING_MODE_DST_TARGET_COHERENT_SYSMEM (0x00000001) 83 #define NV90B5_ADDRESSING_MODE_DST_TARGET_NONCOHERENT_SYSMEM (0x00000002) 84 #define NV90B5_SET_RENDER_ENABLE_A (0x00000254) 85 #define NV90B5_SET_RENDER_ENABLE_A_UPPER 7:0 86 #define NV90B5_SET_RENDER_ENABLE_B (0x00000258) 87 #define NV90B5_SET_RENDER_ENABLE_B_LOWER 31:0 88 #define NV90B5_SET_RENDER_ENABLE_C (0x0000025C) 89 #define NV90B5_SET_RENDER_ENABLE_C_MODE 2:0 90 #define NV90B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) 91 #define NV90B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) 92 #define NV90B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) 93 #define NV90B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) 94 #define NV90B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) 95 #define NV90B5_LAUNCH_DMA (0x00000300) 96 #define NV90B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 97 #define NV90B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) 98 #define NV90B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) 99 #define NV90B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) 100 #define NV90B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 101 #define NV90B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) 102 #define NV90B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) 103 #define NV90B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 104 #define NV90B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) 105 #define NV90B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) 106 #define NV90B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) 107 #define NV90B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 108 #define NV90B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) 109 #define NV90B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) 110 #define NV90B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) 111 #define NV90B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 112 #define NV90B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) 113 #define NV90B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) 114 #define NV90B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 115 #define NV90B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) 116 #define NV90B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) 117 #define NV90B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 118 #define NV90B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) 119 #define NV90B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) 120 #define NV90B5_LAUNCH_DMA_REMAP_ENABLE 10:10 121 #define NV90B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) 122 #define NV90B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) 123 #define NV90B5_OFFSET_IN_UPPER (0x00000400) 124 #define NV90B5_OFFSET_IN_UPPER_UPPER 7:0 125 #define NV90B5_OFFSET_IN_LOWER (0x00000404) 126 #define NV90B5_OFFSET_IN_LOWER_VALUE 31:0 127 #define NV90B5_OFFSET_OUT_UPPER (0x00000408) 128 #define NV90B5_OFFSET_OUT_UPPER_UPPER 7:0 129 #define NV90B5_OFFSET_OUT_LOWER (0x0000040C) 130 #define NV90B5_OFFSET_OUT_LOWER_VALUE 31:0 131 #define NV90B5_PITCH_IN (0x00000410) 132 #define NV90B5_PITCH_IN_VALUE 31:0 133 #define NV90B5_PITCH_OUT (0x00000414) 134 #define NV90B5_PITCH_OUT_VALUE 31:0 135 #define NV90B5_LINE_LENGTH_IN (0x00000418) 136 #define NV90B5_LINE_LENGTH_IN_VALUE 31:0 137 #define NV90B5_LINE_COUNT (0x0000041C) 138 #define NV90B5_LINE_COUNT_VALUE 31:0 139 #define NV90B5_SET_REMAP_CONST_A (0x00000700) 140 #define NV90B5_SET_REMAP_CONST_A_V 31:0 141 #define NV90B5_SET_REMAP_CONST_B (0x00000704) 142 #define NV90B5_SET_REMAP_CONST_B_V 31:0 143 #define NV90B5_SET_REMAP_COMPONENTS (0x00000708) 144 #define NV90B5_SET_REMAP_COMPONENTS_DST_X 2:0 145 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) 146 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) 147 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) 148 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) 149 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) 150 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) 151 #define NV90B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) 152 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y 6:4 153 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) 154 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) 155 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) 156 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) 157 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) 158 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) 159 #define NV90B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) 160 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z 10:8 161 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) 162 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) 163 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) 164 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) 165 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) 166 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) 167 #define NV90B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) 168 #define NV90B5_SET_REMAP_COMPONENTS_DST_W 14:12 169 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) 170 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) 171 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) 172 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) 173 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) 174 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) 175 #define NV90B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) 176 #define NV90B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 177 #define NV90B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) 178 #define NV90B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) 179 #define NV90B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) 180 #define NV90B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) 181 #define NV90B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 182 #define NV90B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) 183 #define NV90B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) 184 #define NV90B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) 185 #define NV90B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) 186 #define NV90B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 187 #define NV90B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) 188 #define NV90B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) 189 #define NV90B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) 190 #define NV90B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) 191 #define NV90B5_SET_DST_BLOCK_SIZE (0x0000070C) 192 #define NV90B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 193 #define NV90B5_SET_DST_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) 194 #define NV90B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) 195 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 196 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) 197 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) 198 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) 199 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) 200 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) 201 #define NV90B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) 202 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 203 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) 204 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) 205 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) 206 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) 207 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) 208 #define NV90B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) 209 #define NV90B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 210 #define NV90B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) 211 #define NV90B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) 212 #define NV90B5_SET_DST_WIDTH (0x00000710) 213 #define NV90B5_SET_DST_WIDTH_V 31:0 214 #define NV90B5_SET_DST_HEIGHT (0x00000714) 215 #define NV90B5_SET_DST_HEIGHT_V 31:0 216 #define NV90B5_SET_DST_DEPTH (0x00000718) 217 #define NV90B5_SET_DST_DEPTH_V 31:0 218 #define NV90B5_SET_DST_LAYER (0x0000071C) 219 #define NV90B5_SET_DST_LAYER_V 31:0 220 #define NV90B5_SET_DST_ORIGIN (0x00000720) 221 #define NV90B5_SET_DST_ORIGIN_X 15:0 222 #define NV90B5_SET_DST_ORIGIN_Y 31:16 223 #define NV90B5_SET_SRC_BLOCK_SIZE (0x00000728) 224 #define NV90B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 225 #define NV90B5_SET_SRC_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) 226 #define NV90B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) 227 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 228 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) 229 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) 230 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) 231 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) 232 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) 233 #define NV90B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) 234 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 235 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) 236 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) 237 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) 238 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) 239 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) 240 #define NV90B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) 241 #define NV90B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 242 #define NV90B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) 243 #define NV90B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) 244 #define NV90B5_SET_SRC_WIDTH (0x0000072C) 245 #define NV90B5_SET_SRC_WIDTH_V 31:0 246 #define NV90B5_SET_SRC_HEIGHT (0x00000730) 247 #define NV90B5_SET_SRC_HEIGHT_V 31:0 248 #define NV90B5_SET_SRC_DEPTH (0x00000734) 249 #define NV90B5_SET_SRC_DEPTH_V 31:0 250 #define NV90B5_SET_SRC_LAYER (0x00000738) 251 #define NV90B5_SET_SRC_LAYER_V 31:0 252 #define NV90B5_SET_SRC_ORIGIN (0x0000073C) 253 #define NV90B5_SET_SRC_ORIGIN_X 15:0 254 #define NV90B5_SET_SRC_ORIGIN_Y 31:16 255 #define NV90B5_PM_TRIGGER_END (0x00001114) 256 #define NV90B5_PM_TRIGGER_END_V 31:0 257 258 #ifdef __cplusplus 259 }; /* extern "C" */ 260 #endif 261 #endif // _cl90b5_h 262 263