1 /*
2 * Copyright (C) 2021 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25 #include "pan_indirect_dispatch.h"
26 #include <stdio.h>
27 #include "compiler/nir/nir_builder.h"
28 #include "util/macros.h"
29 #include "util/u_memory.h"
30 #include "pan_encoder.h"
31 #include "pan_jc.h"
32 #include "pan_pool.h"
33 #include "pan_shader.h"
34 #include "pan_util.h"
35
36 #define get_input_field(b, name) \
37 nir_load_push_constant( \
38 b, 1, sizeof(((struct pan_indirect_dispatch_info *)0)->name) * 8, \
39 nir_imm_int(b, offsetof(struct pan_indirect_dispatch_info, name)))
40
41 static void
pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta * meta)42 pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta *meta)
43 {
44 nir_builder b = nir_builder_init_simple_shader(
45 MESA_SHADER_COMPUTE, GENX(pan_shader_get_compiler_options)(), "%s",
46 "indirect_dispatch");
47 nir_def *zero = nir_imm_int(&b, 0);
48 nir_def *one = nir_imm_int(&b, 1);
49 nir_def *num_wg =
50 nir_load_global(&b, get_input_field(&b, indirect_dim), 4, 3, 32);
51 nir_def *num_wg_x = nir_channel(&b, num_wg, 0);
52 nir_def *num_wg_y = nir_channel(&b, num_wg, 1);
53 nir_def *num_wg_z = nir_channel(&b, num_wg, 2);
54
55 nir_def *job_hdr_ptr = get_input_field(&b, job);
56 nir_def *num_wg_flat =
57 nir_imul(&b, num_wg_x, nir_imul(&b, num_wg_y, num_wg_z));
58
59 nir_push_if(&b, nir_ieq(&b, num_wg_flat, zero));
60 {
61 nir_def *type_ptr = nir_iadd(&b, job_hdr_ptr, nir_imm_int64(&b, 4 * 4));
62 nir_def *ntype = nir_imm_intN_t(&b, (MALI_JOB_TYPE_NULL << 1) | 1, 8);
63 nir_store_global(&b, type_ptr, 1, ntype, 1);
64 }
65 nir_push_else(&b, NULL);
66 {
67 nir_def *job_dim_ptr = nir_iadd(
68 &b, job_hdr_ptr,
69 nir_imm_int64(&b, pan_section_offset(COMPUTE_JOB, INVOCATION)));
70 nir_def *num_wg_x_m1 = nir_isub(&b, num_wg_x, one);
71 nir_def *num_wg_y_m1 = nir_isub(&b, num_wg_y, one);
72 nir_def *num_wg_z_m1 = nir_isub(&b, num_wg_z, one);
73 nir_def *job_dim = nir_load_global(&b, job_dim_ptr, 8, 2, 32);
74 nir_def *dims = nir_channel(&b, job_dim, 0);
75 nir_def *split = nir_channel(&b, job_dim, 1);
76 nir_def *num_wg_x_split =
77 nir_iand_imm(&b, nir_ushr_imm(&b, split, 10), 0x3f);
78 nir_def *num_wg_y_split = nir_iadd(
79 &b, num_wg_x_split, nir_isub_imm(&b, 32, nir_uclz(&b, num_wg_x_m1)));
80 nir_def *num_wg_z_split = nir_iadd(
81 &b, num_wg_y_split, nir_isub_imm(&b, 32, nir_uclz(&b, num_wg_y_m1)));
82 split =
83 nir_ior(&b, split,
84 nir_ior(&b, nir_ishl(&b, num_wg_y_split, nir_imm_int(&b, 16)),
85 nir_ishl(&b, num_wg_z_split, nir_imm_int(&b, 22))));
86 dims =
87 nir_ior(&b, dims,
88 nir_ior(&b, nir_ishl(&b, num_wg_x_m1, num_wg_x_split),
89 nir_ior(&b, nir_ishl(&b, num_wg_y_m1, num_wg_y_split),
90 nir_ishl(&b, num_wg_z_m1, num_wg_z_split))));
91
92 nir_store_global(&b, job_dim_ptr, 8, nir_vec2(&b, dims, split), 3);
93
94 nir_def *num_wg_x_ptr = get_input_field(&b, num_wg_sysval[0]);
95
96 nir_push_if(&b, nir_ine_imm(&b, num_wg_x_ptr, 0));
97 {
98 nir_store_global(&b, num_wg_x_ptr, 8, num_wg_x, 1);
99 nir_store_global(&b, get_input_field(&b, num_wg_sysval[1]), 8,
100 num_wg_y, 1);
101 nir_store_global(&b, get_input_field(&b, num_wg_sysval[2]), 8,
102 num_wg_z, 1);
103 }
104 nir_pop_if(&b, NULL);
105 }
106
107 nir_pop_if(&b, NULL);
108
109 struct panfrost_compile_inputs inputs = {
110 .gpu_id = meta->gpu_id,
111 .no_ubo_to_push = true,
112 };
113 struct pan_shader_info shader_info;
114 struct util_dynarray binary;
115
116 util_dynarray_init(&binary, NULL);
117 pan_shader_preprocess(b.shader, inputs.gpu_id);
118 GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader_info);
119
120 ralloc_free(b.shader);
121
122 assert(!shader_info.tls_size);
123 assert(!shader_info.wls_size);
124
125 shader_info.push.count =
126 DIV_ROUND_UP(sizeof(struct pan_indirect_dispatch_info), 4);
127
128 struct panfrost_ptr bin =
129 pan_pool_alloc_aligned(meta->bin_pool, binary.size, 64);
130
131 memcpy(bin.cpu, binary.data, binary.size);
132 util_dynarray_fini(&binary);
133
134 struct panfrost_ptr rsd =
135 pan_pool_alloc_desc(meta->desc_pool, RENDERER_STATE);
136 struct panfrost_ptr tsd =
137 pan_pool_alloc_desc(meta->desc_pool, LOCAL_STORAGE);
138
139 pan_cast_and_pack(rsd.cpu, RENDERER_STATE, cfg) {
140 pan_shader_prepare_rsd(&shader_info, bin.gpu, &cfg);
141 }
142
143 pan_cast_and_pack(tsd.cpu, LOCAL_STORAGE, ls) {
144 ls.wls_instances = MALI_LOCAL_STORAGE_NO_WORKGROUP_MEM;
145 };
146
147 meta->rsd = rsd.gpu;
148 meta->tsd = tsd.gpu;
149 }
150
151 unsigned
GENX(pan_indirect_dispatch_emit)152 GENX(pan_indirect_dispatch_emit)(struct pan_indirect_dispatch_meta *meta,
153 struct pan_pool *pool, struct pan_jc *jc,
154 const struct pan_indirect_dispatch_info *inputs)
155 {
156 struct panfrost_ptr job = pan_pool_alloc_desc(pool, COMPUTE_JOB);
157 void *invocation = pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION);
158
159 /* If we haven't compiled the indirect dispatch shader yet, do it now */
160 if (!meta->rsd)
161 pan_indirect_dispatch_init(meta);
162
163 panfrost_pack_work_groups_compute(invocation, 1, 1, 1, 1, 1, 1, false,
164 false);
165
166 pan_section_pack(job.cpu, COMPUTE_JOB, PARAMETERS, cfg) {
167 cfg.job_task_split = 2;
168 }
169
170 pan_section_pack(job.cpu, COMPUTE_JOB, DRAW, cfg) {
171 cfg.state = meta->rsd;
172 cfg.thread_storage = meta->tsd;
173 cfg.push_uniforms =
174 pan_pool_upload_aligned(pool, inputs, sizeof(*inputs), 16);
175 }
176
177 return pan_jc_add_job(jc, MALI_JOB_TYPE_COMPUTE, false, true, 0, 0, &job,
178 false);
179 }
180