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1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Calling Convention Implementation Fragment                                 *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11bool llvm::CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
12                            MVT LocVT, CCValAssign::LocInfo LocInfo,
13                            ISD::ArgFlagsTy ArgFlags, CCState &State);
14bool llvm::CC_AArch64_Arm64EC_VarArg(unsigned ValNo, MVT ValVT,
15                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
16                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
17bool llvm::CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT,
18                                MVT LocVT, CCValAssign::LocInfo LocInfo,
19                                ISD::ArgFlagsTy ArgFlags, CCState &State);
20bool llvm::CC_AArch64_DarwinPCS_ILP32_VarArg(unsigned ValNo, MVT ValVT,
21                                             MVT LocVT, CCValAssign::LocInfo LocInfo,
22                                             ISD::ArgFlagsTy ArgFlags, CCState &State);
23bool llvm::CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT,
24                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
25                                       ISD::ArgFlagsTy ArgFlags, CCState &State);
26bool llvm::CC_AArch64_GHC(unsigned ValNo, MVT ValVT,
27                          MVT LocVT, CCValAssign::LocInfo LocInfo,
28                          ISD::ArgFlagsTy ArgFlags, CCState &State);
29bool llvm::CC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
30                                MVT LocVT, CCValAssign::LocInfo LocInfo,
31                                ISD::ArgFlagsTy ArgFlags, CCState &State);
32bool llvm::CC_AArch64_Win64_CFGuard_Check(unsigned ValNo, MVT ValVT,
33                                          MVT LocVT, CCValAssign::LocInfo LocInfo,
34                                          ISD::ArgFlagsTy ArgFlags, CCState &State);
35bool llvm::CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT,
36                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
37                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
38bool llvm::RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
39                               MVT LocVT, CCValAssign::LocInfo LocInfo,
40                               ISD::ArgFlagsTy ArgFlags, CCState &State);
41bool llvm::RetCC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
42                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
43                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
44
45
46bool llvm::CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
47                            MVT LocVT, CCValAssign::LocInfo LocInfo,
48                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
49
50  if (LocVT == MVT::iPTR) {
51    LocVT = MVT::i64;
52    LocInfo = CCValAssign::BCvt;
53  }
54
55  if (LocVT == MVT::v2f32) {
56    LocVT = MVT::v2i32;
57    LocInfo = CCValAssign::BCvt;
58  }
59
60  if (LocVT == MVT::v2f64 ||
61      LocVT == MVT::v4f32) {
62    LocVT = MVT::v2i64;
63    LocInfo = CCValAssign::BCvt;
64  }
65
66  if (State.getMachineFunction().getDataLayout().isBigEndian()) {
67    if (LocVT == MVT::v2i32 ||
68        LocVT == MVT::v2f32 ||
69        LocVT == MVT::v4i16 ||
70        LocVT == MVT::v4f16 ||
71        LocVT == MVT::v4bf16 ||
72        LocVT == MVT::v8i8) {
73      LocVT = MVT::f64;
74      LocInfo = CCValAssign::BCvt;
75    }
76  }
77
78  if (State.getMachineFunction().getDataLayout().isBigEndian()) {
79    if (LocVT == MVT::v2i64 ||
80        LocVT == MVT::v2f64 ||
81        LocVT == MVT::v4i32 ||
82        LocVT == MVT::v4f32 ||
83        LocVT == MVT::v8i16 ||
84        LocVT == MVT::v8f16 ||
85        LocVT == MVT::v8bf16 ||
86        LocVT == MVT::v16i8) {
87      LocVT = MVT::f128;
88      LocInfo = CCValAssign::BCvt;
89    }
90  }
91
92  if (ArgFlags.isInReg()) {
93    if (LocVT == MVT::i64) {
94      if (ArgFlags.isSRet()) {
95        if (LocVT == MVT::i64) {
96          static const MCPhysReg RegList1[] = {
97            AArch64::X0, AArch64::X1
98          };
99          if (unsigned Reg = State.AllocateReg(RegList1)) {
100            State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
101            return false;
102          }
103        }
104      }
105    }
106  }
107
108  if (ArgFlags.isSRet()) {
109    if (LocVT == MVT::i64) {
110      if (unsigned Reg = State.AllocateReg(AArch64::X8)) {
111        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
112        return false;
113      }
114    }
115  }
116
117  if (ArgFlags.isByVal()) {
118    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, Align(8), ArgFlags);
119    return false;
120  }
121
122  if (ArgFlags.isNest()) {
123    if (unsigned Reg = State.AllocateReg(AArch64::X18)) {
124      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
125      return false;
126    }
127  }
128
129  if (ArgFlags.isSwiftSelf()) {
130    if (LocVT == MVT::i64) {
131      if (unsigned Reg = State.AllocateReg(AArch64::X20)) {
132        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
133        return false;
134      }
135    }
136  }
137
138  if (ArgFlags.isSwiftError()) {
139    if (LocVT == MVT::i64) {
140      if (unsigned Reg = State.AllocateReg(AArch64::X21)) {
141        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
142        return false;
143      }
144    }
145  }
146
147  if (ArgFlags.isSwiftAsync()) {
148    if (LocVT == MVT::i64) {
149      if (unsigned Reg = State.AllocateReg(AArch64::X22)) {
150        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
151        return false;
152      }
153    }
154  }
155
156  if (ArgFlags.isInConsecutiveRegs()) {
157    if (CC_AArch64_Custom_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
158      return false;
159  }
160
161  if (LocVT == MVT::nxv16i8 ||
162      LocVT == MVT::nxv8i16 ||
163      LocVT == MVT::nxv4i32 ||
164      LocVT == MVT::nxv2i64 ||
165      LocVT == MVT::nxv2f16 ||
166      LocVT == MVT::nxv4f16 ||
167      LocVT == MVT::nxv8f16 ||
168      LocVT == MVT::nxv2bf16 ||
169      LocVT == MVT::nxv4bf16 ||
170      LocVT == MVT::nxv8bf16 ||
171      LocVT == MVT::nxv2f32 ||
172      LocVT == MVT::nxv4f32 ||
173      LocVT == MVT::nxv2f64) {
174    static const MCPhysReg RegList2[] = {
175      AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7
176    };
177    if (unsigned Reg = State.AllocateReg(RegList2)) {
178      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
179      return false;
180    }
181  }
182
183  if (LocVT == MVT::nxv16i8 ||
184      LocVT == MVT::nxv8i16 ||
185      LocVT == MVT::nxv4i32 ||
186      LocVT == MVT::nxv2i64 ||
187      LocVT == MVT::nxv2f16 ||
188      LocVT == MVT::nxv4f16 ||
189      LocVT == MVT::nxv8f16 ||
190      LocVT == MVT::nxv2bf16 ||
191      LocVT == MVT::nxv4bf16 ||
192      LocVT == MVT::nxv8bf16 ||
193      LocVT == MVT::nxv2f32 ||
194      LocVT == MVT::nxv4f32 ||
195      LocVT == MVT::nxv2f64) {
196    LocVT = MVT::i64;
197    LocInfo = CCValAssign::Indirect;
198  }
199
200  if (LocVT == MVT::nxv1i1 ||
201      LocVT == MVT::nxv2i1 ||
202      LocVT == MVT::nxv4i1 ||
203      LocVT == MVT::nxv8i1 ||
204      LocVT == MVT::nxv16i1) {
205    static const MCPhysReg RegList3[] = {
206      AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3
207    };
208    if (unsigned Reg = State.AllocateReg(RegList3)) {
209      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
210      return false;
211    }
212  }
213
214  if (LocVT == MVT::nxv1i1 ||
215      LocVT == MVT::nxv2i1 ||
216      LocVT == MVT::nxv4i1 ||
217      LocVT == MVT::nxv8i1 ||
218      LocVT == MVT::nxv16i1) {
219    LocVT = MVT::i64;
220    LocInfo = CCValAssign::Indirect;
221  }
222
223  if (LocVT == MVT::i1 ||
224      LocVT == MVT::i8 ||
225      LocVT == MVT::i16) {
226    LocVT = MVT::i32;
227    if (ArgFlags.isSExt())
228      LocInfo = CCValAssign::SExt;
229    else if (ArgFlags.isZExt())
230      LocInfo = CCValAssign::ZExt;
231    else
232      LocInfo = CCValAssign::AExt;
233  }
234
235  if (LocVT == MVT::i32) {
236    static const MCPhysReg RegList4[] = {
237      AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
238    };
239    if (unsigned Reg = State.AllocateReg(RegList4)) {
240      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
241      return false;
242    }
243  }
244
245  if (LocVT == MVT::i64) {
246    if (ArgFlags.isSplit()) {
247      static const MCPhysReg RegList5[] = {
248        AArch64::X0, AArch64::X2, AArch64::X4, AArch64::X6
249      };
250      static const MCPhysReg RegList6[] = {
251        AArch64::X0, AArch64::X1, AArch64::X3, AArch64::X5
252      };
253      if (unsigned Reg = State.AllocateReg(RegList5, RegList6)) {
254        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
255        return false;
256      }
257    }
258  }
259
260  if (LocVT == MVT::i64) {
261    if (ArgFlags.isSplit()) {
262      static const MCPhysReg ShadowRegList7[] = {
263        AArch64::X7
264      };
265      unsigned Offset8 = State.AllocateStack(8, Align(16), ShadowRegList7);
266      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
267      return false;
268    }
269  }
270
271  if (LocVT == MVT::i64) {
272    static const MCPhysReg RegList9[] = {
273      AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
274    };
275    if (unsigned Reg = State.AllocateReg(RegList9)) {
276      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
277      return false;
278    }
279  }
280
281  if (LocVT == MVT::f16) {
282    static const MCPhysReg RegList10[] = {
283      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
284    };
285    if (unsigned Reg = State.AllocateReg(RegList10)) {
286      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
287      return false;
288    }
289  }
290
291  if (LocVT == MVT::bf16) {
292    static const MCPhysReg RegList11[] = {
293      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
294    };
295    if (unsigned Reg = State.AllocateReg(RegList11)) {
296      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
297      return false;
298    }
299  }
300
301  if (LocVT == MVT::f32) {
302    static const MCPhysReg RegList12[] = {
303      AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
304    };
305    if (unsigned Reg = State.AllocateReg(RegList12)) {
306      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
307      return false;
308    }
309  }
310
311  if (LocVT == MVT::f64) {
312    static const MCPhysReg RegList13[] = {
313      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
314    };
315    if (unsigned Reg = State.AllocateReg(RegList13)) {
316      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
317      return false;
318    }
319  }
320
321  if (LocVT == MVT::v1i64 ||
322      LocVT == MVT::v2i32 ||
323      LocVT == MVT::v4i16 ||
324      LocVT == MVT::v8i8 ||
325      LocVT == MVT::v1f64 ||
326      LocVT == MVT::v2f32 ||
327      LocVT == MVT::v4f16 ||
328      LocVT == MVT::v4bf16) {
329    static const MCPhysReg RegList14[] = {
330      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
331    };
332    if (unsigned Reg = State.AllocateReg(RegList14)) {
333      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
334      return false;
335    }
336  }
337
338  if (LocVT == MVT::f128 ||
339      LocVT == MVT::v2i64 ||
340      LocVT == MVT::v4i32 ||
341      LocVT == MVT::v8i16 ||
342      LocVT == MVT::v16i8 ||
343      LocVT == MVT::v4f32 ||
344      LocVT == MVT::v2f64 ||
345      LocVT == MVT::v8f16 ||
346      LocVT == MVT::v8bf16) {
347    static const MCPhysReg RegList15[] = {
348      AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
349    };
350    if (unsigned Reg = State.AllocateReg(RegList15)) {
351      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
352      return false;
353    }
354  }
355
356  if (LocVT == MVT::i1 ||
357      LocVT == MVT::i8 ||
358      LocVT == MVT::i16 ||
359      LocVT == MVT::f16 ||
360      LocVT == MVT::bf16) {
361    unsigned Offset16 = State.AllocateStack(8, Align(8));
362    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
363    return false;
364  }
365
366  if (LocVT == MVT::i32 ||
367      LocVT == MVT::f32) {
368    unsigned Offset17 = State.AllocateStack(8, Align(8));
369    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset17, LocVT, LocInfo));
370    return false;
371  }
372
373  if (LocVT == MVT::i64 ||
374      LocVT == MVT::f64 ||
375      LocVT == MVT::v1f64 ||
376      LocVT == MVT::v2f32 ||
377      LocVT == MVT::v1i64 ||
378      LocVT == MVT::v2i32 ||
379      LocVT == MVT::v4i16 ||
380      LocVT == MVT::v8i8 ||
381      LocVT == MVT::v4f16 ||
382      LocVT == MVT::v4bf16) {
383    unsigned Offset18 = State.AllocateStack(8, Align(8));
384    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset18, LocVT, LocInfo));
385    return false;
386  }
387
388  if (LocVT == MVT::f128 ||
389      LocVT == MVT::v2i64 ||
390      LocVT == MVT::v4i32 ||
391      LocVT == MVT::v8i16 ||
392      LocVT == MVT::v16i8 ||
393      LocVT == MVT::v4f32 ||
394      LocVT == MVT::v2f64 ||
395      LocVT == MVT::v8f16 ||
396      LocVT == MVT::v8bf16) {
397    unsigned Offset19 = State.AllocateStack(16, Align(16));
398    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset19, LocVT, LocInfo));
399    return false;
400  }
401
402  return true; // CC didn't match.
403}
404
405
406bool llvm::CC_AArch64_Arm64EC_VarArg(unsigned ValNo, MVT ValVT,
407                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
408                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
409
410  if (LocVT == MVT::f16 ||
411      LocVT == MVT::bf16) {
412    LocVT = MVT::i16;
413    LocInfo = CCValAssign::BCvt;
414  }
415
416  if (LocVT == MVT::f32) {
417    LocVT = MVT::i32;
418    LocInfo = CCValAssign::BCvt;
419  }
420
421  if (LocVT == MVT::f64 ||
422      LocVT == MVT::v1f64 ||
423      LocVT == MVT::v1i64 ||
424      LocVT == MVT::v2f32 ||
425      LocVT == MVT::v2i32 ||
426      LocVT == MVT::v4i16 ||
427      LocVT == MVT::v4f16 ||
428      LocVT == MVT::v4bf16 ||
429      LocVT == MVT::v8i8 ||
430      LocVT == MVT::iPTR) {
431    LocVT = MVT::i64;
432    LocInfo = CCValAssign::BCvt;
433  }
434
435  if (LocVT == MVT::f128 ||
436      LocVT == MVT::v2f64 ||
437      LocVT == MVT::v2i64 ||
438      LocVT == MVT::v4i32 ||
439      LocVT == MVT::v4f32 ||
440      LocVT == MVT::v8i16 ||
441      LocVT == MVT::v8f16 ||
442      LocVT == MVT::v8bf16 ||
443      LocVT == MVT::v16i8) {
444    LocVT = MVT::i64;
445    LocInfo = CCValAssign::Indirect;
446  }
447
448  if (LocVT == MVT::nxv16i8 ||
449      LocVT == MVT::nxv8i16 ||
450      LocVT == MVT::nxv4i32 ||
451      LocVT == MVT::nxv2i64 ||
452      LocVT == MVT::nxv2f16 ||
453      LocVT == MVT::nxv4f16 ||
454      LocVT == MVT::nxv8f16 ||
455      LocVT == MVT::nxv2bf16 ||
456      LocVT == MVT::nxv4bf16 ||
457      LocVT == MVT::nxv8bf16 ||
458      LocVT == MVT::nxv2f32 ||
459      LocVT == MVT::nxv4f32 ||
460      LocVT == MVT::nxv2f64) {
461    LocVT = MVT::i64;
462    LocInfo = CCValAssign::Indirect;
463  }
464
465  if (LocVT == MVT::nxv2i1 ||
466      LocVT == MVT::nxv4i1 ||
467      LocVT == MVT::nxv8i1 ||
468      LocVT == MVT::nxv16i1) {
469    LocVT = MVT::i64;
470    LocInfo = CCValAssign::Indirect;
471  }
472
473  if (ArgFlags.isInReg()) {
474    if (LocVT == MVT::i64) {
475      if (ArgFlags.isSRet()) {
476        if (LocVT == MVT::i64) {
477          static const MCPhysReg RegList1[] = {
478            AArch64::X0, AArch64::X1
479          };
480          if (unsigned Reg = State.AllocateReg(RegList1)) {
481            State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
482            return false;
483          }
484        }
485      }
486    }
487  }
488
489  if (ArgFlags.isSRet()) {
490    if (LocVT == MVT::i64) {
491      if (unsigned Reg = State.AllocateReg(AArch64::X8)) {
492        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
493        return false;
494      }
495    }
496  }
497
498  if (ArgFlags.isByVal()) {
499    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, Align(8), ArgFlags);
500    return false;
501  }
502
503  if (LocVT == MVT::i1 ||
504      LocVT == MVT::i8 ||
505      LocVT == MVT::i16) {
506    LocVT = MVT::i32;
507    if (ArgFlags.isSExt())
508      LocInfo = CCValAssign::SExt;
509    else if (ArgFlags.isZExt())
510      LocInfo = CCValAssign::ZExt;
511    else
512      LocInfo = CCValAssign::AExt;
513  }
514
515  if (LocVT == MVT::i32) {
516    static const MCPhysReg RegList2[] = {
517      AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3
518    };
519    if (unsigned Reg = State.AllocateReg(RegList2)) {
520      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
521      return false;
522    }
523  }
524
525  if (LocVT == MVT::i64) {
526    static const MCPhysReg RegList3[] = {
527      AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3
528    };
529    if (unsigned Reg = State.AllocateReg(RegList3)) {
530      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
531      return false;
532    }
533  }
534
535  if (LocVT == MVT::i32 ||
536      LocVT == MVT::i64) {
537    unsigned Offset4 = State.AllocateStack(8, Align(8));
538    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
539    return false;
540  }
541
542  return true; // CC didn't match.
543}
544
545
546bool llvm::CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT,
547                                MVT LocVT, CCValAssign::LocInfo LocInfo,
548                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
549
550  if (LocVT == MVT::iPTR) {
551    LocVT = MVT::i64;
552    LocInfo = CCValAssign::BCvt;
553  }
554
555  if (LocVT == MVT::v2f32) {
556    LocVT = MVT::v2i32;
557    LocInfo = CCValAssign::BCvt;
558  }
559
560  if (LocVT == MVT::v2f64 ||
561      LocVT == MVT::v4f32 ||
562      LocVT == MVT::f128) {
563    LocVT = MVT::v2i64;
564    LocInfo = CCValAssign::BCvt;
565  }
566
567  if (ArgFlags.isSRet()) {
568    if (LocVT == MVT::i64) {
569      if (unsigned Reg = State.AllocateReg(AArch64::X8)) {
570        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
571        return false;
572      }
573    }
574  }
575
576  if (ArgFlags.isByVal()) {
577    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, Align(8), ArgFlags);
578    return false;
579  }
580
581  if (ArgFlags.isSwiftSelf()) {
582    if (LocVT == MVT::i64) {
583      if (unsigned Reg = State.AllocateReg(AArch64::X20)) {
584        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
585        return false;
586      }
587    }
588  }
589
590  if (ArgFlags.isSwiftError()) {
591    if (LocVT == MVT::i64) {
592      if (unsigned Reg = State.AllocateReg(AArch64::X21)) {
593        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
594        return false;
595      }
596    }
597  }
598
599  if (ArgFlags.isSwiftAsync()) {
600    if (LocVT == MVT::i64) {
601      if (unsigned Reg = State.AllocateReg(AArch64::X22)) {
602        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
603        return false;
604      }
605    }
606  }
607
608  if (ArgFlags.isInConsecutiveRegs()) {
609    if (CC_AArch64_Custom_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
610      return false;
611  }
612
613  if (LocVT == MVT::i1 ||
614      LocVT == MVT::i8 ||
615      LocVT == MVT::i16) {
616    LocVT = MVT::i32;
617    if (ArgFlags.isSExt())
618      LocInfo = CCValAssign::SExt;
619    else if (ArgFlags.isZExt())
620      LocInfo = CCValAssign::ZExt;
621    else
622      LocInfo = CCValAssign::AExt;
623  }
624
625  if (LocVT == MVT::i32) {
626    static const MCPhysReg RegList1[] = {
627      AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
628    };
629    if (unsigned Reg = State.AllocateReg(RegList1)) {
630      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
631      return false;
632    }
633  }
634
635  if (LocVT == MVT::i64) {
636    if (ArgFlags.isSplit()) {
637      static const MCPhysReg RegList2[] = {
638        AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6
639      };
640      if (unsigned Reg = State.AllocateReg(RegList2)) {
641        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
642        return false;
643      }
644    }
645  }
646
647  if (LocVT == MVT::i64) {
648    if (ArgFlags.isSplit()) {
649      static const MCPhysReg ShadowRegList3[] = {
650        AArch64::X7
651      };
652      unsigned Offset4 = State.AllocateStack(8, Align(16), ShadowRegList3);
653      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
654      return false;
655    }
656  }
657
658  if (LocVT == MVT::i64) {
659    static const MCPhysReg RegList5[] = {
660      AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
661    };
662    if (unsigned Reg = State.AllocateReg(RegList5)) {
663      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
664      return false;
665    }
666  }
667
668  if (LocVT == MVT::f16) {
669    static const MCPhysReg RegList6[] = {
670      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
671    };
672    if (unsigned Reg = State.AllocateReg(RegList6)) {
673      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
674      return false;
675    }
676  }
677
678  if (LocVT == MVT::bf16) {
679    static const MCPhysReg RegList7[] = {
680      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
681    };
682    if (unsigned Reg = State.AllocateReg(RegList7)) {
683      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
684      return false;
685    }
686  }
687
688  if (LocVT == MVT::f32) {
689    static const MCPhysReg RegList8[] = {
690      AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
691    };
692    if (unsigned Reg = State.AllocateReg(RegList8)) {
693      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
694      return false;
695    }
696  }
697
698  if (LocVT == MVT::f64) {
699    static const MCPhysReg RegList9[] = {
700      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
701    };
702    if (unsigned Reg = State.AllocateReg(RegList9)) {
703      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
704      return false;
705    }
706  }
707
708  if (LocVT == MVT::v1i64 ||
709      LocVT == MVT::v2i32 ||
710      LocVT == MVT::v4i16 ||
711      LocVT == MVT::v8i8 ||
712      LocVT == MVT::v1f64 ||
713      LocVT == MVT::v2f32 ||
714      LocVT == MVT::v4f16 ||
715      LocVT == MVT::v4bf16) {
716    static const MCPhysReg RegList10[] = {
717      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
718    };
719    if (unsigned Reg = State.AllocateReg(RegList10)) {
720      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
721      return false;
722    }
723  }
724
725  if (LocVT == MVT::v2i64 ||
726      LocVT == MVT::v4i32 ||
727      LocVT == MVT::v8i16 ||
728      LocVT == MVT::v16i8 ||
729      LocVT == MVT::v4f32 ||
730      LocVT == MVT::v2f64 ||
731      LocVT == MVT::v8f16 ||
732      LocVT == MVT::v8bf16) {
733    static const MCPhysReg RegList11[] = {
734      AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
735    };
736    if (unsigned Reg = State.AllocateReg(RegList11)) {
737      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
738      return false;
739    }
740  }
741
742  if (ValVT == MVT::i1 || ValVT == MVT::i8) {
743    unsigned Offset12 = State.AllocateStack(1, Align(1));
744    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
745    return false;
746  }
747
748  if (ValVT == MVT::i16 || ValVT == MVT::f16 || ValVT == MVT::bf16) {
749    unsigned Offset13 = State.AllocateStack(2, Align(2));
750    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
751    return false;
752  }
753
754  if (LocVT == MVT::i32 ||
755      LocVT == MVT::f32) {
756    unsigned Offset14 = State.AllocateStack(4, Align(4));
757    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
758    return false;
759  }
760
761  if (ArgFlags.isPointer()) {
762    if (State.getMachineFunction().getDataLayout().getPointerSize() == 4) {
763      LocVT = MVT::i32;
764      LocInfo = CCValAssign::Trunc;
765    }
766  }
767
768  if (ArgFlags.isPointer()) {
769    if (State.getMachineFunction().getDataLayout().getPointerSize() == 4) {
770      unsigned Offset15 = State.AllocateStack(4, Align(4));
771      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
772      return false;
773    }
774  }
775
776  if (LocVT == MVT::i64 ||
777      LocVT == MVT::f64 ||
778      LocVT == MVT::v1f64 ||
779      LocVT == MVT::v2f32 ||
780      LocVT == MVT::v1i64 ||
781      LocVT == MVT::v2i32 ||
782      LocVT == MVT::v4i16 ||
783      LocVT == MVT::v8i8 ||
784      LocVT == MVT::v4f16 ||
785      LocVT == MVT::v4bf16) {
786    unsigned Offset16 = State.AllocateStack(8, Align(8));
787    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
788    return false;
789  }
790
791  if (LocVT == MVT::v2i64 ||
792      LocVT == MVT::v4i32 ||
793      LocVT == MVT::v8i16 ||
794      LocVT == MVT::v16i8 ||
795      LocVT == MVT::v4f32 ||
796      LocVT == MVT::v2f64 ||
797      LocVT == MVT::v8f16 ||
798      LocVT == MVT::v8bf16) {
799    unsigned Offset17 = State.AllocateStack(16, Align(16));
800    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset17, LocVT, LocInfo));
801    return false;
802  }
803
804  return true; // CC didn't match.
805}
806
807
808bool llvm::CC_AArch64_DarwinPCS_ILP32_VarArg(unsigned ValNo, MVT ValVT,
809                                             MVT LocVT, CCValAssign::LocInfo LocInfo,
810                                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
811
812  if (LocVT == MVT::v2f32) {
813    LocVT = MVT::v2i32;
814    LocInfo = CCValAssign::BCvt;
815  }
816
817  if (LocVT == MVT::v2f64 ||
818      LocVT == MVT::v4f32 ||
819      LocVT == MVT::f128) {
820    LocVT = MVT::v2i64;
821    LocInfo = CCValAssign::BCvt;
822  }
823
824  if (LocVT == MVT::i8 ||
825      LocVT == MVT::i16) {
826    LocVT = MVT::i32;
827    if (ArgFlags.isSExt())
828      LocInfo = CCValAssign::SExt;
829    else if (ArgFlags.isZExt())
830      LocInfo = CCValAssign::ZExt;
831    else
832      LocInfo = CCValAssign::AExt;
833  }
834
835  if (LocVT == MVT::f16 ||
836      LocVT == MVT::bf16) {
837    LocVT = MVT::f32;
838    LocInfo = CCValAssign::FPExt;
839  }
840
841  if (ArgFlags.isPointer()) {
842    if (State.getMachineFunction().getDataLayout().getPointerSize() == 4) {
843      LocVT = MVT::i32;
844      LocInfo = CCValAssign::Trunc;
845    }
846  }
847
848  if (LocVT == MVT::i32 ||
849      LocVT == MVT::f32) {
850    unsigned Offset1 = State.AllocateStack(4, Align(4));
851    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
852    return false;
853  }
854
855  if (LocVT == MVT::i64) {
856    if (ArgFlags.isSplit()) {
857      unsigned Offset2 = State.AllocateStack(8, Align(16));
858      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
859      return false;
860    }
861  }
862
863  if (LocVT == MVT::i64 ||
864      LocVT == MVT::f64 ||
865      LocVT == MVT::v1i64 ||
866      LocVT == MVT::v2i32 ||
867      LocVT == MVT::v4i16 ||
868      LocVT == MVT::v8i8 ||
869      LocVT == MVT::v1f64 ||
870      LocVT == MVT::v2f32 ||
871      LocVT == MVT::v4f16 ||
872      LocVT == MVT::v4bf16) {
873    unsigned Offset3 = State.AllocateStack(8, Align(8));
874    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
875    return false;
876  }
877
878  if (LocVT == MVT::v2i64 ||
879      LocVT == MVT::v4i32 ||
880      LocVT == MVT::v8i16 ||
881      LocVT == MVT::v16i8 ||
882      LocVT == MVT::v4f32 ||
883      LocVT == MVT::v2f64 ||
884      LocVT == MVT::v8f16 ||
885      LocVT == MVT::v8bf16) {
886    unsigned Offset4 = State.AllocateStack(16, Align(16));
887    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
888    return false;
889  }
890
891  return true; // CC didn't match.
892}
893
894
895bool llvm::CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT,
896                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
897                                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
898
899  if (LocVT == MVT::iPTR) {
900    LocVT = MVT::i64;
901    LocInfo = CCValAssign::BCvt;
902  }
903
904  if (LocVT == MVT::v2f32) {
905    LocVT = MVT::v2i32;
906    LocInfo = CCValAssign::BCvt;
907  }
908
909  if (LocVT == MVT::v2f64 ||
910      LocVT == MVT::v4f32 ||
911      LocVT == MVT::f128) {
912    LocVT = MVT::v2i64;
913    LocInfo = CCValAssign::BCvt;
914  }
915
916  if (ArgFlags.isInConsecutiveRegs()) {
917    if (CC_AArch64_Custom_Stack_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
918      return false;
919  }
920
921  if (LocVT == MVT::i8 ||
922      LocVT == MVT::i16 ||
923      LocVT == MVT::i32) {
924    LocVT = MVT::i64;
925    if (ArgFlags.isSExt())
926      LocInfo = CCValAssign::SExt;
927    else if (ArgFlags.isZExt())
928      LocInfo = CCValAssign::ZExt;
929    else
930      LocInfo = CCValAssign::AExt;
931  }
932
933  if (LocVT == MVT::f16 ||
934      LocVT == MVT::bf16 ||
935      LocVT == MVT::f32) {
936    LocVT = MVT::f64;
937    LocInfo = CCValAssign::FPExt;
938  }
939
940  if (LocVT == MVT::i64) {
941    if (ArgFlags.isSplit()) {
942      unsigned Offset1 = State.AllocateStack(8, Align(16));
943      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
944      return false;
945    }
946  }
947
948  if (LocVT == MVT::i64 ||
949      LocVT == MVT::f64 ||
950      LocVT == MVT::v1i64 ||
951      LocVT == MVT::v2i32 ||
952      LocVT == MVT::v4i16 ||
953      LocVT == MVT::v8i8 ||
954      LocVT == MVT::v1f64 ||
955      LocVT == MVT::v2f32 ||
956      LocVT == MVT::v4f16 ||
957      LocVT == MVT::v4bf16) {
958    unsigned Offset2 = State.AllocateStack(8, Align(8));
959    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
960    return false;
961  }
962
963  if (LocVT == MVT::v2i64 ||
964      LocVT == MVT::v4i32 ||
965      LocVT == MVT::v8i16 ||
966      LocVT == MVT::v16i8 ||
967      LocVT == MVT::v4f32 ||
968      LocVT == MVT::v2f64 ||
969      LocVT == MVT::v8f16 ||
970      LocVT == MVT::v8bf16) {
971    unsigned Offset3 = State.AllocateStack(16, Align(16));
972    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
973    return false;
974  }
975
976  return true; // CC didn't match.
977}
978
979
980bool llvm::CC_AArch64_GHC(unsigned ValNo, MVT ValVT,
981                          MVT LocVT, CCValAssign::LocInfo LocInfo,
982                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
983
984  if (LocVT == MVT::iPTR) {
985    LocVT = MVT::i64;
986    LocInfo = CCValAssign::BCvt;
987  }
988
989  if (LocVT == MVT::v1i64 ||
990      LocVT == MVT::v2i32 ||
991      LocVT == MVT::v4i16 ||
992      LocVT == MVT::v8i8 ||
993      LocVT == MVT::v2f32) {
994    LocVT = MVT::f64;
995    LocInfo = CCValAssign::BCvt;
996  }
997
998  if (LocVT == MVT::v2i64 ||
999      LocVT == MVT::v4i32 ||
1000      LocVT == MVT::v8i16 ||
1001      LocVT == MVT::v16i8 ||
1002      LocVT == MVT::v4f32 ||
1003      LocVT == MVT::f128) {
1004    LocVT = MVT::v2f64;
1005    LocInfo = CCValAssign::BCvt;
1006  }
1007
1008  if (LocVT == MVT::v2f64) {
1009    static const MCPhysReg RegList1[] = {
1010      AArch64::Q4, AArch64::Q5
1011    };
1012    if (unsigned Reg = State.AllocateReg(RegList1)) {
1013      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1014      return false;
1015    }
1016  }
1017
1018  if (LocVT == MVT::f32) {
1019    static const MCPhysReg RegList2[] = {
1020      AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11
1021    };
1022    if (unsigned Reg = State.AllocateReg(RegList2)) {
1023      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1024      return false;
1025    }
1026  }
1027
1028  if (LocVT == MVT::f64) {
1029    static const MCPhysReg RegList3[] = {
1030      AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15
1031    };
1032    if (unsigned Reg = State.AllocateReg(RegList3)) {
1033      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1034      return false;
1035    }
1036  }
1037
1038  if (LocVT == MVT::i8 ||
1039      LocVT == MVT::i16 ||
1040      LocVT == MVT::i32) {
1041    LocVT = MVT::i64;
1042    if (ArgFlags.isSExt())
1043      LocInfo = CCValAssign::SExt;
1044    else if (ArgFlags.isZExt())
1045      LocInfo = CCValAssign::ZExt;
1046    else
1047      LocInfo = CCValAssign::AExt;
1048  }
1049
1050  if (LocVT == MVT::i64) {
1051    static const MCPhysReg RegList4[] = {
1052      AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28
1053    };
1054    if (unsigned Reg = State.AllocateReg(RegList4)) {
1055      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1056      return false;
1057    }
1058  }
1059
1060  return true; // CC didn't match.
1061}
1062
1063
1064bool llvm::CC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
1065                                MVT LocVT, CCValAssign::LocInfo LocInfo,
1066                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
1067
1068  if (LocVT == MVT::i1 ||
1069      LocVT == MVT::i8 ||
1070      LocVT == MVT::i16) {
1071    LocVT = MVT::i32;
1072    if (ArgFlags.isSExt())
1073      LocInfo = CCValAssign::SExt;
1074    else if (ArgFlags.isZExt())
1075      LocInfo = CCValAssign::ZExt;
1076    else
1077      LocInfo = CCValAssign::AExt;
1078  }
1079
1080  if (LocVT == MVT::i32) {
1081    if (unsigned Reg = State.AllocateReg(AArch64::W0)) {
1082      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1083      return false;
1084    }
1085  }
1086
1087  if (LocVT == MVT::i64) {
1088    if (unsigned Reg = State.AllocateReg(AArch64::X0)) {
1089      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1090      return false;
1091    }
1092  }
1093
1094  if (LocVT == MVT::i32 ||
1095      LocVT == MVT::f32) {
1096    unsigned Offset1 = State.AllocateStack(4, Align(4));
1097    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
1098    return false;
1099  }
1100
1101  if (LocVT == MVT::i64 ||
1102      LocVT == MVT::f64) {
1103    unsigned Offset2 = State.AllocateStack(8, Align(8));
1104    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
1105    return false;
1106  }
1107
1108  return true; // CC didn't match.
1109}
1110
1111
1112bool llvm::CC_AArch64_Win64_CFGuard_Check(unsigned ValNo, MVT ValVT,
1113                                          MVT LocVT, CCValAssign::LocInfo LocInfo,
1114                                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
1115
1116  if (LocVT == MVT::i64) {
1117    if (unsigned Reg = State.AllocateReg(AArch64::X15)) {
1118      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1119      return false;
1120    }
1121  }
1122
1123  return true; // CC didn't match.
1124}
1125
1126
1127bool llvm::CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT,
1128                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
1129                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
1130
1131  if (LocVT == MVT::f16 ||
1132      LocVT == MVT::bf16) {
1133    LocVT = MVT::i16;
1134    LocInfo = CCValAssign::BCvt;
1135  }
1136
1137  if (LocVT == MVT::f32) {
1138    LocVT = MVT::i32;
1139    LocInfo = CCValAssign::BCvt;
1140  }
1141
1142  if (LocVT == MVT::f64) {
1143    LocVT = MVT::i64;
1144    LocInfo = CCValAssign::BCvt;
1145  }
1146
1147  if (!CC_AArch64_AAPCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
1148    return false;
1149
1150  return true; // CC didn't match.
1151}
1152
1153
1154bool llvm::RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT,
1155                               MVT LocVT, CCValAssign::LocInfo LocInfo,
1156                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
1157
1158  if (LocVT == MVT::iPTR) {
1159    LocVT = MVT::i64;
1160    LocInfo = CCValAssign::BCvt;
1161  }
1162
1163  if (LocVT == MVT::v2f32) {
1164    LocVT = MVT::v2i32;
1165    LocInfo = CCValAssign::BCvt;
1166  }
1167
1168  if (LocVT == MVT::v2f64 ||
1169      LocVT == MVT::v4f32) {
1170    LocVT = MVT::v2i64;
1171    LocInfo = CCValAssign::BCvt;
1172  }
1173
1174  if (ArgFlags.isInConsecutiveRegs()) {
1175    if (CC_AArch64_Custom_Block(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
1176      return false;
1177  }
1178
1179  if (ArgFlags.isSwiftError()) {
1180    if (LocVT == MVT::i64) {
1181      if (unsigned Reg = State.AllocateReg(AArch64::X21)) {
1182        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1183        return false;
1184      }
1185    }
1186  }
1187
1188  if (State.getMachineFunction().getDataLayout().isBigEndian()) {
1189    if (LocVT == MVT::v2i32 ||
1190        LocVT == MVT::v2f32 ||
1191        LocVT == MVT::v4i16 ||
1192        LocVT == MVT::v4f16 ||
1193        LocVT == MVT::v4bf16 ||
1194        LocVT == MVT::v8i8) {
1195      LocVT = MVT::f64;
1196      LocInfo = CCValAssign::BCvt;
1197    }
1198  }
1199
1200  if (State.getMachineFunction().getDataLayout().isBigEndian()) {
1201    if (LocVT == MVT::v2i64 ||
1202        LocVT == MVT::v2f64 ||
1203        LocVT == MVT::v4i32 ||
1204        LocVT == MVT::v4f32 ||
1205        LocVT == MVT::v8i16 ||
1206        LocVT == MVT::v8f16 ||
1207        LocVT == MVT::v8bf16 ||
1208        LocVT == MVT::v16i8) {
1209      LocVT = MVT::f128;
1210      LocInfo = CCValAssign::BCvt;
1211    }
1212  }
1213
1214  if (LocVT == MVT::i1 ||
1215      LocVT == MVT::i8 ||
1216      LocVT == MVT::i16) {
1217    LocVT = MVT::i32;
1218    if (ArgFlags.isSExt())
1219      LocInfo = CCValAssign::SExt;
1220    else if (ArgFlags.isZExt())
1221      LocInfo = CCValAssign::ZExt;
1222    else
1223      LocInfo = CCValAssign::AExt;
1224  }
1225
1226  if (LocVT == MVT::i32) {
1227    static const MCPhysReg RegList1[] = {
1228      AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
1229    };
1230    if (unsigned Reg = State.AllocateReg(RegList1)) {
1231      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1232      return false;
1233    }
1234  }
1235
1236  if (LocVT == MVT::i64) {
1237    static const MCPhysReg RegList2[] = {
1238      AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
1239    };
1240    if (unsigned Reg = State.AllocateReg(RegList2)) {
1241      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1242      return false;
1243    }
1244  }
1245
1246  if (LocVT == MVT::f16) {
1247    static const MCPhysReg RegList3[] = {
1248      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
1249    };
1250    if (unsigned Reg = State.AllocateReg(RegList3)) {
1251      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1252      return false;
1253    }
1254  }
1255
1256  if (LocVT == MVT::bf16) {
1257    static const MCPhysReg RegList4[] = {
1258      AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7
1259    };
1260    if (unsigned Reg = State.AllocateReg(RegList4)) {
1261      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1262      return false;
1263    }
1264  }
1265
1266  if (LocVT == MVT::f32) {
1267    static const MCPhysReg RegList5[] = {
1268      AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
1269    };
1270    if (unsigned Reg = State.AllocateReg(RegList5)) {
1271      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1272      return false;
1273    }
1274  }
1275
1276  if (LocVT == MVT::f64) {
1277    static const MCPhysReg RegList6[] = {
1278      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
1279    };
1280    if (unsigned Reg = State.AllocateReg(RegList6)) {
1281      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1282      return false;
1283    }
1284  }
1285
1286  if (LocVT == MVT::v1i64 ||
1287      LocVT == MVT::v2i32 ||
1288      LocVT == MVT::v4i16 ||
1289      LocVT == MVT::v8i8 ||
1290      LocVT == MVT::v1f64 ||
1291      LocVT == MVT::v2f32 ||
1292      LocVT == MVT::v4f16 ||
1293      LocVT == MVT::v4bf16) {
1294    static const MCPhysReg RegList7[] = {
1295      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
1296    };
1297    if (unsigned Reg = State.AllocateReg(RegList7)) {
1298      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1299      return false;
1300    }
1301  }
1302
1303  if (LocVT == MVT::f128 ||
1304      LocVT == MVT::v2i64 ||
1305      LocVT == MVT::v4i32 ||
1306      LocVT == MVT::v8i16 ||
1307      LocVT == MVT::v16i8 ||
1308      LocVT == MVT::v4f32 ||
1309      LocVT == MVT::v2f64 ||
1310      LocVT == MVT::v8f16 ||
1311      LocVT == MVT::v8bf16) {
1312    static const MCPhysReg RegList8[] = {
1313      AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
1314    };
1315    if (unsigned Reg = State.AllocateReg(RegList8)) {
1316      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1317      return false;
1318    }
1319  }
1320
1321  if (LocVT == MVT::nxv16i8 ||
1322      LocVT == MVT::nxv8i16 ||
1323      LocVT == MVT::nxv4i32 ||
1324      LocVT == MVT::nxv2i64 ||
1325      LocVT == MVT::nxv2f16 ||
1326      LocVT == MVT::nxv4f16 ||
1327      LocVT == MVT::nxv8f16 ||
1328      LocVT == MVT::nxv2bf16 ||
1329      LocVT == MVT::nxv4bf16 ||
1330      LocVT == MVT::nxv8bf16 ||
1331      LocVT == MVT::nxv2f32 ||
1332      LocVT == MVT::nxv4f32 ||
1333      LocVT == MVT::nxv2f64) {
1334    static const MCPhysReg RegList9[] = {
1335      AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7
1336    };
1337    if (unsigned Reg = State.AllocateReg(RegList9)) {
1338      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1339      return false;
1340    }
1341  }
1342
1343  if (LocVT == MVT::nxv1i1 ||
1344      LocVT == MVT::nxv2i1 ||
1345      LocVT == MVT::nxv4i1 ||
1346      LocVT == MVT::nxv8i1 ||
1347      LocVT == MVT::nxv16i1) {
1348    static const MCPhysReg RegList10[] = {
1349      AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3
1350    };
1351    if (unsigned Reg = State.AllocateReg(RegList10)) {
1352      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1353      return false;
1354    }
1355  }
1356
1357  return true; // CC didn't match.
1358}
1359
1360
1361bool llvm::RetCC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT,
1362                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
1363                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
1364
1365  if (LocVT == MVT::i32) {
1366    static const MCPhysReg RegList1[] = {
1367      AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7
1368    };
1369    if (unsigned Reg = State.AllocateReg(RegList1)) {
1370      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1371      return false;
1372    }
1373  }
1374
1375  if (LocVT == MVT::i64) {
1376    static const MCPhysReg RegList2[] = {
1377      AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7
1378    };
1379    if (unsigned Reg = State.AllocateReg(RegList2)) {
1380      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1381      return false;
1382    }
1383  }
1384
1385  if (LocVT == MVT::f32) {
1386    static const MCPhysReg RegList3[] = {
1387      AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7
1388    };
1389    if (unsigned Reg = State.AllocateReg(RegList3)) {
1390      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1391      return false;
1392    }
1393  }
1394
1395  if (LocVT == MVT::f64) {
1396    static const MCPhysReg RegList4[] = {
1397      AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7
1398    };
1399    if (unsigned Reg = State.AllocateReg(RegList4)) {
1400      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
1401      return false;
1402    }
1403  }
1404
1405  return true; // CC didn't match.
1406}
1407
1408#else
1409
1410const MCRegister CC_AArch64_AAPCS_ArgRegs[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::X0, AArch64::X1, AArch64::X18, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7 };
1411const MCRegister CC_AArch64_Arm64EC_VarArg_ArgRegs[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X8 };
1412const MCRegister CC_AArch64_DarwinPCS_ArgRegs[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8 };
1413const MCRegister CC_AArch64_DarwinPCS_ILP32_VarArg_ArgRegs[] = { 0 };
1414const MCRegister CC_AArch64_DarwinPCS_VarArg_ArgRegs[] = { 0 };
1415const MCRegister CC_AArch64_GHC_ArgRegs[] = { AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::Q4, AArch64::Q5, AArch64::S10, AArch64::S11, AArch64::S8, AArch64::S9, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28 };
1416const MCRegister CC_AArch64_WebKit_JS_ArgRegs[] = { AArch64::W0, AArch64::X0 };
1417const MCRegister CC_AArch64_Win64_CFGuard_Check_ArgRegs[] = { AArch64::X15 };
1418const MCRegister CC_AArch64_Win64_VarArg_ArgRegs[] = { 0 };
1419const MCRegister RetCC_AArch64_AAPCS_ArgRegs[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7 };
1420const MCRegister RetCC_AArch64_WebKit_JS_ArgRegs[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 };
1421
1422// Registers used by Swift.
1423const MCRegister CC_AArch64_AAPCS_Swift_ArgRegs[] = { AArch64::X20, AArch64::X21, AArch64::X22 };
1424const MCRegister CC_AArch64_DarwinPCS_Swift_ArgRegs[] = { AArch64::X20, AArch64::X21, AArch64::X22 };
1425const MCRegister RetCC_AArch64_AAPCS_Swift_ArgRegs[] = { AArch64::X21 };
1426
1427#endif // CC_REGISTER_LIST
1428