1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Machine Code Emitter *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9uint64_t AArch64MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, 10 SmallVectorImpl<MCFixup> &Fixups, 11 const MCSubtargetInfo &STI) const { 12 static const uint64_t InstBits[] = { 13 UINT64_C(0), 14 UINT64_C(0), 15 UINT64_C(0), 16 UINT64_C(0), 17 UINT64_C(0), 18 UINT64_C(0), 19 UINT64_C(0), 20 UINT64_C(0), 21 UINT64_C(0), 22 UINT64_C(0), 23 UINT64_C(0), 24 UINT64_C(0), 25 UINT64_C(0), 26 UINT64_C(0), 27 UINT64_C(0), 28 UINT64_C(0), 29 UINT64_C(0), 30 UINT64_C(0), 31 UINT64_C(0), 32 UINT64_C(0), 33 UINT64_C(0), 34 UINT64_C(0), 35 UINT64_C(0), 36 UINT64_C(0), 37 UINT64_C(0), 38 UINT64_C(0), 39 UINT64_C(0), 40 UINT64_C(0), 41 UINT64_C(0), 42 UINT64_C(0), 43 UINT64_C(0), 44 UINT64_C(0), 45 UINT64_C(0), 46 UINT64_C(0), 47 UINT64_C(0), 48 UINT64_C(0), 49 UINT64_C(0), 50 UINT64_C(0), 51 UINT64_C(0), 52 UINT64_C(0), 53 UINT64_C(0), 54 UINT64_C(0), 55 UINT64_C(0), 56 UINT64_C(0), 57 UINT64_C(0), 58 UINT64_C(0), 59 UINT64_C(0), 60 UINT64_C(0), 61 UINT64_C(0), 62 UINT64_C(0), 63 UINT64_C(0), 64 UINT64_C(0), 65 UINT64_C(0), 66 UINT64_C(0), 67 UINT64_C(0), 68 UINT64_C(0), 69 UINT64_C(0), 70 UINT64_C(0), 71 UINT64_C(0), 72 UINT64_C(0), 73 UINT64_C(0), 74 UINT64_C(0), 75 UINT64_C(0), 76 UINT64_C(0), 77 UINT64_C(0), 78 UINT64_C(0), 79 UINT64_C(0), 80 UINT64_C(0), 81 UINT64_C(0), 82 UINT64_C(0), 83 UINT64_C(0), 84 UINT64_C(0), 85 UINT64_C(0), 86 UINT64_C(0), 87 UINT64_C(0), 88 UINT64_C(0), 89 UINT64_C(0), 90 UINT64_C(0), 91 UINT64_C(0), 92 UINT64_C(0), 93 UINT64_C(0), 94 UINT64_C(0), 95 UINT64_C(0), 96 UINT64_C(0), 97 UINT64_C(0), 98 UINT64_C(0), 99 UINT64_C(0), 100 UINT64_C(0), 101 UINT64_C(0), 102 UINT64_C(0), 103 UINT64_C(0), 104 UINT64_C(0), 105 UINT64_C(0), 106 UINT64_C(0), 107 UINT64_C(0), 108 UINT64_C(0), 109 UINT64_C(0), 110 UINT64_C(0), 111 UINT64_C(0), 112 UINT64_C(0), 113 UINT64_C(0), 114 UINT64_C(0), 115 UINT64_C(0), 116 UINT64_C(0), 117 UINT64_C(0), 118 UINT64_C(0), 119 UINT64_C(0), 120 UINT64_C(0), 121 UINT64_C(0), 122 UINT64_C(0), 123 UINT64_C(0), 124 UINT64_C(0), 125 UINT64_C(0), 126 UINT64_C(0), 127 UINT64_C(0), 128 UINT64_C(0), 129 UINT64_C(0), 130 UINT64_C(0), 131 UINT64_C(0), 132 UINT64_C(0), 133 UINT64_C(0), 134 UINT64_C(0), 135 UINT64_C(0), 136 UINT64_C(0), 137 UINT64_C(0), 138 UINT64_C(0), 139 UINT64_C(0), 140 UINT64_C(0), 141 UINT64_C(0), 142 UINT64_C(0), 143 UINT64_C(0), 144 UINT64_C(0), 145 UINT64_C(0), 146 UINT64_C(0), 147 UINT64_C(0), 148 UINT64_C(0), 149 UINT64_C(0), 150 UINT64_C(0), 151 UINT64_C(0), 152 UINT64_C(0), 153 UINT64_C(0), 154 UINT64_C(0), 155 UINT64_C(0), 156 UINT64_C(0), 157 UINT64_C(0), 158 UINT64_C(0), 159 UINT64_C(0), 160 UINT64_C(0), 161 UINT64_C(0), 162 UINT64_C(0), 163 UINT64_C(0), 164 UINT64_C(0), 165 UINT64_C(0), 166 UINT64_C(0), 167 UINT64_C(0), 168 UINT64_C(0), 169 UINT64_C(0), 170 UINT64_C(0), 171 UINT64_C(0), 172 UINT64_C(0), 173 UINT64_C(0), 174 UINT64_C(0), 175 UINT64_C(0), 176 UINT64_C(0), 177 UINT64_C(0), 178 UINT64_C(0), 179 UINT64_C(0), 180 UINT64_C(0), 181 UINT64_C(0), 182 UINT64_C(0), 183 UINT64_C(0), 184 UINT64_C(0), 185 UINT64_C(0), 186 UINT64_C(0), 187 UINT64_C(0), 188 UINT64_C(0), 189 UINT64_C(0), 190 UINT64_C(0), 191 UINT64_C(0), 192 UINT64_C(0), 193 UINT64_C(0), 194 UINT64_C(0), 195 UINT64_C(0), 196 UINT64_C(0), 197 UINT64_C(0), 198 UINT64_C(0), 199 UINT64_C(0), 200 UINT64_C(0), 201 UINT64_C(0), 202 UINT64_C(0), 203 UINT64_C(0), 204 UINT64_C(0), 205 UINT64_C(0), 206 UINT64_C(0), 207 UINT64_C(0), 208 UINT64_C(0), 209 UINT64_C(0), 210 UINT64_C(0), 211 UINT64_C(0), 212 UINT64_C(0), 213 UINT64_C(0), 214 UINT64_C(0), 215 UINT64_C(0), 216 UINT64_C(0), 217 UINT64_C(0), 218 UINT64_C(0), 219 UINT64_C(0), 220 UINT64_C(0), 221 UINT64_C(0), 222 UINT64_C(0), 223 UINT64_C(0), 224 UINT64_C(0), 225 UINT64_C(0), 226 UINT64_C(0), 227 UINT64_C(0), 228 UINT64_C(0), 229 UINT64_C(0), 230 UINT64_C(0), 231 UINT64_C(0), 232 UINT64_C(0), 233 UINT64_C(0), 234 UINT64_C(0), 235 UINT64_C(0), 236 UINT64_C(0), 237 UINT64_C(0), 238 UINT64_C(0), 239 UINT64_C(0), 240 UINT64_C(0), 241 UINT64_C(0), 242 UINT64_C(0), 243 UINT64_C(0), 244 UINT64_C(0), 245 UINT64_C(0), 246 UINT64_C(0), 247 UINT64_C(0), 248 UINT64_C(0), 249 UINT64_C(0), 250 UINT64_C(0), 251 UINT64_C(0), 252 UINT64_C(0), 253 UINT64_C(0), 254 UINT64_C(0), 255 UINT64_C(0), 256 UINT64_C(0), 257 UINT64_C(0), 258 UINT64_C(0), 259 UINT64_C(0), 260 UINT64_C(0), 261 UINT64_C(0), 262 UINT64_C(0), 263 UINT64_C(0), 264 UINT64_C(0), 265 UINT64_C(0), 266 UINT64_C(0), 267 UINT64_C(0), 268 UINT64_C(0), 269 UINT64_C(0), 270 UINT64_C(0), 271 UINT64_C(0), 272 UINT64_C(0), 273 UINT64_C(0), 274 UINT64_C(0), 275 UINT64_C(0), 276 UINT64_C(0), 277 UINT64_C(0), 278 UINT64_C(0), 279 UINT64_C(0), 280 UINT64_C(0), 281 UINT64_C(0), 282 UINT64_C(0), 283 UINT64_C(0), 284 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811 UINT64_C(0), 812 UINT64_C(0), 813 UINT64_C(0), 814 UINT64_C(0), 815 UINT64_C(0), 816 UINT64_C(0), 817 UINT64_C(0), 818 UINT64_C(0), 819 UINT64_C(0), 820 UINT64_C(0), 821 UINT64_C(0), 822 UINT64_C(0), 823 UINT64_C(0), 824 UINT64_C(0), 825 UINT64_C(0), 826 UINT64_C(0), 827 UINT64_C(0), 828 UINT64_C(0), 829 UINT64_C(0), 830 UINT64_C(0), 831 UINT64_C(0), 832 UINT64_C(0), 833 UINT64_C(0), 834 UINT64_C(0), 835 UINT64_C(0), 836 UINT64_C(0), 837 UINT64_C(0), 838 UINT64_C(0), 839 UINT64_C(0), 840 UINT64_C(0), 841 UINT64_C(0), 842 UINT64_C(0), 843 UINT64_C(0), 844 UINT64_C(0), 845 UINT64_C(0), 846 UINT64_C(0), 847 UINT64_C(0), 848 UINT64_C(0), 849 UINT64_C(0), 850 UINT64_C(0), 851 UINT64_C(0), 852 UINT64_C(0), 853 UINT64_C(0), 854 UINT64_C(0), 855 UINT64_C(0), 856 UINT64_C(0), 857 UINT64_C(0), 858 UINT64_C(0), 859 UINT64_C(0), 860 UINT64_C(0), 861 UINT64_C(0), 862 UINT64_C(0), 863 UINT64_C(0), 864 UINT64_C(0), 865 UINT64_C(0), 866 UINT64_C(0), 867 UINT64_C(0), 868 UINT64_C(0), 869 UINT64_C(0), 870 UINT64_C(0), 871 UINT64_C(0), 872 UINT64_C(0), 873 UINT64_C(0), 874 UINT64_C(0), 875 UINT64_C(0), 876 UINT64_C(0), 877 UINT64_C(0), 878 UINT64_C(0), 879 UINT64_C(0), 880 UINT64_C(0), 881 UINT64_C(0), 882 UINT64_C(0), 883 UINT64_C(0), 884 UINT64_C(0), 885 UINT64_C(0), 886 UINT64_C(0), 887 UINT64_C(0), 888 UINT64_C(0), 889 UINT64_C(0), 890 UINT64_C(0), 891 UINT64_C(0), 892 UINT64_C(0), 893 UINT64_C(0), 894 UINT64_C(0), 895 UINT64_C(0), 896 UINT64_C(0), 897 UINT64_C(0), 898 UINT64_C(0), 899 UINT64_C(0), 900 UINT64_C(0), 901 UINT64_C(0), 902 UINT64_C(0), 903 UINT64_C(0), 904 UINT64_C(0), 905 UINT64_C(0), 906 UINT64_C(0), 907 UINT64_C(0), 908 UINT64_C(0), 909 UINT64_C(0), 910 UINT64_C(0), 911 UINT64_C(0), 912 UINT64_C(0), 913 UINT64_C(0), 914 UINT64_C(0), 915 UINT64_C(0), 916 UINT64_C(0), 917 UINT64_C(0), 918 UINT64_C(0), 919 UINT64_C(0), 920 UINT64_C(0), 921 UINT64_C(0), 922 UINT64_C(0), 923 UINT64_C(0), 924 UINT64_C(0), 925 UINT64_C(0), 926 UINT64_C(0), 927 UINT64_C(0), 928 UINT64_C(0), 929 UINT64_C(0), 930 UINT64_C(0), 931 UINT64_C(0), 932 UINT64_C(0), 933 UINT64_C(0), 934 UINT64_C(0), 935 UINT64_C(0), 936 UINT64_C(0), 937 UINT64_C(0), 938 UINT64_C(0), 939 UINT64_C(0), 940 UINT64_C(0), 941 UINT64_C(0), 942 UINT64_C(0), 943 UINT64_C(0), 944 UINT64_C(0), 945 UINT64_C(0), 946 UINT64_C(0), 947 UINT64_C(0), 948 UINT64_C(0), 949 UINT64_C(0), 950 UINT64_C(0), 951 UINT64_C(0), 952 UINT64_C(0), 953 UINT64_C(0), 954 UINT64_C(0), 955 UINT64_C(0), 956 UINT64_C(0), 957 UINT64_C(0), 958 UINT64_C(0), 959 UINT64_C(0), 960 UINT64_C(0), 961 UINT64_C(0), 962 UINT64_C(0), 963 UINT64_C(0), 964 UINT64_C(0), 965 UINT64_C(0), 966 UINT64_C(0), 967 UINT64_C(0), 968 UINT64_C(0), 969 UINT64_C(0), 970 UINT64_C(0), 971 UINT64_C(0), 972 UINT64_C(0), 973 UINT64_C(0), 974 UINT64_C(0), 975 UINT64_C(0), 976 UINT64_C(0), 977 UINT64_C(0), 978 UINT64_C(0), 979 UINT64_C(0), 980 UINT64_C(0), 981 UINT64_C(0), 982 UINT64_C(0), 983 UINT64_C(0), 984 UINT64_C(0), 985 UINT64_C(0), 986 UINT64_C(0), 987 UINT64_C(0), 988 UINT64_C(0), 989 UINT64_C(0), 990 UINT64_C(0), 991 UINT64_C(0), 992 UINT64_C(0), 993 UINT64_C(0), 994 UINT64_C(0), 995 UINT64_C(0), 996 UINT64_C(0), 997 UINT64_C(0), 998 UINT64_C(0), 999 UINT64_C(0), 1000 UINT64_C(0), 1001 UINT64_C(0), 1002 UINT64_C(0), 1003 UINT64_C(0), 1004 UINT64_C(0), 1005 UINT64_C(0), 1006 UINT64_C(0), 1007 UINT64_C(0), 1008 UINT64_C(0), 1009 UINT64_C(0), 1010 UINT64_C(0), 1011 UINT64_C(0), 1012 UINT64_C(0), 1013 UINT64_C(0), 1014 UINT64_C(0), 1015 UINT64_C(0), 1016 UINT64_C(0), 1017 UINT64_C(0), 1018 UINT64_C(0), 1019 UINT64_C(0), 1020 UINT64_C(0), 1021 UINT64_C(0), 1022 UINT64_C(0), 1023 UINT64_C(0), 1024 UINT64_C(0), 1025 UINT64_C(0), 1026 UINT64_C(0), 1027 UINT64_C(0), 1028 UINT64_C(0), 1029 UINT64_C(0), 1030 UINT64_C(0), 1031 UINT64_C(0), 1032 UINT64_C(0), 1033 UINT64_C(0), 1034 UINT64_C(0), 1035 UINT64_C(0), 1036 UINT64_C(0), 1037 UINT64_C(0), 1038 UINT64_C(0), 1039 UINT64_C(0), 1040 UINT64_C(0), 1041 UINT64_C(0), 1042 UINT64_C(0), 1043 UINT64_C(0), 1044 UINT64_C(0), 1045 UINT64_C(0), 1046 UINT64_C(0), 1047 UINT64_C(0), 1048 UINT64_C(0), 1049 UINT64_C(0), 1050 UINT64_C(0), 1051 UINT64_C(0), 1052 UINT64_C(0), 1053 UINT64_C(0), 1054 UINT64_C(0), 1055 UINT64_C(0), 1056 UINT64_C(0), 1057 UINT64_C(0), 1058 UINT64_C(0), 1059 UINT64_C(0), 1060 UINT64_C(0), 1061 UINT64_C(0), 1062 UINT64_C(0), 1063 UINT64_C(0), 1064 UINT64_C(0), 1065 UINT64_C(0), 1066 UINT64_C(0), 1067 UINT64_C(0), 1068 UINT64_C(0), 1069 UINT64_C(0), 1070 UINT64_C(0), 1071 UINT64_C(0), 1072 UINT64_C(0), 1073 UINT64_C(0), 1074 UINT64_C(0), 1075 UINT64_C(0), 1076 UINT64_C(0), 1077 UINT64_C(0), 1078 UINT64_C(0), 1079 UINT64_C(0), 1080 UINT64_C(0), 1081 UINT64_C(0), 1082 UINT64_C(0), 1083 UINT64_C(0), 1084 UINT64_C(0), 1085 UINT64_C(0), 1086 UINT64_C(0), 1087 UINT64_C(0), 1088 UINT64_C(0), 1089 UINT64_C(0), 1090 UINT64_C(0), 1091 UINT64_C(0), 1092 UINT64_C(0), 1093 UINT64_C(0), 1094 UINT64_C(0), 1095 UINT64_C(0), 1096 UINT64_C(0), 1097 UINT64_C(0), 1098 UINT64_C(0), 1099 UINT64_C(0), 1100 UINT64_C(0), 1101 UINT64_C(0), 1102 UINT64_C(0), 1103 UINT64_C(0), 1104 UINT64_C(0), 1105 UINT64_C(0), 1106 UINT64_C(0), 1107 UINT64_C(0), 1108 UINT64_C(0), 1109 UINT64_C(0), 1110 UINT64_C(0), 1111 UINT64_C(0), 1112 UINT64_C(0), 1113 UINT64_C(0), 1114 UINT64_C(0), 1115 UINT64_C(0), 1116 UINT64_C(0), 1117 UINT64_C(0), 1118 UINT64_C(0), 1119 UINT64_C(0), 1120 UINT64_C(0), 1121 UINT64_C(0), 1122 UINT64_C(0), 1123 UINT64_C(0), 1124 UINT64_C(0), 1125 UINT64_C(0), 1126 UINT64_C(0), 1127 UINT64_C(0), 1128 UINT64_C(0), 1129 UINT64_C(0), 1130 UINT64_C(0), 1131 UINT64_C(0), 1132 UINT64_C(0), 1133 UINT64_C(0), 1134 UINT64_C(0), 1135 UINT64_C(0), 1136 UINT64_C(0), 1137 UINT64_C(0), 1138 UINT64_C(0), 1139 UINT64_C(0), 1140 UINT64_C(0), 1141 UINT64_C(0), 1142 UINT64_C(0), 1143 UINT64_C(0), 1144 UINT64_C(0), 1145 UINT64_C(0), 1146 UINT64_C(0), 1147 UINT64_C(0), 1148 UINT64_C(0), 1149 UINT64_C(0), 1150 UINT64_C(0), 1151 UINT64_C(0), 1152 UINT64_C(0), 1153 UINT64_C(0), 1154 UINT64_C(0), 1155 UINT64_C(0), 1156 UINT64_C(0), 1157 UINT64_C(0), 1158 UINT64_C(0), 1159 UINT64_C(0), 1160 UINT64_C(0), 1161 UINT64_C(0), 1162 UINT64_C(0), 1163 UINT64_C(0), 1164 UINT64_C(0), 1165 UINT64_C(0), 1166 UINT64_C(0), 1167 UINT64_C(0), 1168 UINT64_C(0), 1169 UINT64_C(0), 1170 UINT64_C(0), 1171 UINT64_C(0), 1172 UINT64_C(0), 1173 UINT64_C(0), 1174 UINT64_C(0), 1175 UINT64_C(0), 1176 UINT64_C(0), 1177 UINT64_C(0), 1178 UINT64_C(0), 1179 UINT64_C(0), 1180 UINT64_C(0), 1181 UINT64_C(0), 1182 UINT64_C(0), 1183 UINT64_C(0), 1184 UINT64_C(0), 1185 UINT64_C(0), 1186 UINT64_C(0), 1187 UINT64_C(0), 1188 UINT64_C(0), 1189 UINT64_C(0), 1190 UINT64_C(0), 1191 UINT64_C(0), 1192 UINT64_C(0), 1193 UINT64_C(0), 1194 UINT64_C(0), 1195 UINT64_C(0), 1196 UINT64_C(1522540544), // ABSWr 1197 UINT64_C(3670024192), // ABSXr 1198 UINT64_C(68591616), // ABS_ZPmZ_B 1199 UINT64_C(81174528), // ABS_ZPmZ_D 1200 UINT64_C(72785920), // ABS_ZPmZ_H 1201 UINT64_C(76980224), // ABS_ZPmZ_S 1202 UINT64_C(1310767104), // ABSv16i8 1203 UINT64_C(1591785472), // ABSv1i64 1204 UINT64_C(245413888), // ABSv2i32 1205 UINT64_C(1323350016), // ABSv2i64 1206 UINT64_C(241219584), // ABSv4i16 1207 UINT64_C(1319155712), // ABSv4i32 1208 UINT64_C(1314961408), // ABSv8i16 1209 UINT64_C(237025280), // ABSv8i8 1210 UINT64_C(1161875456), // ADCLB_ZZZ_D 1211 UINT64_C(1157681152), // ADCLB_ZZZ_S 1212 UINT64_C(1161876480), // ADCLT_ZZZ_D 1213 UINT64_C(1157682176), // ADCLT_ZZZ_S 1214 UINT64_C(973078528), // ADCSWr 1215 UINT64_C(3120562176), // ADCSXr 1216 UINT64_C(436207616), // ADCWr 1217 UINT64_C(2583691264), // ADCXr 1218 UINT64_C(2441084928), // ADDG 1219 UINT64_C(3234856960), // ADDHA_MPPZ_D 1220 UINT64_C(3230662656), // ADDHA_MPPZ_S 1221 UINT64_C(1163943936), // ADDHNB_ZZZ_B 1222 UINT64_C(1168138240), // ADDHNB_ZZZ_H 1223 UINT64_C(1172332544), // ADDHNB_ZZZ_S 1224 UINT64_C(1163944960), // ADDHNT_ZZZ_B 1225 UINT64_C(1168139264), // ADDHNT_ZZZ_H 1226 UINT64_C(1172333568), // ADDHNT_ZZZ_S 1227 UINT64_C(245383168), // ADDHNv2i64_v2i32 1228 UINT64_C(1319124992), // ADDHNv2i64_v4i32 1229 UINT64_C(241188864), // ADDHNv4i32_v4i16 1230 UINT64_C(1314930688), // ADDHNv4i32_v8i16 1231 UINT64_C(1310736384), // ADDHNv8i16_v16i8 1232 UINT64_C(236994560), // ADDHNv8i16_v8i8 1233 UINT64_C(73420800), // ADDPL_XXI 1234 UINT64_C(1142005760), // ADDP_ZPmZ_B 1235 UINT64_C(1154588672), // ADDP_ZPmZ_D 1236 UINT64_C(1146200064), // ADDP_ZPmZ_H 1237 UINT64_C(1150394368), // ADDP_ZPmZ_S 1238 UINT64_C(1310768128), // ADDPv16i8 1239 UINT64_C(245414912), // ADDPv2i32 1240 UINT64_C(1323351040), // ADDPv2i64 1241 UINT64_C(1592899584), // ADDPv2i64p 1242 UINT64_C(241220608), // ADDPv4i16 1243 UINT64_C(1319156736), // ADDPv4i32 1244 UINT64_C(1314962432), // ADDPv8i16 1245 UINT64_C(237026304), // ADDPv8i8 1246 UINT64_C(67444736), // ADDQV_VPZ_B 1247 UINT64_C(80027648), // ADDQV_VPZ_D 1248 UINT64_C(71639040), // ADDQV_VPZ_H 1249 UINT64_C(75833344), // ADDQV_VPZ_S 1250 UINT64_C(73422848), // ADDSPL_XXI 1251 UINT64_C(69228544), // ADDSVL_XXI 1252 UINT64_C(822083584), // ADDSWri 1253 UINT64_C(721420288), // ADDSWrs 1254 UINT64_C(723517440), // ADDSWrx 1255 UINT64_C(2969567232), // ADDSXri 1256 UINT64_C(2868903936), // ADDSXrs 1257 UINT64_C(2871001088), // ADDSXrx 1258 UINT64_C(2871025664), // ADDSXrx64 1259 UINT64_C(3234922496), // ADDVA_MPPZ_D 1260 UINT64_C(3230728192), // ADDVA_MPPZ_S 1261 UINT64_C(69226496), // ADDVL_XXI 1262 UINT64_C(1311881216), // ADDVv16i8v 1263 UINT64_C(242333696), // ADDVv4i16v 1264 UINT64_C(1320269824), // ADDVv4i32v 1265 UINT64_C(1316075520), // ADDVv8i16v 1266 UINT64_C(238139392), // ADDVv8i8v 1267 UINT64_C(285212672), // ADDWri 1268 UINT64_C(184549376), // ADDWrs 1269 UINT64_C(186646528), // ADDWrx 1270 UINT64_C(2432696320), // ADDXri 1271 UINT64_C(2332033024), // ADDXrs 1272 UINT64_C(2334130176), // ADDXrx 1273 UINT64_C(2334154752), // ADDXrx64 1274 UINT64_C(3240141568), // ADD_VG2_2ZZ_B 1275 UINT64_C(3252724480), // ADD_VG2_2ZZ_D 1276 UINT64_C(3244335872), // ADD_VG2_2ZZ_H 1277 UINT64_C(3248530176), // ADD_VG2_2ZZ_S 1278 UINT64_C(3252688912), // ADD_VG2_M2Z2Z_D 1279 UINT64_C(3248494608), // ADD_VG2_M2Z2Z_S 1280 UINT64_C(3244300304), // ADD_VG2_M2ZZ_D 1281 UINT64_C(3240106000), // ADD_VG2_M2ZZ_S 1282 UINT64_C(3252689936), // ADD_VG2_M2Z_D 1283 UINT64_C(3248495632), // ADD_VG2_M2Z_S 1284 UINT64_C(3240143616), // ADD_VG4_4ZZ_B 1285 UINT64_C(3252726528), // ADD_VG4_4ZZ_D 1286 UINT64_C(3244337920), // ADD_VG4_4ZZ_H 1287 UINT64_C(3248532224), // ADD_VG4_4ZZ_S 1288 UINT64_C(3252754448), // ADD_VG4_M4Z4Z_D 1289 UINT64_C(3248560144), // ADD_VG4_M4Z4Z_S 1290 UINT64_C(3245348880), // ADD_VG4_M4ZZ_D 1291 UINT64_C(3241154576), // ADD_VG4_M4ZZ_S 1292 UINT64_C(3252755472), // ADD_VG4_M4Z_D 1293 UINT64_C(3248561168), // ADD_VG4_M4Z_S 1294 UINT64_C(622903296), // ADD_ZI_B 1295 UINT64_C(635486208), // ADD_ZI_D 1296 UINT64_C(627097600), // ADD_ZI_H 1297 UINT64_C(631291904), // ADD_ZI_S 1298 UINT64_C(67108864), // ADD_ZPmZ_B 1299 UINT64_C(79691776), // ADD_ZPmZ_D 1300 UINT64_C(71303168), // ADD_ZPmZ_H 1301 UINT64_C(75497472), // ADD_ZPmZ_S 1302 UINT64_C(69206016), // ADD_ZZZ_B 1303 UINT64_C(81788928), // ADD_ZZZ_D 1304 UINT64_C(73400320), // ADD_ZZZ_H 1305 UINT64_C(77594624), // ADD_ZZZ_S 1306 UINT64_C(1310753792), // ADDv16i8 1307 UINT64_C(1591772160), // ADDv1i64 1308 UINT64_C(245400576), // ADDv2i32 1309 UINT64_C(1323336704), // ADDv2i64 1310 UINT64_C(241206272), // ADDv4i16 1311 UINT64_C(1319142400), // ADDv4i32 1312 UINT64_C(1314948096), // ADDv8i16 1313 UINT64_C(237011968), // ADDv8i8 1314 UINT64_C(268435456), // ADR 1315 UINT64_C(2415919104), // ADRP 1316 UINT64_C(81829888), // ADR_LSL_ZZZ_D_0 1317 UINT64_C(81830912), // ADR_LSL_ZZZ_D_1 1318 UINT64_C(81831936), // ADR_LSL_ZZZ_D_2 1319 UINT64_C(81832960), // ADR_LSL_ZZZ_D_3 1320 UINT64_C(77635584), // ADR_LSL_ZZZ_S_0 1321 UINT64_C(77636608), // ADR_LSL_ZZZ_S_1 1322 UINT64_C(77637632), // ADR_LSL_ZZZ_S_2 1323 UINT64_C(77638656), // ADR_LSL_ZZZ_S_3 1324 UINT64_C(69246976), // ADR_SXTW_ZZZ_D_0 1325 UINT64_C(69248000), // ADR_SXTW_ZZZ_D_1 1326 UINT64_C(69249024), // ADR_SXTW_ZZZ_D_2 1327 UINT64_C(69250048), // ADR_SXTW_ZZZ_D_3 1328 UINT64_C(73441280), // ADR_UXTW_ZZZ_D_0 1329 UINT64_C(73442304), // ADR_UXTW_ZZZ_D_1 1330 UINT64_C(73443328), // ADR_UXTW_ZZZ_D_2 1331 UINT64_C(73444352), // ADR_UXTW_ZZZ_D_3 1332 UINT64_C(1159914496), // AESD_ZZZ_B 1333 UINT64_C(1311266816), // AESDrr 1334 UINT64_C(1159913472), // AESE_ZZZ_B 1335 UINT64_C(1311262720), // AESErr 1336 UINT64_C(1159783424), // AESIMC_ZZ_B 1337 UINT64_C(1311275008), // AESIMCrr 1338 UINT64_C(1159782400), // AESMC_ZZ_B 1339 UINT64_C(1311270912), // AESMCrr 1340 UINT64_C(69083136), // ANDQV_VPZ_B 1341 UINT64_C(81666048), // ANDQV_VPZ_D 1342 UINT64_C(73277440), // ANDQV_VPZ_H 1343 UINT64_C(77471744), // ANDQV_VPZ_S 1344 UINT64_C(1912602624), // ANDSWri 1345 UINT64_C(1778384896), // ANDSWrs 1346 UINT64_C(4060086272), // ANDSXri 1347 UINT64_C(3925868544), // ANDSXrs 1348 UINT64_C(624967680), // ANDS_PPzPP 1349 UINT64_C(68820992), // ANDV_VPZ_B 1350 UINT64_C(81403904), // ANDV_VPZ_D 1351 UINT64_C(73015296), // ANDV_VPZ_H 1352 UINT64_C(77209600), // ANDV_VPZ_S 1353 UINT64_C(301989888), // ANDWri 1354 UINT64_C(167772160), // ANDWrs 1355 UINT64_C(2449473536), // ANDXri 1356 UINT64_C(2315255808), // ANDXrs 1357 UINT64_C(620773376), // AND_PPzPP 1358 UINT64_C(92274688), // AND_ZI 1359 UINT64_C(68812800), // AND_ZPmZ_B 1360 UINT64_C(81395712), // AND_ZPmZ_D 1361 UINT64_C(73007104), // AND_ZPmZ_H 1362 UINT64_C(77201408), // AND_ZPmZ_S 1363 UINT64_C(69218304), // AND_ZZZ 1364 UINT64_C(1310727168), // ANDv16i8 1365 UINT64_C(236985344), // ANDv8i8 1366 UINT64_C(67404032), // ASRD_ZPmI_B 1367 UINT64_C(75792384), // ASRD_ZPmI_D 1368 UINT64_C(67404288), // ASRD_ZPmI_H 1369 UINT64_C(71598080), // ASRD_ZPmI_S 1370 UINT64_C(68452352), // ASRR_ZPmZ_B 1371 UINT64_C(81035264), // ASRR_ZPmZ_D 1372 UINT64_C(72646656), // ASRR_ZPmZ_H 1373 UINT64_C(76840960), // ASRR_ZPmZ_S 1374 UINT64_C(448800768), // ASRVWr 1375 UINT64_C(2596284416), // ASRVXr 1376 UINT64_C(68714496), // ASR_WIDE_ZPmZ_B 1377 UINT64_C(72908800), // ASR_WIDE_ZPmZ_H 1378 UINT64_C(77103104), // ASR_WIDE_ZPmZ_S 1379 UINT64_C(69238784), // ASR_WIDE_ZZZ_B 1380 UINT64_C(73433088), // ASR_WIDE_ZZZ_H 1381 UINT64_C(77627392), // ASR_WIDE_ZZZ_S 1382 UINT64_C(67141888), // ASR_ZPmI_B 1383 UINT64_C(75530240), // ASR_ZPmI_D 1384 UINT64_C(67142144), // ASR_ZPmI_H 1385 UINT64_C(71335936), // ASR_ZPmI_S 1386 UINT64_C(68190208), // ASR_ZPmZ_B 1387 UINT64_C(80773120), // ASR_ZPmZ_D 1388 UINT64_C(72384512), // ASR_ZPmZ_H 1389 UINT64_C(76578816), // ASR_ZPmZ_S 1390 UINT64_C(69767168), // ASR_ZZI_B 1391 UINT64_C(77631488), // ASR_ZZI_D 1392 UINT64_C(70291456), // ASR_ZZI_H 1393 UINT64_C(73437184), // ASR_ZZI_S 1394 UINT64_C(3670087680), // AUTDA 1395 UINT64_C(3670088704), // AUTDB 1396 UINT64_C(3670096864), // AUTDZA 1397 UINT64_C(3670097888), // AUTDZB 1398 UINT64_C(3670085632), // AUTIA 1399 UINT64_C(3573752223), // AUTIA1716 1400 UINT64_C(3573752767), // AUTIASP 1401 UINT64_C(3573752735), // AUTIAZ 1402 UINT64_C(3670086656), // AUTIB 1403 UINT64_C(3573752287), // AUTIB1716 1404 UINT64_C(3573752831), // AUTIBSP 1405 UINT64_C(3573752799), // AUTIBZ 1406 UINT64_C(3670094816), // AUTIZA 1407 UINT64_C(3670095840), // AUTIZB 1408 UINT64_C(3573563487), // AXFLAG 1409 UINT64_C(335544320), // B 1410 UINT64_C(3458203648), // BCAX 1411 UINT64_C(73414656), // BCAX_ZZZZ 1412 UINT64_C(1409286160), // BCcc 1413 UINT64_C(1157673984), // BDEP_ZZZ_B 1414 UINT64_C(1170256896), // BDEP_ZZZ_D 1415 UINT64_C(1161868288), // BDEP_ZZZ_H 1416 UINT64_C(1166062592), // BDEP_ZZZ_S 1417 UINT64_C(1157672960), // BEXT_ZZZ_B 1418 UINT64_C(1170255872), // BEXT_ZZZ_D 1419 UINT64_C(1161867264), // BEXT_ZZZ_H 1420 UINT64_C(1166061568), // BEXT_ZZZ_S 1421 UINT64_C(255913984), // BF16DOTlanev4bf16 1422 UINT64_C(1329655808), // BF16DOTlanev8bf16 1423 UINT64_C(3252952064), // BFADD_VG2_M2Z_H 1424 UINT64_C(3253017600), // BFADD_VG4_M4Z_H 1425 UINT64_C(1694531584), // BFADD_ZPZmZ 1426 UINT64_C(1694498816), // BFADD_ZZZ 1427 UINT64_C(3240148992), // BFCLAMP_VG2_2ZZZ_H 1428 UINT64_C(3240151040), // BFCLAMP_VG4_4ZZZ_H 1429 UINT64_C(1679827968), // BFCLAMP_ZZZ 1430 UINT64_C(509820928), // BFCVT 1431 UINT64_C(245458944), // BFCVTN 1432 UINT64_C(1319200768), // BFCVTN2 1433 UINT64_C(1686806528), // BFCVTNT_ZPmZ 1434 UINT64_C(3244351520), // BFCVTN_Z2Z_StoH 1435 UINT64_C(3244351488), // BFCVT_Z2Z_StoH 1436 UINT64_C(1703583744), // BFCVT_ZPmZ 1437 UINT64_C(3248492560), // BFDOT_VG2_M2Z2Z_HtoS 1438 UINT64_C(3243249688), // BFDOT_VG2_M2ZZI_HtoS 1439 UINT64_C(3240103952), // BFDOT_VG2_M2ZZ_HtoS 1440 UINT64_C(3248558096), // BFDOT_VG4_M4Z4Z_HtoS 1441 UINT64_C(3243282456), // BFDOT_VG4_M4ZZI_HtoS 1442 UINT64_C(3241152528), // BFDOT_VG4_M4ZZ_HtoS 1443 UINT64_C(1684029440), // BFDOT_ZZI 1444 UINT64_C(1684045824), // BFDOT_ZZZ 1445 UINT64_C(776010752), // BFDOTv4bf16 1446 UINT64_C(1849752576), // BFDOTv8bf16 1447 UINT64_C(3240145184), // BFMAXNM_VG2_2Z2Z_H 1448 UINT64_C(3240141088), // BFMAXNM_VG2_2ZZ_H 1449 UINT64_C(3240147232), // BFMAXNM_VG4_4Z2Z_H 1450 UINT64_C(3240143136), // BFMAXNM_VG4_4ZZ_H 1451 UINT64_C(1694793728), // BFMAXNM_ZPZmZ 1452 UINT64_C(3240145152), // BFMAX_VG2_2Z2Z_H 1453 UINT64_C(3240141056), // BFMAX_VG2_2ZZ_H 1454 UINT64_C(3240147200), // BFMAX_VG4_4Z2Z_H 1455 UINT64_C(3240143104), // BFMAX_VG4_4ZZ_H 1456 UINT64_C(1694924800), // BFMAX_ZPZmZ 1457 UINT64_C(3240145185), // BFMINNM_VG2_2Z2Z_H 1458 UINT64_C(3240141089), // BFMINNM_VG2_2ZZ_H 1459 UINT64_C(3240147233), // BFMINNM_VG4_4Z2Z_H 1460 UINT64_C(3240143137), // BFMINNM_VG4_4ZZ_H 1461 UINT64_C(1694859264), // BFMINNM_ZPZmZ 1462 UINT64_C(3240145153), // BFMIN_VG2_2Z2Z_H 1463 UINT64_C(3240141057), // BFMIN_VG2_2ZZ_H 1464 UINT64_C(3240147201), // BFMIN_VG4_4Z2Z_H 1465 UINT64_C(3240143105), // BFMIN_VG4_4ZZ_H 1466 UINT64_C(1694990336), // BFMIN_ZPZmZ 1467 UINT64_C(784399360), // BFMLALB 1468 UINT64_C(264302592), // BFMLALBIdx 1469 UINT64_C(1692434432), // BFMLALB_ZZZ 1470 UINT64_C(1692418048), // BFMLALB_ZZZI 1471 UINT64_C(1858141184), // BFMLALT 1472 UINT64_C(1338044416), // BFMLALTIdx 1473 UINT64_C(1692435456), // BFMLALT_ZZZ 1474 UINT64_C(1692419072), // BFMLALT_ZZZI 1475 UINT64_C(3246395408), // BFMLAL_MZZI_S 1476 UINT64_C(3240102928), // BFMLAL_MZZ_S 1477 UINT64_C(3248490512), // BFMLAL_VG2_M2Z2Z_S 1478 UINT64_C(3247443984), // BFMLAL_VG2_M2ZZI_S 1479 UINT64_C(3240101904), // BFMLAL_VG2_M2ZZ_S 1480 UINT64_C(3248556048), // BFMLAL_VG4_M4Z4Z_S 1481 UINT64_C(3247476752), // BFMLAL_VG4_M4ZZI_S 1482 UINT64_C(3241150480), // BFMLAL_VG4_M4ZZ_S 1483 UINT64_C(3252686856), // BFMLA_VG2_M2Z2Z 1484 UINT64_C(3244301312), // BFMLA_VG2_M2ZZ 1485 UINT64_C(3239055392), // BFMLA_VG2_M2ZZI 1486 UINT64_C(3252752392), // BFMLA_VG4_M4Z4Z 1487 UINT64_C(3245349888), // BFMLA_VG4_M4ZZ 1488 UINT64_C(3239088160), // BFMLA_VG4_M4ZZI 1489 UINT64_C(1696595968), // BFMLA_ZPmZZ 1490 UINT64_C(1679820800), // BFMLA_ZZZI 1491 UINT64_C(1692426240), // BFMLSLB_ZZZI_S 1492 UINT64_C(1692442624), // BFMLSLB_ZZZ_S 1493 UINT64_C(1692427264), // BFMLSLT_ZZZI_S 1494 UINT64_C(1692443648), // BFMLSLT_ZZZ_S 1495 UINT64_C(3246395416), // BFMLSL_MZZI_S 1496 UINT64_C(3240102936), // BFMLSL_MZZ_S 1497 UINT64_C(3248490520), // BFMLSL_VG2_M2Z2Z_S 1498 UINT64_C(3247443992), // BFMLSL_VG2_M2ZZI_S 1499 UINT64_C(3240101912), // BFMLSL_VG2_M2ZZ_S 1500 UINT64_C(3248556056), // BFMLSL_VG4_M4Z4Z_S 1501 UINT64_C(3247476760), // BFMLSL_VG4_M4ZZI_S 1502 UINT64_C(3241150488), // BFMLSL_VG4_M4ZZ_S 1503 UINT64_C(3252686872), // BFMLS_VG2_M2Z2Z 1504 UINT64_C(3244301320), // BFMLS_VG2_M2ZZ 1505 UINT64_C(3239055408), // BFMLS_VG2_M2ZZI 1506 UINT64_C(3252752408), // BFMLS_VG4_M4Z4Z 1507 UINT64_C(3245349896), // BFMLS_VG4_M4ZZ 1508 UINT64_C(3239088176), // BFMLS_VG4_M4ZZI 1509 UINT64_C(1696604160), // BFMLS_ZPmZZ 1510 UINT64_C(1679821824), // BFMLS_ZZZI 1511 UINT64_C(1849748480), // BFMMLA 1512 UINT64_C(1684071424), // BFMMLA_ZZZ 1513 UINT64_C(2172649472), // BFMOPA_MPPZZ 1514 UINT64_C(2174746632), // BFMOPA_MPPZZ_H 1515 UINT64_C(2172649488), // BFMOPS_MPPZZ 1516 UINT64_C(2174746648), // BFMOPS_MPPZZ_H 1517 UINT64_C(1694662656), // BFMUL_ZPZmZ 1518 UINT64_C(1694500864), // BFMUL_ZZZ 1519 UINT64_C(1679828992), // BFMUL_ZZZI 1520 UINT64_C(855638016), // BFMWri 1521 UINT64_C(3007315968), // BFMXri 1522 UINT64_C(3252952072), // BFSUB_VG2_M2Z_H 1523 UINT64_C(3253017608), // BFSUB_VG4_M4Z_H 1524 UINT64_C(1694597120), // BFSUB_ZPZmZ 1525 UINT64_C(1694499840), // BFSUB_ZZZ 1526 UINT64_C(3243245592), // BFVDOT_VG2_M2ZZI_HtoS 1527 UINT64_C(1157675008), // BGRP_ZZZ_B 1528 UINT64_C(1170257920), // BGRP_ZZZ_D 1529 UINT64_C(1161869312), // BGRP_ZZZ_H 1530 UINT64_C(1166063616), // BGRP_ZZZ_S 1531 UINT64_C(1780482048), // BICSWrs 1532 UINT64_C(3927965696), // BICSXrs 1533 UINT64_C(624967696), // BICS_PPzPP 1534 UINT64_C(169869312), // BICWrs 1535 UINT64_C(2317352960), // BICXrs 1536 UINT64_C(620773392), // BIC_PPzPP 1537 UINT64_C(68878336), // BIC_ZPmZ_B 1538 UINT64_C(81461248), // BIC_ZPmZ_D 1539 UINT64_C(73072640), // BIC_ZPmZ_H 1540 UINT64_C(77266944), // BIC_ZPmZ_S 1541 UINT64_C(81801216), // BIC_ZZZ 1542 UINT64_C(1314921472), // BICv16i8 1543 UINT64_C(788534272), // BICv2i32 1544 UINT64_C(788567040), // BICv4i16 1545 UINT64_C(1862276096), // BICv4i32 1546 UINT64_C(1862308864), // BICv8i16 1547 UINT64_C(241179648), // BICv8i8 1548 UINT64_C(1860180992), // BIFv16i8 1549 UINT64_C(786439168), // BIFv8i8 1550 UINT64_C(1855986688), // BITv16i8 1551 UINT64_C(782244864), // BITv8i8 1552 UINT64_C(2483027968), // BL 1553 UINT64_C(3594452992), // BLR 1554 UINT64_C(3611232256), // BLRAA 1555 UINT64_C(3594455071), // BLRAAZ 1556 UINT64_C(3611233280), // BLRAB 1557 UINT64_C(3594456095), // BLRABZ 1558 UINT64_C(2155872264), // BMOPA_MPPZZ_S 1559 UINT64_C(2155872280), // BMOPS_MPPZZ_S 1560 UINT64_C(3592355840), // BR 1561 UINT64_C(3609135104), // BRAA 1562 UINT64_C(3592357919), // BRAAZ 1563 UINT64_C(3609136128), // BRAB 1564 UINT64_C(3592358943), // BRABZ 1565 UINT64_C(3574166175), // BRB_IALL 1566 UINT64_C(3574166207), // BRB_INJ 1567 UINT64_C(3558866944), // BRK 1568 UINT64_C(626016256), // BRKAS_PPzP 1569 UINT64_C(621821968), // BRKA_PPmP 1570 UINT64_C(621821952), // BRKA_PPzP 1571 UINT64_C(634404864), // BRKBS_PPzP 1572 UINT64_C(630210576), // BRKB_PPmP 1573 UINT64_C(630210560), // BRKB_PPzP 1574 UINT64_C(626540544), // BRKNS_PPzP 1575 UINT64_C(622346240), // BRKN_PPzP 1576 UINT64_C(625000448), // BRKPAS_PPzPP 1577 UINT64_C(620806144), // BRKPA_PPzPP 1578 UINT64_C(625000464), // BRKPBS_PPzPP 1579 UINT64_C(620806160), // BRKPB_PPzPP 1580 UINT64_C(73415680), // BSL1N_ZZZZ 1581 UINT64_C(77609984), // BSL2N_ZZZZ 1582 UINT64_C(69221376), // BSL_ZZZZ 1583 UINT64_C(1851792384), // BSLv16i8 1584 UINT64_C(778050560), // BSLv8i8 1585 UINT64_C(1409286144), // Bcc 1586 UINT64_C(1157683200), // CADD_ZZI_B 1587 UINT64_C(1170266112), // CADD_ZZI_D 1588 UINT64_C(1161877504), // CADD_ZZI_H 1589 UINT64_C(1166071808), // CADD_ZZI_S 1590 UINT64_C(148929536), // CASAB 1591 UINT64_C(1222671360), // CASAH 1592 UINT64_C(148962304), // CASALB 1593 UINT64_C(1222704128), // CASALH 1594 UINT64_C(2296445952), // CASALW 1595 UINT64_C(3370187776), // CASALX 1596 UINT64_C(2296413184), // CASAW 1597 UINT64_C(3370155008), // CASAX 1598 UINT64_C(144735232), // CASB 1599 UINT64_C(1218477056), // CASH 1600 UINT64_C(144768000), // CASLB 1601 UINT64_C(1218509824), // CASLH 1602 UINT64_C(2292251648), // CASLW 1603 UINT64_C(3365993472), // CASLX 1604 UINT64_C(140573696), // CASPALW 1605 UINT64_C(1214315520), // CASPALX 1606 UINT64_C(140540928), // CASPAW 1607 UINT64_C(1214282752), // CASPAX 1608 UINT64_C(136379392), // CASPLW 1609 UINT64_C(1210121216), // CASPLX 1610 UINT64_C(136346624), // CASPW 1611 UINT64_C(1210088448), // CASPX 1612 UINT64_C(2292218880), // CASW 1613 UINT64_C(3365960704), // CASX 1614 UINT64_C(889192448), // CBNZW 1615 UINT64_C(3036676096), // CBNZX 1616 UINT64_C(872415232), // CBZW 1617 UINT64_C(3019898880), // CBZX 1618 UINT64_C(977274880), // CCMNWi 1619 UINT64_C(977272832), // CCMNWr 1620 UINT64_C(3124758528), // CCMNXi 1621 UINT64_C(3124756480), // CCMNXr 1622 UINT64_C(2051016704), // CCMPWi 1623 UINT64_C(2051014656), // CCMPWr 1624 UINT64_C(4198500352), // CCMPXi 1625 UINT64_C(4198498304), // CCMPXr 1626 UINT64_C(1155547136), // CDOT_ZZZI_D 1627 UINT64_C(1151352832), // CDOT_ZZZI_S 1628 UINT64_C(1153437696), // CDOT_ZZZ_D 1629 UINT64_C(1149243392), // CDOT_ZZZ_S 1630 UINT64_C(3573563423), // CFINV 1631 UINT64_C(87072768), // CLASTA_RPZ_B 1632 UINT64_C(99655680), // CLASTA_RPZ_D 1633 UINT64_C(91267072), // CLASTA_RPZ_H 1634 UINT64_C(95461376), // CLASTA_RPZ_S 1635 UINT64_C(86671360), // CLASTA_VPZ_B 1636 UINT64_C(99254272), // CLASTA_VPZ_D 1637 UINT64_C(90865664), // CLASTA_VPZ_H 1638 UINT64_C(95059968), // CLASTA_VPZ_S 1639 UINT64_C(86540288), // CLASTA_ZPZ_B 1640 UINT64_C(99123200), // CLASTA_ZPZ_D 1641 UINT64_C(90734592), // CLASTA_ZPZ_H 1642 UINT64_C(94928896), // CLASTA_ZPZ_S 1643 UINT64_C(87138304), // CLASTB_RPZ_B 1644 UINT64_C(99721216), // CLASTB_RPZ_D 1645 UINT64_C(91332608), // CLASTB_RPZ_H 1646 UINT64_C(95526912), // CLASTB_RPZ_S 1647 UINT64_C(86736896), // CLASTB_VPZ_B 1648 UINT64_C(99319808), // CLASTB_VPZ_D 1649 UINT64_C(90931200), // CLASTB_VPZ_H 1650 UINT64_C(95125504), // CLASTB_VPZ_S 1651 UINT64_C(86605824), // CLASTB_ZPZ_B 1652 UINT64_C(99188736), // CLASTB_ZPZ_D 1653 UINT64_C(90800128), // CLASTB_ZPZ_H 1654 UINT64_C(94994432), // CLASTB_ZPZ_S 1655 UINT64_C(3573755999), // CLREX 1656 UINT64_C(1522537472), // CLSWr 1657 UINT64_C(3670021120), // CLSXr 1658 UINT64_C(68722688), // CLS_ZPmZ_B 1659 UINT64_C(81305600), // CLS_ZPmZ_D 1660 UINT64_C(72916992), // CLS_ZPmZ_H 1661 UINT64_C(77111296), // CLS_ZPmZ_S 1662 UINT64_C(1310738432), // CLSv16i8 1663 UINT64_C(245385216), // CLSv2i32 1664 UINT64_C(241190912), // CLSv4i16 1665 UINT64_C(1319127040), // CLSv4i32 1666 UINT64_C(1314932736), // CLSv8i16 1667 UINT64_C(236996608), // CLSv8i8 1668 UINT64_C(1522536448), // CLZWr 1669 UINT64_C(3670020096), // CLZXr 1670 UINT64_C(68788224), // CLZ_ZPmZ_B 1671 UINT64_C(81371136), // CLZ_ZPmZ_D 1672 UINT64_C(72982528), // CLZ_ZPmZ_H 1673 UINT64_C(77176832), // CLZ_ZPmZ_S 1674 UINT64_C(1847609344), // CLZv16i8 1675 UINT64_C(782256128), // CLZv2i32 1676 UINT64_C(778061824), // CLZv4i16 1677 UINT64_C(1855997952), // CLZv4i32 1678 UINT64_C(1851803648), // CLZv8i16 1679 UINT64_C(773867520), // CLZv8i8 1680 UINT64_C(1847626752), // CMEQv16i8 1681 UINT64_C(1310758912), // CMEQv16i8rz 1682 UINT64_C(2128645120), // CMEQv1i64 1683 UINT64_C(1591777280), // CMEQv1i64rz 1684 UINT64_C(782273536), // CMEQv2i32 1685 UINT64_C(245405696), // CMEQv2i32rz 1686 UINT64_C(1860209664), // CMEQv2i64 1687 UINT64_C(1323341824), // CMEQv2i64rz 1688 UINT64_C(778079232), // CMEQv4i16 1689 UINT64_C(241211392), // CMEQv4i16rz 1690 UINT64_C(1856015360), // CMEQv4i32 1691 UINT64_C(1319147520), // CMEQv4i32rz 1692 UINT64_C(1851821056), // CMEQv8i16 1693 UINT64_C(1314953216), // CMEQv8i16rz 1694 UINT64_C(773884928), // CMEQv8i8 1695 UINT64_C(237017088), // CMEQv8i8rz 1696 UINT64_C(1310735360), // CMGEv16i8 1697 UINT64_C(1847625728), // CMGEv16i8rz 1698 UINT64_C(1591753728), // CMGEv1i64 1699 UINT64_C(2128644096), // CMGEv1i64rz 1700 UINT64_C(245382144), // CMGEv2i32 1701 UINT64_C(782272512), // CMGEv2i32rz 1702 UINT64_C(1323318272), // CMGEv2i64 1703 UINT64_C(1860208640), // CMGEv2i64rz 1704 UINT64_C(241187840), // CMGEv4i16 1705 UINT64_C(778078208), // CMGEv4i16rz 1706 UINT64_C(1319123968), // CMGEv4i32 1707 UINT64_C(1856014336), // CMGEv4i32rz 1708 UINT64_C(1314929664), // CMGEv8i16 1709 UINT64_C(1851820032), // CMGEv8i16rz 1710 UINT64_C(236993536), // CMGEv8i8 1711 UINT64_C(773883904), // CMGEv8i8rz 1712 UINT64_C(1310733312), // CMGTv16i8 1713 UINT64_C(1310754816), // CMGTv16i8rz 1714 UINT64_C(1591751680), // CMGTv1i64 1715 UINT64_C(1591773184), // CMGTv1i64rz 1716 UINT64_C(245380096), // CMGTv2i32 1717 UINT64_C(245401600), // CMGTv2i32rz 1718 UINT64_C(1323316224), // CMGTv2i64 1719 UINT64_C(1323337728), // CMGTv2i64rz 1720 UINT64_C(241185792), // CMGTv4i16 1721 UINT64_C(241207296), // CMGTv4i16rz 1722 UINT64_C(1319121920), // CMGTv4i32 1723 UINT64_C(1319143424), // CMGTv4i32rz 1724 UINT64_C(1314927616), // CMGTv8i16 1725 UINT64_C(1314949120), // CMGTv8i16rz 1726 UINT64_C(236991488), // CMGTv8i8 1727 UINT64_C(237012992), // CMGTv8i8rz 1728 UINT64_C(1847604224), // CMHIv16i8 1729 UINT64_C(2128622592), // CMHIv1i64 1730 UINT64_C(782251008), // CMHIv2i32 1731 UINT64_C(1860187136), // CMHIv2i64 1732 UINT64_C(778056704), // CMHIv4i16 1733 UINT64_C(1855992832), // CMHIv4i32 1734 UINT64_C(1851798528), // CMHIv8i16 1735 UINT64_C(773862400), // CMHIv8i8 1736 UINT64_C(1847606272), // CMHSv16i8 1737 UINT64_C(2128624640), // CMHSv1i64 1738 UINT64_C(782253056), // CMHSv2i32 1739 UINT64_C(1860189184), // CMHSv2i64 1740 UINT64_C(778058752), // CMHSv4i16 1741 UINT64_C(1855994880), // CMHSv4i32 1742 UINT64_C(1851800576), // CMHSv8i16 1743 UINT64_C(773864448), // CMHSv8i8 1744 UINT64_C(1151361024), // CMLA_ZZZI_H 1745 UINT64_C(1155555328), // CMLA_ZZZI_S 1746 UINT64_C(1140858880), // CMLA_ZZZ_B 1747 UINT64_C(1153441792), // CMLA_ZZZ_D 1748 UINT64_C(1145053184), // CMLA_ZZZ_H 1749 UINT64_C(1149247488), // CMLA_ZZZ_S 1750 UINT64_C(1847629824), // CMLEv16i8rz 1751 UINT64_C(2128648192), // CMLEv1i64rz 1752 UINT64_C(782276608), // CMLEv2i32rz 1753 UINT64_C(1860212736), // CMLEv2i64rz 1754 UINT64_C(778082304), // CMLEv4i16rz 1755 UINT64_C(1856018432), // CMLEv4i32rz 1756 UINT64_C(1851824128), // CMLEv8i16rz 1757 UINT64_C(773888000), // CMLEv8i8rz 1758 UINT64_C(1310763008), // CMLTv16i8rz 1759 UINT64_C(1591781376), // CMLTv1i64rz 1760 UINT64_C(245409792), // CMLTv2i32rz 1761 UINT64_C(1323345920), // CMLTv2i64rz 1762 UINT64_C(241215488), // CMLTv4i16rz 1763 UINT64_C(1319151616), // CMLTv4i32rz 1764 UINT64_C(1314957312), // CMLTv8i16rz 1765 UINT64_C(237021184), // CMLTv8i8rz 1766 UINT64_C(620789760), // CMPEQ_PPzZI_B 1767 UINT64_C(633372672), // CMPEQ_PPzZI_D 1768 UINT64_C(624984064), // CMPEQ_PPzZI_H 1769 UINT64_C(629178368), // CMPEQ_PPzZI_S 1770 UINT64_C(604020736), // CMPEQ_PPzZZ_B 1771 UINT64_C(616603648), // CMPEQ_PPzZZ_D 1772 UINT64_C(608215040), // CMPEQ_PPzZZ_H 1773 UINT64_C(612409344), // CMPEQ_PPzZZ_S 1774 UINT64_C(603987968), // CMPEQ_WIDE_PPzZZ_B 1775 UINT64_C(608182272), // CMPEQ_WIDE_PPzZZ_H 1776 UINT64_C(612376576), // CMPEQ_WIDE_PPzZZ_S 1777 UINT64_C(620756992), // CMPGE_PPzZI_B 1778 UINT64_C(633339904), // CMPGE_PPzZI_D 1779 UINT64_C(624951296), // CMPGE_PPzZI_H 1780 UINT64_C(629145600), // CMPGE_PPzZI_S 1781 UINT64_C(604012544), // CMPGE_PPzZZ_B 1782 UINT64_C(616595456), // CMPGE_PPzZZ_D 1783 UINT64_C(608206848), // CMPGE_PPzZZ_H 1784 UINT64_C(612401152), // CMPGE_PPzZZ_S 1785 UINT64_C(603996160), // CMPGE_WIDE_PPzZZ_B 1786 UINT64_C(608190464), // CMPGE_WIDE_PPzZZ_H 1787 UINT64_C(612384768), // CMPGE_WIDE_PPzZZ_S 1788 UINT64_C(620757008), // CMPGT_PPzZI_B 1789 UINT64_C(633339920), // CMPGT_PPzZI_D 1790 UINT64_C(624951312), // CMPGT_PPzZI_H 1791 UINT64_C(629145616), // CMPGT_PPzZI_S 1792 UINT64_C(604012560), // CMPGT_PPzZZ_B 1793 UINT64_C(616595472), // CMPGT_PPzZZ_D 1794 UINT64_C(608206864), // CMPGT_PPzZZ_H 1795 UINT64_C(612401168), // CMPGT_PPzZZ_S 1796 UINT64_C(603996176), // CMPGT_WIDE_PPzZZ_B 1797 UINT64_C(608190480), // CMPGT_WIDE_PPzZZ_H 1798 UINT64_C(612384784), // CMPGT_WIDE_PPzZZ_S 1799 UINT64_C(606076944), // CMPHI_PPzZI_B 1800 UINT64_C(618659856), // CMPHI_PPzZI_D 1801 UINT64_C(610271248), // CMPHI_PPzZI_H 1802 UINT64_C(614465552), // CMPHI_PPzZI_S 1803 UINT64_C(603979792), // CMPHI_PPzZZ_B 1804 UINT64_C(616562704), // CMPHI_PPzZZ_D 1805 UINT64_C(608174096), // CMPHI_PPzZZ_H 1806 UINT64_C(612368400), // CMPHI_PPzZZ_S 1807 UINT64_C(604028944), // CMPHI_WIDE_PPzZZ_B 1808 UINT64_C(608223248), // CMPHI_WIDE_PPzZZ_H 1809 UINT64_C(612417552), // CMPHI_WIDE_PPzZZ_S 1810 UINT64_C(606076928), // CMPHS_PPzZI_B 1811 UINT64_C(618659840), // CMPHS_PPzZI_D 1812 UINT64_C(610271232), // CMPHS_PPzZI_H 1813 UINT64_C(614465536), // CMPHS_PPzZI_S 1814 UINT64_C(603979776), // CMPHS_PPzZZ_B 1815 UINT64_C(616562688), // CMPHS_PPzZZ_D 1816 UINT64_C(608174080), // CMPHS_PPzZZ_H 1817 UINT64_C(612368384), // CMPHS_PPzZZ_S 1818 UINT64_C(604028928), // CMPHS_WIDE_PPzZZ_B 1819 UINT64_C(608223232), // CMPHS_WIDE_PPzZZ_H 1820 UINT64_C(612417536), // CMPHS_WIDE_PPzZZ_S 1821 UINT64_C(620765200), // CMPLE_PPzZI_B 1822 UINT64_C(633348112), // CMPLE_PPzZI_D 1823 UINT64_C(624959504), // CMPLE_PPzZI_H 1824 UINT64_C(629153808), // CMPLE_PPzZI_S 1825 UINT64_C(604004368), // CMPLE_WIDE_PPzZZ_B 1826 UINT64_C(608198672), // CMPLE_WIDE_PPzZZ_H 1827 UINT64_C(612392976), // CMPLE_WIDE_PPzZZ_S 1828 UINT64_C(606085120), // CMPLO_PPzZI_B 1829 UINT64_C(618668032), // CMPLO_PPzZI_D 1830 UINT64_C(610279424), // CMPLO_PPzZI_H 1831 UINT64_C(614473728), // CMPLO_PPzZI_S 1832 UINT64_C(604037120), // CMPLO_WIDE_PPzZZ_B 1833 UINT64_C(608231424), // CMPLO_WIDE_PPzZZ_H 1834 UINT64_C(612425728), // CMPLO_WIDE_PPzZZ_S 1835 UINT64_C(606085136), // CMPLS_PPzZI_B 1836 UINT64_C(618668048), // CMPLS_PPzZI_D 1837 UINT64_C(610279440), // CMPLS_PPzZI_H 1838 UINT64_C(614473744), // CMPLS_PPzZI_S 1839 UINT64_C(604037136), // CMPLS_WIDE_PPzZZ_B 1840 UINT64_C(608231440), // CMPLS_WIDE_PPzZZ_H 1841 UINT64_C(612425744), // CMPLS_WIDE_PPzZZ_S 1842 UINT64_C(620765184), // CMPLT_PPzZI_B 1843 UINT64_C(633348096), // CMPLT_PPzZI_D 1844 UINT64_C(624959488), // CMPLT_PPzZI_H 1845 UINT64_C(629153792), // CMPLT_PPzZI_S 1846 UINT64_C(604004352), // CMPLT_WIDE_PPzZZ_B 1847 UINT64_C(608198656), // CMPLT_WIDE_PPzZZ_H 1848 UINT64_C(612392960), // CMPLT_WIDE_PPzZZ_S 1849 UINT64_C(620789776), // CMPNE_PPzZI_B 1850 UINT64_C(633372688), // CMPNE_PPzZI_D 1851 UINT64_C(624984080), // CMPNE_PPzZI_H 1852 UINT64_C(629178384), // CMPNE_PPzZI_S 1853 UINT64_C(604020752), // CMPNE_PPzZZ_B 1854 UINT64_C(616603664), // CMPNE_PPzZZ_D 1855 UINT64_C(608215056), // CMPNE_PPzZZ_H 1856 UINT64_C(612409360), // CMPNE_PPzZZ_S 1857 UINT64_C(603987984), // CMPNE_WIDE_PPzZZ_B 1858 UINT64_C(608182288), // CMPNE_WIDE_PPzZZ_H 1859 UINT64_C(612376592), // CMPNE_WIDE_PPzZZ_S 1860 UINT64_C(1310755840), // CMTSTv16i8 1861 UINT64_C(1591774208), // CMTSTv1i64 1862 UINT64_C(245402624), // CMTSTv2i32 1863 UINT64_C(1323338752), // CMTSTv2i64 1864 UINT64_C(241208320), // CMTSTv4i16 1865 UINT64_C(1319144448), // CMTSTv4i32 1866 UINT64_C(1314950144), // CMTSTv8i16 1867 UINT64_C(237014016), // CMTSTv8i8 1868 UINT64_C(68919296), // CNOT_ZPmZ_B 1869 UINT64_C(81502208), // CNOT_ZPmZ_D 1870 UINT64_C(73113600), // CNOT_ZPmZ_H 1871 UINT64_C(77307904), // CNOT_ZPmZ_S 1872 UINT64_C(69263360), // CNTB_XPiI 1873 UINT64_C(81846272), // CNTD_XPiI 1874 UINT64_C(73457664), // CNTH_XPiI 1875 UINT64_C(622887424), // CNTP_XCI_B 1876 UINT64_C(635470336), // CNTP_XCI_D 1877 UINT64_C(627081728), // CNTP_XCI_H 1878 UINT64_C(631276032), // CNTP_XCI_S 1879 UINT64_C(622886912), // CNTP_XPP_B 1880 UINT64_C(635469824), // CNTP_XPP_D 1881 UINT64_C(627081216), // CNTP_XPP_H 1882 UINT64_C(631275520), // CNTP_XPP_S 1883 UINT64_C(77651968), // CNTW_XPiI 1884 UINT64_C(1522539520), // CNTWr 1885 UINT64_C(3670023168), // CNTXr 1886 UINT64_C(68853760), // CNT_ZPmZ_B 1887 UINT64_C(81436672), // CNT_ZPmZ_D 1888 UINT64_C(73048064), // CNT_ZPmZ_H 1889 UINT64_C(77242368), // CNT_ZPmZ_S 1890 UINT64_C(1310742528), // CNTv16i8 1891 UINT64_C(237000704), // CNTv8i8 1892 UINT64_C(98664448), // COMPACT_ZPZ_D 1893 UINT64_C(94470144), // COMPACT_ZPZ_S 1894 UINT64_C(494928896), // CPYE 1895 UINT64_C(494978048), // CPYEN 1896 UINT64_C(494961664), // CPYERN 1897 UINT64_C(494937088), // CPYERT 1898 UINT64_C(494986240), // CPYERTN 1899 UINT64_C(494969856), // CPYERTRN 1900 UINT64_C(494953472), // CPYERTWN 1901 UINT64_C(494941184), // CPYET 1902 UINT64_C(494990336), // CPYETN 1903 UINT64_C(494973952), // CPYETRN 1904 UINT64_C(494957568), // CPYETWN 1905 UINT64_C(494945280), // CPYEWN 1906 UINT64_C(494932992), // CPYEWT 1907 UINT64_C(494982144), // CPYEWTN 1908 UINT64_C(494965760), // CPYEWTRN 1909 UINT64_C(494949376), // CPYEWTWN 1910 UINT64_C(427820032), // CPYFE 1911 UINT64_C(427869184), // CPYFEN 1912 UINT64_C(427852800), // CPYFERN 1913 UINT64_C(427828224), // CPYFERT 1914 UINT64_C(427877376), // CPYFERTN 1915 UINT64_C(427860992), // CPYFERTRN 1916 UINT64_C(427844608), // CPYFERTWN 1917 UINT64_C(427832320), // CPYFET 1918 UINT64_C(427881472), // CPYFETN 1919 UINT64_C(427865088), // CPYFETRN 1920 UINT64_C(427848704), // CPYFETWN 1921 UINT64_C(427836416), // CPYFEWN 1922 UINT64_C(427824128), // CPYFEWT 1923 UINT64_C(427873280), // CPYFEWTN 1924 UINT64_C(427856896), // CPYFEWTRN 1925 UINT64_C(427840512), // CPYFEWTWN 1926 UINT64_C(423625728), // CPYFM 1927 UINT64_C(423674880), // CPYFMN 1928 UINT64_C(423658496), // CPYFMRN 1929 UINT64_C(423633920), // CPYFMRT 1930 UINT64_C(423683072), // CPYFMRTN 1931 UINT64_C(423666688), // CPYFMRTRN 1932 UINT64_C(423650304), // CPYFMRTWN 1933 UINT64_C(423638016), // CPYFMT 1934 UINT64_C(423687168), // CPYFMTN 1935 UINT64_C(423670784), // CPYFMTRN 1936 UINT64_C(423654400), // CPYFMTWN 1937 UINT64_C(423642112), // CPYFMWN 1938 UINT64_C(423629824), // CPYFMWT 1939 UINT64_C(423678976), // CPYFMWTN 1940 UINT64_C(423662592), // CPYFMWTRN 1941 UINT64_C(423646208), // CPYFMWTWN 1942 UINT64_C(419431424), // CPYFP 1943 UINT64_C(419480576), // CPYFPN 1944 UINT64_C(419464192), // CPYFPRN 1945 UINT64_C(419439616), // CPYFPRT 1946 UINT64_C(419488768), // CPYFPRTN 1947 UINT64_C(419472384), // CPYFPRTRN 1948 UINT64_C(419456000), // CPYFPRTWN 1949 UINT64_C(419443712), // CPYFPT 1950 UINT64_C(419492864), // CPYFPTN 1951 UINT64_C(419476480), // CPYFPTRN 1952 UINT64_C(419460096), // CPYFPTWN 1953 UINT64_C(419447808), // CPYFPWN 1954 UINT64_C(419435520), // CPYFPWT 1955 UINT64_C(419484672), // CPYFPWTN 1956 UINT64_C(419468288), // CPYFPWTRN 1957 UINT64_C(419451904), // CPYFPWTWN 1958 UINT64_C(490734592), // CPYM 1959 UINT64_C(490783744), // CPYMN 1960 UINT64_C(490767360), // CPYMRN 1961 UINT64_C(490742784), // CPYMRT 1962 UINT64_C(490791936), // CPYMRTN 1963 UINT64_C(490775552), // CPYMRTRN 1964 UINT64_C(490759168), // CPYMRTWN 1965 UINT64_C(490746880), // CPYMT 1966 UINT64_C(490796032), // CPYMTN 1967 UINT64_C(490779648), // CPYMTRN 1968 UINT64_C(490763264), // CPYMTWN 1969 UINT64_C(490750976), // CPYMWN 1970 UINT64_C(490738688), // CPYMWT 1971 UINT64_C(490787840), // CPYMWTN 1972 UINT64_C(490771456), // CPYMWTRN 1973 UINT64_C(490755072), // CPYMWTWN 1974 UINT64_C(486540288), // CPYP 1975 UINT64_C(486589440), // CPYPN 1976 UINT64_C(486573056), // CPYPRN 1977 UINT64_C(486548480), // CPYPRT 1978 UINT64_C(486597632), // CPYPRTN 1979 UINT64_C(486581248), // CPYPRTRN 1980 UINT64_C(486564864), // CPYPRTWN 1981 UINT64_C(486552576), // CPYPT 1982 UINT64_C(486601728), // CPYPTN 1983 UINT64_C(486585344), // CPYPTRN 1984 UINT64_C(486568960), // CPYPTWN 1985 UINT64_C(486556672), // CPYPWN 1986 UINT64_C(486544384), // CPYPWT 1987 UINT64_C(486593536), // CPYPWTN 1988 UINT64_C(486577152), // CPYPWTRN 1989 UINT64_C(486560768), // CPYPWTWN 1990 UINT64_C(84951040), // CPY_ZPmI_B 1991 UINT64_C(97533952), // CPY_ZPmI_D 1992 UINT64_C(89145344), // CPY_ZPmI_H 1993 UINT64_C(93339648), // CPY_ZPmI_S 1994 UINT64_C(86548480), // CPY_ZPmR_B 1995 UINT64_C(99131392), // CPY_ZPmR_D 1996 UINT64_C(90742784), // CPY_ZPmR_H 1997 UINT64_C(94937088), // CPY_ZPmR_S 1998 UINT64_C(86016000), // CPY_ZPmV_B 1999 UINT64_C(98598912), // CPY_ZPmV_D 2000 UINT64_C(90210304), // CPY_ZPmV_H 2001 UINT64_C(94404608), // CPY_ZPmV_S 2002 UINT64_C(84934656), // CPY_ZPzI_B 2003 UINT64_C(97517568), // CPY_ZPzI_D 2004 UINT64_C(89128960), // CPY_ZPzI_H 2005 UINT64_C(93323264), // CPY_ZPzI_S 2006 UINT64_C(448806912), // CRC32Brr 2007 UINT64_C(448811008), // CRC32CBrr 2008 UINT64_C(448812032), // CRC32CHrr 2009 UINT64_C(448813056), // CRC32CWrr 2010 UINT64_C(2596297728), // CRC32CXrr 2011 UINT64_C(448807936), // CRC32Hrr 2012 UINT64_C(448808960), // CRC32Wrr 2013 UINT64_C(2596293632), // CRC32Xrr 2014 UINT64_C(444596224), // CSELWr 2015 UINT64_C(2592079872), // CSELXr 2016 UINT64_C(444597248), // CSINCWr 2017 UINT64_C(2592080896), // CSINCXr 2018 UINT64_C(1518338048), // CSINVWr 2019 UINT64_C(3665821696), // CSINVXr 2020 UINT64_C(1518339072), // CSNEGWr 2021 UINT64_C(3665822720), // CSNEGXr 2022 UINT64_C(631250944), // CTERMEQ_WW 2023 UINT64_C(635445248), // CTERMEQ_XX 2024 UINT64_C(631250960), // CTERMNE_WW 2025 UINT64_C(635445264), // CTERMNE_XX 2026 UINT64_C(1522538496), // CTZWr 2027 UINT64_C(3670022144), // CTZXr 2028 UINT64_C(3567255553), // DCPS1 2029 UINT64_C(3567255554), // DCPS2 2030 UINT64_C(3567255555), // DCPS3 2031 UINT64_C(70312960), // DECB_XPiI 2032 UINT64_C(82895872), // DECD_XPiI 2033 UINT64_C(82887680), // DECD_ZPiI 2034 UINT64_C(74507264), // DECH_XPiI 2035 UINT64_C(74499072), // DECH_ZPiI 2036 UINT64_C(623740928), // DECP_XP_B 2037 UINT64_C(636323840), // DECP_XP_D 2038 UINT64_C(627935232), // DECP_XP_H 2039 UINT64_C(632129536), // DECP_XP_S 2040 UINT64_C(636321792), // DECP_ZP_D 2041 UINT64_C(627933184), // DECP_ZP_H 2042 UINT64_C(632127488), // DECP_ZP_S 2043 UINT64_C(78701568), // DECW_XPiI 2044 UINT64_C(78693376), // DECW_ZPiI 2045 UINT64_C(3573756095), // DMB 2046 UINT64_C(3602842592), // DRPS 2047 UINT64_C(3573756063), // DSB 2048 UINT64_C(3573756479), // DSBnXS 2049 UINT64_C(96468992), // DUPM_ZI 2050 UINT64_C(86057984), // DUPQ_ZZI_B 2051 UINT64_C(86516736), // DUPQ_ZZI_D 2052 UINT64_C(86123520), // DUPQ_ZZI_H 2053 UINT64_C(86254592), // DUPQ_ZZI_S 2054 UINT64_C(624476160), // DUP_ZI_B 2055 UINT64_C(637059072), // DUP_ZI_D 2056 UINT64_C(628670464), // DUP_ZI_H 2057 UINT64_C(632864768), // DUP_ZI_S 2058 UINT64_C(85997568), // DUP_ZR_B 2059 UINT64_C(98580480), // DUP_ZR_D 2060 UINT64_C(90191872), // DUP_ZR_H 2061 UINT64_C(94386176), // DUP_ZR_S 2062 UINT64_C(86056960), // DUP_ZZI_B 2063 UINT64_C(86515712), // DUP_ZZI_D 2064 UINT64_C(86122496), // DUP_ZZI_H 2065 UINT64_C(87040000), // DUP_ZZI_Q 2066 UINT64_C(86253568), // DUP_ZZI_S 2067 UINT64_C(1577190400), // DUPi16 2068 UINT64_C(1577321472), // DUPi32 2069 UINT64_C(1577583616), // DUPi64 2070 UINT64_C(1577124864), // DUPi8 2071 UINT64_C(1308691456), // DUPv16i8gpr 2072 UINT64_C(1308689408), // DUPv16i8lane 2073 UINT64_C(235146240), // DUPv2i32gpr 2074 UINT64_C(235144192), // DUPv2i32lane 2075 UINT64_C(1309150208), // DUPv2i64gpr 2076 UINT64_C(1309148160), // DUPv2i64lane 2077 UINT64_C(235015168), // DUPv4i16gpr 2078 UINT64_C(235013120), // DUPv4i16lane 2079 UINT64_C(1308888064), // DUPv4i32gpr 2080 UINT64_C(1308886016), // DUPv4i32lane 2081 UINT64_C(1308756992), // DUPv8i16gpr 2082 UINT64_C(1308754944), // DUPv8i16lane 2083 UINT64_C(234949632), // DUPv8i8gpr 2084 UINT64_C(234947584), // DUPv8i8lane 2085 UINT64_C(1243611136), // EONWrs 2086 UINT64_C(3391094784), // EONXrs 2087 UINT64_C(3456106496), // EOR3 2088 UINT64_C(69220352), // EOR3_ZZZZ 2089 UINT64_C(1157664768), // EORBT_ZZZ_B 2090 UINT64_C(1170247680), // EORBT_ZZZ_D 2091 UINT64_C(1161859072), // EORBT_ZZZ_H 2092 UINT64_C(1166053376), // EORBT_ZZZ_S 2093 UINT64_C(69017600), // EORQV_VPZ_B 2094 UINT64_C(81600512), // EORQV_VPZ_D 2095 UINT64_C(73211904), // EORQV_VPZ_H 2096 UINT64_C(77406208), // EORQV_VPZ_S 2097 UINT64_C(624968192), // EORS_PPzPP 2098 UINT64_C(1157665792), // EORTB_ZZZ_B 2099 UINT64_C(1170248704), // EORTB_ZZZ_D 2100 UINT64_C(1161860096), // EORTB_ZZZ_H 2101 UINT64_C(1166054400), // EORTB_ZZZ_S 2102 UINT64_C(68755456), // EORV_VPZ_B 2103 UINT64_C(81338368), // EORV_VPZ_D 2104 UINT64_C(72949760), // EORV_VPZ_H 2105 UINT64_C(77144064), // EORV_VPZ_S 2106 UINT64_C(1375731712), // EORWri 2107 UINT64_C(1241513984), // EORWrs 2108 UINT64_C(3523215360), // EORXri 2109 UINT64_C(3388997632), // EORXrs 2110 UINT64_C(620773888), // EOR_PPzPP 2111 UINT64_C(88080384), // EOR_ZI 2112 UINT64_C(68747264), // EOR_ZPmZ_B 2113 UINT64_C(81330176), // EOR_ZPmZ_D 2114 UINT64_C(72941568), // EOR_ZPmZ_H 2115 UINT64_C(77135872), // EOR_ZPmZ_S 2116 UINT64_C(77606912), // EOR_ZZZ 2117 UINT64_C(1847598080), // EORv16i8 2118 UINT64_C(773856256), // EORv8i8 2119 UINT64_C(3600745440), // ERET 2120 UINT64_C(3600747519), // ERETAA 2121 UINT64_C(3600748543), // ERETAB 2122 UINT64_C(90186752), // EXTQ_ZZI 2123 UINT64_C(3221356544), // EXTRACT_ZPMXI_H_B 2124 UINT64_C(3233939456), // EXTRACT_ZPMXI_H_D 2125 UINT64_C(3225550848), // EXTRACT_ZPMXI_H_H 2126 UINT64_C(3234004992), // EXTRACT_ZPMXI_H_Q 2127 UINT64_C(3229745152), // EXTRACT_ZPMXI_H_S 2128 UINT64_C(3221389312), // EXTRACT_ZPMXI_V_B 2129 UINT64_C(3233972224), // EXTRACT_ZPMXI_V_D 2130 UINT64_C(3225583616), // EXTRACT_ZPMXI_V_H 2131 UINT64_C(3234037760), // EXTRACT_ZPMXI_V_Q 2132 UINT64_C(3229777920), // EXTRACT_ZPMXI_V_S 2133 UINT64_C(327155712), // EXTRWrri 2134 UINT64_C(2478833664), // EXTRXrri 2135 UINT64_C(85983232), // EXT_ZZI 2136 UINT64_C(90177536), // EXT_ZZI_B 2137 UINT64_C(1845493760), // EXTv16i8 2138 UINT64_C(771751936), // EXTv8i8 2139 UINT64_C(2126517248), // FABD16 2140 UINT64_C(2124469248), // FABD32 2141 UINT64_C(2128663552), // FABD64 2142 UINT64_C(1707638784), // FABD_ZPmZ_D 2143 UINT64_C(1699250176), // FABD_ZPmZ_H 2144 UINT64_C(1703444480), // FABD_ZPmZ_S 2145 UINT64_C(782291968), // FABDv2f32 2146 UINT64_C(1860228096), // FABDv2f64 2147 UINT64_C(784339968), // FABDv4f16 2148 UINT64_C(1856033792), // FABDv4f32 2149 UINT64_C(1858081792), // FABDv8f16 2150 UINT64_C(509657088), // FABSDr 2151 UINT64_C(518045696), // FABSHr 2152 UINT64_C(505462784), // FABSSr 2153 UINT64_C(81567744), // FABS_ZPmZ_D 2154 UINT64_C(73179136), // FABS_ZPmZ_H 2155 UINT64_C(77373440), // FABS_ZPmZ_S 2156 UINT64_C(245430272), // FABSv2f32 2157 UINT64_C(1323366400), // FABSv2f64 2158 UINT64_C(251197440), // FABSv4f16 2159 UINT64_C(1319172096), // FABSv4f32 2160 UINT64_C(1324939264), // FABSv8f16 2161 UINT64_C(2118134784), // FACGE16 2162 UINT64_C(2116086784), // FACGE32 2163 UINT64_C(2120281088), // FACGE64 2164 UINT64_C(1707130896), // FACGE_PPzZZ_D 2165 UINT64_C(1698742288), // FACGE_PPzZZ_H 2166 UINT64_C(1702936592), // FACGE_PPzZZ_S 2167 UINT64_C(773909504), // FACGEv2f32 2168 UINT64_C(1851845632), // FACGEv2f64 2169 UINT64_C(775957504), // FACGEv4f16 2170 UINT64_C(1847651328), // FACGEv4f32 2171 UINT64_C(1849699328), // FACGEv8f16 2172 UINT64_C(2126523392), // FACGT16 2173 UINT64_C(2124475392), // FACGT32 2174 UINT64_C(2128669696), // FACGT64 2175 UINT64_C(1707139088), // FACGT_PPzZZ_D 2176 UINT64_C(1698750480), // FACGT_PPzZZ_H 2177 UINT64_C(1702944784), // FACGT_PPzZZ_S 2178 UINT64_C(782298112), // FACGTv2f32 2179 UINT64_C(1860234240), // FACGTv2f64 2180 UINT64_C(784346112), // FACGTv4f16 2181 UINT64_C(1856039936), // FACGTv4f32 2182 UINT64_C(1858087936), // FACGTv8f16 2183 UINT64_C(1708662784), // FADDA_VPZ_D 2184 UINT64_C(1700274176), // FADDA_VPZ_H 2185 UINT64_C(1704468480), // FADDA_VPZ_S 2186 UINT64_C(509618176), // FADDDrr 2187 UINT64_C(518006784), // FADDHrr 2188 UINT64_C(1691385856), // FADDP_ZPmZZ_D 2189 UINT64_C(1682997248), // FADDP_ZPmZZ_H 2190 UINT64_C(1687191552), // FADDP_ZPmZZ_S 2191 UINT64_C(773903360), // FADDPv2f32 2192 UINT64_C(1851839488), // FADDPv2f64 2193 UINT64_C(1580259328), // FADDPv2i16p 2194 UINT64_C(2117130240), // FADDPv2i32p 2195 UINT64_C(2121324544), // FADDPv2i64p 2196 UINT64_C(775951360), // FADDPv4f16 2197 UINT64_C(1847645184), // FADDPv4f32 2198 UINT64_C(1849693184), // FADDPv8f16 2199 UINT64_C(1691394048), // FADDQV_D 2200 UINT64_C(1683005440), // FADDQV_H 2201 UINT64_C(1687199744), // FADDQV_S 2202 UINT64_C(505423872), // FADDSrr 2203 UINT64_C(1707089920), // FADDV_VPZ_D 2204 UINT64_C(1698701312), // FADDV_VPZ_H 2205 UINT64_C(1702895616), // FADDV_VPZ_S 2206 UINT64_C(3252689920), // FADD_VG2_M2Z_D 2207 UINT64_C(3248757760), // FADD_VG2_M2Z_H 2208 UINT64_C(3248495616), // FADD_VG2_M2Z_S 2209 UINT64_C(3252755456), // FADD_VG4_M4Z_D 2210 UINT64_C(3248823296), // FADD_VG4_M4Z_H 2211 UINT64_C(3248561152), // FADD_VG4_M4Z_S 2212 UINT64_C(1708687360), // FADD_ZPmI_D 2213 UINT64_C(1700298752), // FADD_ZPmI_H 2214 UINT64_C(1704493056), // FADD_ZPmI_S 2215 UINT64_C(1707114496), // FADD_ZPmZ_D 2216 UINT64_C(1698725888), // FADD_ZPmZ_H 2217 UINT64_C(1702920192), // FADD_ZPmZ_S 2218 UINT64_C(1707081728), // FADD_ZZZ_D 2219 UINT64_C(1698693120), // FADD_ZZZ_H 2220 UINT64_C(1702887424), // FADD_ZZZ_S 2221 UINT64_C(237032448), // FADDv2f32 2222 UINT64_C(1314968576), // FADDv2f64 2223 UINT64_C(239080448), // FADDv4f16 2224 UINT64_C(1310774272), // FADDv4f32 2225 UINT64_C(1312822272), // FADDv8f16 2226 UINT64_C(1690337280), // FCADD_ZPmZ_D 2227 UINT64_C(1681948672), // FCADD_ZPmZ_H 2228 UINT64_C(1686142976), // FCADD_ZPmZ_S 2229 UINT64_C(780198912), // FCADDv2f32 2230 UINT64_C(1858135040), // FCADDv2f64 2231 UINT64_C(776004608), // FCADDv4f16 2232 UINT64_C(1853940736), // FCADDv4f32 2233 UINT64_C(1849746432), // FCADDv8f16 2234 UINT64_C(509608960), // FCCMPDrr 2235 UINT64_C(509608976), // FCCMPEDrr 2236 UINT64_C(517997584), // FCCMPEHrr 2237 UINT64_C(505414672), // FCCMPESrr 2238 UINT64_C(517997568), // FCCMPHrr 2239 UINT64_C(505414656), // FCCMPSrr 2240 UINT64_C(3252731904), // FCLAMP_VG2_2Z2Z_D 2241 UINT64_C(3244343296), // FCLAMP_VG2_2Z2Z_H 2242 UINT64_C(3248537600), // FCLAMP_VG2_2Z2Z_S 2243 UINT64_C(3252733952), // FCLAMP_VG4_4Z4Z_D 2244 UINT64_C(3244345344), // FCLAMP_VG4_4Z4Z_H 2245 UINT64_C(3248539648), // FCLAMP_VG4_4Z4Z_S 2246 UINT64_C(1692410880), // FCLAMP_ZZZ_D 2247 UINT64_C(1684022272), // FCLAMP_ZZZ_H 2248 UINT64_C(1688216576), // FCLAMP_ZZZ_S 2249 UINT64_C(1581261824), // FCMEQ16 2250 UINT64_C(1579213824), // FCMEQ32 2251 UINT64_C(1583408128), // FCMEQ64 2252 UINT64_C(1708269568), // FCMEQ_PPzZ0_D 2253 UINT64_C(1699880960), // FCMEQ_PPzZ0_H 2254 UINT64_C(1704075264), // FCMEQ_PPzZ0_S 2255 UINT64_C(1707106304), // FCMEQ_PPzZZ_D 2256 UINT64_C(1698717696), // FCMEQ_PPzZZ_H 2257 UINT64_C(1702912000), // FCMEQ_PPzZZ_S 2258 UINT64_C(1593366528), // FCMEQv1i16rz 2259 UINT64_C(1587599360), // FCMEQv1i32rz 2260 UINT64_C(1591793664), // FCMEQv1i64rz 2261 UINT64_C(237036544), // FCMEQv2f32 2262 UINT64_C(1314972672), // FCMEQv2f64 2263 UINT64_C(245422080), // FCMEQv2i32rz 2264 UINT64_C(1323358208), // FCMEQv2i64rz 2265 UINT64_C(239084544), // FCMEQv4f16 2266 UINT64_C(1310778368), // FCMEQv4f32 2267 UINT64_C(251189248), // FCMEQv4i16rz 2268 UINT64_C(1319163904), // FCMEQv4i32rz 2269 UINT64_C(1312826368), // FCMEQv8f16 2270 UINT64_C(1324931072), // FCMEQv8i16rz 2271 UINT64_C(2118132736), // FCMGE16 2272 UINT64_C(2116084736), // FCMGE32 2273 UINT64_C(2120279040), // FCMGE64 2274 UINT64_C(1708138496), // FCMGE_PPzZ0_D 2275 UINT64_C(1699749888), // FCMGE_PPzZ0_H 2276 UINT64_C(1703944192), // FCMGE_PPzZ0_S 2277 UINT64_C(1707098112), // FCMGE_PPzZZ_D 2278 UINT64_C(1698709504), // FCMGE_PPzZZ_H 2279 UINT64_C(1702903808), // FCMGE_PPzZZ_S 2280 UINT64_C(2130233344), // FCMGEv1i16rz 2281 UINT64_C(2124466176), // FCMGEv1i32rz 2282 UINT64_C(2128660480), // FCMGEv1i64rz 2283 UINT64_C(773907456), // FCMGEv2f32 2284 UINT64_C(1851843584), // FCMGEv2f64 2285 UINT64_C(782288896), // FCMGEv2i32rz 2286 UINT64_C(1860225024), // FCMGEv2i64rz 2287 UINT64_C(775955456), // FCMGEv4f16 2288 UINT64_C(1847649280), // FCMGEv4f32 2289 UINT64_C(788056064), // FCMGEv4i16rz 2290 UINT64_C(1856030720), // FCMGEv4i32rz 2291 UINT64_C(1849697280), // FCMGEv8f16 2292 UINT64_C(1861797888), // FCMGEv8i16rz 2293 UINT64_C(2126521344), // FCMGT16 2294 UINT64_C(2124473344), // FCMGT32 2295 UINT64_C(2128667648), // FCMGT64 2296 UINT64_C(1708138512), // FCMGT_PPzZ0_D 2297 UINT64_C(1699749904), // FCMGT_PPzZ0_H 2298 UINT64_C(1703944208), // FCMGT_PPzZ0_S 2299 UINT64_C(1707098128), // FCMGT_PPzZZ_D 2300 UINT64_C(1698709520), // FCMGT_PPzZZ_H 2301 UINT64_C(1702903824), // FCMGT_PPzZZ_S 2302 UINT64_C(1593362432), // FCMGTv1i16rz 2303 UINT64_C(1587595264), // FCMGTv1i32rz 2304 UINT64_C(1591789568), // FCMGTv1i64rz 2305 UINT64_C(782296064), // FCMGTv2f32 2306 UINT64_C(1860232192), // FCMGTv2f64 2307 UINT64_C(245417984), // FCMGTv2i32rz 2308 UINT64_C(1323354112), // FCMGTv2i64rz 2309 UINT64_C(784344064), // FCMGTv4f16 2310 UINT64_C(1856037888), // FCMGTv4f32 2311 UINT64_C(251185152), // FCMGTv4i16rz 2312 UINT64_C(1319159808), // FCMGTv4i32rz 2313 UINT64_C(1858085888), // FCMGTv8f16 2314 UINT64_C(1324926976), // FCMGTv8i16rz 2315 UINT64_C(1690304512), // FCMLA_ZPmZZ_D 2316 UINT64_C(1681915904), // FCMLA_ZPmZZ_H 2317 UINT64_C(1686110208), // FCMLA_ZPmZZ_S 2318 UINT64_C(1688211456), // FCMLA_ZZZI_H 2319 UINT64_C(1692405760), // FCMLA_ZZZI_S 2320 UINT64_C(780190720), // FCMLAv2f32 2321 UINT64_C(1858126848), // FCMLAv2f64 2322 UINT64_C(775996416), // FCMLAv4f16 2323 UINT64_C(792727552), // FCMLAv4f16_indexed 2324 UINT64_C(1853932544), // FCMLAv4f32 2325 UINT64_C(1870663680), // FCMLAv4f32_indexed 2326 UINT64_C(1849738240), // FCMLAv8f16 2327 UINT64_C(1866469376), // FCMLAv8f16_indexed 2328 UINT64_C(1708204048), // FCMLE_PPzZ0_D 2329 UINT64_C(1699815440), // FCMLE_PPzZ0_H 2330 UINT64_C(1704009744), // FCMLE_PPzZ0_S 2331 UINT64_C(2130237440), // FCMLEv1i16rz 2332 UINT64_C(2124470272), // FCMLEv1i32rz 2333 UINT64_C(2128664576), // FCMLEv1i64rz 2334 UINT64_C(782292992), // FCMLEv2i32rz 2335 UINT64_C(1860229120), // FCMLEv2i64rz 2336 UINT64_C(788060160), // FCMLEv4i16rz 2337 UINT64_C(1856034816), // FCMLEv4i32rz 2338 UINT64_C(1861801984), // FCMLEv8i16rz 2339 UINT64_C(1708204032), // FCMLT_PPzZ0_D 2340 UINT64_C(1699815424), // FCMLT_PPzZ0_H 2341 UINT64_C(1704009728), // FCMLT_PPzZ0_S 2342 UINT64_C(1593370624), // FCMLTv1i16rz 2343 UINT64_C(1587603456), // FCMLTv1i32rz 2344 UINT64_C(1591797760), // FCMLTv1i64rz 2345 UINT64_C(245426176), // FCMLTv2i32rz 2346 UINT64_C(1323362304), // FCMLTv2i64rz 2347 UINT64_C(251193344), // FCMLTv4i16rz 2348 UINT64_C(1319168000), // FCMLTv4i32rz 2349 UINT64_C(1324935168), // FCMLTv8i16rz 2350 UINT64_C(1708335104), // FCMNE_PPzZ0_D 2351 UINT64_C(1699946496), // FCMNE_PPzZ0_H 2352 UINT64_C(1704140800), // FCMNE_PPzZ0_S 2353 UINT64_C(1707106320), // FCMNE_PPzZZ_D 2354 UINT64_C(1698717712), // FCMNE_PPzZZ_H 2355 UINT64_C(1702912016), // FCMNE_PPzZZ_S 2356 UINT64_C(509616136), // FCMPDri 2357 UINT64_C(509616128), // FCMPDrr 2358 UINT64_C(509616152), // FCMPEDri 2359 UINT64_C(509616144), // FCMPEDrr 2360 UINT64_C(518004760), // FCMPEHri 2361 UINT64_C(518004752), // FCMPEHrr 2362 UINT64_C(505421848), // FCMPESri 2363 UINT64_C(505421840), // FCMPESrr 2364 UINT64_C(518004744), // FCMPHri 2365 UINT64_C(518004736), // FCMPHrr 2366 UINT64_C(505421832), // FCMPSri 2367 UINT64_C(505421824), // FCMPSrr 2368 UINT64_C(1707130880), // FCMUO_PPzZZ_D 2369 UINT64_C(1698742272), // FCMUO_PPzZZ_H 2370 UINT64_C(1702936576), // FCMUO_PPzZZ_S 2371 UINT64_C(97566720), // FCPY_ZPmI_D 2372 UINT64_C(89178112), // FCPY_ZPmI_H 2373 UINT64_C(93372416), // FCPY_ZPmI_S 2374 UINT64_C(509611008), // FCSELDrrr 2375 UINT64_C(517999616), // FCSELHrrr 2376 UINT64_C(505416704), // FCSELSrrr 2377 UINT64_C(509870080), // FCVTASUWDr 2378 UINT64_C(518258688), // FCVTASUWHr 2379 UINT64_C(505675776), // FCVTASUWSr 2380 UINT64_C(2657353728), // FCVTASUXDr 2381 UINT64_C(2665742336), // FCVTASUXHr 2382 UINT64_C(2653159424), // FCVTASUXSr 2383 UINT64_C(1585039360), // FCVTASv1f16 2384 UINT64_C(1579272192), // FCVTASv1i32 2385 UINT64_C(1583466496), // FCVTASv1i64 2386 UINT64_C(237094912), // FCVTASv2f32 2387 UINT64_C(1315031040), // FCVTASv2f64 2388 UINT64_C(242862080), // FCVTASv4f16 2389 UINT64_C(1310836736), // FCVTASv4f32 2390 UINT64_C(1316603904), // FCVTASv8f16 2391 UINT64_C(509935616), // FCVTAUUWDr 2392 UINT64_C(518324224), // FCVTAUUWHr 2393 UINT64_C(505741312), // FCVTAUUWSr 2394 UINT64_C(2657419264), // FCVTAUUXDr 2395 UINT64_C(2665807872), // FCVTAUUXHr 2396 UINT64_C(2653224960), // FCVTAUUXSr 2397 UINT64_C(2121910272), // FCVTAUv1f16 2398 UINT64_C(2116143104), // FCVTAUv1i32 2399 UINT64_C(2120337408), // FCVTAUv1i64 2400 UINT64_C(773965824), // FCVTAUv2f32 2401 UINT64_C(1851901952), // FCVTAUv2f64 2402 UINT64_C(779732992), // FCVTAUv4f16 2403 UINT64_C(1847707648), // FCVTAUv4f32 2404 UINT64_C(1853474816), // FCVTAUv8f16 2405 UINT64_C(518176768), // FCVTDHr 2406 UINT64_C(505593856), // FCVTDSr 2407 UINT64_C(509853696), // FCVTHDr 2408 UINT64_C(505659392), // FCVTHSr 2409 UINT64_C(1686740992), // FCVTLT_ZPmZ_HtoS 2410 UINT64_C(1691066368), // FCVTLT_ZPmZ_StoD 2411 UINT64_C(3248545793), // FCVTL_2ZZ_H_S 2412 UINT64_C(241268736), // FCVTLv2i32 2413 UINT64_C(237074432), // FCVTLv4i16 2414 UINT64_C(1315010560), // FCVTLv4i32 2415 UINT64_C(1310816256), // FCVTLv8i16 2416 UINT64_C(510656512), // FCVTMSUWDr 2417 UINT64_C(519045120), // FCVTMSUWHr 2418 UINT64_C(506462208), // FCVTMSUWSr 2419 UINT64_C(2658140160), // FCVTMSUXDr 2420 UINT64_C(2666528768), // FCVTMSUXHr 2421 UINT64_C(2653945856), // FCVTMSUXSr 2422 UINT64_C(1585035264), // FCVTMSv1f16 2423 UINT64_C(1579268096), // FCVTMSv1i32 2424 UINT64_C(1583462400), // FCVTMSv1i64 2425 UINT64_C(237090816), // FCVTMSv2f32 2426 UINT64_C(1315026944), // FCVTMSv2f64 2427 UINT64_C(242857984), // FCVTMSv4f16 2428 UINT64_C(1310832640), // FCVTMSv4f32 2429 UINT64_C(1316599808), // FCVTMSv8f16 2430 UINT64_C(510722048), // FCVTMUUWDr 2431 UINT64_C(519110656), // FCVTMUUWHr 2432 UINT64_C(506527744), // FCVTMUUWSr 2433 UINT64_C(2658205696), // FCVTMUUXDr 2434 UINT64_C(2666594304), // FCVTMUUXHr 2435 UINT64_C(2654011392), // FCVTMUUXSr 2436 UINT64_C(2121906176), // FCVTMUv1f16 2437 UINT64_C(2116139008), // FCVTMUv1i32 2438 UINT64_C(2120333312), // FCVTMUv1i64 2439 UINT64_C(773961728), // FCVTMUv2f32 2440 UINT64_C(1851897856), // FCVTMUv2f64 2441 UINT64_C(779728896), // FCVTMUv4f16 2442 UINT64_C(1847703552), // FCVTMUv4f32 2443 UINT64_C(1853470720), // FCVTMUv8f16 2444 UINT64_C(509607936), // FCVTNSUWDr 2445 UINT64_C(517996544), // FCVTNSUWHr 2446 UINT64_C(505413632), // FCVTNSUWSr 2447 UINT64_C(2657091584), // FCVTNSUXDr 2448 UINT64_C(2665480192), // FCVTNSUXHr 2449 UINT64_C(2652897280), // FCVTNSUXSr 2450 UINT64_C(1585031168), // FCVTNSv1f16 2451 UINT64_C(1579264000), // FCVTNSv1i32 2452 UINT64_C(1583458304), // FCVTNSv1i64 2453 UINT64_C(237086720), // FCVTNSv2f32 2454 UINT64_C(1315022848), // FCVTNSv2f64 2455 UINT64_C(242853888), // FCVTNSv4f16 2456 UINT64_C(1310828544), // FCVTNSv4f32 2457 UINT64_C(1316595712), // FCVTNSv8f16 2458 UINT64_C(1691000832), // FCVTNT_ZPmZ_DtoS 2459 UINT64_C(1686675456), // FCVTNT_ZPmZ_StoH 2460 UINT64_C(509673472), // FCVTNUUWDr 2461 UINT64_C(518062080), // FCVTNUUWHr 2462 UINT64_C(505479168), // FCVTNUUWSr 2463 UINT64_C(2657157120), // FCVTNUUXDr 2464 UINT64_C(2665545728), // FCVTNUUXHr 2465 UINT64_C(2652962816), // FCVTNUUXSr 2466 UINT64_C(2121902080), // FCVTNUv1f16 2467 UINT64_C(2116134912), // FCVTNUv1i32 2468 UINT64_C(2120329216), // FCVTNUv1i64 2469 UINT64_C(773957632), // FCVTNUv2f32 2470 UINT64_C(1851893760), // FCVTNUv2f64 2471 UINT64_C(779724800), // FCVTNUv4f16 2472 UINT64_C(1847699456), // FCVTNUv4f32 2473 UINT64_C(1853466624), // FCVTNUv8f16 2474 UINT64_C(3240157216), // FCVTN_Z2Z_StoH 2475 UINT64_C(241264640), // FCVTNv2i32 2476 UINT64_C(237070336), // FCVTNv4i16 2477 UINT64_C(1315006464), // FCVTNv4i32 2478 UINT64_C(1310812160), // FCVTNv8i16 2479 UINT64_C(510132224), // FCVTPSUWDr 2480 UINT64_C(518520832), // FCVTPSUWHr 2481 UINT64_C(505937920), // FCVTPSUWSr 2482 UINT64_C(2657615872), // FCVTPSUXDr 2483 UINT64_C(2666004480), // FCVTPSUXHr 2484 UINT64_C(2653421568), // FCVTPSUXSr 2485 UINT64_C(1593419776), // FCVTPSv1f16 2486 UINT64_C(1587652608), // FCVTPSv1i32 2487 UINT64_C(1591846912), // FCVTPSv1i64 2488 UINT64_C(245475328), // FCVTPSv2f32 2489 UINT64_C(1323411456), // FCVTPSv2f64 2490 UINT64_C(251242496), // FCVTPSv4f16 2491 UINT64_C(1319217152), // FCVTPSv4f32 2492 UINT64_C(1324984320), // FCVTPSv8f16 2493 UINT64_C(510197760), // FCVTPUUWDr 2494 UINT64_C(518586368), // FCVTPUUWHr 2495 UINT64_C(506003456), // FCVTPUUWSr 2496 UINT64_C(2657681408), // FCVTPUUXDr 2497 UINT64_C(2666070016), // FCVTPUUXHr 2498 UINT64_C(2653487104), // FCVTPUUXSr 2499 UINT64_C(2130290688), // FCVTPUv1f16 2500 UINT64_C(2124523520), // FCVTPUv1i32 2501 UINT64_C(2128717824), // FCVTPUv1i64 2502 UINT64_C(782346240), // FCVTPUv2f32 2503 UINT64_C(1860282368), // FCVTPUv2f64 2504 UINT64_C(788113408), // FCVTPUv4f16 2505 UINT64_C(1856088064), // FCVTPUv4f32 2506 UINT64_C(1861855232), // FCVTPUv8f16 2507 UINT64_C(509755392), // FCVTSDr 2508 UINT64_C(518144000), // FCVTSHr 2509 UINT64_C(1678417920), // FCVTXNT_ZPmZ_DtoS 2510 UINT64_C(2120312832), // FCVTXNv1i64 2511 UINT64_C(778135552), // FCVTXNv2f32 2512 UINT64_C(1851877376), // FCVTXNv4f32 2513 UINT64_C(1695195136), // FCVTX_ZPmZ_DtoS 2514 UINT64_C(509116416), // FCVTZSSWDri 2515 UINT64_C(517505024), // FCVTZSSWHri 2516 UINT64_C(504922112), // FCVTZSSWSri 2517 UINT64_C(2656567296), // FCVTZSSXDri 2518 UINT64_C(2664955904), // FCVTZSSXHri 2519 UINT64_C(2652372992), // FCVTZSSXSri 2520 UINT64_C(511180800), // FCVTZSUWDr 2521 UINT64_C(519569408), // FCVTZSUWHr 2522 UINT64_C(506986496), // FCVTZSUWSr 2523 UINT64_C(2658664448), // FCVTZSUXDr 2524 UINT64_C(2667053056), // FCVTZSUXHr 2525 UINT64_C(2654470144), // FCVTZSUXSr 2526 UINT64_C(3240222720), // FCVTZS_2Z2Z_StoS 2527 UINT64_C(3241271296), // FCVTZS_4Z4Z_StoS 2528 UINT64_C(1709088768), // FCVTZS_ZPmZ_DtoD 2529 UINT64_C(1708695552), // FCVTZS_ZPmZ_DtoS 2530 UINT64_C(1700700160), // FCVTZS_ZPmZ_HtoD 2531 UINT64_C(1700438016), // FCVTZS_ZPmZ_HtoH 2532 UINT64_C(1700569088), // FCVTZS_ZPmZ_HtoS 2533 UINT64_C(1708957696), // FCVTZS_ZPmZ_StoD 2534 UINT64_C(1704763392), // FCVTZS_ZPmZ_StoS 2535 UINT64_C(1598094336), // FCVTZSd 2536 UINT64_C(1594948608), // FCVTZSh 2537 UINT64_C(1595997184), // FCVTZSs 2538 UINT64_C(1593423872), // FCVTZSv1f16 2539 UINT64_C(1587656704), // FCVTZSv1i32 2540 UINT64_C(1591851008), // FCVTZSv1i64 2541 UINT64_C(245479424), // FCVTZSv2f32 2542 UINT64_C(1323415552), // FCVTZSv2f64 2543 UINT64_C(253819904), // FCVTZSv2i32_shift 2544 UINT64_C(1329658880), // FCVTZSv2i64_shift 2545 UINT64_C(251246592), // FCVTZSv4f16 2546 UINT64_C(1319221248), // FCVTZSv4f32 2547 UINT64_C(252771328), // FCVTZSv4i16_shift 2548 UINT64_C(1327561728), // FCVTZSv4i32_shift 2549 UINT64_C(1324988416), // FCVTZSv8f16 2550 UINT64_C(1326513152), // FCVTZSv8i16_shift 2551 UINT64_C(509181952), // FCVTZUSWDri 2552 UINT64_C(517570560), // FCVTZUSWHri 2553 UINT64_C(504987648), // FCVTZUSWSri 2554 UINT64_C(2656632832), // FCVTZUSXDri 2555 UINT64_C(2665021440), // FCVTZUSXHri 2556 UINT64_C(2652438528), // FCVTZUSXSri 2557 UINT64_C(511246336), // FCVTZUUWDr 2558 UINT64_C(519634944), // FCVTZUUWHr 2559 UINT64_C(507052032), // FCVTZUUWSr 2560 UINT64_C(2658729984), // FCVTZUUXDr 2561 UINT64_C(2667118592), // FCVTZUUXHr 2562 UINT64_C(2654535680), // FCVTZUUXSr 2563 UINT64_C(3240222752), // FCVTZU_2Z2Z_StoS 2564 UINT64_C(3241271328), // FCVTZU_4Z4Z_StoS 2565 UINT64_C(1709154304), // FCVTZU_ZPmZ_DtoD 2566 UINT64_C(1708761088), // FCVTZU_ZPmZ_DtoS 2567 UINT64_C(1700765696), // FCVTZU_ZPmZ_HtoD 2568 UINT64_C(1700503552), // FCVTZU_ZPmZ_HtoH 2569 UINT64_C(1700634624), // FCVTZU_ZPmZ_HtoS 2570 UINT64_C(1709023232), // FCVTZU_ZPmZ_StoD 2571 UINT64_C(1704828928), // FCVTZU_ZPmZ_StoS 2572 UINT64_C(2134965248), // FCVTZUd 2573 UINT64_C(2131819520), // FCVTZUh 2574 UINT64_C(2132868096), // FCVTZUs 2575 UINT64_C(2130294784), // FCVTZUv1f16 2576 UINT64_C(2124527616), // FCVTZUv1i32 2577 UINT64_C(2128721920), // FCVTZUv1i64 2578 UINT64_C(782350336), // FCVTZUv2f32 2579 UINT64_C(1860286464), // FCVTZUv2f64 2580 UINT64_C(790690816), // FCVTZUv2i32_shift 2581 UINT64_C(1866529792), // FCVTZUv2i64_shift 2582 UINT64_C(788117504), // FCVTZUv4f16 2583 UINT64_C(1856092160), // FCVTZUv4f32 2584 UINT64_C(789642240), // FCVTZUv4i16_shift 2585 UINT64_C(1864432640), // FCVTZUv4i32_shift 2586 UINT64_C(1861859328), // FCVTZUv8f16 2587 UINT64_C(1863384064), // FCVTZUv8i16_shift 2588 UINT64_C(3248545792), // FCVT_2ZZ_H_S 2589 UINT64_C(3240157184), // FCVT_Z2Z_StoH 2590 UINT64_C(1707646976), // FCVT_ZPmZ_DtoH 2591 UINT64_C(1707778048), // FCVT_ZPmZ_DtoS 2592 UINT64_C(1707712512), // FCVT_ZPmZ_HtoD 2593 UINT64_C(1703518208), // FCVT_ZPmZ_HtoS 2594 UINT64_C(1707843584), // FCVT_ZPmZ_StoD 2595 UINT64_C(1703452672), // FCVT_ZPmZ_StoH 2596 UINT64_C(509614080), // FDIVDrr 2597 UINT64_C(518002688), // FDIVHrr 2598 UINT64_C(1707900928), // FDIVR_ZPmZ_D 2599 UINT64_C(1699512320), // FDIVR_ZPmZ_H 2600 UINT64_C(1703706624), // FDIVR_ZPmZ_S 2601 UINT64_C(505419776), // FDIVSrr 2602 UINT64_C(1707966464), // FDIV_ZPmZ_D 2603 UINT64_C(1699577856), // FDIV_ZPmZ_H 2604 UINT64_C(1703772160), // FDIV_ZPmZ_S 2605 UINT64_C(773913600), // FDIVv2f32 2606 UINT64_C(1851849728), // FDIVv2f64 2607 UINT64_C(775961600), // FDIVv4f16 2608 UINT64_C(1847655424), // FDIVv4f32 2609 UINT64_C(1849703424), // FDIVv8f16 2610 UINT64_C(3248492544), // FDOT_VG2_M2Z2Z_HtoS 2611 UINT64_C(3243249672), // FDOT_VG2_M2ZZI_HtoS 2612 UINT64_C(3240103936), // FDOT_VG2_M2ZZ_HtoS 2613 UINT64_C(3248558080), // FDOT_VG4_M4Z4Z_HtoS 2614 UINT64_C(3243282440), // FDOT_VG4_M4ZZI_HtoS 2615 UINT64_C(3241152512), // FDOT_VG4_M4ZZ_HtoS 2616 UINT64_C(1679835136), // FDOT_ZZZI_S 2617 UINT64_C(1679851520), // FDOT_ZZZ_S 2618 UINT64_C(637124608), // FDUP_ZI_D 2619 UINT64_C(628736000), // FDUP_ZI_H 2620 UINT64_C(632930304), // FDUP_ZI_S 2621 UINT64_C(81836032), // FEXPA_ZZ_D 2622 UINT64_C(73447424), // FEXPA_ZZ_H 2623 UINT64_C(77641728), // FEXPA_ZZ_S 2624 UINT64_C(511574016), // FJCVTZS 2625 UINT64_C(1696505856), // FLOGB_ZPmZ_D 2626 UINT64_C(1696243712), // FLOGB_ZPmZ_H 2627 UINT64_C(1696374784), // FLOGB_ZPmZ_S 2628 UINT64_C(524288000), // FMADDDrrr 2629 UINT64_C(532676608), // FMADDHrrr 2630 UINT64_C(520093696), // FMADDSrrr 2631 UINT64_C(1709211648), // FMAD_ZPmZZ_D 2632 UINT64_C(1700823040), // FMAD_ZPmZZ_H 2633 UINT64_C(1705017344), // FMAD_ZPmZZ_S 2634 UINT64_C(509626368), // FMAXDrr 2635 UINT64_C(518014976), // FMAXHrr 2636 UINT64_C(509634560), // FMAXNMDrr 2637 UINT64_C(518023168), // FMAXNMHrr 2638 UINT64_C(1691648000), // FMAXNMP_ZPmZZ_D 2639 UINT64_C(1683259392), // FMAXNMP_ZPmZZ_H 2640 UINT64_C(1687453696), // FMAXNMP_ZPmZZ_S 2641 UINT64_C(773899264), // FMAXNMPv2f32 2642 UINT64_C(1851835392), // FMAXNMPv2f64 2643 UINT64_C(1580255232), // FMAXNMPv2i16p 2644 UINT64_C(2117126144), // FMAXNMPv2i32p 2645 UINT64_C(2121320448), // FMAXNMPv2i64p 2646 UINT64_C(775947264), // FMAXNMPv4f16 2647 UINT64_C(1847641088), // FMAXNMPv4f32 2648 UINT64_C(1849689088), // FMAXNMPv8f16 2649 UINT64_C(1691656192), // FMAXNMQV_D 2650 UINT64_C(1683267584), // FMAXNMQV_H 2651 UINT64_C(1687461888), // FMAXNMQV_S 2652 UINT64_C(505440256), // FMAXNMSrr 2653 UINT64_C(1707352064), // FMAXNMV_VPZ_D 2654 UINT64_C(1698963456), // FMAXNMV_VPZ_H 2655 UINT64_C(1703157760), // FMAXNMV_VPZ_S 2656 UINT64_C(238077952), // FMAXNMVv4i16v 2657 UINT64_C(1848690688), // FMAXNMVv4i32v 2658 UINT64_C(1311819776), // FMAXNMVv8i16v 2659 UINT64_C(3252728096), // FMAXNM_VG2_2Z2Z_D 2660 UINT64_C(3244339488), // FMAXNM_VG2_2Z2Z_H 2661 UINT64_C(3248533792), // FMAXNM_VG2_2Z2Z_S 2662 UINT64_C(3252724000), // FMAXNM_VG2_2ZZ_D 2663 UINT64_C(3244335392), // FMAXNM_VG2_2ZZ_H 2664 UINT64_C(3248529696), // FMAXNM_VG2_2ZZ_S 2665 UINT64_C(3252730144), // FMAXNM_VG4_4Z4Z_D 2666 UINT64_C(3244341536), // FMAXNM_VG4_4Z4Z_H 2667 UINT64_C(3248535840), // FMAXNM_VG4_4Z4Z_S 2668 UINT64_C(3252726048), // FMAXNM_VG4_4ZZ_D 2669 UINT64_C(3244337440), // FMAXNM_VG4_4ZZ_H 2670 UINT64_C(3248531744), // FMAXNM_VG4_4ZZ_S 2671 UINT64_C(1708949504), // FMAXNM_ZPmI_D 2672 UINT64_C(1700560896), // FMAXNM_ZPmI_H 2673 UINT64_C(1704755200), // FMAXNM_ZPmI_S 2674 UINT64_C(1707376640), // FMAXNM_ZPmZ_D 2675 UINT64_C(1698988032), // FMAXNM_ZPmZ_H 2676 UINT64_C(1703182336), // FMAXNM_ZPmZ_S 2677 UINT64_C(237028352), // FMAXNMv2f32 2678 UINT64_C(1314964480), // FMAXNMv2f64 2679 UINT64_C(239076352), // FMAXNMv4f16 2680 UINT64_C(1310770176), // FMAXNMv4f32 2681 UINT64_C(1312818176), // FMAXNMv8f16 2682 UINT64_C(1691779072), // FMAXP_ZPmZZ_D 2683 UINT64_C(1683390464), // FMAXP_ZPmZZ_H 2684 UINT64_C(1687584768), // FMAXP_ZPmZZ_S 2685 UINT64_C(773911552), // FMAXPv2f32 2686 UINT64_C(1851847680), // FMAXPv2f64 2687 UINT64_C(1580267520), // FMAXPv2i16p 2688 UINT64_C(2117138432), // FMAXPv2i32p 2689 UINT64_C(2121332736), // FMAXPv2i64p 2690 UINT64_C(775959552), // FMAXPv4f16 2691 UINT64_C(1847653376), // FMAXPv4f32 2692 UINT64_C(1849701376), // FMAXPv8f16 2693 UINT64_C(1691787264), // FMAXQV_D 2694 UINT64_C(1683398656), // FMAXQV_H 2695 UINT64_C(1687592960), // FMAXQV_S 2696 UINT64_C(505432064), // FMAXSrr 2697 UINT64_C(1707483136), // FMAXV_VPZ_D 2698 UINT64_C(1699094528), // FMAXV_VPZ_H 2699 UINT64_C(1703288832), // FMAXV_VPZ_S 2700 UINT64_C(238090240), // FMAXVv4i16v 2701 UINT64_C(1848702976), // FMAXVv4i32v 2702 UINT64_C(1311832064), // FMAXVv8i16v 2703 UINT64_C(3252728064), // FMAX_VG2_2Z2Z_D 2704 UINT64_C(3244339456), // FMAX_VG2_2Z2Z_H 2705 UINT64_C(3248533760), // FMAX_VG2_2Z2Z_S 2706 UINT64_C(3252723968), // FMAX_VG2_2ZZ_D 2707 UINT64_C(3244335360), // FMAX_VG2_2ZZ_H 2708 UINT64_C(3248529664), // FMAX_VG2_2ZZ_S 2709 UINT64_C(3252730112), // FMAX_VG4_4Z4Z_D 2710 UINT64_C(3244341504), // FMAX_VG4_4Z4Z_H 2711 UINT64_C(3248535808), // FMAX_VG4_4Z4Z_S 2712 UINT64_C(3252726016), // FMAX_VG4_4ZZ_D 2713 UINT64_C(3244337408), // FMAX_VG4_4ZZ_H 2714 UINT64_C(3248531712), // FMAX_VG4_4ZZ_S 2715 UINT64_C(1709080576), // FMAX_ZPmI_D 2716 UINT64_C(1700691968), // FMAX_ZPmI_H 2717 UINT64_C(1704886272), // FMAX_ZPmI_S 2718 UINT64_C(1707507712), // FMAX_ZPmZ_D 2719 UINT64_C(1699119104), // FMAX_ZPmZ_H 2720 UINT64_C(1703313408), // FMAX_ZPmZ_S 2721 UINT64_C(237040640), // FMAXv2f32 2722 UINT64_C(1314976768), // FMAXv2f64 2723 UINT64_C(239088640), // FMAXv4f16 2724 UINT64_C(1310782464), // FMAXv4f32 2725 UINT64_C(1312830464), // FMAXv8f16 2726 UINT64_C(509630464), // FMINDrr 2727 UINT64_C(518019072), // FMINHrr 2728 UINT64_C(509638656), // FMINNMDrr 2729 UINT64_C(518027264), // FMINNMHrr 2730 UINT64_C(1691713536), // FMINNMP_ZPmZZ_D 2731 UINT64_C(1683324928), // FMINNMP_ZPmZZ_H 2732 UINT64_C(1687519232), // FMINNMP_ZPmZZ_S 2733 UINT64_C(782287872), // FMINNMPv2f32 2734 UINT64_C(1860224000), // FMINNMPv2f64 2735 UINT64_C(1588643840), // FMINNMPv2i16p 2736 UINT64_C(2125514752), // FMINNMPv2i32p 2737 UINT64_C(2129709056), // FMINNMPv2i64p 2738 UINT64_C(784335872), // FMINNMPv4f16 2739 UINT64_C(1856029696), // FMINNMPv4f32 2740 UINT64_C(1858077696), // FMINNMPv8f16 2741 UINT64_C(1691721728), // FMINNMQV_D 2742 UINT64_C(1683333120), // FMINNMQV_H 2743 UINT64_C(1687527424), // FMINNMQV_S 2744 UINT64_C(505444352), // FMINNMSrr 2745 UINT64_C(1707417600), // FMINNMV_VPZ_D 2746 UINT64_C(1699028992), // FMINNMV_VPZ_H 2747 UINT64_C(1703223296), // FMINNMV_VPZ_S 2748 UINT64_C(246466560), // FMINNMVv4i16v 2749 UINT64_C(1857079296), // FMINNMVv4i32v 2750 UINT64_C(1320208384), // FMINNMVv8i16v 2751 UINT64_C(3252728097), // FMINNM_VG2_2Z2Z_D 2752 UINT64_C(3244339489), // FMINNM_VG2_2Z2Z_H 2753 UINT64_C(3248533793), // FMINNM_VG2_2Z2Z_S 2754 UINT64_C(3252724001), // FMINNM_VG2_2ZZ_D 2755 UINT64_C(3244335393), // FMINNM_VG2_2ZZ_H 2756 UINT64_C(3248529697), // FMINNM_VG2_2ZZ_S 2757 UINT64_C(3252730145), // FMINNM_VG4_4Z4Z_D 2758 UINT64_C(3244341537), // FMINNM_VG4_4Z4Z_H 2759 UINT64_C(3248535841), // FMINNM_VG4_4Z4Z_S 2760 UINT64_C(3252726049), // FMINNM_VG4_4ZZ_D 2761 UINT64_C(3244337441), // FMINNM_VG4_4ZZ_H 2762 UINT64_C(3248531745), // FMINNM_VG4_4ZZ_S 2763 UINT64_C(1709015040), // FMINNM_ZPmI_D 2764 UINT64_C(1700626432), // FMINNM_ZPmI_H 2765 UINT64_C(1704820736), // FMINNM_ZPmI_S 2766 UINT64_C(1707442176), // FMINNM_ZPmZ_D 2767 UINT64_C(1699053568), // FMINNM_ZPmZ_H 2768 UINT64_C(1703247872), // FMINNM_ZPmZ_S 2769 UINT64_C(245416960), // FMINNMv2f32 2770 UINT64_C(1323353088), // FMINNMv2f64 2771 UINT64_C(247464960), // FMINNMv4f16 2772 UINT64_C(1319158784), // FMINNMv4f32 2773 UINT64_C(1321206784), // FMINNMv8f16 2774 UINT64_C(1691844608), // FMINP_ZPmZZ_D 2775 UINT64_C(1683456000), // FMINP_ZPmZZ_H 2776 UINT64_C(1687650304), // FMINP_ZPmZZ_S 2777 UINT64_C(782300160), // FMINPv2f32 2778 UINT64_C(1860236288), // FMINPv2f64 2779 UINT64_C(1588656128), // FMINPv2i16p 2780 UINT64_C(2125527040), // FMINPv2i32p 2781 UINT64_C(2129721344), // FMINPv2i64p 2782 UINT64_C(784348160), // FMINPv4f16 2783 UINT64_C(1856041984), // FMINPv4f32 2784 UINT64_C(1858089984), // FMINPv8f16 2785 UINT64_C(1691852800), // FMINQV_D 2786 UINT64_C(1683464192), // FMINQV_H 2787 UINT64_C(1687658496), // FMINQV_S 2788 UINT64_C(505436160), // FMINSrr 2789 UINT64_C(1707548672), // FMINV_VPZ_D 2790 UINT64_C(1699160064), // FMINV_VPZ_H 2791 UINT64_C(1703354368), // FMINV_VPZ_S 2792 UINT64_C(246478848), // FMINVv4i16v 2793 UINT64_C(1857091584), // FMINVv4i32v 2794 UINT64_C(1320220672), // FMINVv8i16v 2795 UINT64_C(3252728065), // FMIN_VG2_2Z2Z_D 2796 UINT64_C(3244339457), // FMIN_VG2_2Z2Z_H 2797 UINT64_C(3248533761), // FMIN_VG2_2Z2Z_S 2798 UINT64_C(3252723969), // FMIN_VG2_2ZZ_D 2799 UINT64_C(3244335361), // FMIN_VG2_2ZZ_H 2800 UINT64_C(3248529665), // FMIN_VG2_2ZZ_S 2801 UINT64_C(3252730113), // FMIN_VG4_4Z4Z_D 2802 UINT64_C(3244341505), // FMIN_VG4_4Z4Z_H 2803 UINT64_C(3248535809), // FMIN_VG4_4Z4Z_S 2804 UINT64_C(3252726017), // FMIN_VG4_4ZZ_D 2805 UINT64_C(3244337409), // FMIN_VG4_4ZZ_H 2806 UINT64_C(3248531713), // FMIN_VG4_4ZZ_S 2807 UINT64_C(1709146112), // FMIN_ZPmI_D 2808 UINT64_C(1700757504), // FMIN_ZPmI_H 2809 UINT64_C(1704951808), // FMIN_ZPmI_S 2810 UINT64_C(1707573248), // FMIN_ZPmZ_D 2811 UINT64_C(1699184640), // FMIN_ZPmZ_H 2812 UINT64_C(1703378944), // FMIN_ZPmZ_S 2813 UINT64_C(245429248), // FMINv2f32 2814 UINT64_C(1323365376), // FMINv2f64 2815 UINT64_C(247477248), // FMINv4f16 2816 UINT64_C(1319171072), // FMINv4f32 2817 UINT64_C(1321219072), // FMINv8f16 2818 UINT64_C(796950528), // FMLAL2lanev4f16 2819 UINT64_C(1870692352), // FMLAL2lanev8f16 2820 UINT64_C(773901312), // FMLAL2v4f16 2821 UINT64_C(1847643136), // FMLAL2v8f16 2822 UINT64_C(1688223744), // FMLALB_ZZZI_SHH 2823 UINT64_C(1688240128), // FMLALB_ZZZ_SHH 2824 UINT64_C(1688224768), // FMLALT_ZZZI_SHH 2825 UINT64_C(1688241152), // FMLALT_ZZZ_SHH 2826 UINT64_C(3246395392), // FMLAL_MZZI_S 2827 UINT64_C(3240102912), // FMLAL_MZZ_S 2828 UINT64_C(3248490496), // FMLAL_VG2_M2Z2Z_S 2829 UINT64_C(3247443968), // FMLAL_VG2_M2ZZI_S 2830 UINT64_C(3240101888), // FMLAL_VG2_M2ZZ_S 2831 UINT64_C(3248556032), // FMLAL_VG4_M4Z4Z_S 2832 UINT64_C(3247476736), // FMLAL_VG4_M4ZZI_S 2833 UINT64_C(3241150464), // FMLAL_VG4_M4ZZ_S 2834 UINT64_C(260046848), // FMLALlanev4f16 2835 UINT64_C(1333788672), // FMLALlanev8f16 2836 UINT64_C(237038592), // FMLALv4f16 2837 UINT64_C(1310780416), // FMLALv8f16 2838 UINT64_C(3252688896), // FMLA_VG2_M2Z2Z_D 2839 UINT64_C(3248494592), // FMLA_VG2_M2Z2Z_S 2840 UINT64_C(3248492552), // FMLA_VG2_M2Z4Z_H 2841 UINT64_C(3251634176), // FMLA_VG2_M2ZZI_D 2842 UINT64_C(3239055360), // FMLA_VG2_M2ZZI_H 2843 UINT64_C(3243245568), // FMLA_VG2_M2ZZI_S 2844 UINT64_C(3244300288), // FMLA_VG2_M2ZZ_D 2845 UINT64_C(3240107008), // FMLA_VG2_M2ZZ_H 2846 UINT64_C(3240105984), // FMLA_VG2_M2ZZ_S 2847 UINT64_C(3252754432), // FMLA_VG4_M4Z4Z_D 2848 UINT64_C(3248558088), // FMLA_VG4_M4Z4Z_H 2849 UINT64_C(3248560128), // FMLA_VG4_M4Z4Z_S 2850 UINT64_C(3251666944), // FMLA_VG4_M4ZZI_D 2851 UINT64_C(3239088128), // FMLA_VG4_M4ZZI_H 2852 UINT64_C(3243278336), // FMLA_VG4_M4ZZI_S 2853 UINT64_C(3245348864), // FMLA_VG4_M4ZZ_D 2854 UINT64_C(3241155584), // FMLA_VG4_M4ZZ_H 2855 UINT64_C(3241154560), // FMLA_VG4_M4ZZ_S 2856 UINT64_C(1709178880), // FMLA_ZPmZZ_D 2857 UINT64_C(1700790272), // FMLA_ZPmZZ_H 2858 UINT64_C(1704984576), // FMLA_ZPmZZ_S 2859 UINT64_C(1692401664), // FMLA_ZZZI_D 2860 UINT64_C(1679818752), // FMLA_ZZZI_H 2861 UINT64_C(1688207360), // FMLA_ZZZI_S 2862 UINT64_C(1593839616), // FMLAv1i16_indexed 2863 UINT64_C(1602228224), // FMLAv1i32_indexed 2864 UINT64_C(1606422528), // FMLAv1i64_indexed 2865 UINT64_C(237030400), // FMLAv2f32 2866 UINT64_C(1314966528), // FMLAv2f64 2867 UINT64_C(260050944), // FMLAv2i32_indexed 2868 UINT64_C(1337987072), // FMLAv2i64_indexed 2869 UINT64_C(239078400), // FMLAv4f16 2870 UINT64_C(1310772224), // FMLAv4f32 2871 UINT64_C(251662336), // FMLAv4i16_indexed 2872 UINT64_C(1333792768), // FMLAv4i32_indexed 2873 UINT64_C(1312820224), // FMLAv8f16 2874 UINT64_C(1325404160), // FMLAv8i16_indexed 2875 UINT64_C(796966912), // FMLSL2lanev4f16 2876 UINT64_C(1870708736), // FMLSL2lanev8f16 2877 UINT64_C(782289920), // FMLSL2v4f16 2878 UINT64_C(1856031744), // FMLSL2v8f16 2879 UINT64_C(1688231936), // FMLSLB_ZZZI_SHH 2880 UINT64_C(1688248320), // FMLSLB_ZZZ_SHH 2881 UINT64_C(1688232960), // FMLSLT_ZZZI_SHH 2882 UINT64_C(1688249344), // FMLSLT_ZZZ_SHH 2883 UINT64_C(3246395400), // FMLSL_MZZI_S 2884 UINT64_C(3240102920), // FMLSL_MZZ_S 2885 UINT64_C(3248490504), // FMLSL_VG2_M2Z2Z_S 2886 UINT64_C(3247443976), // FMLSL_VG2_M2ZZI_S 2887 UINT64_C(3240101896), // FMLSL_VG2_M2ZZ_S 2888 UINT64_C(3248556040), // FMLSL_VG4_M4Z4Z_S 2889 UINT64_C(3247476744), // FMLSL_VG4_M4ZZI_S 2890 UINT64_C(3241150472), // FMLSL_VG4_M4ZZ_S 2891 UINT64_C(260063232), // FMLSLlanev4f16 2892 UINT64_C(1333805056), // FMLSLlanev8f16 2893 UINT64_C(245427200), // FMLSLv4f16 2894 UINT64_C(1319169024), // FMLSLv8f16 2895 UINT64_C(3252688904), // FMLS_VG2_M2Z2Z_D 2896 UINT64_C(3248492568), // FMLS_VG2_M2Z2Z_H 2897 UINT64_C(3248494600), // FMLS_VG2_M2Z2Z_S 2898 UINT64_C(3251634192), // FMLS_VG2_M2ZZI_D 2899 UINT64_C(3239055376), // FMLS_VG2_M2ZZI_H 2900 UINT64_C(3243245584), // FMLS_VG2_M2ZZI_S 2901 UINT64_C(3244300296), // FMLS_VG2_M2ZZ_D 2902 UINT64_C(3240107016), // FMLS_VG2_M2ZZ_H 2903 UINT64_C(3240105992), // FMLS_VG2_M2ZZ_S 2904 UINT64_C(3248558104), // FMLS_VG4_M4Z2Z_H 2905 UINT64_C(3252754440), // FMLS_VG4_M4Z4Z_D 2906 UINT64_C(3248560136), // FMLS_VG4_M4Z4Z_S 2907 UINT64_C(3251666960), // FMLS_VG4_M4ZZI_D 2908 UINT64_C(3239088144), // FMLS_VG4_M4ZZI_H 2909 UINT64_C(3243278352), // FMLS_VG4_M4ZZI_S 2910 UINT64_C(3245348872), // FMLS_VG4_M4ZZ_D 2911 UINT64_C(3241155592), // FMLS_VG4_M4ZZ_H 2912 UINT64_C(3241154568), // FMLS_VG4_M4ZZ_S 2913 UINT64_C(1709187072), // FMLS_ZPmZZ_D 2914 UINT64_C(1700798464), // FMLS_ZPmZZ_H 2915 UINT64_C(1704992768), // FMLS_ZPmZZ_S 2916 UINT64_C(1692402688), // FMLS_ZZZI_D 2917 UINT64_C(1679819776), // FMLS_ZZZI_H 2918 UINT64_C(1688208384), // FMLS_ZZZI_S 2919 UINT64_C(1593856000), // FMLSv1i16_indexed 2920 UINT64_C(1602244608), // FMLSv1i32_indexed 2921 UINT64_C(1606438912), // FMLSv1i64_indexed 2922 UINT64_C(245419008), // FMLSv2f32 2923 UINT64_C(1323355136), // FMLSv2f64 2924 UINT64_C(260067328), // FMLSv2i32_indexed 2925 UINT64_C(1338003456), // FMLSv2i64_indexed 2926 UINT64_C(247467008), // FMLSv4f16 2927 UINT64_C(1319160832), // FMLSv4f32 2928 UINT64_C(251678720), // FMLSv4i16_indexed 2929 UINT64_C(1333809152), // FMLSv4i32_indexed 2930 UINT64_C(1321208832), // FMLSv8f16 2931 UINT64_C(1325420544), // FMLSv8i16_indexed 2932 UINT64_C(1692460032), // FMMLA_ZZZ_D 2933 UINT64_C(1688265728), // FMMLA_ZZZ_S 2934 UINT64_C(2174746624), // FMOPAL_MPPZZ 2935 UINT64_C(2160066560), // FMOPA_MPPZZ_D 2936 UINT64_C(2172649480), // FMOPA_MPPZZ_H 2937 UINT64_C(2155872256), // FMOPA_MPPZZ_S 2938 UINT64_C(2174746640), // FMOPSL_MPPZZ 2939 UINT64_C(2160066576), // FMOPS_MPPZZ_D 2940 UINT64_C(2172649496), // FMOPS_MPPZZ_H 2941 UINT64_C(2155872272), // FMOPS_MPPZZ_S 2942 UINT64_C(2662203392), // FMOVDXHighr 2943 UINT64_C(2657484800), // FMOVDXr 2944 UINT64_C(509612032), // FMOVDi 2945 UINT64_C(509624320), // FMOVDr 2946 UINT64_C(518389760), // FMOVHWr 2947 UINT64_C(2665873408), // FMOVHXr 2948 UINT64_C(518000640), // FMOVHi 2949 UINT64_C(518012928), // FMOVHr 2950 UINT64_C(505806848), // FMOVSWr 2951 UINT64_C(505417728), // FMOVSi 2952 UINT64_C(505430016), // FMOVSr 2953 UINT64_C(518455296), // FMOVWHr 2954 UINT64_C(505872384), // FMOVWSr 2955 UINT64_C(2662268928), // FMOVXDHighr 2956 UINT64_C(2657550336), // FMOVXDr 2957 UINT64_C(2665938944), // FMOVXHr 2958 UINT64_C(251720704), // FMOVv2f32_ns 2959 UINT64_C(1862333440), // FMOVv2f64_ns 2960 UINT64_C(251722752), // FMOVv4f16_ns 2961 UINT64_C(1325462528), // FMOVv4f32_ns 2962 UINT64_C(1325464576), // FMOVv8f16_ns 2963 UINT64_C(1709219840), // FMSB_ZPmZZ_D 2964 UINT64_C(1700831232), // FMSB_ZPmZZ_H 2965 UINT64_C(1705025536), // FMSB_ZPmZZ_S 2966 UINT64_C(524320768), // FMSUBDrrr 2967 UINT64_C(532709376), // FMSUBHrrr 2968 UINT64_C(520126464), // FMSUBSrrr 2969 UINT64_C(509609984), // FMULDrr 2970 UINT64_C(517998592), // FMULHrr 2971 UINT64_C(505415680), // FMULSrr 2972 UINT64_C(1581259776), // FMULX16 2973 UINT64_C(1579211776), // FMULX32 2974 UINT64_C(1583406080), // FMULX64 2975 UINT64_C(1707769856), // FMULX_ZPmZ_D 2976 UINT64_C(1699381248), // FMULX_ZPmZ_H 2977 UINT64_C(1703575552), // FMULX_ZPmZ_S 2978 UINT64_C(2130743296), // FMULXv1i16_indexed 2979 UINT64_C(2139131904), // FMULXv1i32_indexed 2980 UINT64_C(2143326208), // FMULXv1i64_indexed 2981 UINT64_C(237034496), // FMULXv2f32 2982 UINT64_C(1314970624), // FMULXv2f64 2983 UINT64_C(796954624), // FMULXv2i32_indexed 2984 UINT64_C(1874890752), // FMULXv2i64_indexed 2985 UINT64_C(239082496), // FMULXv4f16 2986 UINT64_C(1310776320), // FMULXv4f32 2987 UINT64_C(788566016), // FMULXv4i16_indexed 2988 UINT64_C(1870696448), // FMULXv4i32_indexed 2989 UINT64_C(1312824320), // FMULXv8f16 2990 UINT64_C(1862307840), // FMULXv8i16_indexed 2991 UINT64_C(1708818432), // FMUL_ZPmI_D 2992 UINT64_C(1700429824), // FMUL_ZPmI_H 2993 UINT64_C(1704624128), // FMUL_ZPmI_S 2994 UINT64_C(1707245568), // FMUL_ZPmZ_D 2995 UINT64_C(1698856960), // FMUL_ZPmZ_H 2996 UINT64_C(1703051264), // FMUL_ZPmZ_S 2997 UINT64_C(1692409856), // FMUL_ZZZI_D 2998 UINT64_C(1679826944), // FMUL_ZZZI_H 2999 UINT64_C(1688215552), // FMUL_ZZZI_S 3000 UINT64_C(1707083776), // FMUL_ZZZ_D 3001 UINT64_C(1698695168), // FMUL_ZZZ_H 3002 UINT64_C(1702889472), // FMUL_ZZZ_S 3003 UINT64_C(1593872384), // FMULv1i16_indexed 3004 UINT64_C(1602260992), // FMULv1i32_indexed 3005 UINT64_C(1606455296), // FMULv1i64_indexed 3006 UINT64_C(773905408), // FMULv2f32 3007 UINT64_C(1851841536), // FMULv2f64 3008 UINT64_C(260083712), // FMULv2i32_indexed 3009 UINT64_C(1338019840), // FMULv2i64_indexed 3010 UINT64_C(775953408), // FMULv4f16 3011 UINT64_C(1847647232), // FMULv4f32 3012 UINT64_C(251695104), // FMULv4i16_indexed 3013 UINT64_C(1333825536), // FMULv4i32_indexed 3014 UINT64_C(1849695232), // FMULv8f16 3015 UINT64_C(1325436928), // FMULv8i16_indexed 3016 UINT64_C(509689856), // FNEGDr 3017 UINT64_C(518078464), // FNEGHr 3018 UINT64_C(505495552), // FNEGSr 3019 UINT64_C(81633280), // FNEG_ZPmZ_D 3020 UINT64_C(73244672), // FNEG_ZPmZ_H 3021 UINT64_C(77438976), // FNEG_ZPmZ_S 3022 UINT64_C(782301184), // FNEGv2f32 3023 UINT64_C(1860237312), // FNEGv2f64 3024 UINT64_C(788068352), // FNEGv4f16 3025 UINT64_C(1856043008), // FNEGv4f32 3026 UINT64_C(1861810176), // FNEGv8f16 3027 UINT64_C(526385152), // FNMADDDrrr 3028 UINT64_C(534773760), // FNMADDHrrr 3029 UINT64_C(522190848), // FNMADDSrrr 3030 UINT64_C(1709228032), // FNMAD_ZPmZZ_D 3031 UINT64_C(1700839424), // FNMAD_ZPmZZ_H 3032 UINT64_C(1705033728), // FNMAD_ZPmZZ_S 3033 UINT64_C(1709195264), // FNMLA_ZPmZZ_D 3034 UINT64_C(1700806656), // FNMLA_ZPmZZ_H 3035 UINT64_C(1705000960), // FNMLA_ZPmZZ_S 3036 UINT64_C(1709203456), // FNMLS_ZPmZZ_D 3037 UINT64_C(1700814848), // FNMLS_ZPmZZ_H 3038 UINT64_C(1705009152), // FNMLS_ZPmZZ_S 3039 UINT64_C(1709236224), // FNMSB_ZPmZZ_D 3040 UINT64_C(1700847616), // FNMSB_ZPmZZ_H 3041 UINT64_C(1705041920), // FNMSB_ZPmZZ_S 3042 UINT64_C(526417920), // FNMSUBDrrr 3043 UINT64_C(534806528), // FNMSUBHrrr 3044 UINT64_C(522223616), // FNMSUBSrrr 3045 UINT64_C(509642752), // FNMULDrr 3046 UINT64_C(518031360), // FNMULHrr 3047 UINT64_C(505448448), // FNMULSrr 3048 UINT64_C(1708011520), // FRECPE_ZZ_D 3049 UINT64_C(1699622912), // FRECPE_ZZ_H 3050 UINT64_C(1703817216), // FRECPE_ZZ_S 3051 UINT64_C(1593432064), // FRECPEv1f16 3052 UINT64_C(1587664896), // FRECPEv1i32 3053 UINT64_C(1591859200), // FRECPEv1i64 3054 UINT64_C(245487616), // FRECPEv2f32 3055 UINT64_C(1323423744), // FRECPEv2f64 3056 UINT64_C(251254784), // FRECPEv4f16 3057 UINT64_C(1319229440), // FRECPEv4f32 3058 UINT64_C(1324996608), // FRECPEv8f16 3059 UINT64_C(1581267968), // FRECPS16 3060 UINT64_C(1579219968), // FRECPS32 3061 UINT64_C(1583414272), // FRECPS64 3062 UINT64_C(1707087872), // FRECPS_ZZZ_D 3063 UINT64_C(1698699264), // FRECPS_ZZZ_H 3064 UINT64_C(1702893568), // FRECPS_ZZZ_S 3065 UINT64_C(237042688), // FRECPSv2f32 3066 UINT64_C(1314978816), // FRECPSv2f64 3067 UINT64_C(239090688), // FRECPSv4f16 3068 UINT64_C(1310784512), // FRECPSv4f32 3069 UINT64_C(1312832512), // FRECPSv8f16 3070 UINT64_C(1707909120), // FRECPX_ZPmZ_D 3071 UINT64_C(1699520512), // FRECPX_ZPmZ_H 3072 UINT64_C(1703714816), // FRECPX_ZPmZ_S 3073 UINT64_C(1593440256), // FRECPXv1f16 3074 UINT64_C(1587673088), // FRECPXv1i32 3075 UINT64_C(1591867392), // FRECPXv1i64 3076 UINT64_C(510181376), // FRINT32XDr 3077 UINT64_C(505987072), // FRINT32XSr 3078 UINT64_C(773974016), // FRINT32Xv2f32 3079 UINT64_C(1851910144), // FRINT32Xv2f64 3080 UINT64_C(1847715840), // FRINT32Xv4f32 3081 UINT64_C(510148608), // FRINT32ZDr 3082 UINT64_C(505954304), // FRINT32ZSr 3083 UINT64_C(237103104), // FRINT32Zv2f32 3084 UINT64_C(1315039232), // FRINT32Zv2f64 3085 UINT64_C(1310844928), // FRINT32Zv4f32 3086 UINT64_C(510246912), // FRINT64XDr 3087 UINT64_C(506052608), // FRINT64XSr 3088 UINT64_C(773978112), // FRINT64Xv2f32 3089 UINT64_C(1851914240), // FRINT64Xv2f64 3090 UINT64_C(1847719936), // FRINT64Xv4f32 3091 UINT64_C(510214144), // FRINT64ZDr 3092 UINT64_C(506019840), // FRINT64ZSr 3093 UINT64_C(237107200), // FRINT64Zv2f32 3094 UINT64_C(1315043328), // FRINT64Zv2f64 3095 UINT64_C(1310849024), // FRINT64Zv4f32 3096 UINT64_C(510017536), // FRINTADr 3097 UINT64_C(518406144), // FRINTAHr 3098 UINT64_C(505823232), // FRINTASr 3099 UINT64_C(3249332224), // FRINTA_2Z2Z_S 3100 UINT64_C(3250380800), // FRINTA_4Z4Z_S 3101 UINT64_C(1707384832), // FRINTA_ZPmZ_D 3102 UINT64_C(1698996224), // FRINTA_ZPmZ_H 3103 UINT64_C(1703190528), // FRINTA_ZPmZ_S 3104 UINT64_C(773949440), // FRINTAv2f32 3105 UINT64_C(1851885568), // FRINTAv2f64 3106 UINT64_C(779716608), // FRINTAv4f16 3107 UINT64_C(1847691264), // FRINTAv4f32 3108 UINT64_C(1853458432), // FRINTAv8f16 3109 UINT64_C(510115840), // FRINTIDr 3110 UINT64_C(518504448), // FRINTIHr 3111 UINT64_C(505921536), // FRINTISr 3112 UINT64_C(1707581440), // FRINTI_ZPmZ_D 3113 UINT64_C(1699192832), // FRINTI_ZPmZ_H 3114 UINT64_C(1703387136), // FRINTI_ZPmZ_S 3115 UINT64_C(782342144), // FRINTIv2f32 3116 UINT64_C(1860278272), // FRINTIv2f64 3117 UINT64_C(788109312), // FRINTIv4f16 3118 UINT64_C(1856083968), // FRINTIv4f32 3119 UINT64_C(1861851136), // FRINTIv8f16 3120 UINT64_C(509952000), // FRINTMDr 3121 UINT64_C(518340608), // FRINTMHr 3122 UINT64_C(505757696), // FRINTMSr 3123 UINT64_C(3249201152), // FRINTM_2Z2Z_S 3124 UINT64_C(3250249728), // FRINTM_4Z4Z_S 3125 UINT64_C(1707253760), // FRINTM_ZPmZ_D 3126 UINT64_C(1698865152), // FRINTM_ZPmZ_H 3127 UINT64_C(1703059456), // FRINTM_ZPmZ_S 3128 UINT64_C(237082624), // FRINTMv2f32 3129 UINT64_C(1315018752), // FRINTMv2f64 3130 UINT64_C(242849792), // FRINTMv4f16 3131 UINT64_C(1310824448), // FRINTMv4f32 3132 UINT64_C(1316591616), // FRINTMv8f16 3133 UINT64_C(509886464), // FRINTNDr 3134 UINT64_C(518275072), // FRINTNHr 3135 UINT64_C(505692160), // FRINTNSr 3136 UINT64_C(3249070080), // FRINTN_2Z2Z_S 3137 UINT64_C(3250118656), // FRINTN_4Z4Z_S 3138 UINT64_C(1707122688), // FRINTN_ZPmZ_D 3139 UINT64_C(1698734080), // FRINTN_ZPmZ_H 3140 UINT64_C(1702928384), // FRINTN_ZPmZ_S 3141 UINT64_C(237078528), // FRINTNv2f32 3142 UINT64_C(1315014656), // FRINTNv2f64 3143 UINT64_C(242845696), // FRINTNv4f16 3144 UINT64_C(1310820352), // FRINTNv4f32 3145 UINT64_C(1316587520), // FRINTNv8f16 3146 UINT64_C(509919232), // FRINTPDr 3147 UINT64_C(518307840), // FRINTPHr 3148 UINT64_C(505724928), // FRINTPSr 3149 UINT64_C(3249135616), // FRINTP_2Z2Z_S 3150 UINT64_C(3250184192), // FRINTP_4Z4Z_S 3151 UINT64_C(1707188224), // FRINTP_ZPmZ_D 3152 UINT64_C(1698799616), // FRINTP_ZPmZ_H 3153 UINT64_C(1702993920), // FRINTP_ZPmZ_S 3154 UINT64_C(245467136), // FRINTPv2f32 3155 UINT64_C(1323403264), // FRINTPv2f64 3156 UINT64_C(251234304), // FRINTPv4f16 3157 UINT64_C(1319208960), // FRINTPv4f32 3158 UINT64_C(1324976128), // FRINTPv8f16 3159 UINT64_C(510083072), // FRINTXDr 3160 UINT64_C(518471680), // FRINTXHr 3161 UINT64_C(505888768), // FRINTXSr 3162 UINT64_C(1707515904), // FRINTX_ZPmZ_D 3163 UINT64_C(1699127296), // FRINTX_ZPmZ_H 3164 UINT64_C(1703321600), // FRINTX_ZPmZ_S 3165 UINT64_C(773953536), // FRINTXv2f32 3166 UINT64_C(1851889664), // FRINTXv2f64 3167 UINT64_C(779720704), // FRINTXv4f16 3168 UINT64_C(1847695360), // FRINTXv4f32 3169 UINT64_C(1853462528), // FRINTXv8f16 3170 UINT64_C(509984768), // FRINTZDr 3171 UINT64_C(518373376), // FRINTZHr 3172 UINT64_C(505790464), // FRINTZSr 3173 UINT64_C(1707319296), // FRINTZ_ZPmZ_D 3174 UINT64_C(1698930688), // FRINTZ_ZPmZ_H 3175 UINT64_C(1703124992), // FRINTZ_ZPmZ_S 3176 UINT64_C(245471232), // FRINTZv2f32 3177 UINT64_C(1323407360), // FRINTZv2f64 3178 UINT64_C(251238400), // FRINTZv4f16 3179 UINT64_C(1319213056), // FRINTZv4f32 3180 UINT64_C(1324980224), // FRINTZv8f16 3181 UINT64_C(1708077056), // FRSQRTE_ZZ_D 3182 UINT64_C(1699688448), // FRSQRTE_ZZ_H 3183 UINT64_C(1703882752), // FRSQRTE_ZZ_S 3184 UINT64_C(2130302976), // FRSQRTEv1f16 3185 UINT64_C(2124535808), // FRSQRTEv1i32 3186 UINT64_C(2128730112), // FRSQRTEv1i64 3187 UINT64_C(782358528), // FRSQRTEv2f32 3188 UINT64_C(1860294656), // FRSQRTEv2f64 3189 UINT64_C(788125696), // FRSQRTEv4f16 3190 UINT64_C(1856100352), // FRSQRTEv4f32 3191 UINT64_C(1861867520), // FRSQRTEv8f16 3192 UINT64_C(1589656576), // FRSQRTS16 3193 UINT64_C(1587608576), // FRSQRTS32 3194 UINT64_C(1591802880), // FRSQRTS64 3195 UINT64_C(1707088896), // FRSQRTS_ZZZ_D 3196 UINT64_C(1698700288), // FRSQRTS_ZZZ_H 3197 UINT64_C(1702894592), // FRSQRTS_ZZZ_S 3198 UINT64_C(245431296), // FRSQRTSv2f32 3199 UINT64_C(1323367424), // FRSQRTSv2f64 3200 UINT64_C(247479296), // FRSQRTSv4f16 3201 UINT64_C(1319173120), // FRSQRTSv4f32 3202 UINT64_C(1321221120), // FRSQRTSv8f16 3203 UINT64_C(1707704320), // FSCALE_ZPmZ_D 3204 UINT64_C(1699315712), // FSCALE_ZPmZ_H 3205 UINT64_C(1703510016), // FSCALE_ZPmZ_S 3206 UINT64_C(509722624), // FSQRTDr 3207 UINT64_C(518111232), // FSQRTHr 3208 UINT64_C(505528320), // FSQRTSr 3209 UINT64_C(1707974656), // FSQRT_ZPmZ_D 3210 UINT64_C(1699586048), // FSQRT_ZPmZ_H 3211 UINT64_C(1703780352), // FSQRT_ZPmZ_S 3212 UINT64_C(782366720), // FSQRTv2f32 3213 UINT64_C(1860302848), // FSQRTv2f64 3214 UINT64_C(788133888), // FSQRTv4f16 3215 UINT64_C(1856108544), // FSQRTv4f32 3216 UINT64_C(1861875712), // FSQRTv8f16 3217 UINT64_C(509622272), // FSUBDrr 3218 UINT64_C(518010880), // FSUBHrr 3219 UINT64_C(1708883968), // FSUBR_ZPmI_D 3220 UINT64_C(1700495360), // FSUBR_ZPmI_H 3221 UINT64_C(1704689664), // FSUBR_ZPmI_S 3222 UINT64_C(1707311104), // FSUBR_ZPmZ_D 3223 UINT64_C(1698922496), // FSUBR_ZPmZ_H 3224 UINT64_C(1703116800), // FSUBR_ZPmZ_S 3225 UINT64_C(505427968), // FSUBSrr 3226 UINT64_C(3252689928), // FSUB_VG2_M2Z_D 3227 UINT64_C(3248757768), // FSUB_VG2_M2Z_H 3228 UINT64_C(3248495624), // FSUB_VG2_M2Z_S 3229 UINT64_C(3252755464), // FSUB_VG4_M4Z_D 3230 UINT64_C(3248823304), // FSUB_VG4_M4Z_H 3231 UINT64_C(3248561160), // FSUB_VG4_M4Z_S 3232 UINT64_C(1708752896), // FSUB_ZPmI_D 3233 UINT64_C(1700364288), // FSUB_ZPmI_H 3234 UINT64_C(1704558592), // FSUB_ZPmI_S 3235 UINT64_C(1707180032), // FSUB_ZPmZ_D 3236 UINT64_C(1698791424), // FSUB_ZPmZ_H 3237 UINT64_C(1702985728), // FSUB_ZPmZ_S 3238 UINT64_C(1707082752), // FSUB_ZZZ_D 3239 UINT64_C(1698694144), // FSUB_ZZZ_H 3240 UINT64_C(1702888448), // FSUB_ZZZ_S 3241 UINT64_C(245421056), // FSUBv2f32 3242 UINT64_C(1323357184), // FSUBv2f64 3243 UINT64_C(247469056), // FSUBv4f16 3244 UINT64_C(1319162880), // FSUBv4f32 3245 UINT64_C(1321210880), // FSUBv8f16 3246 UINT64_C(1708163072), // FTMAD_ZZI_D 3247 UINT64_C(1699774464), // FTMAD_ZZI_H 3248 UINT64_C(1703968768), // FTMAD_ZZI_S 3249 UINT64_C(1707084800), // FTSMUL_ZZZ_D 3250 UINT64_C(1698696192), // FTSMUL_ZZZ_H 3251 UINT64_C(1702890496), // FTSMUL_ZZZ_S 3252 UINT64_C(81833984), // FTSSEL_ZZZ_D 3253 UINT64_C(73445376), // FTSSEL_ZZZ_H 3254 UINT64_C(77639680), // FTSSEL_ZZZ_S 3255 UINT64_C(3243245576), // FVDOT_VG2_M2ZZI_HtoS 3256 UINT64_C(3290480640), // GLD1B_D_IMM_REAL 3257 UINT64_C(3292577792), // GLD1B_D_REAL 3258 UINT64_C(3292545024), // GLD1B_D_SXTW_REAL 3259 UINT64_C(3288350720), // GLD1B_D_UXTW_REAL 3260 UINT64_C(2216738816), // GLD1B_S_IMM_REAL 3261 UINT64_C(2218803200), // GLD1B_S_SXTW_REAL 3262 UINT64_C(2214608896), // GLD1B_S_UXTW_REAL 3263 UINT64_C(3315646464), // GLD1D_IMM_REAL 3264 UINT64_C(3317743616), // GLD1D_REAL 3265 UINT64_C(3319840768), // GLD1D_SCALED_REAL 3266 UINT64_C(3317710848), // GLD1D_SXTW_REAL 3267 UINT64_C(3319808000), // GLD1D_SXTW_SCALED_REAL 3268 UINT64_C(3313516544), // GLD1D_UXTW_REAL 3269 UINT64_C(3315613696), // GLD1D_UXTW_SCALED_REAL 3270 UINT64_C(3298869248), // GLD1H_D_IMM_REAL 3271 UINT64_C(3300966400), // GLD1H_D_REAL 3272 UINT64_C(3303063552), // GLD1H_D_SCALED_REAL 3273 UINT64_C(3300933632), // GLD1H_D_SXTW_REAL 3274 UINT64_C(3303030784), // GLD1H_D_SXTW_SCALED_REAL 3275 UINT64_C(3296739328), // GLD1H_D_UXTW_REAL 3276 UINT64_C(3298836480), // GLD1H_D_UXTW_SCALED_REAL 3277 UINT64_C(2225127424), // GLD1H_S_IMM_REAL 3278 UINT64_C(2227191808), // GLD1H_S_SXTW_REAL 3279 UINT64_C(2229288960), // GLD1H_S_SXTW_SCALED_REAL 3280 UINT64_C(2222997504), // GLD1H_S_UXTW_REAL 3281 UINT64_C(2225094656), // GLD1H_S_UXTW_SCALED_REAL 3282 UINT64_C(3288375296), // GLD1Q 3283 UINT64_C(3290464256), // GLD1SB_D_IMM_REAL 3284 UINT64_C(3292561408), // GLD1SB_D_REAL 3285 UINT64_C(3292528640), // GLD1SB_D_SXTW_REAL 3286 UINT64_C(3288334336), // GLD1SB_D_UXTW_REAL 3287 UINT64_C(2216722432), // GLD1SB_S_IMM_REAL 3288 UINT64_C(2218786816), // GLD1SB_S_SXTW_REAL 3289 UINT64_C(2214592512), // GLD1SB_S_UXTW_REAL 3290 UINT64_C(3298852864), // GLD1SH_D_IMM_REAL 3291 UINT64_C(3300950016), // GLD1SH_D_REAL 3292 UINT64_C(3303047168), // GLD1SH_D_SCALED_REAL 3293 UINT64_C(3300917248), // GLD1SH_D_SXTW_REAL 3294 UINT64_C(3303014400), // GLD1SH_D_SXTW_SCALED_REAL 3295 UINT64_C(3296722944), // GLD1SH_D_UXTW_REAL 3296 UINT64_C(3298820096), // GLD1SH_D_UXTW_SCALED_REAL 3297 UINT64_C(2225111040), // GLD1SH_S_IMM_REAL 3298 UINT64_C(2227175424), // GLD1SH_S_SXTW_REAL 3299 UINT64_C(2229272576), // GLD1SH_S_SXTW_SCALED_REAL 3300 UINT64_C(2222981120), // GLD1SH_S_UXTW_REAL 3301 UINT64_C(2225078272), // GLD1SH_S_UXTW_SCALED_REAL 3302 UINT64_C(3307241472), // GLD1SW_D_IMM_REAL 3303 UINT64_C(3309338624), // GLD1SW_D_REAL 3304 UINT64_C(3311435776), // GLD1SW_D_SCALED_REAL 3305 UINT64_C(3309305856), // GLD1SW_D_SXTW_REAL 3306 UINT64_C(3311403008), // GLD1SW_D_SXTW_SCALED_REAL 3307 UINT64_C(3305111552), // GLD1SW_D_UXTW_REAL 3308 UINT64_C(3307208704), // GLD1SW_D_UXTW_SCALED_REAL 3309 UINT64_C(3307257856), // GLD1W_D_IMM_REAL 3310 UINT64_C(3309355008), // GLD1W_D_REAL 3311 UINT64_C(3311452160), // GLD1W_D_SCALED_REAL 3312 UINT64_C(3309322240), // GLD1W_D_SXTW_REAL 3313 UINT64_C(3311419392), // GLD1W_D_SXTW_SCALED_REAL 3314 UINT64_C(3305127936), // GLD1W_D_UXTW_REAL 3315 UINT64_C(3307225088), // GLD1W_D_UXTW_SCALED_REAL 3316 UINT64_C(2233516032), // GLD1W_IMM_REAL 3317 UINT64_C(2235580416), // GLD1W_SXTW_REAL 3318 UINT64_C(2237677568), // GLD1W_SXTW_SCALED_REAL 3319 UINT64_C(2231386112), // GLD1W_UXTW_REAL 3320 UINT64_C(2233483264), // GLD1W_UXTW_SCALED_REAL 3321 UINT64_C(3290488832), // GLDFF1B_D_IMM_REAL 3322 UINT64_C(3292585984), // GLDFF1B_D_REAL 3323 UINT64_C(3292553216), // GLDFF1B_D_SXTW_REAL 3324 UINT64_C(3288358912), // GLDFF1B_D_UXTW_REAL 3325 UINT64_C(2216747008), // GLDFF1B_S_IMM_REAL 3326 UINT64_C(2218811392), // GLDFF1B_S_SXTW_REAL 3327 UINT64_C(2214617088), // GLDFF1B_S_UXTW_REAL 3328 UINT64_C(3315654656), // GLDFF1D_IMM_REAL 3329 UINT64_C(3317751808), // GLDFF1D_REAL 3330 UINT64_C(3319848960), // GLDFF1D_SCALED_REAL 3331 UINT64_C(3317719040), // GLDFF1D_SXTW_REAL 3332 UINT64_C(3319816192), // GLDFF1D_SXTW_SCALED_REAL 3333 UINT64_C(3313524736), // GLDFF1D_UXTW_REAL 3334 UINT64_C(3315621888), // GLDFF1D_UXTW_SCALED_REAL 3335 UINT64_C(3298877440), // GLDFF1H_D_IMM_REAL 3336 UINT64_C(3300974592), // GLDFF1H_D_REAL 3337 UINT64_C(3303071744), // GLDFF1H_D_SCALED_REAL 3338 UINT64_C(3300941824), // GLDFF1H_D_SXTW_REAL 3339 UINT64_C(3303038976), // GLDFF1H_D_SXTW_SCALED_REAL 3340 UINT64_C(3296747520), // GLDFF1H_D_UXTW_REAL 3341 UINT64_C(3298844672), // GLDFF1H_D_UXTW_SCALED_REAL 3342 UINT64_C(2225135616), // GLDFF1H_S_IMM_REAL 3343 UINT64_C(2227200000), // GLDFF1H_S_SXTW_REAL 3344 UINT64_C(2229297152), // GLDFF1H_S_SXTW_SCALED_REAL 3345 UINT64_C(2223005696), // GLDFF1H_S_UXTW_REAL 3346 UINT64_C(2225102848), // GLDFF1H_S_UXTW_SCALED_REAL 3347 UINT64_C(3290472448), // GLDFF1SB_D_IMM_REAL 3348 UINT64_C(3292569600), // GLDFF1SB_D_REAL 3349 UINT64_C(3292536832), // GLDFF1SB_D_SXTW_REAL 3350 UINT64_C(3288342528), // GLDFF1SB_D_UXTW_REAL 3351 UINT64_C(2216730624), // GLDFF1SB_S_IMM_REAL 3352 UINT64_C(2218795008), // GLDFF1SB_S_SXTW_REAL 3353 UINT64_C(2214600704), // GLDFF1SB_S_UXTW_REAL 3354 UINT64_C(3298861056), // GLDFF1SH_D_IMM_REAL 3355 UINT64_C(3300958208), // GLDFF1SH_D_REAL 3356 UINT64_C(3303055360), // GLDFF1SH_D_SCALED_REAL 3357 UINT64_C(3300925440), // GLDFF1SH_D_SXTW_REAL 3358 UINT64_C(3303022592), // GLDFF1SH_D_SXTW_SCALED_REAL 3359 UINT64_C(3296731136), // GLDFF1SH_D_UXTW_REAL 3360 UINT64_C(3298828288), // GLDFF1SH_D_UXTW_SCALED_REAL 3361 UINT64_C(2225119232), // GLDFF1SH_S_IMM_REAL 3362 UINT64_C(2227183616), // GLDFF1SH_S_SXTW_REAL 3363 UINT64_C(2229280768), // GLDFF1SH_S_SXTW_SCALED_REAL 3364 UINT64_C(2222989312), // GLDFF1SH_S_UXTW_REAL 3365 UINT64_C(2225086464), // GLDFF1SH_S_UXTW_SCALED_REAL 3366 UINT64_C(3307249664), // GLDFF1SW_D_IMM_REAL 3367 UINT64_C(3309346816), // GLDFF1SW_D_REAL 3368 UINT64_C(3311443968), // GLDFF1SW_D_SCALED_REAL 3369 UINT64_C(3309314048), // GLDFF1SW_D_SXTW_REAL 3370 UINT64_C(3311411200), // GLDFF1SW_D_SXTW_SCALED_REAL 3371 UINT64_C(3305119744), // GLDFF1SW_D_UXTW_REAL 3372 UINT64_C(3307216896), // GLDFF1SW_D_UXTW_SCALED_REAL 3373 UINT64_C(3307266048), // GLDFF1W_D_IMM_REAL 3374 UINT64_C(3309363200), // GLDFF1W_D_REAL 3375 UINT64_C(3311460352), // GLDFF1W_D_SCALED_REAL 3376 UINT64_C(3309330432), // GLDFF1W_D_SXTW_REAL 3377 UINT64_C(3311427584), // GLDFF1W_D_SXTW_SCALED_REAL 3378 UINT64_C(3305136128), // GLDFF1W_D_UXTW_REAL 3379 UINT64_C(3307233280), // GLDFF1W_D_UXTW_SCALED_REAL 3380 UINT64_C(2233524224), // GLDFF1W_IMM_REAL 3381 UINT64_C(2235588608), // GLDFF1W_SXTW_REAL 3382 UINT64_C(2237685760), // GLDFF1W_SXTW_SCALED_REAL 3383 UINT64_C(2231394304), // GLDFF1W_UXTW_REAL 3384 UINT64_C(2233491456), // GLDFF1W_UXTW_SCALED_REAL 3385 UINT64_C(2596279296), // GMI 3386 UINT64_C(3573751839), // HINT 3387 UINT64_C(1172357120), // HISTCNT_ZPzZZ_D 3388 UINT64_C(1168162816), // HISTCNT_ZPzZZ_S 3389 UINT64_C(1159766016), // HISTSEG_ZZZ 3390 UINT64_C(3560964096), // HLT 3391 UINT64_C(3556769794), // HVC 3392 UINT64_C(70311936), // INCB_XPiI 3393 UINT64_C(82894848), // INCD_XPiI 3394 UINT64_C(82886656), // INCD_ZPiI 3395 UINT64_C(74506240), // INCH_XPiI 3396 UINT64_C(74498048), // INCH_ZPiI 3397 UINT64_C(623675392), // INCP_XP_B 3398 UINT64_C(636258304), // INCP_XP_D 3399 UINT64_C(627869696), // INCP_XP_H 3400 UINT64_C(632064000), // INCP_XP_S 3401 UINT64_C(636256256), // INCP_ZP_D 3402 UINT64_C(627867648), // INCP_ZP_H 3403 UINT64_C(632061952), // INCP_ZP_S 3404 UINT64_C(78700544), // INCW_XPiI 3405 UINT64_C(78692352), // INCW_ZPiI 3406 UINT64_C(69222400), // INDEX_II_B 3407 UINT64_C(81805312), // INDEX_II_D 3408 UINT64_C(73416704), // INDEX_II_H 3409 UINT64_C(77611008), // INDEX_II_S 3410 UINT64_C(69224448), // INDEX_IR_B 3411 UINT64_C(81807360), // INDEX_IR_D 3412 UINT64_C(73418752), // INDEX_IR_H 3413 UINT64_C(77613056), // INDEX_IR_S 3414 UINT64_C(69223424), // INDEX_RI_B 3415 UINT64_C(81806336), // INDEX_RI_D 3416 UINT64_C(73417728), // INDEX_RI_H 3417 UINT64_C(77612032), // INDEX_RI_S 3418 UINT64_C(69225472), // INDEX_RR_B 3419 UINT64_C(81808384), // INDEX_RR_D 3420 UINT64_C(73419776), // INDEX_RR_H 3421 UINT64_C(77614080), // INDEX_RR_S 3422 UINT64_C(3221225472), // INSERT_MXIPZ_H_B 3423 UINT64_C(3233808384), // INSERT_MXIPZ_H_D 3424 UINT64_C(3225419776), // INSERT_MXIPZ_H_H 3425 UINT64_C(3233873920), // INSERT_MXIPZ_H_Q 3426 UINT64_C(3229614080), // INSERT_MXIPZ_H_S 3427 UINT64_C(3221258240), // INSERT_MXIPZ_V_B 3428 UINT64_C(3233841152), // INSERT_MXIPZ_V_D 3429 UINT64_C(3225452544), // INSERT_MXIPZ_V_H 3430 UINT64_C(3233906688), // INSERT_MXIPZ_V_Q 3431 UINT64_C(3229646848), // INSERT_MXIPZ_V_S 3432 UINT64_C(86259712), // INSR_ZR_B 3433 UINT64_C(98842624), // INSR_ZR_D 3434 UINT64_C(90454016), // INSR_ZR_H 3435 UINT64_C(94648320), // INSR_ZR_S 3436 UINT64_C(87308288), // INSR_ZV_B 3437 UINT64_C(99891200), // INSR_ZV_D 3438 UINT64_C(91502592), // INSR_ZV_H 3439 UINT64_C(95696896), // INSR_ZV_S 3440 UINT64_C(1308761088), // INSvi16gpr 3441 UINT64_C(1845625856), // INSvi16lane 3442 UINT64_C(1308892160), // INSvi32gpr 3443 UINT64_C(1845756928), // INSvi32lane 3444 UINT64_C(1309154304), // INSvi64gpr 3445 UINT64_C(1846019072), // INSvi64lane 3446 UINT64_C(1308695552), // INSvi8gpr 3447 UINT64_C(1845560320), // INSvi8lane 3448 UINT64_C(2596278272), // IRG 3449 UINT64_C(3573756127), // ISB 3450 UINT64_C(86024192), // LASTA_RPZ_B 3451 UINT64_C(98607104), // LASTA_RPZ_D 3452 UINT64_C(90218496), // LASTA_RPZ_H 3453 UINT64_C(94412800), // LASTA_RPZ_S 3454 UINT64_C(86147072), // LASTA_VPZ_B 3455 UINT64_C(98729984), // LASTA_VPZ_D 3456 UINT64_C(90341376), // LASTA_VPZ_H 3457 UINT64_C(94535680), // LASTA_VPZ_S 3458 UINT64_C(86089728), // LASTB_RPZ_B 3459 UINT64_C(98672640), // LASTB_RPZ_D 3460 UINT64_C(90284032), // LASTB_RPZ_H 3461 UINT64_C(94478336), // LASTB_RPZ_S 3462 UINT64_C(86212608), // LASTB_VPZ_B 3463 UINT64_C(98795520), // LASTB_VPZ_D 3464 UINT64_C(90406912), // LASTB_VPZ_H 3465 UINT64_C(94601216), // LASTB_VPZ_S 3466 UINT64_C(2751479808), // LD1B 3467 UINT64_C(2684354560), // LD1B_2Z 3468 UINT64_C(2688548864), // LD1B_2Z_IMM 3469 UINT64_C(2684387328), // LD1B_4Z 3470 UINT64_C(2688581632), // LD1B_4Z_IMM 3471 UINT64_C(2757771264), // LD1B_D 3472 UINT64_C(2757795840), // LD1B_D_IMM_REAL 3473 UINT64_C(2753576960), // LD1B_H 3474 UINT64_C(2753601536), // LD1B_H_IMM_REAL 3475 UINT64_C(2751504384), // LD1B_IMM_REAL 3476 UINT64_C(2755674112), // LD1B_S 3477 UINT64_C(2755698688), // LD1B_S_IMM_REAL 3478 UINT64_C(2705326080), // LD1B_VG2_M2ZPXI 3479 UINT64_C(2701131776), // LD1B_VG2_M2ZPXX 3480 UINT64_C(2705358848), // LD1B_VG4_M4ZPXI 3481 UINT64_C(2701164544), // LD1B_VG4_M4ZPXX 3482 UINT64_C(2782937088), // LD1D 3483 UINT64_C(2684379136), // LD1D_2Z 3484 UINT64_C(2688573440), // LD1D_2Z_IMM 3485 UINT64_C(2684411904), // LD1D_4Z 3486 UINT64_C(2688606208), // LD1D_4Z_IMM 3487 UINT64_C(2782961664), // LD1D_IMM_REAL 3488 UINT64_C(2776662016), // LD1D_Q 3489 UINT64_C(2777686016), // LD1D_Q_IMM 3490 UINT64_C(2705350656), // LD1D_VG2_M2ZPXI 3491 UINT64_C(2701156352), // LD1D_VG2_M2ZPXX 3492 UINT64_C(2705383424), // LD1D_VG4_M4ZPXI 3493 UINT64_C(2701189120), // LD1D_VG4_M4ZPXX 3494 UINT64_C(1279270912), // LD1Fourv16b 3495 UINT64_C(1287659520), // LD1Fourv16b_POST 3496 UINT64_C(205532160), // LD1Fourv1d 3497 UINT64_C(213920768), // LD1Fourv1d_POST 3498 UINT64_C(1279273984), // LD1Fourv2d 3499 UINT64_C(1287662592), // LD1Fourv2d_POST 3500 UINT64_C(205531136), // LD1Fourv2s 3501 UINT64_C(213919744), // LD1Fourv2s_POST 3502 UINT64_C(205530112), // LD1Fourv4h 3503 UINT64_C(213918720), // LD1Fourv4h_POST 3504 UINT64_C(1279272960), // LD1Fourv4s 3505 UINT64_C(1287661568), // LD1Fourv4s_POST 3506 UINT64_C(205529088), // LD1Fourv8b 3507 UINT64_C(213917696), // LD1Fourv8b_POST 3508 UINT64_C(1279271936), // LD1Fourv8h 3509 UINT64_C(1287660544), // LD1Fourv8h_POST 3510 UINT64_C(2761965568), // LD1H 3511 UINT64_C(2684362752), // LD1H_2Z 3512 UINT64_C(2688557056), // LD1H_2Z_IMM 3513 UINT64_C(2684395520), // LD1H_4Z 3514 UINT64_C(2688589824), // LD1H_4Z_IMM 3515 UINT64_C(2766159872), // LD1H_D 3516 UINT64_C(2766184448), // LD1H_D_IMM_REAL 3517 UINT64_C(2761990144), // LD1H_IMM_REAL 3518 UINT64_C(2764062720), // LD1H_S 3519 UINT64_C(2764087296), // LD1H_S_IMM_REAL 3520 UINT64_C(2705334272), // LD1H_VG2_M2ZPXI 3521 UINT64_C(2701139968), // LD1H_VG2_M2ZPXX 3522 UINT64_C(2705367040), // LD1H_VG4_M4ZPXI 3523 UINT64_C(2701172736), // LD1H_VG4_M4ZPXX 3524 UINT64_C(1279291392), // LD1Onev16b 3525 UINT64_C(1287680000), // LD1Onev16b_POST 3526 UINT64_C(205552640), // LD1Onev1d 3527 UINT64_C(213941248), // LD1Onev1d_POST 3528 UINT64_C(1279294464), // LD1Onev2d 3529 UINT64_C(1287683072), // LD1Onev2d_POST 3530 UINT64_C(205551616), // LD1Onev2s 3531 UINT64_C(213940224), // LD1Onev2s_POST 3532 UINT64_C(205550592), // LD1Onev4h 3533 UINT64_C(213939200), // LD1Onev4h_POST 3534 UINT64_C(1279293440), // LD1Onev4s 3535 UINT64_C(1287682048), // LD1Onev4s_POST 3536 UINT64_C(205549568), // LD1Onev8b 3537 UINT64_C(213938176), // LD1Onev8b_POST 3538 UINT64_C(1279292416), // LD1Onev8h 3539 UINT64_C(1287681024), // LD1Onev8h_POST 3540 UINT64_C(2218844160), // LD1RB_D_IMM 3541 UINT64_C(2218827776), // LD1RB_H_IMM 3542 UINT64_C(2218819584), // LD1RB_IMM 3543 UINT64_C(2218835968), // LD1RB_S_IMM 3544 UINT64_C(2244009984), // LD1RD_IMM 3545 UINT64_C(2227232768), // LD1RH_D_IMM 3546 UINT64_C(2227216384), // LD1RH_IMM 3547 UINT64_C(2227224576), // LD1RH_S_IMM 3548 UINT64_C(2753560576), // LD1RO_B 3549 UINT64_C(2753568768), // LD1RO_B_IMM 3550 UINT64_C(2778726400), // LD1RO_D 3551 UINT64_C(2778734592), // LD1RO_D_IMM 3552 UINT64_C(2761949184), // LD1RO_H 3553 UINT64_C(2761957376), // LD1RO_H_IMM 3554 UINT64_C(2770337792), // LD1RO_W 3555 UINT64_C(2770345984), // LD1RO_W_IMM 3556 UINT64_C(2751463424), // LD1RQ_B 3557 UINT64_C(2751471616), // LD1RQ_B_IMM 3558 UINT64_C(2776629248), // LD1RQ_D 3559 UINT64_C(2776637440), // LD1RQ_D_IMM 3560 UINT64_C(2759852032), // LD1RQ_H 3561 UINT64_C(2759860224), // LD1RQ_H_IMM 3562 UINT64_C(2768240640), // LD1RQ_W 3563 UINT64_C(2768248832), // LD1RQ_W_IMM 3564 UINT64_C(2243985408), // LD1RSB_D_IMM 3565 UINT64_C(2244001792), // LD1RSB_H_IMM 3566 UINT64_C(2243993600), // LD1RSB_S_IMM 3567 UINT64_C(2235596800), // LD1RSH_D_IMM 3568 UINT64_C(2235604992), // LD1RSH_S_IMM 3569 UINT64_C(2227208192), // LD1RSW_IMM 3570 UINT64_C(2235621376), // LD1RW_D_IMM 3571 UINT64_C(2235613184), // LD1RW_IMM 3572 UINT64_C(1296089088), // LD1Rv16b 3573 UINT64_C(1304477696), // LD1Rv16b_POST 3574 UINT64_C(222350336), // LD1Rv1d 3575 UINT64_C(230738944), // LD1Rv1d_POST 3576 UINT64_C(1296092160), // LD1Rv2d 3577 UINT64_C(1304480768), // LD1Rv2d_POST 3578 UINT64_C(222349312), // LD1Rv2s 3579 UINT64_C(230737920), // LD1Rv2s_POST 3580 UINT64_C(222348288), // LD1Rv4h 3581 UINT64_C(230736896), // LD1Rv4h_POST 3582 UINT64_C(1296091136), // LD1Rv4s 3583 UINT64_C(1304479744), // LD1Rv4s_POST 3584 UINT64_C(222347264), // LD1Rv8b 3585 UINT64_C(230735872), // LD1Rv8b_POST 3586 UINT64_C(1296090112), // LD1Rv8h 3587 UINT64_C(1304478720), // LD1Rv8h_POST 3588 UINT64_C(2776645632), // LD1SB_D 3589 UINT64_C(2776670208), // LD1SB_D_IMM_REAL 3590 UINT64_C(2780839936), // LD1SB_H 3591 UINT64_C(2780864512), // LD1SB_H_IMM_REAL 3592 UINT64_C(2778742784), // LD1SB_S 3593 UINT64_C(2778767360), // LD1SB_S_IMM_REAL 3594 UINT64_C(2768257024), // LD1SH_D 3595 UINT64_C(2768281600), // LD1SH_D_IMM_REAL 3596 UINT64_C(2770354176), // LD1SH_S 3597 UINT64_C(2770378752), // LD1SH_S_IMM_REAL 3598 UINT64_C(2759868416), // LD1SW_D 3599 UINT64_C(2759892992), // LD1SW_D_IMM_REAL 3600 UINT64_C(1279287296), // LD1Threev16b 3601 UINT64_C(1287675904), // LD1Threev16b_POST 3602 UINT64_C(205548544), // LD1Threev1d 3603 UINT64_C(213937152), // LD1Threev1d_POST 3604 UINT64_C(1279290368), // LD1Threev2d 3605 UINT64_C(1287678976), // LD1Threev2d_POST 3606 UINT64_C(205547520), // LD1Threev2s 3607 UINT64_C(213936128), // LD1Threev2s_POST 3608 UINT64_C(205546496), // LD1Threev4h 3609 UINT64_C(213935104), // LD1Threev4h_POST 3610 UINT64_C(1279289344), // LD1Threev4s 3611 UINT64_C(1287677952), // LD1Threev4s_POST 3612 UINT64_C(205545472), // LD1Threev8b 3613 UINT64_C(213934080), // LD1Threev8b_POST 3614 UINT64_C(1279288320), // LD1Threev8h 3615 UINT64_C(1287676928), // LD1Threev8h_POST 3616 UINT64_C(1279303680), // LD1Twov16b 3617 UINT64_C(1287692288), // LD1Twov16b_POST 3618 UINT64_C(205564928), // LD1Twov1d 3619 UINT64_C(213953536), // LD1Twov1d_POST 3620 UINT64_C(1279306752), // LD1Twov2d 3621 UINT64_C(1287695360), // LD1Twov2d_POST 3622 UINT64_C(205563904), // LD1Twov2s 3623 UINT64_C(213952512), // LD1Twov2s_POST 3624 UINT64_C(205562880), // LD1Twov4h 3625 UINT64_C(213951488), // LD1Twov4h_POST 3626 UINT64_C(1279305728), // LD1Twov4s 3627 UINT64_C(1287694336), // LD1Twov4s_POST 3628 UINT64_C(205561856), // LD1Twov8b 3629 UINT64_C(213950464), // LD1Twov8b_POST 3630 UINT64_C(1279304704), // LD1Twov8h 3631 UINT64_C(1287693312), // LD1Twov8h_POST 3632 UINT64_C(2772451328), // LD1W 3633 UINT64_C(2684370944), // LD1W_2Z 3634 UINT64_C(2688565248), // LD1W_2Z_IMM 3635 UINT64_C(2684403712), // LD1W_4Z 3636 UINT64_C(2688598016), // LD1W_4Z_IMM 3637 UINT64_C(2774548480), // LD1W_D 3638 UINT64_C(2774573056), // LD1W_D_IMM_REAL 3639 UINT64_C(2772475904), // LD1W_IMM_REAL 3640 UINT64_C(2768273408), // LD1W_Q 3641 UINT64_C(2769297408), // LD1W_Q_IMM 3642 UINT64_C(2705342464), // LD1W_VG2_M2ZPXI 3643 UINT64_C(2701148160), // LD1W_VG2_M2ZPXX 3644 UINT64_C(2705375232), // LD1W_VG4_M4ZPXI 3645 UINT64_C(2701180928), // LD1W_VG4_M4ZPXX 3646 UINT64_C(3758096384), // LD1_MXIPXX_H_B 3647 UINT64_C(3770679296), // LD1_MXIPXX_H_D 3648 UINT64_C(3762290688), // LD1_MXIPXX_H_H 3649 UINT64_C(3787456512), // LD1_MXIPXX_H_Q 3650 UINT64_C(3766484992), // LD1_MXIPXX_H_S 3651 UINT64_C(3758129152), // LD1_MXIPXX_V_B 3652 UINT64_C(3770712064), // LD1_MXIPXX_V_D 3653 UINT64_C(3762323456), // LD1_MXIPXX_V_H 3654 UINT64_C(3787489280), // LD1_MXIPXX_V_Q 3655 UINT64_C(3766517760), // LD1_MXIPXX_V_S 3656 UINT64_C(222314496), // LD1i16 3657 UINT64_C(230703104), // LD1i16_POST 3658 UINT64_C(222330880), // LD1i32 3659 UINT64_C(230719488), // LD1i32_POST 3660 UINT64_C(222331904), // LD1i64 3661 UINT64_C(230720512), // LD1i64_POST 3662 UINT64_C(222298112), // LD1i8 3663 UINT64_C(230686720), // LD1i8_POST 3664 UINT64_C(2753609728), // LD2B 3665 UINT64_C(2753617920), // LD2B_IMM 3666 UINT64_C(2778775552), // LD2D 3667 UINT64_C(2778783744), // LD2D_IMM 3668 UINT64_C(2761998336), // LD2H 3669 UINT64_C(2762006528), // LD2H_IMM 3670 UINT64_C(2761981952), // LD2Q 3671 UINT64_C(2760957952), // LD2Q_IMM 3672 UINT64_C(1298186240), // LD2Rv16b 3673 UINT64_C(1306574848), // LD2Rv16b_POST 3674 UINT64_C(224447488), // LD2Rv1d 3675 UINT64_C(232836096), // LD2Rv1d_POST 3676 UINT64_C(1298189312), // LD2Rv2d 3677 UINT64_C(1306577920), // LD2Rv2d_POST 3678 UINT64_C(224446464), // LD2Rv2s 3679 UINT64_C(232835072), // LD2Rv2s_POST 3680 UINT64_C(224445440), // LD2Rv4h 3681 UINT64_C(232834048), // LD2Rv4h_POST 3682 UINT64_C(1298188288), // LD2Rv4s 3683 UINT64_C(1306576896), // LD2Rv4s_POST 3684 UINT64_C(224444416), // LD2Rv8b 3685 UINT64_C(232833024), // LD2Rv8b_POST 3686 UINT64_C(1298187264), // LD2Rv8h 3687 UINT64_C(1306575872), // LD2Rv8h_POST 3688 UINT64_C(1279295488), // LD2Twov16b 3689 UINT64_C(1287684096), // LD2Twov16b_POST 3690 UINT64_C(1279298560), // LD2Twov2d 3691 UINT64_C(1287687168), // LD2Twov2d_POST 3692 UINT64_C(205555712), // LD2Twov2s 3693 UINT64_C(213944320), // LD2Twov2s_POST 3694 UINT64_C(205554688), // LD2Twov4h 3695 UINT64_C(213943296), // LD2Twov4h_POST 3696 UINT64_C(1279297536), // LD2Twov4s 3697 UINT64_C(1287686144), // LD2Twov4s_POST 3698 UINT64_C(205553664), // LD2Twov8b 3699 UINT64_C(213942272), // LD2Twov8b_POST 3700 UINT64_C(1279296512), // LD2Twov8h 3701 UINT64_C(1287685120), // LD2Twov8h_POST 3702 UINT64_C(2770386944), // LD2W 3703 UINT64_C(2770395136), // LD2W_IMM 3704 UINT64_C(224411648), // LD2i16 3705 UINT64_C(232800256), // LD2i16_POST 3706 UINT64_C(224428032), // LD2i32 3707 UINT64_C(232816640), // LD2i32_POST 3708 UINT64_C(224429056), // LD2i64 3709 UINT64_C(232817664), // LD2i64_POST 3710 UINT64_C(224395264), // LD2i8 3711 UINT64_C(232783872), // LD2i8_POST 3712 UINT64_C(2755706880), // LD3B 3713 UINT64_C(2755715072), // LD3B_IMM 3714 UINT64_C(2780872704), // LD3D 3715 UINT64_C(2780880896), // LD3D_IMM 3716 UINT64_C(2764095488), // LD3H 3717 UINT64_C(2764103680), // LD3H_IMM 3718 UINT64_C(2770370560), // LD3Q 3719 UINT64_C(2769346560), // LD3Q_IMM 3720 UINT64_C(1296097280), // LD3Rv16b 3721 UINT64_C(1304485888), // LD3Rv16b_POST 3722 UINT64_C(222358528), // LD3Rv1d 3723 UINT64_C(230747136), // LD3Rv1d_POST 3724 UINT64_C(1296100352), // LD3Rv2d 3725 UINT64_C(1304488960), // LD3Rv2d_POST 3726 UINT64_C(222357504), // LD3Rv2s 3727 UINT64_C(230746112), // LD3Rv2s_POST 3728 UINT64_C(222356480), // LD3Rv4h 3729 UINT64_C(230745088), // LD3Rv4h_POST 3730 UINT64_C(1296099328), // LD3Rv4s 3731 UINT64_C(1304487936), // LD3Rv4s_POST 3732 UINT64_C(222355456), // LD3Rv8b 3733 UINT64_C(230744064), // LD3Rv8b_POST 3734 UINT64_C(1296098304), // LD3Rv8h 3735 UINT64_C(1304486912), // LD3Rv8h_POST 3736 UINT64_C(1279279104), // LD3Threev16b 3737 UINT64_C(1287667712), // LD3Threev16b_POST 3738 UINT64_C(1279282176), // LD3Threev2d 3739 UINT64_C(1287670784), // LD3Threev2d_POST 3740 UINT64_C(205539328), // LD3Threev2s 3741 UINT64_C(213927936), // LD3Threev2s_POST 3742 UINT64_C(205538304), // LD3Threev4h 3743 UINT64_C(213926912), // LD3Threev4h_POST 3744 UINT64_C(1279281152), // LD3Threev4s 3745 UINT64_C(1287669760), // LD3Threev4s_POST 3746 UINT64_C(205537280), // LD3Threev8b 3747 UINT64_C(213925888), // LD3Threev8b_POST 3748 UINT64_C(1279280128), // LD3Threev8h 3749 UINT64_C(1287668736), // LD3Threev8h_POST 3750 UINT64_C(2772484096), // LD3W 3751 UINT64_C(2772492288), // LD3W_IMM 3752 UINT64_C(222322688), // LD3i16 3753 UINT64_C(230711296), // LD3i16_POST 3754 UINT64_C(222339072), // LD3i32 3755 UINT64_C(230727680), // LD3i32_POST 3756 UINT64_C(222340096), // LD3i64 3757 UINT64_C(230728704), // LD3i64_POST 3758 UINT64_C(222306304), // LD3i8 3759 UINT64_C(230694912), // LD3i8_POST 3760 UINT64_C(2757804032), // LD4B 3761 UINT64_C(2757812224), // LD4B_IMM 3762 UINT64_C(2782969856), // LD4D 3763 UINT64_C(2782978048), // LD4D_IMM 3764 UINT64_C(1279262720), // LD4Fourv16b 3765 UINT64_C(1287651328), // LD4Fourv16b_POST 3766 UINT64_C(1279265792), // LD4Fourv2d 3767 UINT64_C(1287654400), // LD4Fourv2d_POST 3768 UINT64_C(205522944), // LD4Fourv2s 3769 UINT64_C(213911552), // LD4Fourv2s_POST 3770 UINT64_C(205521920), // LD4Fourv4h 3771 UINT64_C(213910528), // LD4Fourv4h_POST 3772 UINT64_C(1279264768), // LD4Fourv4s 3773 UINT64_C(1287653376), // LD4Fourv4s_POST 3774 UINT64_C(205520896), // LD4Fourv8b 3775 UINT64_C(213909504), // LD4Fourv8b_POST 3776 UINT64_C(1279263744), // LD4Fourv8h 3777 UINT64_C(1287652352), // LD4Fourv8h_POST 3778 UINT64_C(2766192640), // LD4H 3779 UINT64_C(2766200832), // LD4H_IMM 3780 UINT64_C(2778759168), // LD4Q 3781 UINT64_C(2777735168), // LD4Q_IMM 3782 UINT64_C(1298194432), // LD4Rv16b 3783 UINT64_C(1306583040), // LD4Rv16b_POST 3784 UINT64_C(224455680), // LD4Rv1d 3785 UINT64_C(232844288), // LD4Rv1d_POST 3786 UINT64_C(1298197504), // LD4Rv2d 3787 UINT64_C(1306586112), // LD4Rv2d_POST 3788 UINT64_C(224454656), // LD4Rv2s 3789 UINT64_C(232843264), // LD4Rv2s_POST 3790 UINT64_C(224453632), // LD4Rv4h 3791 UINT64_C(232842240), // LD4Rv4h_POST 3792 UINT64_C(1298196480), // LD4Rv4s 3793 UINT64_C(1306585088), // LD4Rv4s_POST 3794 UINT64_C(224452608), // LD4Rv8b 3795 UINT64_C(232841216), // LD4Rv8b_POST 3796 UINT64_C(1298195456), // LD4Rv8h 3797 UINT64_C(1306584064), // LD4Rv8h_POST 3798 UINT64_C(2774581248), // LD4W 3799 UINT64_C(2774589440), // LD4W_IMM 3800 UINT64_C(224419840), // LD4i16 3801 UINT64_C(232808448), // LD4i16_POST 3802 UINT64_C(224436224), // LD4i32 3803 UINT64_C(232824832), // LD4i32_POST 3804 UINT64_C(224437248), // LD4i64 3805 UINT64_C(232825856), // LD4i64_POST 3806 UINT64_C(224403456), // LD4i8 3807 UINT64_C(232792064), // LD4i8_POST 3808 UINT64_C(4164931584), // LD64B 3809 UINT64_C(950009856), // LDADDAB 3810 UINT64_C(2023751680), // LDADDAH 3811 UINT64_C(954204160), // LDADDALB 3812 UINT64_C(2027945984), // LDADDALH 3813 UINT64_C(3101687808), // LDADDALW 3814 UINT64_C(4175429632), // LDADDALX 3815 UINT64_C(3097493504), // LDADDAW 3816 UINT64_C(4171235328), // LDADDAX 3817 UINT64_C(941621248), // LDADDB 3818 UINT64_C(2015363072), // LDADDH 3819 UINT64_C(945815552), // LDADDLB 3820 UINT64_C(2019557376), // LDADDLH 3821 UINT64_C(3093299200), // LDADDLW 3822 UINT64_C(4167041024), // LDADDLX 3823 UINT64_C(3089104896), // LDADDW 3824 UINT64_C(4162846720), // LDADDX 3825 UINT64_C(222397440), // LDAP1 3826 UINT64_C(952090624), // LDAPRB 3827 UINT64_C(2025832448), // LDAPRH 3828 UINT64_C(3099574272), // LDAPRW 3829 UINT64_C(2579499008), // LDAPRWpre 3830 UINT64_C(4173316096), // LDAPRX 3831 UINT64_C(3653240832), // LDAPRXpre 3832 UINT64_C(423624704), // LDAPURBi 3833 UINT64_C(1497366528), // LDAPURHi 3834 UINT64_C(432013312), // LDAPURSBWi 3835 UINT64_C(427819008), // LDAPURSBXi 3836 UINT64_C(1505755136), // LDAPURSHWi 3837 UINT64_C(1501560832), // LDAPURSHXi 3838 UINT64_C(2575302656), // LDAPURSWi 3839 UINT64_C(3644850176), // LDAPURXi 3840 UINT64_C(490735616), // LDAPURbi 3841 UINT64_C(3711961088), // LDAPURdi 3842 UINT64_C(1564477440), // LDAPURhi 3843 UINT64_C(2571108352), // LDAPURi 3844 UINT64_C(499124224), // LDAPURqi 3845 UINT64_C(2638219264), // LDAPURsi 3846 UINT64_C(148896768), // LDARB 3847 UINT64_C(1222638592), // LDARH 3848 UINT64_C(2296380416), // LDARW 3849 UINT64_C(3370122240), // LDARX 3850 UINT64_C(2288025600), // LDAXPW 3851 UINT64_C(3361767424), // LDAXPX 3852 UINT64_C(140508160), // LDAXRB 3853 UINT64_C(1214249984), // LDAXRH 3854 UINT64_C(2287991808), // LDAXRW 3855 UINT64_C(3361733632), // LDAXRX 3856 UINT64_C(950013952), // LDCLRAB 3857 UINT64_C(2023755776), // LDCLRAH 3858 UINT64_C(954208256), // LDCLRALB 3859 UINT64_C(2027950080), // LDCLRALH 3860 UINT64_C(3101691904), // LDCLRALW 3861 UINT64_C(4175433728), // LDCLRALX 3862 UINT64_C(3097497600), // LDCLRAW 3863 UINT64_C(4171239424), // LDCLRAX 3864 UINT64_C(941625344), // LDCLRB 3865 UINT64_C(2015367168), // LDCLRH 3866 UINT64_C(945819648), // LDCLRLB 3867 UINT64_C(2019561472), // LDCLRLH 3868 UINT64_C(3093303296), // LDCLRLW 3869 UINT64_C(4167045120), // LDCLRLX 3870 UINT64_C(421531648), // LDCLRP 3871 UINT64_C(429920256), // LDCLRPA 3872 UINT64_C(434114560), // LDCLRPAL 3873 UINT64_C(425725952), // LDCLRPL 3874 UINT64_C(3089108992), // LDCLRW 3875 UINT64_C(4162850816), // LDCLRX 3876 UINT64_C(950018048), // LDEORAB 3877 UINT64_C(2023759872), // LDEORAH 3878 UINT64_C(954212352), // LDEORALB 3879 UINT64_C(2027954176), // LDEORALH 3880 UINT64_C(3101696000), // LDEORALW 3881 UINT64_C(4175437824), // LDEORALX 3882 UINT64_C(3097501696), // LDEORAW 3883 UINT64_C(4171243520), // LDEORAX 3884 UINT64_C(941629440), // LDEORB 3885 UINT64_C(2015371264), // LDEORH 3886 UINT64_C(945823744), // LDEORLB 3887 UINT64_C(2019565568), // LDEORLH 3888 UINT64_C(3093307392), // LDEORLW 3889 UINT64_C(4167049216), // LDEORLX 3890 UINT64_C(3089113088), // LDEORW 3891 UINT64_C(4162854912), // LDEORX 3892 UINT64_C(2757779456), // LDFF1B_D_REAL 3893 UINT64_C(2753585152), // LDFF1B_H_REAL 3894 UINT64_C(2751488000), // LDFF1B_REAL 3895 UINT64_C(2755682304), // LDFF1B_S_REAL 3896 UINT64_C(2782945280), // LDFF1D_REAL 3897 UINT64_C(2766168064), // LDFF1H_D_REAL 3898 UINT64_C(2761973760), // LDFF1H_REAL 3899 UINT64_C(2764070912), // LDFF1H_S_REAL 3900 UINT64_C(2776653824), // LDFF1SB_D_REAL 3901 UINT64_C(2780848128), // LDFF1SB_H_REAL 3902 UINT64_C(2778750976), // LDFF1SB_S_REAL 3903 UINT64_C(2768265216), // LDFF1SH_D_REAL 3904 UINT64_C(2770362368), // LDFF1SH_S_REAL 3905 UINT64_C(2759876608), // LDFF1SW_D_REAL 3906 UINT64_C(2774556672), // LDFF1W_D_REAL 3907 UINT64_C(2772459520), // LDFF1W_REAL 3908 UINT64_C(3646947328), // LDG 3909 UINT64_C(3655335936), // LDGM 3910 UINT64_C(2571114496), // LDIAPPW 3911 UINT64_C(2571110400), // LDIAPPWpre 3912 UINT64_C(3644856320), // LDIAPPX 3913 UINT64_C(3644852224), // LDIAPPXpre 3914 UINT64_C(148864000), // LDLARB 3915 UINT64_C(1222605824), // LDLARH 3916 UINT64_C(2296347648), // LDLARW 3917 UINT64_C(3370089472), // LDLARX 3918 UINT64_C(2758844416), // LDNF1B_D_IMM_REAL 3919 UINT64_C(2754650112), // LDNF1B_H_IMM_REAL 3920 UINT64_C(2752552960), // LDNF1B_IMM_REAL 3921 UINT64_C(2756747264), // LDNF1B_S_IMM_REAL 3922 UINT64_C(2784010240), // LDNF1D_IMM_REAL 3923 UINT64_C(2767233024), // LDNF1H_D_IMM_REAL 3924 UINT64_C(2763038720), // LDNF1H_IMM_REAL 3925 UINT64_C(2765135872), // LDNF1H_S_IMM_REAL 3926 UINT64_C(2777718784), // LDNF1SB_D_IMM_REAL 3927 UINT64_C(2781913088), // LDNF1SB_H_IMM_REAL 3928 UINT64_C(2779815936), // LDNF1SB_S_IMM_REAL 3929 UINT64_C(2769330176), // LDNF1SH_D_IMM_REAL 3930 UINT64_C(2771427328), // LDNF1SH_S_IMM_REAL 3931 UINT64_C(2760941568), // LDNF1SW_D_IMM_REAL 3932 UINT64_C(2775621632), // LDNF1W_D_IMM_REAL 3933 UINT64_C(2773524480), // LDNF1W_IMM_REAL 3934 UINT64_C(1816133632), // LDNPDi 3935 UINT64_C(2889875456), // LDNPQi 3936 UINT64_C(742391808), // LDNPSi 3937 UINT64_C(675282944), // LDNPWi 3938 UINT64_C(2822766592), // LDNPXi 3939 UINT64_C(2684354561), // LDNT1B_2Z 3940 UINT64_C(2688548865), // LDNT1B_2Z_IMM 3941 UINT64_C(2684387329), // LDNT1B_4Z 3942 UINT64_C(2688581633), // LDNT1B_4Z_IMM 3943 UINT64_C(2705326088), // LDNT1B_VG2_M2ZPXI 3944 UINT64_C(2701131784), // LDNT1B_VG2_M2ZPXX 3945 UINT64_C(2705358856), // LDNT1B_VG4_M4ZPXI 3946 UINT64_C(2701164552), // LDNT1B_VG4_M4ZPXX 3947 UINT64_C(2751520768), // LDNT1B_ZRI 3948 UINT64_C(2751512576), // LDNT1B_ZRR 3949 UINT64_C(3288383488), // LDNT1B_ZZR_D_REAL 3950 UINT64_C(2214633472), // LDNT1B_ZZR_S_REAL 3951 UINT64_C(2684379137), // LDNT1D_2Z 3952 UINT64_C(2688573441), // LDNT1D_2Z_IMM 3953 UINT64_C(2684411905), // LDNT1D_4Z 3954 UINT64_C(2688606209), // LDNT1D_4Z_IMM 3955 UINT64_C(2705350664), // LDNT1D_VG2_M2ZPXI 3956 UINT64_C(2701156360), // LDNT1D_VG2_M2ZPXX 3957 UINT64_C(2705383432), // LDNT1D_VG4_M4ZPXI 3958 UINT64_C(2701189128), // LDNT1D_VG4_M4ZPXX 3959 UINT64_C(2776686592), // LDNT1D_ZRI 3960 UINT64_C(2776678400), // LDNT1D_ZRR 3961 UINT64_C(3313549312), // LDNT1D_ZZR_D_REAL 3962 UINT64_C(2684362753), // LDNT1H_2Z 3963 UINT64_C(2688557057), // LDNT1H_2Z_IMM 3964 UINT64_C(2684395521), // LDNT1H_4Z 3965 UINT64_C(2688589825), // LDNT1H_4Z_IMM 3966 UINT64_C(2705334280), // LDNT1H_VG2_M2ZPXI 3967 UINT64_C(2701139976), // LDNT1H_VG2_M2ZPXX 3968 UINT64_C(2705367048), // LDNT1H_VG4_M4ZPXI 3969 UINT64_C(2701172744), // LDNT1H_VG4_M4ZPXX 3970 UINT64_C(2759909376), // LDNT1H_ZRI 3971 UINT64_C(2759901184), // LDNT1H_ZRR 3972 UINT64_C(3296772096), // LDNT1H_ZZR_D_REAL 3973 UINT64_C(2223022080), // LDNT1H_ZZR_S_REAL 3974 UINT64_C(3288367104), // LDNT1SB_ZZR_D_REAL 3975 UINT64_C(2214625280), // LDNT1SB_ZZR_S_REAL 3976 UINT64_C(3296755712), // LDNT1SH_ZZR_D_REAL 3977 UINT64_C(2223013888), // LDNT1SH_ZZR_S_REAL 3978 UINT64_C(3305144320), // LDNT1SW_ZZR_D_REAL 3979 UINT64_C(2684370945), // LDNT1W_2Z 3980 UINT64_C(2688565249), // LDNT1W_2Z_IMM 3981 UINT64_C(2684403713), // LDNT1W_4Z 3982 UINT64_C(2688598017), // LDNT1W_4Z_IMM 3983 UINT64_C(2705342472), // LDNT1W_VG2_M2ZPXI 3984 UINT64_C(2701148168), // LDNT1W_VG2_M2ZPXX 3985 UINT64_C(2705375240), // LDNT1W_VG4_M4ZPXI 3986 UINT64_C(2701180936), // LDNT1W_VG4_M4ZPXX 3987 UINT64_C(2768297984), // LDNT1W_ZRI 3988 UINT64_C(2768289792), // LDNT1W_ZRR 3989 UINT64_C(3305160704), // LDNT1W_ZZR_D_REAL 3990 UINT64_C(2231410688), // LDNT1W_ZZR_S_REAL 3991 UINT64_C(1832910848), // LDPDi 3992 UINT64_C(1824522240), // LDPDpost 3993 UINT64_C(1841299456), // LDPDpre 3994 UINT64_C(2906652672), // LDPQi 3995 UINT64_C(2898264064), // LDPQpost 3996 UINT64_C(2915041280), // LDPQpre 3997 UINT64_C(1765801984), // LDPSWi 3998 UINT64_C(1757413376), // LDPSWpost 3999 UINT64_C(1774190592), // LDPSWpre 4000 UINT64_C(759169024), // LDPSi 4001 UINT64_C(750780416), // LDPSpost 4002 UINT64_C(767557632), // LDPSpre 4003 UINT64_C(692060160), // LDPWi 4004 UINT64_C(683671552), // LDPWpost 4005 UINT64_C(700448768), // LDPWpre 4006 UINT64_C(2839543808), // LDPXi 4007 UINT64_C(2831155200), // LDPXpost 4008 UINT64_C(2847932416), // LDPXpre 4009 UINT64_C(4162847744), // LDRAAindexed 4010 UINT64_C(4162849792), // LDRAAwriteback 4011 UINT64_C(4171236352), // LDRABindexed 4012 UINT64_C(4171238400), // LDRABwriteback 4013 UINT64_C(943719424), // LDRBBpost 4014 UINT64_C(943721472), // LDRBBpre 4015 UINT64_C(945833984), // LDRBBroW 4016 UINT64_C(945842176), // LDRBBroX 4017 UINT64_C(960495616), // LDRBBui 4018 UINT64_C(1010828288), // LDRBpost 4019 UINT64_C(1010830336), // LDRBpre 4020 UINT64_C(1012942848), // LDRBroW 4021 UINT64_C(1012951040), // LDRBroX 4022 UINT64_C(1027604480), // LDRBui 4023 UINT64_C(1543503872), // LDRDl 4024 UINT64_C(4232053760), // LDRDpost 4025 UINT64_C(4232055808), // LDRDpre 4026 UINT64_C(4234168320), // LDRDroW 4027 UINT64_C(4234176512), // LDRDroX 4028 UINT64_C(4248829952), // LDRDui 4029 UINT64_C(2017461248), // LDRHHpost 4030 UINT64_C(2017463296), // LDRHHpre 4031 UINT64_C(2019575808), // LDRHHroW 4032 UINT64_C(2019584000), // LDRHHroX 4033 UINT64_C(2034237440), // LDRHHui 4034 UINT64_C(2084570112), // LDRHpost 4035 UINT64_C(2084572160), // LDRHpre 4036 UINT64_C(2086684672), // LDRHroW 4037 UINT64_C(2086692864), // LDRHroX 4038 UINT64_C(2101346304), // LDRHui 4039 UINT64_C(2617245696), // LDRQl 4040 UINT64_C(1019216896), // LDRQpost 4041 UINT64_C(1019218944), // LDRQpre 4042 UINT64_C(1021331456), // LDRQroW 4043 UINT64_C(1021339648), // LDRQroX 4044 UINT64_C(1035993088), // LDRQui 4045 UINT64_C(952108032), // LDRSBWpost 4046 UINT64_C(952110080), // LDRSBWpre 4047 UINT64_C(954222592), // LDRSBWroW 4048 UINT64_C(954230784), // LDRSBWroX 4049 UINT64_C(968884224), // LDRSBWui 4050 UINT64_C(947913728), // LDRSBXpost 4051 UINT64_C(947915776), // LDRSBXpre 4052 UINT64_C(950028288), // LDRSBXroW 4053 UINT64_C(950036480), // LDRSBXroX 4054 UINT64_C(964689920), // LDRSBXui 4055 UINT64_C(2025849856), // LDRSHWpost 4056 UINT64_C(2025851904), // LDRSHWpre 4057 UINT64_C(2027964416), // LDRSHWroW 4058 UINT64_C(2027972608), // LDRSHWroX 4059 UINT64_C(2042626048), // LDRSHWui 4060 UINT64_C(2021655552), // LDRSHXpost 4061 UINT64_C(2021657600), // LDRSHXpre 4062 UINT64_C(2023770112), // LDRSHXroW 4063 UINT64_C(2023778304), // LDRSHXroX 4064 UINT64_C(2038431744), // LDRSHXui 4065 UINT64_C(2550136832), // LDRSWl 4066 UINT64_C(3095397376), // LDRSWpost 4067 UINT64_C(3095399424), // LDRSWpre 4068 UINT64_C(3097511936), // LDRSWroW 4069 UINT64_C(3097520128), // LDRSWroX 4070 UINT64_C(3112173568), // LDRSWui 4071 UINT64_C(469762048), // LDRSl 4072 UINT64_C(3158311936), // LDRSpost 4073 UINT64_C(3158313984), // LDRSpre 4074 UINT64_C(3160426496), // LDRSroW 4075 UINT64_C(3160434688), // LDRSroX 4076 UINT64_C(3175088128), // LDRSui 4077 UINT64_C(402653184), // LDRWl 4078 UINT64_C(3091203072), // LDRWpost 4079 UINT64_C(3091205120), // LDRWpre 4080 UINT64_C(3093317632), // LDRWroW 4081 UINT64_C(3093325824), // LDRWroX 4082 UINT64_C(3107979264), // LDRWui 4083 UINT64_C(1476395008), // LDRXl 4084 UINT64_C(4164944896), // LDRXpost 4085 UINT64_C(4164946944), // LDRXpre 4086 UINT64_C(4167059456), // LDRXroW 4087 UINT64_C(4167067648), // LDRXroX 4088 UINT64_C(4181721088), // LDRXui 4089 UINT64_C(2239758336), // LDR_PXI 4090 UINT64_C(3776937984), // LDR_TX 4091 UINT64_C(3774873600), // LDR_ZA 4092 UINT64_C(2239774720), // LDR_ZXI 4093 UINT64_C(950022144), // LDSETAB 4094 UINT64_C(2023763968), // LDSETAH 4095 UINT64_C(954216448), // LDSETALB 4096 UINT64_C(2027958272), // LDSETALH 4097 UINT64_C(3101700096), // LDSETALW 4098 UINT64_C(4175441920), // LDSETALX 4099 UINT64_C(3097505792), // LDSETAW 4100 UINT64_C(4171247616), // LDSETAX 4101 UINT64_C(941633536), // LDSETB 4102 UINT64_C(2015375360), // LDSETH 4103 UINT64_C(945827840), // LDSETLB 4104 UINT64_C(2019569664), // LDSETLH 4105 UINT64_C(3093311488), // LDSETLW 4106 UINT64_C(4167053312), // LDSETLX 4107 UINT64_C(421539840), // LDSETP 4108 UINT64_C(429928448), // LDSETPA 4109 UINT64_C(434122752), // LDSETPAL 4110 UINT64_C(425734144), // LDSETPL 4111 UINT64_C(3089117184), // LDSETW 4112 UINT64_C(4162859008), // LDSETX 4113 UINT64_C(950026240), // LDSMAXAB 4114 UINT64_C(2023768064), // LDSMAXAH 4115 UINT64_C(954220544), // LDSMAXALB 4116 UINT64_C(2027962368), // LDSMAXALH 4117 UINT64_C(3101704192), // LDSMAXALW 4118 UINT64_C(4175446016), // LDSMAXALX 4119 UINT64_C(3097509888), // LDSMAXAW 4120 UINT64_C(4171251712), // LDSMAXAX 4121 UINT64_C(941637632), // LDSMAXB 4122 UINT64_C(2015379456), // LDSMAXH 4123 UINT64_C(945831936), // LDSMAXLB 4124 UINT64_C(2019573760), // LDSMAXLH 4125 UINT64_C(3093315584), // LDSMAXLW 4126 UINT64_C(4167057408), // LDSMAXLX 4127 UINT64_C(3089121280), // LDSMAXW 4128 UINT64_C(4162863104), // LDSMAXX 4129 UINT64_C(950030336), // LDSMINAB 4130 UINT64_C(2023772160), // LDSMINAH 4131 UINT64_C(954224640), // LDSMINALB 4132 UINT64_C(2027966464), // LDSMINALH 4133 UINT64_C(3101708288), // LDSMINALW 4134 UINT64_C(4175450112), // LDSMINALX 4135 UINT64_C(3097513984), // LDSMINAW 4136 UINT64_C(4171255808), // LDSMINAX 4137 UINT64_C(941641728), // LDSMINB 4138 UINT64_C(2015383552), // LDSMINH 4139 UINT64_C(945836032), // LDSMINLB 4140 UINT64_C(2019577856), // LDSMINLH 4141 UINT64_C(3093319680), // LDSMINLW 4142 UINT64_C(4167061504), // LDSMINLX 4143 UINT64_C(3089125376), // LDSMINW 4144 UINT64_C(4162867200), // LDSMINX 4145 UINT64_C(943720448), // LDTRBi 4146 UINT64_C(2017462272), // LDTRHi 4147 UINT64_C(952109056), // LDTRSBWi 4148 UINT64_C(947914752), // LDTRSBXi 4149 UINT64_C(2025850880), // LDTRSHWi 4150 UINT64_C(2021656576), // LDTRSHXi 4151 UINT64_C(3095398400), // LDTRSWi 4152 UINT64_C(3091204096), // LDTRWi 4153 UINT64_C(4164945920), // LDTRXi 4154 UINT64_C(950034432), // LDUMAXAB 4155 UINT64_C(2023776256), // LDUMAXAH 4156 UINT64_C(954228736), // LDUMAXALB 4157 UINT64_C(2027970560), // LDUMAXALH 4158 UINT64_C(3101712384), // LDUMAXALW 4159 UINT64_C(4175454208), // LDUMAXALX 4160 UINT64_C(3097518080), // LDUMAXAW 4161 UINT64_C(4171259904), // LDUMAXAX 4162 UINT64_C(941645824), // LDUMAXB 4163 UINT64_C(2015387648), // LDUMAXH 4164 UINT64_C(945840128), // LDUMAXLB 4165 UINT64_C(2019581952), // LDUMAXLH 4166 UINT64_C(3093323776), // LDUMAXLW 4167 UINT64_C(4167065600), // LDUMAXLX 4168 UINT64_C(3089129472), // LDUMAXW 4169 UINT64_C(4162871296), // LDUMAXX 4170 UINT64_C(950038528), // LDUMINAB 4171 UINT64_C(2023780352), // LDUMINAH 4172 UINT64_C(954232832), // LDUMINALB 4173 UINT64_C(2027974656), // LDUMINALH 4174 UINT64_C(3101716480), // LDUMINALW 4175 UINT64_C(4175458304), // LDUMINALX 4176 UINT64_C(3097522176), // LDUMINAW 4177 UINT64_C(4171264000), // LDUMINAX 4178 UINT64_C(941649920), // LDUMINB 4179 UINT64_C(2015391744), // LDUMINH 4180 UINT64_C(945844224), // LDUMINLB 4181 UINT64_C(2019586048), // LDUMINLH 4182 UINT64_C(3093327872), // LDUMINLW 4183 UINT64_C(4167069696), // LDUMINLX 4184 UINT64_C(3089133568), // LDUMINW 4185 UINT64_C(4162875392), // LDUMINX 4186 UINT64_C(943718400), // LDURBBi 4187 UINT64_C(1010827264), // LDURBi 4188 UINT64_C(4232052736), // LDURDi 4189 UINT64_C(2017460224), // LDURHHi 4190 UINT64_C(2084569088), // LDURHi 4191 UINT64_C(1019215872), // LDURQi 4192 UINT64_C(952107008), // LDURSBWi 4193 UINT64_C(947912704), // LDURSBXi 4194 UINT64_C(2025848832), // LDURSHWi 4195 UINT64_C(2021654528), // LDURSHXi 4196 UINT64_C(3095396352), // LDURSWi 4197 UINT64_C(3158310912), // LDURSi 4198 UINT64_C(3091202048), // LDURWi 4199 UINT64_C(4164943872), // LDURXi 4200 UINT64_C(2287992832), // LDXPW 4201 UINT64_C(3361734656), // LDXPX 4202 UINT64_C(140475392), // LDXRB 4203 UINT64_C(1214217216), // LDXRH 4204 UINT64_C(2287959040), // LDXRW 4205 UINT64_C(3361700864), // LDXRX 4206 UINT64_C(68648960), // LSLR_ZPmZ_B 4207 UINT64_C(81231872), // LSLR_ZPmZ_D 4208 UINT64_C(72843264), // LSLR_ZPmZ_H 4209 UINT64_C(77037568), // LSLR_ZPmZ_S 4210 UINT64_C(448798720), // LSLVWr 4211 UINT64_C(2596282368), // LSLVXr 4212 UINT64_C(68911104), // LSL_WIDE_ZPmZ_B 4213 UINT64_C(73105408), // LSL_WIDE_ZPmZ_H 4214 UINT64_C(77299712), // LSL_WIDE_ZPmZ_S 4215 UINT64_C(69241856), // LSL_WIDE_ZZZ_B 4216 UINT64_C(73436160), // LSL_WIDE_ZZZ_H 4217 UINT64_C(77630464), // LSL_WIDE_ZZZ_S 4218 UINT64_C(67338496), // LSL_ZPmI_B 4219 UINT64_C(75726848), // LSL_ZPmI_D 4220 UINT64_C(67338752), // LSL_ZPmI_H 4221 UINT64_C(71532544), // LSL_ZPmI_S 4222 UINT64_C(68386816), // LSL_ZPmZ_B 4223 UINT64_C(80969728), // LSL_ZPmZ_D 4224 UINT64_C(72581120), // LSL_ZPmZ_H 4225 UINT64_C(76775424), // LSL_ZPmZ_S 4226 UINT64_C(69770240), // LSL_ZZI_B 4227 UINT64_C(77634560), // LSL_ZZI_D 4228 UINT64_C(70294528), // LSL_ZZI_H 4229 UINT64_C(73440256), // LSL_ZZI_S 4230 UINT64_C(68517888), // LSRR_ZPmZ_B 4231 UINT64_C(81100800), // LSRR_ZPmZ_D 4232 UINT64_C(72712192), // LSRR_ZPmZ_H 4233 UINT64_C(76906496), // LSRR_ZPmZ_S 4234 UINT64_C(448799744), // LSRVWr 4235 UINT64_C(2596283392), // LSRVXr 4236 UINT64_C(68780032), // LSR_WIDE_ZPmZ_B 4237 UINT64_C(72974336), // LSR_WIDE_ZPmZ_H 4238 UINT64_C(77168640), // LSR_WIDE_ZPmZ_S 4239 UINT64_C(69239808), // LSR_WIDE_ZZZ_B 4240 UINT64_C(73434112), // LSR_WIDE_ZZZ_H 4241 UINT64_C(77628416), // LSR_WIDE_ZZZ_S 4242 UINT64_C(67207424), // LSR_ZPmI_B 4243 UINT64_C(75595776), // LSR_ZPmI_D 4244 UINT64_C(67207680), // LSR_ZPmI_H 4245 UINT64_C(71401472), // LSR_ZPmI_S 4246 UINT64_C(68255744), // LSR_ZPmZ_B 4247 UINT64_C(80838656), // LSR_ZPmZ_D 4248 UINT64_C(72450048), // LSR_ZPmZ_H 4249 UINT64_C(76644352), // LSR_ZPmZ_S 4250 UINT64_C(69768192), // LSR_ZZI_B 4251 UINT64_C(77632512), // LSR_ZZI_D 4252 UINT64_C(70292480), // LSR_ZZI_H 4253 UINT64_C(73438208), // LSR_ZZI_S 4254 UINT64_C(3230416896), // LUTI2_2ZTZI_B 4255 UINT64_C(3230420992), // LUTI2_2ZTZI_H 4256 UINT64_C(3230425088), // LUTI2_2ZTZI_S 4257 UINT64_C(3230433280), // LUTI2_4ZTZI_B 4258 UINT64_C(3230437376), // LUTI2_4ZTZI_H 4259 UINT64_C(3230441472), // LUTI2_4ZTZI_S 4260 UINT64_C(3231465472), // LUTI2_S_2ZTZI_B 4261 UINT64_C(3231469568), // LUTI2_S_2ZTZI_H 4262 UINT64_C(3231481856), // LUTI2_S_4ZTZI_B 4263 UINT64_C(3231485952), // LUTI2_S_4ZTZI_H 4264 UINT64_C(3234594816), // LUTI2_ZTZI_B 4265 UINT64_C(3234598912), // LUTI2_ZTZI_H 4266 UINT64_C(3234603008), // LUTI2_ZTZI_S 4267 UINT64_C(3230285824), // LUTI4_2ZTZI_B 4268 UINT64_C(3230289920), // LUTI4_2ZTZI_H 4269 UINT64_C(3230294016), // LUTI4_2ZTZI_S 4270 UINT64_C(3230306304), // LUTI4_4ZTZI_H 4271 UINT64_C(3230310400), // LUTI4_4ZTZI_S 4272 UINT64_C(3231334400), // LUTI4_S_2ZTZI_B 4273 UINT64_C(3231338496), // LUTI4_S_2ZTZI_H 4274 UINT64_C(3231354880), // LUTI4_S_4ZTZI_H 4275 UINT64_C(3234463744), // LUTI4_ZTZI_B 4276 UINT64_C(3234467840), // LUTI4_ZTZI_H 4277 UINT64_C(3234471936), // LUTI4_ZTZI_S 4278 UINT64_C(452984832), // MADDWrrr 4279 UINT64_C(2600468480), // MADDXrrr 4280 UINT64_C(67158016), // MAD_ZPmZZ_B 4281 UINT64_C(79740928), // MAD_ZPmZZ_D 4282 UINT64_C(71352320), // MAD_ZPmZZ_H 4283 UINT64_C(75546624), // MAD_ZPmZZ_S 4284 UINT64_C(1159757824), // MATCH_PPzZZ_B 4285 UINT64_C(1163952128), // MATCH_PPzZZ_H 4286 UINT64_C(67125248), // MLA_ZPmZZ_B 4287 UINT64_C(79708160), // MLA_ZPmZZ_D 4288 UINT64_C(71319552), // MLA_ZPmZZ_H 4289 UINT64_C(75513856), // MLA_ZPmZZ_S 4290 UINT64_C(1155532800), // MLA_ZZZI_D 4291 UINT64_C(1142949888), // MLA_ZZZI_H 4292 UINT64_C(1151338496), // MLA_ZZZI_S 4293 UINT64_C(1310757888), // MLAv16i8 4294 UINT64_C(245404672), // MLAv2i32 4295 UINT64_C(796917760), // MLAv2i32_indexed 4296 UINT64_C(241210368), // MLAv4i16 4297 UINT64_C(792723456), // MLAv4i16_indexed 4298 UINT64_C(1319146496), // MLAv4i32 4299 UINT64_C(1870659584), // MLAv4i32_indexed 4300 UINT64_C(1314952192), // MLAv8i16 4301 UINT64_C(1866465280), // MLAv8i16_indexed 4302 UINT64_C(237016064), // MLAv8i8 4303 UINT64_C(67133440), // MLS_ZPmZZ_B 4304 UINT64_C(79716352), // MLS_ZPmZZ_D 4305 UINT64_C(71327744), // MLS_ZPmZZ_H 4306 UINT64_C(75522048), // MLS_ZPmZZ_S 4307 UINT64_C(1155533824), // MLS_ZZZI_D 4308 UINT64_C(1142950912), // MLS_ZZZI_H 4309 UINT64_C(1151339520), // MLS_ZZZI_S 4310 UINT64_C(1847628800), // MLSv16i8 4311 UINT64_C(782275584), // MLSv2i32 4312 UINT64_C(796934144), // MLSv2i32_indexed 4313 UINT64_C(778081280), // MLSv4i16 4314 UINT64_C(792739840), // MLSv4i16_indexed 4315 UINT64_C(1856017408), // MLSv4i32 4316 UINT64_C(1870675968), // MLSv4i32_indexed 4317 UINT64_C(1851823104), // MLSv8i16 4318 UINT64_C(1866481664), // MLSv8i16_indexed 4319 UINT64_C(773886976), // MLSv8i8 4320 UINT64_C(499155968), // MOPSSETGE 4321 UINT64_C(499164160), // MOPSSETGEN 4322 UINT64_C(499160064), // MOPSSETGET 4323 UINT64_C(499168256), // MOPSSETGETN 4324 UINT64_C(3221619200), // MOVAZ_2ZMI_H_B 4325 UINT64_C(3234202112), // MOVAZ_2ZMI_H_D 4326 UINT64_C(3225813504), // MOVAZ_2ZMI_H_H 4327 UINT64_C(3230007808), // MOVAZ_2ZMI_H_S 4328 UINT64_C(3221651968), // MOVAZ_2ZMI_V_B 4329 UINT64_C(3234234880), // MOVAZ_2ZMI_V_D 4330 UINT64_C(3225846272), // MOVAZ_2ZMI_V_H 4331 UINT64_C(3230040576), // MOVAZ_2ZMI_V_S 4332 UINT64_C(3221620224), // MOVAZ_4ZMI_H_B 4333 UINT64_C(3234203136), // MOVAZ_4ZMI_H_D 4334 UINT64_C(3225814528), // MOVAZ_4ZMI_H_H 4335 UINT64_C(3230008832), // MOVAZ_4ZMI_H_S 4336 UINT64_C(3221652992), // MOVAZ_4ZMI_V_B 4337 UINT64_C(3234235904), // MOVAZ_4ZMI_V_D 4338 UINT64_C(3225847296), // MOVAZ_4ZMI_V_H 4339 UINT64_C(3230041600), // MOVAZ_4ZMI_V_S 4340 UINT64_C(3221621248), // MOVAZ_VG2_2ZM 4341 UINT64_C(3221622272), // MOVAZ_VG4_4ZM 4342 UINT64_C(3221357056), // MOVAZ_ZMI_H_B 4343 UINT64_C(3233939968), // MOVAZ_ZMI_H_D 4344 UINT64_C(3225551360), // MOVAZ_ZMI_H_H 4345 UINT64_C(3234005504), // MOVAZ_ZMI_H_Q 4346 UINT64_C(3229745664), // MOVAZ_ZMI_H_S 4347 UINT64_C(3221389824), // MOVAZ_ZMI_V_B 4348 UINT64_C(3233972736), // MOVAZ_ZMI_V_D 4349 UINT64_C(3225584128), // MOVAZ_ZMI_V_H 4350 UINT64_C(3234038272), // MOVAZ_ZMI_V_Q 4351 UINT64_C(3229778432), // MOVAZ_ZMI_V_S 4352 UINT64_C(3221618688), // MOVA_2ZMXI_H_B 4353 UINT64_C(3234201600), // MOVA_2ZMXI_H_D 4354 UINT64_C(3225812992), // MOVA_2ZMXI_H_H 4355 UINT64_C(3230007296), // MOVA_2ZMXI_H_S 4356 UINT64_C(3221651456), // MOVA_2ZMXI_V_B 4357 UINT64_C(3234234368), // MOVA_2ZMXI_V_D 4358 UINT64_C(3225845760), // MOVA_2ZMXI_V_H 4359 UINT64_C(3230040064), // MOVA_2ZMXI_V_S 4360 UINT64_C(3221619712), // MOVA_4ZMXI_H_B 4361 UINT64_C(3234202624), // MOVA_4ZMXI_H_D 4362 UINT64_C(3225814016), // MOVA_4ZMXI_H_H 4363 UINT64_C(3230008320), // MOVA_4ZMXI_H_S 4364 UINT64_C(3221652480), // MOVA_4ZMXI_V_B 4365 UINT64_C(3234235392), // MOVA_4ZMXI_V_D 4366 UINT64_C(3225846784), // MOVA_4ZMXI_V_H 4367 UINT64_C(3230041088), // MOVA_4ZMXI_V_S 4368 UINT64_C(3221487616), // MOVA_MXI2Z_H_B 4369 UINT64_C(3234070528), // MOVA_MXI2Z_H_D 4370 UINT64_C(3225681920), // MOVA_MXI2Z_H_H 4371 UINT64_C(3229876224), // MOVA_MXI2Z_H_S 4372 UINT64_C(3221520384), // MOVA_MXI2Z_V_B 4373 UINT64_C(3234103296), // MOVA_MXI2Z_V_D 4374 UINT64_C(3225714688), // MOVA_MXI2Z_V_H 4375 UINT64_C(3229908992), // MOVA_MXI2Z_V_S 4376 UINT64_C(3221488640), // MOVA_MXI4Z_H_B 4377 UINT64_C(3234071552), // MOVA_MXI4Z_H_D 4378 UINT64_C(3225682944), // MOVA_MXI4Z_H_H 4379 UINT64_C(3229877248), // MOVA_MXI4Z_H_S 4380 UINT64_C(3221521408), // MOVA_MXI4Z_V_B 4381 UINT64_C(3234104320), // MOVA_MXI4Z_V_D 4382 UINT64_C(3225715712), // MOVA_MXI4Z_V_H 4383 UINT64_C(3229910016), // MOVA_MXI4Z_V_S 4384 UINT64_C(3221620736), // MOVA_VG2_2ZMXI 4385 UINT64_C(3221489664), // MOVA_VG2_MXI2Z 4386 UINT64_C(3221621760), // MOVA_VG4_4ZMXI 4387 UINT64_C(3221490688), // MOVA_VG4_MXI4Z 4388 UINT64_C(788587520), // MOVID 4389 UINT64_C(1325458432), // MOVIv16b_ns 4390 UINT64_C(1862329344), // MOVIv2d_ns 4391 UINT64_C(251659264), // MOVIv2i32 4392 UINT64_C(251708416), // MOVIv2s_msl 4393 UINT64_C(251692032), // MOVIv4i16 4394 UINT64_C(1325401088), // MOVIv4i32 4395 UINT64_C(1325450240), // MOVIv4s_msl 4396 UINT64_C(251716608), // MOVIv8b_ns 4397 UINT64_C(1325433856), // MOVIv8i16 4398 UINT64_C(1920991232), // MOVKWi 4399 UINT64_C(4068474880), // MOVKXi 4400 UINT64_C(310378496), // MOVNWi 4401 UINT64_C(2457862144), // MOVNXi 4402 UINT64_C(68231168), // MOVPRFX_ZPmZ_B 4403 UINT64_C(80814080), // MOVPRFX_ZPmZ_D 4404 UINT64_C(72425472), // MOVPRFX_ZPmZ_H 4405 UINT64_C(76619776), // MOVPRFX_ZPmZ_S 4406 UINT64_C(68165632), // MOVPRFX_ZPzZ_B 4407 UINT64_C(80748544), // MOVPRFX_ZPzZ_D 4408 UINT64_C(72359936), // MOVPRFX_ZPzZ_H 4409 UINT64_C(76554240), // MOVPRFX_ZPzZ_S 4410 UINT64_C(69254144), // MOVPRFX_ZZ 4411 UINT64_C(3226338272), // MOVT_TIX 4412 UINT64_C(3226207200), // MOVT_XTI 4413 UINT64_C(1384120320), // MOVZWi 4414 UINT64_C(3531603968), // MOVZXi 4415 UINT64_C(3579838464), // MRRS 4416 UINT64_C(3575644160), // MRS 4417 UINT64_C(67166208), // MSB_ZPmZZ_B 4418 UINT64_C(79749120), // MSB_ZPmZZ_D 4419 UINT64_C(71360512), // MSB_ZPmZZ_H 4420 UINT64_C(75554816), // MSB_ZPmZZ_S 4421 UINT64_C(3573547008), // MSR 4422 UINT64_C(3577741312), // MSRR 4423 UINT64_C(3573563423), // MSRpstateImm1 4424 UINT64_C(3573563423), // MSRpstateImm4 4425 UINT64_C(3573760127), // MSRpstatesvcrImm1 4426 UINT64_C(453017600), // MSUBWrrr 4427 UINT64_C(2600501248), // MSUBXrrr 4428 UINT64_C(623951872), // MUL_ZI_B 4429 UINT64_C(636534784), // MUL_ZI_D 4430 UINT64_C(628146176), // MUL_ZI_H 4431 UINT64_C(632340480), // MUL_ZI_S 4432 UINT64_C(68157440), // MUL_ZPmZ_B 4433 UINT64_C(80740352), // MUL_ZPmZ_D 4434 UINT64_C(72351744), // MUL_ZPmZ_H 4435 UINT64_C(76546048), // MUL_ZPmZ_S 4436 UINT64_C(1155594240), // MUL_ZZZI_D 4437 UINT64_C(1143011328), // MUL_ZZZI_H 4438 UINT64_C(1151399936), // MUL_ZZZI_S 4439 UINT64_C(69230592), // MUL_ZZZ_B 4440 UINT64_C(81813504), // MUL_ZZZ_D 4441 UINT64_C(73424896), // MUL_ZZZ_H 4442 UINT64_C(77619200), // MUL_ZZZ_S 4443 UINT64_C(1310759936), // MULv16i8 4444 UINT64_C(245406720), // MULv2i32 4445 UINT64_C(260079616), // MULv2i32_indexed 4446 UINT64_C(241212416), // MULv4i16 4447 UINT64_C(255885312), // MULv4i16_indexed 4448 UINT64_C(1319148544), // MULv4i32 4449 UINT64_C(1333821440), // MULv4i32_indexed 4450 UINT64_C(1314954240), // MULv8i16 4451 UINT64_C(1329627136), // MULv8i16_indexed 4452 UINT64_C(237018112), // MULv8i8 4453 UINT64_C(788530176), // MVNIv2i32 4454 UINT64_C(788579328), // MVNIv2s_msl 4455 UINT64_C(788562944), // MVNIv4i16 4456 UINT64_C(1862272000), // MVNIv4i32 4457 UINT64_C(1862321152), // MVNIv4s_msl 4458 UINT64_C(1862304768), // MVNIv8i16 4459 UINT64_C(633356816), // NANDS_PPzPP 4460 UINT64_C(629162512), // NAND_PPzPP 4461 UINT64_C(81804288), // NBSL_ZZZZ 4462 UINT64_C(68657152), // NEG_ZPmZ_B 4463 UINT64_C(81240064), // NEG_ZPmZ_D 4464 UINT64_C(72851456), // NEG_ZPmZ_H 4465 UINT64_C(77045760), // NEG_ZPmZ_S 4466 UINT64_C(1847638016), // NEGv16i8 4467 UINT64_C(2128656384), // NEGv1i64 4468 UINT64_C(782284800), // NEGv2i32 4469 UINT64_C(1860220928), // NEGv2i64 4470 UINT64_C(778090496), // NEGv4i16 4471 UINT64_C(1856026624), // NEGv4i32 4472 UINT64_C(1851832320), // NEGv8i16 4473 UINT64_C(773896192), // NEGv8i8 4474 UINT64_C(1159757840), // NMATCH_PPzZZ_B 4475 UINT64_C(1163952144), // NMATCH_PPzZZ_H 4476 UINT64_C(633356800), // NORS_PPzPP 4477 UINT64_C(629162496), // NOR_PPzPP 4478 UINT64_C(69115904), // NOT_ZPmZ_B 4479 UINT64_C(81698816), // NOT_ZPmZ_D 4480 UINT64_C(73310208), // NOT_ZPmZ_H 4481 UINT64_C(77504512), // NOT_ZPmZ_S 4482 UINT64_C(1847613440), // NOTv16i8 4483 UINT64_C(773871616), // NOTv8i8 4484 UINT64_C(633356304), // ORNS_PPzPP 4485 UINT64_C(706740224), // ORNWrs 4486 UINT64_C(2854223872), // ORNXrs 4487 UINT64_C(629162000), // ORN_PPzPP 4488 UINT64_C(1323310080), // ORNv16i8 4489 UINT64_C(249568256), // ORNv8i8 4490 UINT64_C(68952064), // ORQV_VPZ_B 4491 UINT64_C(81534976), // ORQV_VPZ_D 4492 UINT64_C(73146368), // ORQV_VPZ_H 4493 UINT64_C(77340672), // ORQV_VPZ_S 4494 UINT64_C(633356288), // ORRS_PPzPP 4495 UINT64_C(838860800), // ORRWri 4496 UINT64_C(704643072), // ORRWrs 4497 UINT64_C(2986344448), // ORRXri 4498 UINT64_C(2852126720), // ORRXrs 4499 UINT64_C(629161984), // ORR_PPzPP 4500 UINT64_C(83886080), // ORR_ZI 4501 UINT64_C(68681728), // ORR_ZPmZ_B 4502 UINT64_C(81264640), // ORR_ZPmZ_D 4503 UINT64_C(72876032), // ORR_ZPmZ_H 4504 UINT64_C(77070336), // ORR_ZPmZ_S 4505 UINT64_C(73412608), // ORR_ZZZ 4506 UINT64_C(1319115776), // ORRv16i8 4507 UINT64_C(251663360), // ORRv2i32 4508 UINT64_C(251696128), // ORRv4i16 4509 UINT64_C(1325405184), // ORRv4i32 4510 UINT64_C(1325437952), // ORRv8i16 4511 UINT64_C(245373952), // ORRv8i8 4512 UINT64_C(68689920), // ORV_VPZ_B 4513 UINT64_C(81272832), // ORV_VPZ_D 4514 UINT64_C(72884224), // ORV_VPZ_H 4515 UINT64_C(77078528), // ORV_VPZ_S 4516 UINT64_C(3670083584), // PACDA 4517 UINT64_C(3670084608), // PACDB 4518 UINT64_C(3670092768), // PACDZA 4519 UINT64_C(3670093792), // PACDZB 4520 UINT64_C(2596286464), // PACGA 4521 UINT64_C(3670081536), // PACIA 4522 UINT64_C(3573752095), // PACIA1716 4523 UINT64_C(3573752639), // PACIASP 4524 UINT64_C(3573752607), // PACIAZ 4525 UINT64_C(3670082560), // PACIB 4526 UINT64_C(3573752159), // PACIB1716 4527 UINT64_C(3573752703), // PACIBSP 4528 UINT64_C(3573752671), // PACIBZ 4529 UINT64_C(3670090720), // PACIZA 4530 UINT64_C(3670091744), // PACIZB 4531 UINT64_C(622883856), // PEXT_2PCI_B 4532 UINT64_C(635466768), // PEXT_2PCI_D 4533 UINT64_C(627078160), // PEXT_2PCI_H 4534 UINT64_C(631272464), // PEXT_2PCI_S 4535 UINT64_C(622882832), // PEXT_PCI_B 4536 UINT64_C(635465744), // PEXT_PCI_D 4537 UINT64_C(627077136), // PEXT_PCI_H 4538 UINT64_C(631271440), // PEXT_PCI_S 4539 UINT64_C(622388224), // PFALSE 4540 UINT64_C(626573312), // PFIRST_B 4541 UINT64_C(86652928), // PMOV_PZI_B 4542 UINT64_C(94910464), // PMOV_PZI_D 4543 UINT64_C(86784000), // PMOV_PZI_H 4544 UINT64_C(90716160), // PMOV_PZI_S 4545 UINT64_C(86718464), // PMOV_ZIP_B 4546 UINT64_C(94976000), // PMOV_ZIP_D 4547 UINT64_C(86849536), // PMOV_ZIP_H 4548 UINT64_C(90781696), // PMOV_ZIP_S 4549 UINT64_C(1170237440), // PMULLB_ZZZ_D 4550 UINT64_C(1161848832), // PMULLB_ZZZ_H 4551 UINT64_C(1157654528), // PMULLB_ZZZ_Q 4552 UINT64_C(1170238464), // PMULLT_ZZZ_D 4553 UINT64_C(1161849856), // PMULLT_ZZZ_H 4554 UINT64_C(1157655552), // PMULLT_ZZZ_Q 4555 UINT64_C(1310777344), // PMULLv16i8 4556 UINT64_C(249618432), // PMULLv1i64 4557 UINT64_C(1323360256), // PMULLv2i64 4558 UINT64_C(237035520), // PMULLv8i8 4559 UINT64_C(69231616), // PMUL_ZZZ_B 4560 UINT64_C(1847630848), // PMULv16i8 4561 UINT64_C(773889024), // PMULv8i8 4562 UINT64_C(622445568), // PNEXT_B 4563 UINT64_C(635028480), // PNEXT_D 4564 UINT64_C(626639872), // PNEXT_H 4565 UINT64_C(630834176), // PNEXT_S 4566 UINT64_C(3288391680), // PRFB_D_PZI 4567 UINT64_C(3294658560), // PRFB_D_SCALED 4568 UINT64_C(3294625792), // PRFB_D_SXTW_SCALED 4569 UINT64_C(3290431488), // PRFB_D_UXTW_SCALED 4570 UINT64_C(2243952640), // PRFB_PRI 4571 UINT64_C(2214641664), // PRFB_PRR 4572 UINT64_C(2214649856), // PRFB_S_PZI 4573 UINT64_C(2220883968), // PRFB_S_SXTW_SCALED 4574 UINT64_C(2216689664), // PRFB_S_UXTW_SCALED 4575 UINT64_C(3313557504), // PRFD_D_PZI 4576 UINT64_C(3294683136), // PRFD_D_SCALED 4577 UINT64_C(3294650368), // PRFD_D_SXTW_SCALED 4578 UINT64_C(3290456064), // PRFD_D_UXTW_SCALED 4579 UINT64_C(2243977216), // PRFD_PRI 4580 UINT64_C(2239807488), // PRFD_PRR 4581 UINT64_C(2239815680), // PRFD_S_PZI 4582 UINT64_C(2220908544), // PRFD_S_SXTW_SCALED 4583 UINT64_C(2216714240), // PRFD_S_UXTW_SCALED 4584 UINT64_C(3296780288), // PRFH_D_PZI 4585 UINT64_C(3294666752), // PRFH_D_SCALED 4586 UINT64_C(3294633984), // PRFH_D_SXTW_SCALED 4587 UINT64_C(3290439680), // PRFH_D_UXTW_SCALED 4588 UINT64_C(2243960832), // PRFH_PRI 4589 UINT64_C(2223030272), // PRFH_PRR 4590 UINT64_C(2223038464), // PRFH_S_PZI 4591 UINT64_C(2220892160), // PRFH_S_SXTW_SCALED 4592 UINT64_C(2216697856), // PRFH_S_UXTW_SCALED 4593 UINT64_C(3623878656), // PRFMl 4594 UINT64_C(4171253760), // PRFMroW 4595 UINT64_C(4171261952), // PRFMroX 4596 UINT64_C(4185915392), // PRFMui 4597 UINT64_C(4169138176), // PRFUMi 4598 UINT64_C(3305168896), // PRFW_D_PZI 4599 UINT64_C(3294674944), // PRFW_D_SCALED 4600 UINT64_C(3294642176), // PRFW_D_SXTW_SCALED 4601 UINT64_C(3290447872), // PRFW_D_UXTW_SCALED 4602 UINT64_C(2243969024), // PRFW_PRI 4603 UINT64_C(2231418880), // PRFW_PRR 4604 UINT64_C(2231427072), // PRFW_S_PZI 4605 UINT64_C(2220900352), // PRFW_S_SXTW_SCALED 4606 UINT64_C(2216706048), // PRFW_S_UXTW_SCALED 4607 UINT64_C(623132672), // PSEL_PPPRI_B 4608 UINT64_C(627064832), // PSEL_PPPRI_D 4609 UINT64_C(623394816), // PSEL_PPPRI_H 4610 UINT64_C(623919104), // PSEL_PPPRI_S 4611 UINT64_C(626049024), // PTEST_PP 4612 UINT64_C(622452736), // PTRUES_B 4613 UINT64_C(635035648), // PTRUES_D 4614 UINT64_C(626647040), // PTRUES_H 4615 UINT64_C(630841344), // PTRUES_S 4616 UINT64_C(622387200), // PTRUE_B 4617 UINT64_C(622884880), // PTRUE_C_B 4618 UINT64_C(635467792), // PTRUE_C_D 4619 UINT64_C(627079184), // PTRUE_C_H 4620 UINT64_C(631273488), // PTRUE_C_S 4621 UINT64_C(634970112), // PTRUE_D 4622 UINT64_C(626581504), // PTRUE_H 4623 UINT64_C(630775808), // PTRUE_S 4624 UINT64_C(87113728), // PUNPKHI_PP 4625 UINT64_C(87048192), // PUNPKLO_PP 4626 UINT64_C(1163945984), // RADDHNB_ZZZ_B 4627 UINT64_C(1168140288), // RADDHNB_ZZZ_H 4628 UINT64_C(1172334592), // RADDHNB_ZZZ_S 4629 UINT64_C(1163947008), // RADDHNT_ZZZ_B 4630 UINT64_C(1168141312), // RADDHNT_ZZZ_H 4631 UINT64_C(1172335616), // RADDHNT_ZZZ_S 4632 UINT64_C(782254080), // RADDHNv2i64_v2i32 4633 UINT64_C(1855995904), // RADDHNv2i64_v4i32 4634 UINT64_C(778059776), // RADDHNv4i32_v4i16 4635 UINT64_C(1851801600), // RADDHNv4i32_v8i16 4636 UINT64_C(1847607296), // RADDHNv8i16_v16i8 4637 UINT64_C(773865472), // RADDHNv8i16_v8i8 4638 UINT64_C(3462433792), // RAX1 4639 UINT64_C(1159787520), // RAX1_ZZZ_D 4640 UINT64_C(1522532352), // RBITWr 4641 UINT64_C(3670016000), // RBITXr 4642 UINT64_C(86474752), // RBIT_ZPmZ_B 4643 UINT64_C(99057664), // RBIT_ZPmZ_D 4644 UINT64_C(90669056), // RBIT_ZPmZ_H 4645 UINT64_C(94863360), // RBIT_ZPmZ_S 4646 UINT64_C(1851807744), // RBITv16i8 4647 UINT64_C(778065920), // RBITv8i8 4648 UINT64_C(421529600), // RCWCAS 4649 UINT64_C(429918208), // RCWCASA 4650 UINT64_C(434112512), // RCWCASAL 4651 UINT64_C(425723904), // RCWCASL 4652 UINT64_C(421530624), // RCWCASP 4653 UINT64_C(429919232), // RCWCASPA 4654 UINT64_C(434113536), // RCWCASPAL 4655 UINT64_C(425724928), // RCWCASPL 4656 UINT64_C(941658112), // RCWCLR 4657 UINT64_C(950046720), // RCWCLRA 4658 UINT64_C(954241024), // RCWCLRAL 4659 UINT64_C(945852416), // RCWCLRL 4660 UINT64_C(421564416), // RCWCLRP 4661 UINT64_C(429953024), // RCWCLRPA 4662 UINT64_C(434147328), // RCWCLRPAL 4663 UINT64_C(425758720), // RCWCLRPL 4664 UINT64_C(2015399936), // RCWCLRS 4665 UINT64_C(2023788544), // RCWCLRSA 4666 UINT64_C(2027982848), // RCWCLRSAL 4667 UINT64_C(2019594240), // RCWCLRSL 4668 UINT64_C(1495306240), // RCWCLRSP 4669 UINT64_C(1503694848), // RCWCLRSPA 4670 UINT64_C(1507889152), // RCWCLRSPAL 4671 UINT64_C(1499500544), // RCWCLRSPL 4672 UINT64_C(1495271424), // RCWSCAS 4673 UINT64_C(1503660032), // RCWSCASA 4674 UINT64_C(1507854336), // RCWSCASAL 4675 UINT64_C(1499465728), // RCWSCASL 4676 UINT64_C(1495272448), // RCWSCASP 4677 UINT64_C(1503661056), // RCWSCASPA 4678 UINT64_C(1507855360), // RCWSCASPAL 4679 UINT64_C(1499466752), // RCWSCASPL 4680 UINT64_C(941666304), // RCWSET 4681 UINT64_C(950054912), // RCWSETA 4682 UINT64_C(954249216), // RCWSETAL 4683 UINT64_C(945860608), // RCWSETL 4684 UINT64_C(421572608), // RCWSETP 4685 UINT64_C(429961216), // RCWSETPA 4686 UINT64_C(434155520), // RCWSETPAL 4687 UINT64_C(425766912), // RCWSETPL 4688 UINT64_C(2015408128), // RCWSETS 4689 UINT64_C(2023796736), // RCWSETSA 4690 UINT64_C(2027991040), // RCWSETSAL 4691 UINT64_C(2019602432), // RCWSETSL 4692 UINT64_C(1495314432), // RCWSETSP 4693 UINT64_C(1503703040), // RCWSETSPA 4694 UINT64_C(1507897344), // RCWSETSPAL 4695 UINT64_C(1499508736), // RCWSETSPL 4696 UINT64_C(941662208), // RCWSWP 4697 UINT64_C(950050816), // RCWSWPA 4698 UINT64_C(954245120), // RCWSWPAL 4699 UINT64_C(945856512), // RCWSWPL 4700 UINT64_C(421568512), // RCWSWPP 4701 UINT64_C(429957120), // RCWSWPPA 4702 UINT64_C(434151424), // RCWSWPPAL 4703 UINT64_C(425762816), // RCWSWPPL 4704 UINT64_C(2015404032), // RCWSWPS 4705 UINT64_C(2023792640), // RCWSWPSA 4706 UINT64_C(2027986944), // RCWSWPSAL 4707 UINT64_C(2019598336), // RCWSWPSL 4708 UINT64_C(1495310336), // RCWSWPSP 4709 UINT64_C(1503698944), // RCWSWPSPA 4710 UINT64_C(1507893248), // RCWSWPSPAL 4711 UINT64_C(1499504640), // RCWSWPSPL 4712 UINT64_C(626585600), // RDFFRS_PPz 4713 UINT64_C(622391296), // RDFFR_PPz_REAL 4714 UINT64_C(622456832), // RDFFR_P_REAL 4715 UINT64_C(79648768), // RDSVLI_XI 4716 UINT64_C(79646720), // RDVLI_XI 4717 UINT64_C(3596550144), // RET 4718 UINT64_C(3596553215), // RETAA 4719 UINT64_C(3596554239), // RETAB 4720 UINT64_C(1522533376), // REV16Wr 4721 UINT64_C(3670017024), // REV16Xr 4722 UINT64_C(1310726144), // REV16v16i8 4723 UINT64_C(236984320), // REV16v8i8 4724 UINT64_C(3670018048), // REV32Xr 4725 UINT64_C(1847592960), // REV32v16i8 4726 UINT64_C(778045440), // REV32v4i16 4727 UINT64_C(1851787264), // REV32v8i16 4728 UINT64_C(773851136), // REV32v8i8 4729 UINT64_C(1310722048), // REV64v16i8 4730 UINT64_C(245368832), // REV64v2i32 4731 UINT64_C(241174528), // REV64v4i16 4732 UINT64_C(1319110656), // REV64v4i32 4733 UINT64_C(1314916352), // REV64v8i16 4734 UINT64_C(236980224), // REV64v8i8 4735 UINT64_C(98861056), // REVB_ZPmZ_D 4736 UINT64_C(90472448), // REVB_ZPmZ_H 4737 UINT64_C(94666752), // REVB_ZPmZ_S 4738 UINT64_C(86933504), // REVD_ZPmZ 4739 UINT64_C(98926592), // REVH_ZPmZ_D 4740 UINT64_C(94732288), // REVH_ZPmZ_S 4741 UINT64_C(98992128), // REVW_ZPmZ_D 4742 UINT64_C(1522534400), // REVWr 4743 UINT64_C(3670019072), // REVXr 4744 UINT64_C(87310336), // REV_PP_B 4745 UINT64_C(99893248), // REV_PP_D 4746 UINT64_C(91504640), // REV_PP_H 4747 UINT64_C(95698944), // REV_PP_S 4748 UINT64_C(87570432), // REV_ZZ_B 4749 UINT64_C(100153344), // REV_ZZ_D 4750 UINT64_C(91764736), // REV_ZZ_H 4751 UINT64_C(95959040), // REV_ZZ_S 4752 UINT64_C(3120563200), // RMIF 4753 UINT64_C(448801792), // RORVWr 4754 UINT64_C(2596285440), // RORVXr 4755 UINT64_C(4171253784), // RPRFM 4756 UINT64_C(1160255488), // RSHRNB_ZZI_B 4757 UINT64_C(1160779776), // RSHRNB_ZZI_H 4758 UINT64_C(1163925504), // RSHRNB_ZZI_S 4759 UINT64_C(1160256512), // RSHRNT_ZZI_B 4760 UINT64_C(1160780800), // RSHRNT_ZZI_H 4761 UINT64_C(1163926528), // RSHRNT_ZZI_S 4762 UINT64_C(1325960192), // RSHRNv16i8_shift 4763 UINT64_C(253791232), // RSHRNv2i32_shift 4764 UINT64_C(252742656), // RSHRNv4i16_shift 4765 UINT64_C(1327533056), // RSHRNv4i32_shift 4766 UINT64_C(1326484480), // RSHRNv8i16_shift 4767 UINT64_C(252218368), // RSHRNv8i8_shift 4768 UINT64_C(1163950080), // RSUBHNB_ZZZ_B 4769 UINT64_C(1168144384), // RSUBHNB_ZZZ_H 4770 UINT64_C(1172338688), // RSUBHNB_ZZZ_S 4771 UINT64_C(1163951104), // RSUBHNT_ZZZ_B 4772 UINT64_C(1168145408), // RSUBHNT_ZZZ_H 4773 UINT64_C(1172339712), // RSUBHNT_ZZZ_S 4774 UINT64_C(782262272), // RSUBHNv2i64_v2i32 4775 UINT64_C(1856004096), // RSUBHNv2i64_v4i32 4776 UINT64_C(778067968), // RSUBHNv4i32_v4i16 4777 UINT64_C(1851809792), // RSUBHNv4i32_v8i16 4778 UINT64_C(1847615488), // RSUBHNv8i16_v16i8 4779 UINT64_C(773873664), // RSUBHNv8i16_v8i8 4780 UINT64_C(1170259968), // SABALB_ZZZ_D 4781 UINT64_C(1161871360), // SABALB_ZZZ_H 4782 UINT64_C(1166065664), // SABALB_ZZZ_S 4783 UINT64_C(1170260992), // SABALT_ZZZ_D 4784 UINT64_C(1161872384), // SABALT_ZZZ_H 4785 UINT64_C(1166066688), // SABALT_ZZZ_S 4786 UINT64_C(1310740480), // SABALv16i8_v8i16 4787 UINT64_C(245387264), // SABALv2i32_v2i64 4788 UINT64_C(241192960), // SABALv4i16_v4i32 4789 UINT64_C(1319129088), // SABALv4i32_v2i64 4790 UINT64_C(1314934784), // SABALv8i16_v4i32 4791 UINT64_C(236998656), // SABALv8i8_v8i16 4792 UINT64_C(1157691392), // SABA_ZZZ_B 4793 UINT64_C(1170274304), // SABA_ZZZ_D 4794 UINT64_C(1161885696), // SABA_ZZZ_H 4795 UINT64_C(1166080000), // SABA_ZZZ_S 4796 UINT64_C(1310751744), // SABAv16i8 4797 UINT64_C(245398528), // SABAv2i32 4798 UINT64_C(241204224), // SABAv4i16 4799 UINT64_C(1319140352), // SABAv4i32 4800 UINT64_C(1314946048), // SABAv8i16 4801 UINT64_C(237009920), // SABAv8i8 4802 UINT64_C(1170223104), // SABDLB_ZZZ_D 4803 UINT64_C(1161834496), // SABDLB_ZZZ_H 4804 UINT64_C(1166028800), // SABDLB_ZZZ_S 4805 UINT64_C(1170224128), // SABDLT_ZZZ_D 4806 UINT64_C(1161835520), // SABDLT_ZZZ_H 4807 UINT64_C(1166029824), // SABDLT_ZZZ_S 4808 UINT64_C(1310748672), // SABDLv16i8_v8i16 4809 UINT64_C(245395456), // SABDLv2i32_v2i64 4810 UINT64_C(241201152), // SABDLv4i16_v4i32 4811 UINT64_C(1319137280), // SABDLv4i32_v2i64 4812 UINT64_C(1314942976), // SABDLv8i16_v4i32 4813 UINT64_C(237006848), // SABDLv8i8_v8i16 4814 UINT64_C(67895296), // SABD_ZPmZ_B 4815 UINT64_C(80478208), // SABD_ZPmZ_D 4816 UINT64_C(72089600), // SABD_ZPmZ_H 4817 UINT64_C(76283904), // SABD_ZPmZ_S 4818 UINT64_C(1310749696), // SABDv16i8 4819 UINT64_C(245396480), // SABDv2i32 4820 UINT64_C(241202176), // SABDv4i16 4821 UINT64_C(1319138304), // SABDv4i32 4822 UINT64_C(1314944000), // SABDv8i16 4823 UINT64_C(237007872), // SABDv8i8 4824 UINT64_C(1153736704), // SADALP_ZPmZ_D 4825 UINT64_C(1145348096), // SADALP_ZPmZ_H 4826 UINT64_C(1149542400), // SADALP_ZPmZ_S 4827 UINT64_C(1310746624), // SADALPv16i8_v8i16 4828 UINT64_C(245393408), // SADALPv2i32_v1i64 4829 UINT64_C(241199104), // SADALPv4i16_v2i32 4830 UINT64_C(1319135232), // SADALPv4i32_v2i64 4831 UINT64_C(1314940928), // SADALPv8i16_v4i32 4832 UINT64_C(237004800), // SADALPv8i8_v4i16 4833 UINT64_C(1170243584), // SADDLBT_ZZZ_D 4834 UINT64_C(1161854976), // SADDLBT_ZZZ_H 4835 UINT64_C(1166049280), // SADDLBT_ZZZ_S 4836 UINT64_C(1170210816), // SADDLB_ZZZ_D 4837 UINT64_C(1161822208), // SADDLB_ZZZ_H 4838 UINT64_C(1166016512), // SADDLB_ZZZ_S 4839 UINT64_C(1310730240), // SADDLPv16i8_v8i16 4840 UINT64_C(245377024), // SADDLPv2i32_v1i64 4841 UINT64_C(241182720), // SADDLPv4i16_v2i32 4842 UINT64_C(1319118848), // SADDLPv4i32_v2i64 4843 UINT64_C(1314924544), // SADDLPv8i16_v4i32 4844 UINT64_C(236988416), // SADDLPv8i8_v4i16 4845 UINT64_C(1170211840), // SADDLT_ZZZ_D 4846 UINT64_C(1161823232), // SADDLT_ZZZ_H 4847 UINT64_C(1166017536), // SADDLT_ZZZ_S 4848 UINT64_C(1311782912), // SADDLVv16i8v 4849 UINT64_C(242235392), // SADDLVv4i16v 4850 UINT64_C(1320171520), // SADDLVv4i32v 4851 UINT64_C(1315977216), // SADDLVv8i16v 4852 UINT64_C(238041088), // SADDLVv8i8v 4853 UINT64_C(1310720000), // SADDLv16i8_v8i16 4854 UINT64_C(245366784), // SADDLv2i32_v2i64 4855 UINT64_C(241172480), // SADDLv4i16_v4i32 4856 UINT64_C(1319108608), // SADDLv4i32_v2i64 4857 UINT64_C(1314914304), // SADDLv8i16_v4i32 4858 UINT64_C(236978176), // SADDLv8i8_v8i16 4859 UINT64_C(67117056), // SADDV_VPZ_B 4860 UINT64_C(71311360), // SADDV_VPZ_H 4861 UINT64_C(75505664), // SADDV_VPZ_S 4862 UINT64_C(1170227200), // SADDWB_ZZZ_D 4863 UINT64_C(1161838592), // SADDWB_ZZZ_H 4864 UINT64_C(1166032896), // SADDWB_ZZZ_S 4865 UINT64_C(1170228224), // SADDWT_ZZZ_D 4866 UINT64_C(1161839616), // SADDWT_ZZZ_H 4867 UINT64_C(1166033920), // SADDWT_ZZZ_S 4868 UINT64_C(1310724096), // SADDWv16i8_v8i16 4869 UINT64_C(245370880), // SADDWv2i32_v2i64 4870 UINT64_C(241176576), // SADDWv4i16_v4i32 4871 UINT64_C(1319112704), // SADDWv4i32_v2i64 4872 UINT64_C(1314918400), // SADDWv8i16_v4i32 4873 UINT64_C(236982272), // SADDWv8i8_v8i16 4874 UINT64_C(3573756159), // SB 4875 UINT64_C(1170264064), // SBCLB_ZZZ_D 4876 UINT64_C(1166069760), // SBCLB_ZZZ_S 4877 UINT64_C(1170265088), // SBCLT_ZZZ_D 4878 UINT64_C(1166070784), // SBCLT_ZZZ_S 4879 UINT64_C(2046820352), // SBCSWr 4880 UINT64_C(4194304000), // SBCSXr 4881 UINT64_C(1509949440), // SBCWr 4882 UINT64_C(3657433088), // SBCXr 4883 UINT64_C(318767104), // SBFMWri 4884 UINT64_C(2470445056), // SBFMXri 4885 UINT64_C(3240150016), // SCLAMP_VG2_2Z2Z_B 4886 UINT64_C(3252732928), // SCLAMP_VG2_2Z2Z_D 4887 UINT64_C(3244344320), // SCLAMP_VG2_2Z2Z_H 4888 UINT64_C(3248538624), // SCLAMP_VG2_2Z2Z_S 4889 UINT64_C(3240152064), // SCLAMP_VG4_4Z4Z_B 4890 UINT64_C(3252734976), // SCLAMP_VG4_4Z4Z_D 4891 UINT64_C(3244346368), // SCLAMP_VG4_4Z4Z_H 4892 UINT64_C(3248540672), // SCLAMP_VG4_4Z4Z_S 4893 UINT64_C(1140899840), // SCLAMP_ZZZ_B 4894 UINT64_C(1153482752), // SCLAMP_ZZZ_D 4895 UINT64_C(1145094144), // SCLAMP_ZZZ_H 4896 UINT64_C(1149288448), // SCLAMP_ZZZ_S 4897 UINT64_C(507674624), // SCVTFSWDri 4898 UINT64_C(516063232), // SCVTFSWHri 4899 UINT64_C(503480320), // SCVTFSWSri 4900 UINT64_C(2655125504), // SCVTFSXDri 4901 UINT64_C(2663514112), // SCVTFSXHri 4902 UINT64_C(2650931200), // SCVTFSXSri 4903 UINT64_C(509739008), // SCVTFUWDri 4904 UINT64_C(518127616), // SCVTFUWHri 4905 UINT64_C(505544704), // SCVTFUWSri 4906 UINT64_C(2657222656), // SCVTFUXDri 4907 UINT64_C(2665611264), // SCVTFUXHri 4908 UINT64_C(2653028352), // SCVTFUXSri 4909 UINT64_C(3240288256), // SCVTF_2Z2Z_StoS 4910 UINT64_C(3241336832), // SCVTF_4Z4Z_StoS 4911 UINT64_C(1708564480), // SCVTF_ZPmZ_DtoD 4912 UINT64_C(1700175872), // SCVTF_ZPmZ_DtoH 4913 UINT64_C(1708433408), // SCVTF_ZPmZ_DtoS 4914 UINT64_C(1699913728), // SCVTF_ZPmZ_HtoH 4915 UINT64_C(1708171264), // SCVTF_ZPmZ_StoD 4916 UINT64_C(1700044800), // SCVTF_ZPmZ_StoH 4917 UINT64_C(1704239104), // SCVTF_ZPmZ_StoS 4918 UINT64_C(1598088192), // SCVTFd 4919 UINT64_C(1594942464), // SCVTFh 4920 UINT64_C(1595991040), // SCVTFs 4921 UINT64_C(1585043456), // SCVTFv1i16 4922 UINT64_C(1579276288), // SCVTFv1i32 4923 UINT64_C(1583470592), // SCVTFv1i64 4924 UINT64_C(237099008), // SCVTFv2f32 4925 UINT64_C(1315035136), // SCVTFv2f64 4926 UINT64_C(253813760), // SCVTFv2i32_shift 4927 UINT64_C(1329652736), // SCVTFv2i64_shift 4928 UINT64_C(242866176), // SCVTFv4f16 4929 UINT64_C(1310840832), // SCVTFv4f32 4930 UINT64_C(252765184), // SCVTFv4i16_shift 4931 UINT64_C(1327555584), // SCVTFv4i32_shift 4932 UINT64_C(1316608000), // SCVTFv8f16 4933 UINT64_C(1326507008), // SCVTFv8i16_shift 4934 UINT64_C(81133568), // SDIVR_ZPmZ_D 4935 UINT64_C(76939264), // SDIVR_ZPmZ_S 4936 UINT64_C(448793600), // SDIVWr 4937 UINT64_C(2596277248), // SDIVXr 4938 UINT64_C(81002496), // SDIV_ZPmZ_D 4939 UINT64_C(76808192), // SDIV_ZPmZ_S 4940 UINT64_C(3248493568), // SDOT_VG2_M2Z2Z_BtoS 4941 UINT64_C(3252687872), // SDOT_VG2_M2Z2Z_HtoD 4942 UINT64_C(3252687880), // SDOT_VG2_M2Z2Z_HtoS 4943 UINT64_C(3243249696), // SDOT_VG2_M2ZZI_BToS 4944 UINT64_C(3243249664), // SDOT_VG2_M2ZZI_HToS 4945 UINT64_C(3251634184), // SDOT_VG2_M2ZZI_HtoD 4946 UINT64_C(3240104960), // SDOT_VG2_M2ZZ_BtoS 4947 UINT64_C(3244299264), // SDOT_VG2_M2ZZ_HtoD 4948 UINT64_C(3244299272), // SDOT_VG2_M2ZZ_HtoS 4949 UINT64_C(3248559104), // SDOT_VG4_M4Z4Z_BtoS 4950 UINT64_C(3252753408), // SDOT_VG4_M4Z4Z_HtoD 4951 UINT64_C(3252753416), // SDOT_VG4_M4Z4Z_HtoS 4952 UINT64_C(3243282464), // SDOT_VG4_M4ZZI_BToS 4953 UINT64_C(3243282432), // SDOT_VG4_M4ZZI_HToS 4954 UINT64_C(3251666952), // SDOT_VG4_M4ZZI_HtoD 4955 UINT64_C(3241153536), // SDOT_VG4_M4ZZ_BtoS 4956 UINT64_C(3245347840), // SDOT_VG4_M4ZZ_HtoD 4957 UINT64_C(3245347848), // SDOT_VG4_M4ZZ_HtoS 4958 UINT64_C(1155530752), // SDOT_ZZZI_D 4959 UINT64_C(1149290496), // SDOT_ZZZI_HtoS 4960 UINT64_C(1151336448), // SDOT_ZZZI_S 4961 UINT64_C(1153433600), // SDOT_ZZZ_D 4962 UINT64_C(1140901888), // SDOT_ZZZ_HtoS 4963 UINT64_C(1149239296), // SDOT_ZZZ_S 4964 UINT64_C(1333846016), // SDOTlanev16i8 4965 UINT64_C(260104192), // SDOTlanev8i8 4966 UINT64_C(1317049344), // SDOTv16i8 4967 UINT64_C(243307520), // SDOTv8i8 4968 UINT64_C(620773904), // SEL_PPPP 4969 UINT64_C(3240132608), // SEL_VG2_2ZP2Z2Z_B 4970 UINT64_C(3252715520), // SEL_VG2_2ZP2Z2Z_D 4971 UINT64_C(3244326912), // SEL_VG2_2ZP2Z2Z_H 4972 UINT64_C(3248521216), // SEL_VG2_2ZP2Z2Z_S 4973 UINT64_C(3240198144), // SEL_VG4_4ZP4Z4Z_B 4974 UINT64_C(3252781056), // SEL_VG4_4ZP4Z4Z_D 4975 UINT64_C(3244392448), // SEL_VG4_4ZP4Z4Z_H 4976 UINT64_C(3248586752), // SEL_VG4_4ZP4Z4Z_S 4977 UINT64_C(86032384), // SEL_ZPZZ_B 4978 UINT64_C(98615296), // SEL_ZPZZ_D 4979 UINT64_C(90226688), // SEL_ZPZZ_H 4980 UINT64_C(94420992), // SEL_ZPZZ_S 4981 UINT64_C(432047104), // SETE 4982 UINT64_C(432055296), // SETEN 4983 UINT64_C(432051200), // SETET 4984 UINT64_C(432059392), // SETETN 4985 UINT64_C(973096973), // SETF16 4986 UINT64_C(973080589), // SETF8 4987 UINT64_C(623677440), // SETFFR 4988 UINT64_C(499139584), // SETGM 4989 UINT64_C(499147776), // SETGMN 4990 UINT64_C(499143680), // SETGMT 4991 UINT64_C(499151872), // SETGMTN 4992 UINT64_C(499123200), // SETGP 4993 UINT64_C(499131392), // SETGPN 4994 UINT64_C(499127296), // SETGPT 4995 UINT64_C(499135488), // SETGPTN 4996 UINT64_C(432030720), // SETM 4997 UINT64_C(432038912), // SETMN 4998 UINT64_C(432034816), // SETMT 4999 UINT64_C(432043008), // SETMTN 5000 UINT64_C(432014336), // SETP 5001 UINT64_C(432022528), // SETPN 5002 UINT64_C(432018432), // SETPT 5003 UINT64_C(432026624), // SETPTN 5004 UINT64_C(1577058304), // SHA1Crrr 5005 UINT64_C(1579681792), // SHA1Hrr 5006 UINT64_C(1577066496), // SHA1Mrrr 5007 UINT64_C(1577062400), // SHA1Prrr 5008 UINT64_C(1577070592), // SHA1SU0rrr 5009 UINT64_C(1579685888), // SHA1SU1rr 5010 UINT64_C(1577078784), // SHA256H2rrr 5011 UINT64_C(1577074688), // SHA256Hrrr 5012 UINT64_C(1579689984), // SHA256SU0rr 5013 UINT64_C(1577082880), // SHA256SU1rrr 5014 UINT64_C(3462430720), // SHA512H 5015 UINT64_C(3462431744), // SHA512H2 5016 UINT64_C(3468722176), // SHA512SU0 5017 UINT64_C(3462432768), // SHA512SU1 5018 UINT64_C(1141932032), // SHADD_ZPmZ_B 5019 UINT64_C(1154514944), // SHADD_ZPmZ_D 5020 UINT64_C(1146126336), // SHADD_ZPmZ_H 5021 UINT64_C(1150320640), // SHADD_ZPmZ_S 5022 UINT64_C(1310721024), // SHADDv16i8 5023 UINT64_C(245367808), // SHADDv2i32 5024 UINT64_C(241173504), // SHADDv4i16 5025 UINT64_C(1319109632), // SHADDv4i32 5026 UINT64_C(1314915328), // SHADDv8i16 5027 UINT64_C(236979200), // SHADDv8i8 5028 UINT64_C(1847670784), // SHLLv16i8 5029 UINT64_C(782317568), // SHLLv2i32 5030 UINT64_C(778123264), // SHLLv4i16 5031 UINT64_C(1856059392), // SHLLv4i32 5032 UINT64_C(1851865088), // SHLLv8i16 5033 UINT64_C(773928960), // SHLLv8i8 5034 UINT64_C(1598051328), // SHLd 5035 UINT64_C(1325945856), // SHLv16i8_shift 5036 UINT64_C(253776896), // SHLv2i32_shift 5037 UINT64_C(1329615872), // SHLv2i64_shift 5038 UINT64_C(252728320), // SHLv4i16_shift 5039 UINT64_C(1327518720), // SHLv4i32_shift 5040 UINT64_C(1326470144), // SHLv8i16_shift 5041 UINT64_C(252204032), // SHLv8i8_shift 5042 UINT64_C(1160253440), // SHRNB_ZZI_B 5043 UINT64_C(1160777728), // SHRNB_ZZI_H 5044 UINT64_C(1163923456), // SHRNB_ZZI_S 5045 UINT64_C(1160254464), // SHRNT_ZZI_B 5046 UINT64_C(1160778752), // SHRNT_ZZI_H 5047 UINT64_C(1163924480), // SHRNT_ZZI_S 5048 UINT64_C(1325958144), // SHRNv16i8_shift 5049 UINT64_C(253789184), // SHRNv2i32_shift 5050 UINT64_C(252740608), // SHRNv4i16_shift 5051 UINT64_C(1327531008), // SHRNv4i32_shift 5052 UINT64_C(1326482432), // SHRNv8i16_shift 5053 UINT64_C(252216320), // SHRNv8i8_shift 5054 UINT64_C(1142325248), // SHSUBR_ZPmZ_B 5055 UINT64_C(1154908160), // SHSUBR_ZPmZ_D 5056 UINT64_C(1146519552), // SHSUBR_ZPmZ_H 5057 UINT64_C(1150713856), // SHSUBR_ZPmZ_S 5058 UINT64_C(1142063104), // SHSUB_ZPmZ_B 5059 UINT64_C(1154646016), // SHSUB_ZPmZ_D 5060 UINT64_C(1146257408), // SHSUB_ZPmZ_H 5061 UINT64_C(1150451712), // SHSUB_ZPmZ_S 5062 UINT64_C(1310729216), // SHSUBv16i8 5063 UINT64_C(245376000), // SHSUBv2i32 5064 UINT64_C(241181696), // SHSUBv4i16 5065 UINT64_C(1319117824), // SHSUBv4i32 5066 UINT64_C(1314923520), // SHSUBv8i16 5067 UINT64_C(236987392), // SHSUBv8i8 5068 UINT64_C(1158214656), // SLI_ZZI_B 5069 UINT64_C(1166078976), // SLI_ZZI_D 5070 UINT64_C(1158738944), // SLI_ZZI_H 5071 UINT64_C(1161884672), // SLI_ZZI_S 5072 UINT64_C(2134922240), // SLId 5073 UINT64_C(1862816768), // SLIv16i8_shift 5074 UINT64_C(790647808), // SLIv2i32_shift 5075 UINT64_C(1866486784), // SLIv2i64_shift 5076 UINT64_C(789599232), // SLIv4i16_shift 5077 UINT64_C(1864389632), // SLIv4i32_shift 5078 UINT64_C(1863341056), // SLIv8i16_shift 5079 UINT64_C(789074944), // SLIv8i8_shift 5080 UINT64_C(3462447104), // SM3PARTW1 5081 UINT64_C(3462448128), // SM3PARTW2 5082 UINT64_C(3460300800), // SM3SS1 5083 UINT64_C(3460333568), // SM3TT1A 5084 UINT64_C(3460334592), // SM3TT1B 5085 UINT64_C(3460335616), // SM3TT2A 5086 UINT64_C(3460336640), // SM3TT2B 5087 UINT64_C(3468723200), // SM4E 5088 UINT64_C(1159786496), // SM4EKEY_ZZZ_S 5089 UINT64_C(3462449152), // SM4ENCKEY 5090 UINT64_C(1159979008), // SM4E_ZZZ_S 5091 UINT64_C(2602565632), // SMADDLrrr 5092 UINT64_C(1142202368), // SMAXP_ZPmZ_B 5093 UINT64_C(1154785280), // SMAXP_ZPmZ_D 5094 UINT64_C(1146396672), // SMAXP_ZPmZ_H 5095 UINT64_C(1150590976), // SMAXP_ZPmZ_S 5096 UINT64_C(1310761984), // SMAXPv16i8 5097 UINT64_C(245408768), // SMAXPv2i32 5098 UINT64_C(241214464), // SMAXPv4i16 5099 UINT64_C(1319150592), // SMAXPv4i32 5100 UINT64_C(1314956288), // SMAXPv8i16 5101 UINT64_C(237020160), // SMAXPv8i8 5102 UINT64_C(67903488), // SMAXQV_VPZ_B 5103 UINT64_C(80486400), // SMAXQV_VPZ_D 5104 UINT64_C(72097792), // SMAXQV_VPZ_H 5105 UINT64_C(76292096), // SMAXQV_VPZ_S 5106 UINT64_C(67641344), // SMAXV_VPZ_B 5107 UINT64_C(80224256), // SMAXV_VPZ_D 5108 UINT64_C(71835648), // SMAXV_VPZ_H 5109 UINT64_C(76029952), // SMAXV_VPZ_S 5110 UINT64_C(1311811584), // SMAXVv16i8v 5111 UINT64_C(242264064), // SMAXVv4i16v 5112 UINT64_C(1320200192), // SMAXVv4i32v 5113 UINT64_C(1316005888), // SMAXVv8i16v 5114 UINT64_C(238069760), // SMAXVv8i8v 5115 UINT64_C(297795584), // SMAXWri 5116 UINT64_C(448815104), // SMAXWrr 5117 UINT64_C(2445279232), // SMAXXri 5118 UINT64_C(2596298752), // SMAXXrr 5119 UINT64_C(3240144896), // SMAX_VG2_2Z2Z_B 5120 UINT64_C(3252727808), // SMAX_VG2_2Z2Z_D 5121 UINT64_C(3244339200), // SMAX_VG2_2Z2Z_H 5122 UINT64_C(3248533504), // SMAX_VG2_2Z2Z_S 5123 UINT64_C(3240140800), // SMAX_VG2_2ZZ_B 5124 UINT64_C(3252723712), // SMAX_VG2_2ZZ_D 5125 UINT64_C(3244335104), // SMAX_VG2_2ZZ_H 5126 UINT64_C(3248529408), // SMAX_VG2_2ZZ_S 5127 UINT64_C(3240146944), // SMAX_VG4_4Z4Z_B 5128 UINT64_C(3252729856), // SMAX_VG4_4Z4Z_D 5129 UINT64_C(3244341248), // SMAX_VG4_4Z4Z_H 5130 UINT64_C(3248535552), // SMAX_VG4_4Z4Z_S 5131 UINT64_C(3240142848), // SMAX_VG4_4ZZ_B 5132 UINT64_C(3252725760), // SMAX_VG4_4ZZ_D 5133 UINT64_C(3244337152), // SMAX_VG4_4ZZ_H 5134 UINT64_C(3248531456), // SMAX_VG4_4ZZ_S 5135 UINT64_C(623427584), // SMAX_ZI_B 5136 UINT64_C(636010496), // SMAX_ZI_D 5137 UINT64_C(627621888), // SMAX_ZI_H 5138 UINT64_C(631816192), // SMAX_ZI_S 5139 UINT64_C(67633152), // SMAX_ZPmZ_B 5140 UINT64_C(80216064), // SMAX_ZPmZ_D 5141 UINT64_C(71827456), // SMAX_ZPmZ_H 5142 UINT64_C(76021760), // SMAX_ZPmZ_S 5143 UINT64_C(1310745600), // SMAXv16i8 5144 UINT64_C(245392384), // SMAXv2i32 5145 UINT64_C(241198080), // SMAXv4i16 5146 UINT64_C(1319134208), // SMAXv4i32 5147 UINT64_C(1314939904), // SMAXv8i16 5148 UINT64_C(237003776), // SMAXv8i8 5149 UINT64_C(3556769795), // SMC 5150 UINT64_C(1142333440), // SMINP_ZPmZ_B 5151 UINT64_C(1154916352), // SMINP_ZPmZ_D 5152 UINT64_C(1146527744), // SMINP_ZPmZ_H 5153 UINT64_C(1150722048), // SMINP_ZPmZ_S 5154 UINT64_C(1310764032), // SMINPv16i8 5155 UINT64_C(245410816), // SMINPv2i32 5156 UINT64_C(241216512), // SMINPv4i16 5157 UINT64_C(1319152640), // SMINPv4i32 5158 UINT64_C(1314958336), // SMINPv8i16 5159 UINT64_C(237022208), // SMINPv8i8 5160 UINT64_C(68034560), // SMINQV_VPZ_B 5161 UINT64_C(80617472), // SMINQV_VPZ_D 5162 UINT64_C(72228864), // SMINQV_VPZ_H 5163 UINT64_C(76423168), // SMINQV_VPZ_S 5164 UINT64_C(67772416), // SMINV_VPZ_B 5165 UINT64_C(80355328), // SMINV_VPZ_D 5166 UINT64_C(71966720), // SMINV_VPZ_H 5167 UINT64_C(76161024), // SMINV_VPZ_S 5168 UINT64_C(1311877120), // SMINVv16i8v 5169 UINT64_C(242329600), // SMINVv4i16v 5170 UINT64_C(1320265728), // SMINVv4i32v 5171 UINT64_C(1316071424), // SMINVv8i16v 5172 UINT64_C(238135296), // SMINVv8i8v 5173 UINT64_C(298319872), // SMINWri 5174 UINT64_C(448817152), // SMINWrr 5175 UINT64_C(2445803520), // SMINXri 5176 UINT64_C(2596300800), // SMINXrr 5177 UINT64_C(3240144928), // SMIN_VG2_2Z2Z_B 5178 UINT64_C(3252727840), // SMIN_VG2_2Z2Z_D 5179 UINT64_C(3244339232), // SMIN_VG2_2Z2Z_H 5180 UINT64_C(3248533536), // SMIN_VG2_2Z2Z_S 5181 UINT64_C(3240140832), // SMIN_VG2_2ZZ_B 5182 UINT64_C(3252723744), // SMIN_VG2_2ZZ_D 5183 UINT64_C(3244335136), // SMIN_VG2_2ZZ_H 5184 UINT64_C(3248529440), // SMIN_VG2_2ZZ_S 5185 UINT64_C(3240146976), // SMIN_VG4_4Z4Z_B 5186 UINT64_C(3252729888), // SMIN_VG4_4Z4Z_D 5187 UINT64_C(3244341280), // SMIN_VG4_4Z4Z_H 5188 UINT64_C(3248535584), // SMIN_VG4_4Z4Z_S 5189 UINT64_C(3240142880), // SMIN_VG4_4ZZ_B 5190 UINT64_C(3252725792), // SMIN_VG4_4ZZ_D 5191 UINT64_C(3244337184), // SMIN_VG4_4ZZ_H 5192 UINT64_C(3248531488), // SMIN_VG4_4ZZ_S 5193 UINT64_C(623558656), // SMIN_ZI_B 5194 UINT64_C(636141568), // SMIN_ZI_D 5195 UINT64_C(627752960), // SMIN_ZI_H 5196 UINT64_C(631947264), // SMIN_ZI_S 5197 UINT64_C(67764224), // SMIN_ZPmZ_B 5198 UINT64_C(80347136), // SMIN_ZPmZ_D 5199 UINT64_C(71958528), // SMIN_ZPmZ_H 5200 UINT64_C(76152832), // SMIN_ZPmZ_S 5201 UINT64_C(1310747648), // SMINv16i8 5202 UINT64_C(245394432), // SMINv2i32 5203 UINT64_C(241200128), // SMINv4i16 5204 UINT64_C(1319136256), // SMINv4i32 5205 UINT64_C(1314941952), // SMINv8i16 5206 UINT64_C(237005824), // SMINv8i8 5207 UINT64_C(1155563520), // SMLALB_ZZZI_D 5208 UINT64_C(1151369216), // SMLALB_ZZZI_S 5209 UINT64_C(1153449984), // SMLALB_ZZZ_D 5210 UINT64_C(1145061376), // SMLALB_ZZZ_H 5211 UINT64_C(1149255680), // SMLALB_ZZZ_S 5212 UINT64_C(3238002688), // SMLALL_MZZI_BtoS 5213 UINT64_C(3246391296), // SMLALL_MZZI_HtoD 5214 UINT64_C(3240100864), // SMLALL_MZZ_BtoS 5215 UINT64_C(3244295168), // SMLALL_MZZ_HtoD 5216 UINT64_C(3248488448), // SMLALL_VG2_M2Z2Z_BtoS 5217 UINT64_C(3252682752), // SMLALL_VG2_M2Z2Z_HtoD 5218 UINT64_C(3239051264), // SMLALL_VG2_M2ZZI_BtoS 5219 UINT64_C(3247439872), // SMLALL_VG2_M2ZZI_HtoD 5220 UINT64_C(3240099840), // SMLALL_VG2_M2ZZ_BtoS 5221 UINT64_C(3244294144), // SMLALL_VG2_M2ZZ_HtoD 5222 UINT64_C(3248553984), // SMLALL_VG4_M4Z4Z_BtoS 5223 UINT64_C(3252748288), // SMLALL_VG4_M4Z4Z_HtoD 5224 UINT64_C(3239084032), // SMLALL_VG4_M4ZZI_BtoS 5225 UINT64_C(3247472640), // SMLALL_VG4_M4ZZI_HtoD 5226 UINT64_C(3241148416), // SMLALL_VG4_M4ZZ_BtoS 5227 UINT64_C(3245342720), // SMLALL_VG4_M4ZZ_HtoD 5228 UINT64_C(1155564544), // SMLALT_ZZZI_D 5229 UINT64_C(1151370240), // SMLALT_ZZZI_S 5230 UINT64_C(1153451008), // SMLALT_ZZZ_D 5231 UINT64_C(1145062400), // SMLALT_ZZZ_H 5232 UINT64_C(1149256704), // SMLALT_ZZZ_S 5233 UINT64_C(3250589696), // SMLAL_MZZI_S 5234 UINT64_C(3244297216), // SMLAL_MZZ_S 5235 UINT64_C(3252684800), // SMLAL_VG2_M2Z2Z_S 5236 UINT64_C(3251638272), // SMLAL_VG2_M2ZZI_S 5237 UINT64_C(3244296192), // SMLAL_VG2_M2ZZ_S 5238 UINT64_C(3252750336), // SMLAL_VG4_M4Z4Z_S 5239 UINT64_C(3251671040), // SMLAL_VG4_M4ZZI_S 5240 UINT64_C(3245344768), // SMLAL_VG4_M4ZZ_S 5241 UINT64_C(1310752768), // SMLALv16i8_v8i16 5242 UINT64_C(260055040), // SMLALv2i32_indexed 5243 UINT64_C(245399552), // SMLALv2i32_v2i64 5244 UINT64_C(255860736), // SMLALv4i16_indexed 5245 UINT64_C(241205248), // SMLALv4i16_v4i32 5246 UINT64_C(1333796864), // SMLALv4i32_indexed 5247 UINT64_C(1319141376), // SMLALv4i32_v2i64 5248 UINT64_C(1329602560), // SMLALv8i16_indexed 5249 UINT64_C(1314947072), // SMLALv8i16_v4i32 5250 UINT64_C(237010944), // SMLALv8i8_v8i16 5251 UINT64_C(1155571712), // SMLSLB_ZZZI_D 5252 UINT64_C(1151377408), // SMLSLB_ZZZI_S 5253 UINT64_C(1153454080), // SMLSLB_ZZZ_D 5254 UINT64_C(1145065472), // SMLSLB_ZZZ_H 5255 UINT64_C(1149259776), // SMLSLB_ZZZ_S 5256 UINT64_C(3238002696), // SMLSLL_MZZI_BtoS 5257 UINT64_C(3246391304), // SMLSLL_MZZI_HtoD 5258 UINT64_C(3240100872), // SMLSLL_MZZ_BtoS 5259 UINT64_C(3244295176), // SMLSLL_MZZ_HtoD 5260 UINT64_C(3248488456), // SMLSLL_VG2_M2Z2Z_BtoS 5261 UINT64_C(3252682760), // SMLSLL_VG2_M2Z2Z_HtoD 5262 UINT64_C(3239051272), // SMLSLL_VG2_M2ZZI_BtoS 5263 UINT64_C(3247439880), // SMLSLL_VG2_M2ZZI_HtoD 5264 UINT64_C(3240099848), // SMLSLL_VG2_M2ZZ_BtoS 5265 UINT64_C(3244294152), // SMLSLL_VG2_M2ZZ_HtoD 5266 UINT64_C(3248553992), // SMLSLL_VG4_M4Z4Z_BtoS 5267 UINT64_C(3252748296), // SMLSLL_VG4_M4Z4Z_HtoD 5268 UINT64_C(3239084040), // SMLSLL_VG4_M4ZZI_BtoS 5269 UINT64_C(3247472648), // SMLSLL_VG4_M4ZZI_HtoD 5270 UINT64_C(3241148424), // SMLSLL_VG4_M4ZZ_BtoS 5271 UINT64_C(3245342728), // SMLSLL_VG4_M4ZZ_HtoD 5272 UINT64_C(1155572736), // SMLSLT_ZZZI_D 5273 UINT64_C(1151378432), // SMLSLT_ZZZI_S 5274 UINT64_C(1153455104), // SMLSLT_ZZZ_D 5275 UINT64_C(1145066496), // SMLSLT_ZZZ_H 5276 UINT64_C(1149260800), // SMLSLT_ZZZ_S 5277 UINT64_C(3250589704), // SMLSL_MZZI_S 5278 UINT64_C(3244297224), // SMLSL_MZZ_S 5279 UINT64_C(3252684808), // SMLSL_VG2_M2Z2Z_S 5280 UINT64_C(3251638280), // SMLSL_VG2_M2ZZI_S 5281 UINT64_C(3244296200), // SMLSL_VG2_M2ZZ_S 5282 UINT64_C(3252750344), // SMLSL_VG4_M4Z4Z_S 5283 UINT64_C(3251671048), // SMLSL_VG4_M4ZZI_S 5284 UINT64_C(3245344776), // SMLSL_VG4_M4ZZ_S 5285 UINT64_C(1310760960), // SMLSLv16i8_v8i16 5286 UINT64_C(260071424), // SMLSLv2i32_indexed 5287 UINT64_C(245407744), // SMLSLv2i32_v2i64 5288 UINT64_C(255877120), // SMLSLv4i16_indexed 5289 UINT64_C(241213440), // SMLSLv4i16_v4i32 5290 UINT64_C(1333813248), // SMLSLv4i32_indexed 5291 UINT64_C(1319149568), // SMLSLv4i32_v2i64 5292 UINT64_C(1329618944), // SMLSLv8i16_indexed 5293 UINT64_C(1314955264), // SMLSLv8i16_v4i32 5294 UINT64_C(237019136), // SMLSLv8i8_v8i16 5295 UINT64_C(1317053440), // SMMLA 5296 UINT64_C(1157666816), // SMMLA_ZZZ 5297 UINT64_C(2696937472), // SMOPA_MPPZZ_D 5298 UINT64_C(2692743176), // SMOPA_MPPZZ_HtoS 5299 UINT64_C(2692743168), // SMOPA_MPPZZ_S 5300 UINT64_C(2696937488), // SMOPS_MPPZZ_D 5301 UINT64_C(2692743192), // SMOPS_MPPZZ_HtoS 5302 UINT64_C(2692743184), // SMOPS_MPPZZ_S 5303 UINT64_C(235023360), // SMOVvi16to32 5304 UINT64_C(235023360), // SMOVvi16to32_idx0 5305 UINT64_C(1308765184), // SMOVvi16to64 5306 UINT64_C(1308765184), // SMOVvi16to64_idx0 5307 UINT64_C(1308896256), // SMOVvi32to64 5308 UINT64_C(1308896256), // SMOVvi32to64_idx0 5309 UINT64_C(234957824), // SMOVvi8to32 5310 UINT64_C(234957824), // SMOVvi8to32_idx0 5311 UINT64_C(1308699648), // SMOVvi8to64 5312 UINT64_C(1308699648), // SMOVvi8to64_idx0 5313 UINT64_C(2602598400), // SMSUBLrrr 5314 UINT64_C(68288512), // SMULH_ZPmZ_B 5315 UINT64_C(80871424), // SMULH_ZPmZ_D 5316 UINT64_C(72482816), // SMULH_ZPmZ_H 5317 UINT64_C(76677120), // SMULH_ZPmZ_S 5318 UINT64_C(69232640), // SMULH_ZZZ_B 5319 UINT64_C(81815552), // SMULH_ZZZ_D 5320 UINT64_C(73426944), // SMULH_ZZZ_H 5321 UINT64_C(77621248), // SMULH_ZZZ_S 5322 UINT64_C(2604662784), // SMULHrr 5323 UINT64_C(1155579904), // SMULLB_ZZZI_D 5324 UINT64_C(1151385600), // SMULLB_ZZZI_S 5325 UINT64_C(1170239488), // SMULLB_ZZZ_D 5326 UINT64_C(1161850880), // SMULLB_ZZZ_H 5327 UINT64_C(1166045184), // SMULLB_ZZZ_S 5328 UINT64_C(1155580928), // SMULLT_ZZZI_D 5329 UINT64_C(1151386624), // SMULLT_ZZZI_S 5330 UINT64_C(1170240512), // SMULLT_ZZZ_D 5331 UINT64_C(1161851904), // SMULLT_ZZZ_H 5332 UINT64_C(1166046208), // SMULLT_ZZZ_S 5333 UINT64_C(1310769152), // SMULLv16i8_v8i16 5334 UINT64_C(260087808), // SMULLv2i32_indexed 5335 UINT64_C(245415936), // SMULLv2i32_v2i64 5336 UINT64_C(255893504), // SMULLv4i16_indexed 5337 UINT64_C(241221632), // SMULLv4i16_v4i32 5338 UINT64_C(1333829632), // SMULLv4i32_indexed 5339 UINT64_C(1319157760), // SMULLv4i32_v2i64 5340 UINT64_C(1329635328), // SMULLv8i16_indexed 5341 UINT64_C(1314963456), // SMULLv8i16_v4i32 5342 UINT64_C(237027328), // SMULLv8i8_v8i16 5343 UINT64_C(86867968), // SPLICE_ZPZZ_B 5344 UINT64_C(99450880), // SPLICE_ZPZZ_D 5345 UINT64_C(91062272), // SPLICE_ZPZZ_H 5346 UINT64_C(95256576), // SPLICE_ZPZZ_S 5347 UINT64_C(86802432), // SPLICE_ZPZ_B 5348 UINT64_C(99385344), // SPLICE_ZPZ_D 5349 UINT64_C(90996736), // SPLICE_ZPZ_H 5350 UINT64_C(95191040), // SPLICE_ZPZ_S 5351 UINT64_C(1141415936), // SQABS_ZPmZ_B 5352 UINT64_C(1153998848), // SQABS_ZPmZ_D 5353 UINT64_C(1145610240), // SQABS_ZPmZ_H 5354 UINT64_C(1149804544), // SQABS_ZPmZ_S 5355 UINT64_C(1310750720), // SQABSv16i8 5356 UINT64_C(1583380480), // SQABSv1i16 5357 UINT64_C(1587574784), // SQABSv1i32 5358 UINT64_C(1591769088), // SQABSv1i64 5359 UINT64_C(1579186176), // SQABSv1i8 5360 UINT64_C(245397504), // SQABSv2i32 5361 UINT64_C(1323333632), // SQABSv2i64 5362 UINT64_C(241203200), // SQABSv4i16 5363 UINT64_C(1319139328), // SQABSv4i32 5364 UINT64_C(1314945024), // SQABSv8i16 5365 UINT64_C(237008896), // SQABSv8i8 5366 UINT64_C(623165440), // SQADD_ZI_B 5367 UINT64_C(635748352), // SQADD_ZI_D 5368 UINT64_C(627359744), // SQADD_ZI_H 5369 UINT64_C(631554048), // SQADD_ZI_S 5370 UINT64_C(1142456320), // SQADD_ZPmZ_B 5371 UINT64_C(1155039232), // SQADD_ZPmZ_D 5372 UINT64_C(1146650624), // SQADD_ZPmZ_H 5373 UINT64_C(1150844928), // SQADD_ZPmZ_S 5374 UINT64_C(69210112), // SQADD_ZZZ_B 5375 UINT64_C(81793024), // SQADD_ZZZ_D 5376 UINT64_C(73404416), // SQADD_ZZZ_H 5377 UINT64_C(77598720), // SQADD_ZZZ_S 5378 UINT64_C(1310723072), // SQADDv16i8 5379 UINT64_C(1583352832), // SQADDv1i16 5380 UINT64_C(1587547136), // SQADDv1i32 5381 UINT64_C(1591741440), // SQADDv1i64 5382 UINT64_C(1579158528), // SQADDv1i8 5383 UINT64_C(245369856), // SQADDv2i32 5384 UINT64_C(1323305984), // SQADDv2i64 5385 UINT64_C(241175552), // SQADDv4i16 5386 UINT64_C(1319111680), // SQADDv4i32 5387 UINT64_C(1314917376), // SQADDv8i16 5388 UINT64_C(236981248), // SQADDv8i8 5389 UINT64_C(1157748736), // SQCADD_ZZI_B 5390 UINT64_C(1170331648), // SQCADD_ZZI_D 5391 UINT64_C(1161943040), // SQCADD_ZZI_H 5392 UINT64_C(1166137344), // SQCADD_ZZI_S 5393 UINT64_C(1160855552), // SQCVTN_Z2Z_StoH 5394 UINT64_C(3249791040), // SQCVTN_Z4Z_DtoH 5395 UINT64_C(3241402432), // SQCVTN_Z4Z_StoB 5396 UINT64_C(1160859648), // SQCVTUN_Z2Z_StoH 5397 UINT64_C(3253985344), // SQCVTUN_Z4Z_DtoH 5398 UINT64_C(3245596736), // SQCVTUN_Z4Z_StoB 5399 UINT64_C(3244548096), // SQCVTU_Z2Z_StoH 5400 UINT64_C(3253985280), // SQCVTU_Z4Z_DtoH 5401 UINT64_C(3245596672), // SQCVTU_Z4Z_StoB 5402 UINT64_C(3240353792), // SQCVT_Z2Z_StoH 5403 UINT64_C(3249790976), // SQCVT_Z4Z_DtoH 5404 UINT64_C(3241402368), // SQCVT_Z4Z_StoB 5405 UINT64_C(70318080), // SQDECB_XPiI 5406 UINT64_C(69269504), // SQDECB_XPiWdI 5407 UINT64_C(82900992), // SQDECD_XPiI 5408 UINT64_C(81852416), // SQDECD_XPiWdI 5409 UINT64_C(81840128), // SQDECD_ZPiI 5410 UINT64_C(74512384), // SQDECH_XPiI 5411 UINT64_C(73463808), // SQDECH_XPiWdI 5412 UINT64_C(73451520), // SQDECH_ZPiI 5413 UINT64_C(623544320), // SQDECP_XPWd_B 5414 UINT64_C(636127232), // SQDECP_XPWd_D 5415 UINT64_C(627738624), // SQDECP_XPWd_H 5416 UINT64_C(631932928), // SQDECP_XPWd_S 5417 UINT64_C(623545344), // SQDECP_XP_B 5418 UINT64_C(636128256), // SQDECP_XP_D 5419 UINT64_C(627739648), // SQDECP_XP_H 5420 UINT64_C(631933952), // SQDECP_XP_S 5421 UINT64_C(636125184), // SQDECP_ZP_D 5422 UINT64_C(627736576), // SQDECP_ZP_H 5423 UINT64_C(631930880), // SQDECP_ZP_S 5424 UINT64_C(78706688), // SQDECW_XPiI 5425 UINT64_C(77658112), // SQDECW_XPiWdI 5426 UINT64_C(77645824), // SQDECW_ZPiI 5427 UINT64_C(1153435648), // SQDMLALBT_ZZZ_D 5428 UINT64_C(1145047040), // SQDMLALBT_ZZZ_H 5429 UINT64_C(1149241344), // SQDMLALBT_ZZZ_S 5430 UINT64_C(1155538944), // SQDMLALB_ZZZI_D 5431 UINT64_C(1151344640), // SQDMLALB_ZZZI_S 5432 UINT64_C(1153458176), // SQDMLALB_ZZZ_D 5433 UINT64_C(1145069568), // SQDMLALB_ZZZ_H 5434 UINT64_C(1149263872), // SQDMLALB_ZZZ_S 5435 UINT64_C(1155539968), // SQDMLALT_ZZZI_D 5436 UINT64_C(1151345664), // SQDMLALT_ZZZI_S 5437 UINT64_C(1153459200), // SQDMLALT_ZZZ_D 5438 UINT64_C(1145070592), // SQDMLALT_ZZZ_H 5439 UINT64_C(1149264896), // SQDMLALT_ZZZ_S 5440 UINT64_C(1583386624), // SQDMLALi16 5441 UINT64_C(1587580928), // SQDMLALi32 5442 UINT64_C(1598042112), // SQDMLALv1i32_indexed 5443 UINT64_C(1602236416), // SQDMLALv1i64_indexed 5444 UINT64_C(260059136), // SQDMLALv2i32_indexed 5445 UINT64_C(245403648), // SQDMLALv2i32_v2i64 5446 UINT64_C(255864832), // SQDMLALv4i16_indexed 5447 UINT64_C(241209344), // SQDMLALv4i16_v4i32 5448 UINT64_C(1333800960), // SQDMLALv4i32_indexed 5449 UINT64_C(1319145472), // SQDMLALv4i32_v2i64 5450 UINT64_C(1329606656), // SQDMLALv8i16_indexed 5451 UINT64_C(1314951168), // SQDMLALv8i16_v4i32 5452 UINT64_C(1153436672), // SQDMLSLBT_ZZZ_D 5453 UINT64_C(1145048064), // SQDMLSLBT_ZZZ_H 5454 UINT64_C(1149242368), // SQDMLSLBT_ZZZ_S 5455 UINT64_C(1155543040), // SQDMLSLB_ZZZI_D 5456 UINT64_C(1151348736), // SQDMLSLB_ZZZI_S 5457 UINT64_C(1153460224), // SQDMLSLB_ZZZ_D 5458 UINT64_C(1145071616), // SQDMLSLB_ZZZ_H 5459 UINT64_C(1149265920), // SQDMLSLB_ZZZ_S 5460 UINT64_C(1155544064), // SQDMLSLT_ZZZI_D 5461 UINT64_C(1151349760), // SQDMLSLT_ZZZI_S 5462 UINT64_C(1153461248), // SQDMLSLT_ZZZ_D 5463 UINT64_C(1145072640), // SQDMLSLT_ZZZ_H 5464 UINT64_C(1149266944), // SQDMLSLT_ZZZ_S 5465 UINT64_C(1583394816), // SQDMLSLi16 5466 UINT64_C(1587589120), // SQDMLSLi32 5467 UINT64_C(1598058496), // SQDMLSLv1i32_indexed 5468 UINT64_C(1602252800), // SQDMLSLv1i64_indexed 5469 UINT64_C(260075520), // SQDMLSLv2i32_indexed 5470 UINT64_C(245411840), // SQDMLSLv2i32_v2i64 5471 UINT64_C(255881216), // SQDMLSLv4i16_indexed 5472 UINT64_C(241217536), // SQDMLSLv4i16_v4i32 5473 UINT64_C(1333817344), // SQDMLSLv4i32_indexed 5474 UINT64_C(1319153664), // SQDMLSLv4i32_v2i64 5475 UINT64_C(1329623040), // SQDMLSLv8i16_indexed 5476 UINT64_C(1314959360), // SQDMLSLv8i16_v4i32 5477 UINT64_C(3240145920), // SQDMULH_VG2_2Z2Z_B 5478 UINT64_C(3252728832), // SQDMULH_VG2_2Z2Z_D 5479 UINT64_C(3244340224), // SQDMULH_VG2_2Z2Z_H 5480 UINT64_C(3248534528), // SQDMULH_VG2_2Z2Z_S 5481 UINT64_C(3240141824), // SQDMULH_VG2_2ZZ_B 5482 UINT64_C(3252724736), // SQDMULH_VG2_2ZZ_D 5483 UINT64_C(3244336128), // SQDMULH_VG2_2ZZ_H 5484 UINT64_C(3248530432), // SQDMULH_VG2_2ZZ_S 5485 UINT64_C(3240147968), // SQDMULH_VG4_4Z4Z_B 5486 UINT64_C(3252730880), // SQDMULH_VG4_4Z4Z_D 5487 UINT64_C(3244342272), // SQDMULH_VG4_4Z4Z_H 5488 UINT64_C(3248536576), // SQDMULH_VG4_4Z4Z_S 5489 UINT64_C(3240143872), // SQDMULH_VG4_4ZZ_B 5490 UINT64_C(3252726784), // SQDMULH_VG4_4ZZ_D 5491 UINT64_C(3244338176), // SQDMULH_VG4_4ZZ_H 5492 UINT64_C(3248532480), // SQDMULH_VG4_4ZZ_S 5493 UINT64_C(1155592192), // SQDMULH_ZZZI_D 5494 UINT64_C(1143009280), // SQDMULH_ZZZI_H 5495 UINT64_C(1151397888), // SQDMULH_ZZZI_S 5496 UINT64_C(69234688), // SQDMULH_ZZZ_B 5497 UINT64_C(81817600), // SQDMULH_ZZZ_D 5498 UINT64_C(73428992), // SQDMULH_ZZZ_H 5499 UINT64_C(77623296), // SQDMULH_ZZZ_S 5500 UINT64_C(1583395840), // SQDMULHv1i16 5501 UINT64_C(1598078976), // SQDMULHv1i16_indexed 5502 UINT64_C(1587590144), // SQDMULHv1i32 5503 UINT64_C(1602273280), // SQDMULHv1i32_indexed 5504 UINT64_C(245412864), // SQDMULHv2i32 5505 UINT64_C(260096000), // SQDMULHv2i32_indexed 5506 UINT64_C(241218560), // SQDMULHv4i16 5507 UINT64_C(255901696), // SQDMULHv4i16_indexed 5508 UINT64_C(1319154688), // SQDMULHv4i32 5509 UINT64_C(1333837824), // SQDMULHv4i32_indexed 5510 UINT64_C(1314960384), // SQDMULHv8i16 5511 UINT64_C(1329643520), // SQDMULHv8i16_indexed 5512 UINT64_C(1155588096), // SQDMULLB_ZZZI_D 5513 UINT64_C(1151393792), // SQDMULLB_ZZZI_S 5514 UINT64_C(1170235392), // SQDMULLB_ZZZ_D 5515 UINT64_C(1161846784), // SQDMULLB_ZZZ_H 5516 UINT64_C(1166041088), // SQDMULLB_ZZZ_S 5517 UINT64_C(1155589120), // SQDMULLT_ZZZI_D 5518 UINT64_C(1151394816), // SQDMULLT_ZZZI_S 5519 UINT64_C(1170236416), // SQDMULLT_ZZZ_D 5520 UINT64_C(1161847808), // SQDMULLT_ZZZ_H 5521 UINT64_C(1166042112), // SQDMULLT_ZZZ_S 5522 UINT64_C(1583403008), // SQDMULLi16 5523 UINT64_C(1587597312), // SQDMULLi32 5524 UINT64_C(1598074880), // SQDMULLv1i32_indexed 5525 UINT64_C(1602269184), // SQDMULLv1i64_indexed 5526 UINT64_C(260091904), // SQDMULLv2i32_indexed 5527 UINT64_C(245420032), // SQDMULLv2i32_v2i64 5528 UINT64_C(255897600), // SQDMULLv4i16_indexed 5529 UINT64_C(241225728), // SQDMULLv4i16_v4i32 5530 UINT64_C(1333833728), // SQDMULLv4i32_indexed 5531 UINT64_C(1319161856), // SQDMULLv4i32_v2i64 5532 UINT64_C(1329639424), // SQDMULLv8i16_indexed 5533 UINT64_C(1314967552), // SQDMULLv8i16_v4i32 5534 UINT64_C(70316032), // SQINCB_XPiI 5535 UINT64_C(69267456), // SQINCB_XPiWdI 5536 UINT64_C(82898944), // SQINCD_XPiI 5537 UINT64_C(81850368), // SQINCD_XPiWdI 5538 UINT64_C(81838080), // SQINCD_ZPiI 5539 UINT64_C(74510336), // SQINCH_XPiI 5540 UINT64_C(73461760), // SQINCH_XPiWdI 5541 UINT64_C(73449472), // SQINCH_ZPiI 5542 UINT64_C(623413248), // SQINCP_XPWd_B 5543 UINT64_C(635996160), // SQINCP_XPWd_D 5544 UINT64_C(627607552), // SQINCP_XPWd_H 5545 UINT64_C(631801856), // SQINCP_XPWd_S 5546 UINT64_C(623414272), // SQINCP_XP_B 5547 UINT64_C(635997184), // SQINCP_XP_D 5548 UINT64_C(627608576), // SQINCP_XP_H 5549 UINT64_C(631802880), // SQINCP_XP_S 5550 UINT64_C(635994112), // SQINCP_ZP_D 5551 UINT64_C(627605504), // SQINCP_ZP_H 5552 UINT64_C(631799808), // SQINCP_ZP_S 5553 UINT64_C(78704640), // SQINCW_XPiI 5554 UINT64_C(77656064), // SQINCW_XPiWdI 5555 UINT64_C(77643776), // SQINCW_ZPiI 5556 UINT64_C(1141481472), // SQNEG_ZPmZ_B 5557 UINT64_C(1154064384), // SQNEG_ZPmZ_D 5558 UINT64_C(1145675776), // SQNEG_ZPmZ_H 5559 UINT64_C(1149870080), // SQNEG_ZPmZ_S 5560 UINT64_C(1847621632), // SQNEGv16i8 5561 UINT64_C(2120251392), // SQNEGv1i16 5562 UINT64_C(2124445696), // SQNEGv1i32 5563 UINT64_C(2128640000), // SQNEGv1i64 5564 UINT64_C(2116057088), // SQNEGv1i8 5565 UINT64_C(782268416), // SQNEGv2i32 5566 UINT64_C(1860204544), // SQNEGv2i64 5567 UINT64_C(778074112), // SQNEGv4i16 5568 UINT64_C(1856010240), // SQNEGv4i32 5569 UINT64_C(1851815936), // SQNEGv8i16 5570 UINT64_C(773879808), // SQNEGv8i8 5571 UINT64_C(1151365120), // SQRDCMLAH_ZZZI_H 5572 UINT64_C(1155559424), // SQRDCMLAH_ZZZI_S 5573 UINT64_C(1140862976), // SQRDCMLAH_ZZZ_B 5574 UINT64_C(1153445888), // SQRDCMLAH_ZZZ_D 5575 UINT64_C(1145057280), // SQRDCMLAH_ZZZ_H 5576 UINT64_C(1149251584), // SQRDCMLAH_ZZZ_S 5577 UINT64_C(1155534848), // SQRDMLAH_ZZZI_D 5578 UINT64_C(1142951936), // SQRDMLAH_ZZZI_H 5579 UINT64_C(1151340544), // SQRDMLAH_ZZZI_S 5580 UINT64_C(1140879360), // SQRDMLAH_ZZZ_B 5581 UINT64_C(1153462272), // SQRDMLAH_ZZZ_D 5582 UINT64_C(1145073664), // SQRDMLAH_ZZZ_H 5583 UINT64_C(1149267968), // SQRDMLAH_ZZZ_S 5584 UINT64_C(2134953984), // SQRDMLAHi16_indexed 5585 UINT64_C(2139148288), // SQRDMLAHi32_indexed 5586 UINT64_C(2118157312), // SQRDMLAHv1i16 5587 UINT64_C(2122351616), // SQRDMLAHv1i32 5588 UINT64_C(780174336), // SQRDMLAHv2i32 5589 UINT64_C(796971008), // SQRDMLAHv2i32_indexed 5590 UINT64_C(775980032), // SQRDMLAHv4i16 5591 UINT64_C(792776704), // SQRDMLAHv4i16_indexed 5592 UINT64_C(1853916160), // SQRDMLAHv4i32 5593 UINT64_C(1870712832), // SQRDMLAHv4i32_indexed 5594 UINT64_C(1849721856), // SQRDMLAHv8i16 5595 UINT64_C(1866518528), // SQRDMLAHv8i16_indexed 5596 UINT64_C(1155535872), // SQRDMLSH_ZZZI_D 5597 UINT64_C(1142952960), // SQRDMLSH_ZZZI_H 5598 UINT64_C(1151341568), // SQRDMLSH_ZZZI_S 5599 UINT64_C(1140880384), // SQRDMLSH_ZZZ_B 5600 UINT64_C(1153463296), // SQRDMLSH_ZZZ_D 5601 UINT64_C(1145074688), // SQRDMLSH_ZZZ_H 5602 UINT64_C(1149268992), // SQRDMLSH_ZZZ_S 5603 UINT64_C(2134962176), // SQRDMLSHi16_indexed 5604 UINT64_C(2139156480), // SQRDMLSHi32_indexed 5605 UINT64_C(2118159360), // SQRDMLSHv1i16 5606 UINT64_C(2122353664), // SQRDMLSHv1i32 5607 UINT64_C(780176384), // SQRDMLSHv2i32 5608 UINT64_C(796979200), // SQRDMLSHv2i32_indexed 5609 UINT64_C(775982080), // SQRDMLSHv4i16 5610 UINT64_C(792784896), // SQRDMLSHv4i16_indexed 5611 UINT64_C(1853918208), // SQRDMLSHv4i32 5612 UINT64_C(1870721024), // SQRDMLSHv4i32_indexed 5613 UINT64_C(1849723904), // SQRDMLSHv8i16 5614 UINT64_C(1866526720), // SQRDMLSHv8i16_indexed 5615 UINT64_C(1155593216), // SQRDMULH_ZZZI_D 5616 UINT64_C(1143010304), // SQRDMULH_ZZZI_H 5617 UINT64_C(1151398912), // SQRDMULH_ZZZI_S 5618 UINT64_C(69235712), // SQRDMULH_ZZZ_B 5619 UINT64_C(81818624), // SQRDMULH_ZZZ_D 5620 UINT64_C(73430016), // SQRDMULH_ZZZ_H 5621 UINT64_C(77624320), // SQRDMULH_ZZZ_S 5622 UINT64_C(2120266752), // SQRDMULHv1i16 5623 UINT64_C(1598083072), // SQRDMULHv1i16_indexed 5624 UINT64_C(2124461056), // SQRDMULHv1i32 5625 UINT64_C(1602277376), // SQRDMULHv1i32_indexed 5626 UINT64_C(782283776), // SQRDMULHv2i32 5627 UINT64_C(260100096), // SQRDMULHv2i32_indexed 5628 UINT64_C(778089472), // SQRDMULHv4i16 5629 UINT64_C(255905792), // SQRDMULHv4i16_indexed 5630 UINT64_C(1856025600), // SQRDMULHv4i32 5631 UINT64_C(1333841920), // SQRDMULHv4i32_indexed 5632 UINT64_C(1851831296), // SQRDMULHv8i16 5633 UINT64_C(1329647616), // SQRDMULHv8i16_indexed 5634 UINT64_C(1141800960), // SQRSHLR_ZPmZ_B 5635 UINT64_C(1154383872), // SQRSHLR_ZPmZ_D 5636 UINT64_C(1145995264), // SQRSHLR_ZPmZ_H 5637 UINT64_C(1150189568), // SQRSHLR_ZPmZ_S 5638 UINT64_C(1141538816), // SQRSHL_ZPmZ_B 5639 UINT64_C(1154121728), // SQRSHL_ZPmZ_D 5640 UINT64_C(1145733120), // SQRSHL_ZPmZ_H 5641 UINT64_C(1149927424), // SQRSHL_ZPmZ_S 5642 UINT64_C(1310743552), // SQRSHLv16i8 5643 UINT64_C(1583373312), // SQRSHLv1i16 5644 UINT64_C(1587567616), // SQRSHLv1i32 5645 UINT64_C(1591761920), // SQRSHLv1i64 5646 UINT64_C(1579179008), // SQRSHLv1i8 5647 UINT64_C(245390336), // SQRSHLv2i32 5648 UINT64_C(1323326464), // SQRSHLv2i64 5649 UINT64_C(241196032), // SQRSHLv4i16 5650 UINT64_C(1319132160), // SQRSHLv4i32 5651 UINT64_C(1314937856), // SQRSHLv8i16 5652 UINT64_C(237001728), // SQRSHLv8i8 5653 UINT64_C(1160259584), // SQRSHRNB_ZZI_B 5654 UINT64_C(1160783872), // SQRSHRNB_ZZI_H 5655 UINT64_C(1163929600), // SQRSHRNB_ZZI_S 5656 UINT64_C(1160260608), // SQRSHRNT_ZZI_B 5657 UINT64_C(1160784896), // SQRSHRNT_ZZI_H 5658 UINT64_C(1163930624), // SQRSHRNT_ZZI_S 5659 UINT64_C(3244350464), // SQRSHRN_VG4_Z4ZI_B 5660 UINT64_C(3248544768), // SQRSHRN_VG4_Z4ZI_H 5661 UINT64_C(1594399744), // SQRSHRNb 5662 UINT64_C(1594924032), // SQRSHRNh 5663 UINT64_C(1595972608), // SQRSHRNs 5664 UINT64_C(1325964288), // SQRSHRNv16i8_shift 5665 UINT64_C(253795328), // SQRSHRNv2i32_shift 5666 UINT64_C(252746752), // SQRSHRNv4i16_shift 5667 UINT64_C(1327537152), // SQRSHRNv4i32_shift 5668 UINT64_C(1326488576), // SQRSHRNv8i16_shift 5669 UINT64_C(252222464), // SQRSHRNv8i8_shift 5670 UINT64_C(1160251392), // SQRSHRUNB_ZZI_B 5671 UINT64_C(1160775680), // SQRSHRUNB_ZZI_H 5672 UINT64_C(1163921408), // SQRSHRUNB_ZZI_S 5673 UINT64_C(1160252416), // SQRSHRUNT_ZZI_B 5674 UINT64_C(1160776704), // SQRSHRUNT_ZZI_H 5675 UINT64_C(1163922432), // SQRSHRUNT_ZZI_S 5676 UINT64_C(3244350528), // SQRSHRUN_VG4_Z4ZI_B 5677 UINT64_C(3248544832), // SQRSHRUN_VG4_Z4ZI_H 5678 UINT64_C(2131266560), // SQRSHRUNb 5679 UINT64_C(2131790848), // SQRSHRUNh 5680 UINT64_C(2132839424), // SQRSHRUNs 5681 UINT64_C(1862831104), // SQRSHRUNv16i8_shift 5682 UINT64_C(790662144), // SQRSHRUNv2i32_shift 5683 UINT64_C(789613568), // SQRSHRUNv4i16_shift 5684 UINT64_C(1864403968), // SQRSHRUNv4i32_shift 5685 UINT64_C(1863355392), // SQRSHRUNv8i16_shift 5686 UINT64_C(789089280), // SQRSHRUNv8i8_shift 5687 UINT64_C(3253785600), // SQRSHRU_VG2_Z2ZI_H 5688 UINT64_C(3244349504), // SQRSHRU_VG4_Z4ZI_B 5689 UINT64_C(3248543808), // SQRSHRU_VG4_Z4ZI_H 5690 UINT64_C(3252737024), // SQRSHR_VG2_Z2ZI_H 5691 UINT64_C(3244349440), // SQRSHR_VG4_Z4ZI_B 5692 UINT64_C(3248543744), // SQRSHR_VG4_Z4ZI_H 5693 UINT64_C(1141669888), // SQSHLR_ZPmZ_B 5694 UINT64_C(1154252800), // SQSHLR_ZPmZ_D 5695 UINT64_C(1145864192), // SQSHLR_ZPmZ_H 5696 UINT64_C(1150058496), // SQSHLR_ZPmZ_S 5697 UINT64_C(68124928), // SQSHLU_ZPmI_B 5698 UINT64_C(76513280), // SQSHLU_ZPmI_D 5699 UINT64_C(68125184), // SQSHLU_ZPmI_H 5700 UINT64_C(72318976), // SQSHLU_ZPmI_S 5701 UINT64_C(2131256320), // SQSHLUb 5702 UINT64_C(2134926336), // SQSHLUd 5703 UINT64_C(2131780608), // SQSHLUh 5704 UINT64_C(2132829184), // SQSHLUs 5705 UINT64_C(1862820864), // SQSHLUv16i8_shift 5706 UINT64_C(790651904), // SQSHLUv2i32_shift 5707 UINT64_C(1866490880), // SQSHLUv2i64_shift 5708 UINT64_C(789603328), // SQSHLUv4i16_shift 5709 UINT64_C(1864393728), // SQSHLUv4i32_shift 5710 UINT64_C(1863345152), // SQSHLUv8i16_shift 5711 UINT64_C(789079040), // SQSHLUv8i8_shift 5712 UINT64_C(67535104), // SQSHL_ZPmI_B 5713 UINT64_C(75923456), // SQSHL_ZPmI_D 5714 UINT64_C(67535360), // SQSHL_ZPmI_H 5715 UINT64_C(71729152), // SQSHL_ZPmI_S 5716 UINT64_C(1141407744), // SQSHL_ZPmZ_B 5717 UINT64_C(1153990656), // SQSHL_ZPmZ_D 5718 UINT64_C(1145602048), // SQSHL_ZPmZ_H 5719 UINT64_C(1149796352), // SQSHL_ZPmZ_S 5720 UINT64_C(1594389504), // SQSHLb 5721 UINT64_C(1598059520), // SQSHLd 5722 UINT64_C(1594913792), // SQSHLh 5723 UINT64_C(1595962368), // SQSHLs 5724 UINT64_C(1310739456), // SQSHLv16i8 5725 UINT64_C(1325954048), // SQSHLv16i8_shift 5726 UINT64_C(1583369216), // SQSHLv1i16 5727 UINT64_C(1587563520), // SQSHLv1i32 5728 UINT64_C(1591757824), // SQSHLv1i64 5729 UINT64_C(1579174912), // SQSHLv1i8 5730 UINT64_C(245386240), // SQSHLv2i32 5731 UINT64_C(253785088), // SQSHLv2i32_shift 5732 UINT64_C(1323322368), // SQSHLv2i64 5733 UINT64_C(1329624064), // SQSHLv2i64_shift 5734 UINT64_C(241191936), // SQSHLv4i16 5735 UINT64_C(252736512), // SQSHLv4i16_shift 5736 UINT64_C(1319128064), // SQSHLv4i32 5737 UINT64_C(1327526912), // SQSHLv4i32_shift 5738 UINT64_C(1314933760), // SQSHLv8i16 5739 UINT64_C(1326478336), // SQSHLv8i16_shift 5740 UINT64_C(236997632), // SQSHLv8i8 5741 UINT64_C(252212224), // SQSHLv8i8_shift 5742 UINT64_C(1160257536), // SQSHRNB_ZZI_B 5743 UINT64_C(1160781824), // SQSHRNB_ZZI_H 5744 UINT64_C(1163927552), // SQSHRNB_ZZI_S 5745 UINT64_C(1160258560), // SQSHRNT_ZZI_B 5746 UINT64_C(1160782848), // SQSHRNT_ZZI_H 5747 UINT64_C(1163928576), // SQSHRNT_ZZI_S 5748 UINT64_C(1594397696), // SQSHRNb 5749 UINT64_C(1594921984), // SQSHRNh 5750 UINT64_C(1595970560), // SQSHRNs 5751 UINT64_C(1325962240), // SQSHRNv16i8_shift 5752 UINT64_C(253793280), // SQSHRNv2i32_shift 5753 UINT64_C(252744704), // SQSHRNv4i16_shift 5754 UINT64_C(1327535104), // SQSHRNv4i32_shift 5755 UINT64_C(1326486528), // SQSHRNv8i16_shift 5756 UINT64_C(252220416), // SQSHRNv8i8_shift 5757 UINT64_C(1160249344), // SQSHRUNB_ZZI_B 5758 UINT64_C(1160773632), // SQSHRUNB_ZZI_H 5759 UINT64_C(1163919360), // SQSHRUNB_ZZI_S 5760 UINT64_C(1160250368), // SQSHRUNT_ZZI_B 5761 UINT64_C(1160774656), // SQSHRUNT_ZZI_H 5762 UINT64_C(1163920384), // SQSHRUNT_ZZI_S 5763 UINT64_C(2131264512), // SQSHRUNb 5764 UINT64_C(2131788800), // SQSHRUNh 5765 UINT64_C(2132837376), // SQSHRUNs 5766 UINT64_C(1862829056), // SQSHRUNv16i8_shift 5767 UINT64_C(790660096), // SQSHRUNv2i32_shift 5768 UINT64_C(789611520), // SQSHRUNv4i16_shift 5769 UINT64_C(1864401920), // SQSHRUNv4i32_shift 5770 UINT64_C(1863353344), // SQSHRUNv8i16_shift 5771 UINT64_C(789087232), // SQSHRUNv8i8_shift 5772 UINT64_C(1142849536), // SQSUBR_ZPmZ_B 5773 UINT64_C(1155432448), // SQSUBR_ZPmZ_D 5774 UINT64_C(1147043840), // SQSUBR_ZPmZ_H 5775 UINT64_C(1151238144), // SQSUBR_ZPmZ_S 5776 UINT64_C(623296512), // SQSUB_ZI_B 5777 UINT64_C(635879424), // SQSUB_ZI_D 5778 UINT64_C(627490816), // SQSUB_ZI_H 5779 UINT64_C(631685120), // SQSUB_ZI_S 5780 UINT64_C(1142587392), // SQSUB_ZPmZ_B 5781 UINT64_C(1155170304), // SQSUB_ZPmZ_D 5782 UINT64_C(1146781696), // SQSUB_ZPmZ_H 5783 UINT64_C(1150976000), // SQSUB_ZPmZ_S 5784 UINT64_C(69212160), // SQSUB_ZZZ_B 5785 UINT64_C(81795072), // SQSUB_ZZZ_D 5786 UINT64_C(73406464), // SQSUB_ZZZ_H 5787 UINT64_C(77600768), // SQSUB_ZZZ_S 5788 UINT64_C(1310731264), // SQSUBv16i8 5789 UINT64_C(1583361024), // SQSUBv1i16 5790 UINT64_C(1587555328), // SQSUBv1i32 5791 UINT64_C(1591749632), // SQSUBv1i64 5792 UINT64_C(1579166720), // SQSUBv1i8 5793 UINT64_C(245378048), // SQSUBv2i32 5794 UINT64_C(1323314176), // SQSUBv2i64 5795 UINT64_C(241183744), // SQSUBv4i16 5796 UINT64_C(1319119872), // SQSUBv4i32 5797 UINT64_C(1314925568), // SQSUBv8i16 5798 UINT64_C(236989440), // SQSUBv8i8 5799 UINT64_C(1160265728), // SQXTNB_ZZ_B 5800 UINT64_C(1160790016), // SQXTNB_ZZ_H 5801 UINT64_C(1163935744), // SQXTNB_ZZ_S 5802 UINT64_C(1160266752), // SQXTNT_ZZ_B 5803 UINT64_C(1160791040), // SQXTNT_ZZ_H 5804 UINT64_C(1163936768), // SQXTNT_ZZ_S 5805 UINT64_C(1310803968), // SQXTNv16i8 5806 UINT64_C(1583433728), // SQXTNv1i16 5807 UINT64_C(1587628032), // SQXTNv1i32 5808 UINT64_C(1579239424), // SQXTNv1i8 5809 UINT64_C(245450752), // SQXTNv2i32 5810 UINT64_C(241256448), // SQXTNv4i16 5811 UINT64_C(1319192576), // SQXTNv4i32 5812 UINT64_C(1314998272), // SQXTNv8i16 5813 UINT64_C(237062144), // SQXTNv8i8 5814 UINT64_C(1160269824), // SQXTUNB_ZZ_B 5815 UINT64_C(1160794112), // SQXTUNB_ZZ_H 5816 UINT64_C(1163939840), // SQXTUNB_ZZ_S 5817 UINT64_C(1160270848), // SQXTUNT_ZZ_B 5818 UINT64_C(1160795136), // SQXTUNT_ZZ_H 5819 UINT64_C(1163940864), // SQXTUNT_ZZ_S 5820 UINT64_C(1847666688), // SQXTUNv16i8 5821 UINT64_C(2120296448), // SQXTUNv1i16 5822 UINT64_C(2124490752), // SQXTUNv1i32 5823 UINT64_C(2116102144), // SQXTUNv1i8 5824 UINT64_C(782313472), // SQXTUNv2i32 5825 UINT64_C(778119168), // SQXTUNv4i16 5826 UINT64_C(1856055296), // SQXTUNv4i32 5827 UINT64_C(1851860992), // SQXTUNv8i16 5828 UINT64_C(773924864), // SQXTUNv8i8 5829 UINT64_C(1142194176), // SRHADD_ZPmZ_B 5830 UINT64_C(1154777088), // SRHADD_ZPmZ_D 5831 UINT64_C(1146388480), // SRHADD_ZPmZ_H 5832 UINT64_C(1150582784), // SRHADD_ZPmZ_S 5833 UINT64_C(1310725120), // SRHADDv16i8 5834 UINT64_C(245371904), // SRHADDv2i32 5835 UINT64_C(241177600), // SRHADDv4i16 5836 UINT64_C(1319113728), // SRHADDv4i32 5837 UINT64_C(1314919424), // SRHADDv8i16 5838 UINT64_C(236983296), // SRHADDv8i8 5839 UINT64_C(1158213632), // SRI_ZZI_B 5840 UINT64_C(1166077952), // SRI_ZZI_D 5841 UINT64_C(1158737920), // SRI_ZZI_H 5842 UINT64_C(1161883648), // SRI_ZZI_S 5843 UINT64_C(2134918144), // SRId 5844 UINT64_C(1862812672), // SRIv16i8_shift 5845 UINT64_C(790643712), // SRIv2i32_shift 5846 UINT64_C(1866482688), // SRIv2i64_shift 5847 UINT64_C(789595136), // SRIv4i16_shift 5848 UINT64_C(1864385536), // SRIv4i32_shift 5849 UINT64_C(1863336960), // SRIv8i16_shift 5850 UINT64_C(789070848), // SRIv8i8_shift 5851 UINT64_C(1141276672), // SRSHLR_ZPmZ_B 5852 UINT64_C(1153859584), // SRSHLR_ZPmZ_D 5853 UINT64_C(1145470976), // SRSHLR_ZPmZ_H 5854 UINT64_C(1149665280), // SRSHLR_ZPmZ_S 5855 UINT64_C(3240145440), // SRSHL_VG2_2Z2Z_B 5856 UINT64_C(3252728352), // SRSHL_VG2_2Z2Z_D 5857 UINT64_C(3244339744), // SRSHL_VG2_2Z2Z_H 5858 UINT64_C(3248534048), // SRSHL_VG2_2Z2Z_S 5859 UINT64_C(3240141344), // SRSHL_VG2_2ZZ_B 5860 UINT64_C(3252724256), // SRSHL_VG2_2ZZ_D 5861 UINT64_C(3244335648), // SRSHL_VG2_2ZZ_H 5862 UINT64_C(3248529952), // SRSHL_VG2_2ZZ_S 5863 UINT64_C(3240147488), // SRSHL_VG4_4Z4Z_B 5864 UINT64_C(3252730400), // SRSHL_VG4_4Z4Z_D 5865 UINT64_C(3244341792), // SRSHL_VG4_4Z4Z_H 5866 UINT64_C(3248536096), // SRSHL_VG4_4Z4Z_S 5867 UINT64_C(3240143392), // SRSHL_VG4_4ZZ_B 5868 UINT64_C(3252726304), // SRSHL_VG4_4ZZ_D 5869 UINT64_C(3244337696), // SRSHL_VG4_4ZZ_H 5870 UINT64_C(3248532000), // SRSHL_VG4_4ZZ_S 5871 UINT64_C(1141014528), // SRSHL_ZPmZ_B 5872 UINT64_C(1153597440), // SRSHL_ZPmZ_D 5873 UINT64_C(1145208832), // SRSHL_ZPmZ_H 5874 UINT64_C(1149403136), // SRSHL_ZPmZ_S 5875 UINT64_C(1310741504), // SRSHLv16i8 5876 UINT64_C(1591759872), // SRSHLv1i64 5877 UINT64_C(245388288), // SRSHLv2i32 5878 UINT64_C(1323324416), // SRSHLv2i64 5879 UINT64_C(241193984), // SRSHLv4i16 5880 UINT64_C(1319130112), // SRSHLv4i32 5881 UINT64_C(1314935808), // SRSHLv8i16 5882 UINT64_C(236999680), // SRSHLv8i8 5883 UINT64_C(67928320), // SRSHR_ZPmI_B 5884 UINT64_C(76316672), // SRSHR_ZPmI_D 5885 UINT64_C(67928576), // SRSHR_ZPmI_H 5886 UINT64_C(72122368), // SRSHR_ZPmI_S 5887 UINT64_C(1598039040), // SRSHRd 5888 UINT64_C(1325933568), // SRSHRv16i8_shift 5889 UINT64_C(253764608), // SRSHRv2i32_shift 5890 UINT64_C(1329603584), // SRSHRv2i64_shift 5891 UINT64_C(252716032), // SRSHRv4i16_shift 5892 UINT64_C(1327506432), // SRSHRv4i32_shift 5893 UINT64_C(1326457856), // SRSHRv8i16_shift 5894 UINT64_C(252191744), // SRSHRv8i8_shift 5895 UINT64_C(1158211584), // SRSRA_ZZI_B 5896 UINT64_C(1166075904), // SRSRA_ZZI_D 5897 UINT64_C(1158735872), // SRSRA_ZZI_H 5898 UINT64_C(1161881600), // SRSRA_ZZI_S 5899 UINT64_C(1598043136), // SRSRAd 5900 UINT64_C(1325937664), // SRSRAv16i8_shift 5901 UINT64_C(253768704), // SRSRAv2i32_shift 5902 UINT64_C(1329607680), // SRSRAv2i64_shift 5903 UINT64_C(252720128), // SRSRAv4i16_shift 5904 UINT64_C(1327510528), // SRSRAv4i32_shift 5905 UINT64_C(1326461952), // SRSRAv8i16_shift 5906 UINT64_C(252195840), // SRSRAv8i8_shift 5907 UINT64_C(1161863168), // SSHLLB_ZZI_D 5908 UINT64_C(1158193152), // SSHLLB_ZZI_H 5909 UINT64_C(1158717440), // SSHLLB_ZZI_S 5910 UINT64_C(1161864192), // SSHLLT_ZZI_D 5911 UINT64_C(1158194176), // SSHLLT_ZZI_H 5912 UINT64_C(1158718464), // SSHLLT_ZZI_S 5913 UINT64_C(1325966336), // SSHLLv16i8_shift 5914 UINT64_C(253797376), // SSHLLv2i32_shift 5915 UINT64_C(252748800), // SSHLLv4i16_shift 5916 UINT64_C(1327539200), // SSHLLv4i32_shift 5917 UINT64_C(1326490624), // SSHLLv8i16_shift 5918 UINT64_C(252224512), // SSHLLv8i8_shift 5919 UINT64_C(1310737408), // SSHLv16i8 5920 UINT64_C(1591755776), // SSHLv1i64 5921 UINT64_C(245384192), // SSHLv2i32 5922 UINT64_C(1323320320), // SSHLv2i64 5923 UINT64_C(241189888), // SSHLv4i16 5924 UINT64_C(1319126016), // SSHLv4i32 5925 UINT64_C(1314931712), // SSHLv8i16 5926 UINT64_C(236995584), // SSHLv8i8 5927 UINT64_C(1598030848), // SSHRd 5928 UINT64_C(1325925376), // SSHRv16i8_shift 5929 UINT64_C(253756416), // SSHRv2i32_shift 5930 UINT64_C(1329595392), // SSHRv2i64_shift 5931 UINT64_C(252707840), // SSHRv4i16_shift 5932 UINT64_C(1327498240), // SSHRv4i32_shift 5933 UINT64_C(1326449664), // SSHRv8i16_shift 5934 UINT64_C(252183552), // SSHRv8i8_shift 5935 UINT64_C(1158209536), // SSRA_ZZI_B 5936 UINT64_C(1166073856), // SSRA_ZZI_D 5937 UINT64_C(1158733824), // SSRA_ZZI_H 5938 UINT64_C(1161879552), // SSRA_ZZI_S 5939 UINT64_C(1598034944), // SSRAd 5940 UINT64_C(1325929472), // SSRAv16i8_shift 5941 UINT64_C(253760512), // SSRAv2i32_shift 5942 UINT64_C(1329599488), // SSRAv2i64_shift 5943 UINT64_C(252711936), // SSRAv4i16_shift 5944 UINT64_C(1327502336), // SSRAv4i32_shift 5945 UINT64_C(1326453760), // SSRAv8i16_shift 5946 UINT64_C(252187648), // SSRAv8i8_shift 5947 UINT64_C(3825246208), // SST1B_D 5948 UINT64_C(3829440512), // SST1B_D_IMM 5949 UINT64_C(3825254400), // SST1B_D_SXTW 5950 UINT64_C(3825238016), // SST1B_D_UXTW 5951 UINT64_C(3831537664), // SST1B_S_IMM 5952 UINT64_C(3829448704), // SST1B_S_SXTW 5953 UINT64_C(3829432320), // SST1B_S_UXTW 5954 UINT64_C(3850412032), // SST1D 5955 UINT64_C(3854606336), // SST1D_IMM 5956 UINT64_C(3852509184), // SST1D_SCALED 5957 UINT64_C(3850420224), // SST1D_SXTW 5958 UINT64_C(3852517376), // SST1D_SXTW_SCALED 5959 UINT64_C(3850403840), // SST1D_UXTW 5960 UINT64_C(3852500992), // SST1D_UXTW_SCALED 5961 UINT64_C(3833634816), // SST1H_D 5962 UINT64_C(3837829120), // SST1H_D_IMM 5963 UINT64_C(3835731968), // SST1H_D_SCALED 5964 UINT64_C(3833643008), // SST1H_D_SXTW 5965 UINT64_C(3835740160), // SST1H_D_SXTW_SCALED 5966 UINT64_C(3833626624), // SST1H_D_UXTW 5967 UINT64_C(3835723776), // SST1H_D_UXTW_SCALED 5968 UINT64_C(3839926272), // SST1H_S_IMM 5969 UINT64_C(3837837312), // SST1H_S_SXTW 5970 UINT64_C(3839934464), // SST1H_S_SXTW_SCALED 5971 UINT64_C(3837820928), // SST1H_S_UXTW 5972 UINT64_C(3839918080), // SST1H_S_UXTW_SCALED 5973 UINT64_C(3827310592), // SST1Q 5974 UINT64_C(3842023424), // SST1W_D 5975 UINT64_C(3846217728), // SST1W_D_IMM 5976 UINT64_C(3844120576), // SST1W_D_SCALED 5977 UINT64_C(3842031616), // SST1W_D_SXTW 5978 UINT64_C(3844128768), // SST1W_D_SXTW_SCALED 5979 UINT64_C(3842015232), // SST1W_D_UXTW 5980 UINT64_C(3844112384), // SST1W_D_UXTW_SCALED 5981 UINT64_C(3848314880), // SST1W_IMM 5982 UINT64_C(3846225920), // SST1W_SXTW 5983 UINT64_C(3848323072), // SST1W_SXTW_SCALED 5984 UINT64_C(3846209536), // SST1W_UXTW 5985 UINT64_C(3848306688), // SST1W_UXTW_SCALED 5986 UINT64_C(1170245632), // SSUBLBT_ZZZ_D 5987 UINT64_C(1161857024), // SSUBLBT_ZZZ_H 5988 UINT64_C(1166051328), // SSUBLBT_ZZZ_S 5989 UINT64_C(1170214912), // SSUBLB_ZZZ_D 5990 UINT64_C(1161826304), // SSUBLB_ZZZ_H 5991 UINT64_C(1166020608), // SSUBLB_ZZZ_S 5992 UINT64_C(1170246656), // SSUBLTB_ZZZ_D 5993 UINT64_C(1161858048), // SSUBLTB_ZZZ_H 5994 UINT64_C(1166052352), // SSUBLTB_ZZZ_S 5995 UINT64_C(1170215936), // SSUBLT_ZZZ_D 5996 UINT64_C(1161827328), // SSUBLT_ZZZ_H 5997 UINT64_C(1166021632), // SSUBLT_ZZZ_S 5998 UINT64_C(1310728192), // SSUBLv16i8_v8i16 5999 UINT64_C(245374976), // SSUBLv2i32_v2i64 6000 UINT64_C(241180672), // SSUBLv4i16_v4i32 6001 UINT64_C(1319116800), // SSUBLv4i32_v2i64 6002 UINT64_C(1314922496), // SSUBLv8i16_v4i32 6003 UINT64_C(236986368), // SSUBLv8i8_v8i16 6004 UINT64_C(1170231296), // SSUBWB_ZZZ_D 6005 UINT64_C(1161842688), // SSUBWB_ZZZ_H 6006 UINT64_C(1166036992), // SSUBWB_ZZZ_S 6007 UINT64_C(1170232320), // SSUBWT_ZZZ_D 6008 UINT64_C(1161843712), // SSUBWT_ZZZ_H 6009 UINT64_C(1166038016), // SSUBWT_ZZZ_S 6010 UINT64_C(1310732288), // SSUBWv16i8_v8i16 6011 UINT64_C(245379072), // SSUBWv2i32_v2i64 6012 UINT64_C(241184768), // SSUBWv4i16_v4i32 6013 UINT64_C(1319120896), // SSUBWv4i32_v2i64 6014 UINT64_C(1314926592), // SSUBWv8i16_v4i32 6015 UINT64_C(236990464), // SSUBWv8i8_v8i16 6016 UINT64_C(3825221632), // ST1B 6017 UINT64_C(2686451712), // ST1B_2Z 6018 UINT64_C(2690646016), // ST1B_2Z_IMM 6019 UINT64_C(2686484480), // ST1B_4Z 6020 UINT64_C(2690678784), // ST1B_4Z_IMM 6021 UINT64_C(3831513088), // ST1B_D 6022 UINT64_C(3831554048), // ST1B_D_IMM 6023 UINT64_C(3827318784), // ST1B_H 6024 UINT64_C(3827359744), // ST1B_H_IMM 6025 UINT64_C(3825262592), // ST1B_IMM 6026 UINT64_C(3829415936), // ST1B_S 6027 UINT64_C(3829456896), // ST1B_S_IMM 6028 UINT64_C(2707423232), // ST1B_VG2_M2ZPXI 6029 UINT64_C(2703228928), // ST1B_VG2_M2ZPXX 6030 UINT64_C(2707456000), // ST1B_VG4_M4ZPXI 6031 UINT64_C(2703261696), // ST1B_VG4_M4ZPXX 6032 UINT64_C(3856678912), // ST1D 6033 UINT64_C(2686476288), // ST1D_2Z 6034 UINT64_C(2690670592), // ST1D_2Z_IMM 6035 UINT64_C(2686509056), // ST1D_4Z 6036 UINT64_C(2690703360), // ST1D_4Z_IMM 6037 UINT64_C(3856719872), // ST1D_IMM 6038 UINT64_C(3854581760), // ST1D_Q 6039 UINT64_C(3854622720), // ST1D_Q_IMM 6040 UINT64_C(2707447808), // ST1D_VG2_M2ZPXI 6041 UINT64_C(2703253504), // ST1D_VG2_M2ZPXX 6042 UINT64_C(2707480576), // ST1D_VG4_M4ZPXI 6043 UINT64_C(2703286272), // ST1D_VG4_M4ZPXX 6044 UINT64_C(1275076608), // ST1Fourv16b 6045 UINT64_C(1283465216), // ST1Fourv16b_POST 6046 UINT64_C(201337856), // ST1Fourv1d 6047 UINT64_C(209726464), // ST1Fourv1d_POST 6048 UINT64_C(1275079680), // ST1Fourv2d 6049 UINT64_C(1283468288), // ST1Fourv2d_POST 6050 UINT64_C(201336832), // ST1Fourv2s 6051 UINT64_C(209725440), // ST1Fourv2s_POST 6052 UINT64_C(201335808), // ST1Fourv4h 6053 UINT64_C(209724416), // ST1Fourv4h_POST 6054 UINT64_C(1275078656), // ST1Fourv4s 6055 UINT64_C(1283467264), // ST1Fourv4s_POST 6056 UINT64_C(201334784), // ST1Fourv8b 6057 UINT64_C(209723392), // ST1Fourv8b_POST 6058 UINT64_C(1275077632), // ST1Fourv8h 6059 UINT64_C(1283466240), // ST1Fourv8h_POST 6060 UINT64_C(3835707392), // ST1H 6061 UINT64_C(2686459904), // ST1H_2Z 6062 UINT64_C(2690654208), // ST1H_2Z_IMM 6063 UINT64_C(2686492672), // ST1H_4Z 6064 UINT64_C(2690686976), // ST1H_4Z_IMM 6065 UINT64_C(3839901696), // ST1H_D 6066 UINT64_C(3839942656), // ST1H_D_IMM 6067 UINT64_C(3835748352), // ST1H_IMM 6068 UINT64_C(3837804544), // ST1H_S 6069 UINT64_C(3837845504), // ST1H_S_IMM 6070 UINT64_C(2707431424), // ST1H_VG2_M2ZPXI 6071 UINT64_C(2703237120), // ST1H_VG2_M2ZPXX 6072 UINT64_C(2707464192), // ST1H_VG4_M4ZPXI 6073 UINT64_C(2703269888), // ST1H_VG4_M4ZPXX 6074 UINT64_C(1275097088), // ST1Onev16b 6075 UINT64_C(1283485696), // ST1Onev16b_POST 6076 UINT64_C(201358336), // ST1Onev1d 6077 UINT64_C(209746944), // ST1Onev1d_POST 6078 UINT64_C(1275100160), // ST1Onev2d 6079 UINT64_C(1283488768), // ST1Onev2d_POST 6080 UINT64_C(201357312), // ST1Onev2s 6081 UINT64_C(209745920), // ST1Onev2s_POST 6082 UINT64_C(201356288), // ST1Onev4h 6083 UINT64_C(209744896), // ST1Onev4h_POST 6084 UINT64_C(1275099136), // ST1Onev4s 6085 UINT64_C(1283487744), // ST1Onev4s_POST 6086 UINT64_C(201355264), // ST1Onev8b 6087 UINT64_C(209743872), // ST1Onev8b_POST 6088 UINT64_C(1275098112), // ST1Onev8h 6089 UINT64_C(1283486720), // ST1Onev8h_POST 6090 UINT64_C(1275092992), // ST1Threev16b 6091 UINT64_C(1283481600), // ST1Threev16b_POST 6092 UINT64_C(201354240), // ST1Threev1d 6093 UINT64_C(209742848), // ST1Threev1d_POST 6094 UINT64_C(1275096064), // ST1Threev2d 6095 UINT64_C(1283484672), // ST1Threev2d_POST 6096 UINT64_C(201353216), // ST1Threev2s 6097 UINT64_C(209741824), // ST1Threev2s_POST 6098 UINT64_C(201352192), // ST1Threev4h 6099 UINT64_C(209740800), // ST1Threev4h_POST 6100 UINT64_C(1275095040), // ST1Threev4s 6101 UINT64_C(1283483648), // ST1Threev4s_POST 6102 UINT64_C(201351168), // ST1Threev8b 6103 UINT64_C(209739776), // ST1Threev8b_POST 6104 UINT64_C(1275094016), // ST1Threev8h 6105 UINT64_C(1283482624), // ST1Threev8h_POST 6106 UINT64_C(1275109376), // ST1Twov16b 6107 UINT64_C(1283497984), // ST1Twov16b_POST 6108 UINT64_C(201370624), // ST1Twov1d 6109 UINT64_C(209759232), // ST1Twov1d_POST 6110 UINT64_C(1275112448), // ST1Twov2d 6111 UINT64_C(1283501056), // ST1Twov2d_POST 6112 UINT64_C(201369600), // ST1Twov2s 6113 UINT64_C(209758208), // ST1Twov2s_POST 6114 UINT64_C(201368576), // ST1Twov4h 6115 UINT64_C(209757184), // ST1Twov4h_POST 6116 UINT64_C(1275111424), // ST1Twov4s 6117 UINT64_C(1283500032), // ST1Twov4s_POST 6118 UINT64_C(201367552), // ST1Twov8b 6119 UINT64_C(209756160), // ST1Twov8b_POST 6120 UINT64_C(1275110400), // ST1Twov8h 6121 UINT64_C(1283499008), // ST1Twov8h_POST 6122 UINT64_C(3846193152), // ST1W 6123 UINT64_C(2686468096), // ST1W_2Z 6124 UINT64_C(2690662400), // ST1W_2Z_IMM 6125 UINT64_C(2686500864), // ST1W_4Z 6126 UINT64_C(2690695168), // ST1W_4Z_IMM 6127 UINT64_C(3848290304), // ST1W_D 6128 UINT64_C(3848331264), // ST1W_D_IMM 6129 UINT64_C(3846234112), // ST1W_IMM 6130 UINT64_C(3841998848), // ST1W_Q 6131 UINT64_C(3842039808), // ST1W_Q_IMM 6132 UINT64_C(2707439616), // ST1W_VG2_M2ZPXI 6133 UINT64_C(2703245312), // ST1W_VG2_M2ZPXX 6134 UINT64_C(2707472384), // ST1W_VG4_M4ZPXI 6135 UINT64_C(2703278080), // ST1W_VG4_M4ZPXX 6136 UINT64_C(3760193536), // ST1_MXIPXX_H_B 6137 UINT64_C(3772776448), // ST1_MXIPXX_H_D 6138 UINT64_C(3764387840), // ST1_MXIPXX_H_H 6139 UINT64_C(3789553664), // ST1_MXIPXX_H_Q 6140 UINT64_C(3768582144), // ST1_MXIPXX_H_S 6141 UINT64_C(3760226304), // ST1_MXIPXX_V_B 6142 UINT64_C(3772809216), // ST1_MXIPXX_V_D 6143 UINT64_C(3764420608), // ST1_MXIPXX_V_H 6144 UINT64_C(3789586432), // ST1_MXIPXX_V_Q 6145 UINT64_C(3768614912), // ST1_MXIPXX_V_S 6146 UINT64_C(218120192), // ST1i16 6147 UINT64_C(226508800), // ST1i16_POST 6148 UINT64_C(218136576), // ST1i32 6149 UINT64_C(226525184), // ST1i32_POST 6150 UINT64_C(218137600), // ST1i64 6151 UINT64_C(226526208), // ST1i64_POST 6152 UINT64_C(218103808), // ST1i8 6153 UINT64_C(226492416), // ST1i8_POST 6154 UINT64_C(3827326976), // ST2B 6155 UINT64_C(3828408320), // ST2B_IMM 6156 UINT64_C(3852492800), // ST2D 6157 UINT64_C(3853574144), // ST2D_IMM 6158 UINT64_C(3651143680), // ST2GOffset 6159 UINT64_C(3651142656), // ST2GPostIndex 6160 UINT64_C(3651144704), // ST2GPreIndex 6161 UINT64_C(3835715584), // ST2H 6162 UINT64_C(3836796928), // ST2H_IMM 6163 UINT64_C(3831496704), // ST2Q 6164 UINT64_C(3829399552), // ST2Q_IMM 6165 UINT64_C(1275101184), // ST2Twov16b 6166 UINT64_C(1283489792), // ST2Twov16b_POST 6167 UINT64_C(1275104256), // ST2Twov2d 6168 UINT64_C(1283492864), // ST2Twov2d_POST 6169 UINT64_C(201361408), // ST2Twov2s 6170 UINT64_C(209750016), // ST2Twov2s_POST 6171 UINT64_C(201360384), // ST2Twov4h 6172 UINT64_C(209748992), // ST2Twov4h_POST 6173 UINT64_C(1275103232), // ST2Twov4s 6174 UINT64_C(1283491840), // ST2Twov4s_POST 6175 UINT64_C(201359360), // ST2Twov8b 6176 UINT64_C(209747968), // ST2Twov8b_POST 6177 UINT64_C(1275102208), // ST2Twov8h 6178 UINT64_C(1283490816), // ST2Twov8h_POST 6179 UINT64_C(3844104192), // ST2W 6180 UINT64_C(3845185536), // ST2W_IMM 6181 UINT64_C(220217344), // ST2i16 6182 UINT64_C(228605952), // ST2i16_POST 6183 UINT64_C(220233728), // ST2i32 6184 UINT64_C(228622336), // ST2i32_POST 6185 UINT64_C(220234752), // ST2i64 6186 UINT64_C(228623360), // ST2i64_POST 6187 UINT64_C(220200960), // ST2i8 6188 UINT64_C(228589568), // ST2i8_POST 6189 UINT64_C(3829424128), // ST3B 6190 UINT64_C(3830505472), // ST3B_IMM 6191 UINT64_C(3854589952), // ST3D 6192 UINT64_C(3855671296), // ST3D_IMM 6193 UINT64_C(3837812736), // ST3H 6194 UINT64_C(3838894080), // ST3H_IMM 6195 UINT64_C(3835691008), // ST3Q 6196 UINT64_C(3833593856), // ST3Q_IMM 6197 UINT64_C(1275084800), // ST3Threev16b 6198 UINT64_C(1283473408), // ST3Threev16b_POST 6199 UINT64_C(1275087872), // ST3Threev2d 6200 UINT64_C(1283476480), // ST3Threev2d_POST 6201 UINT64_C(201345024), // ST3Threev2s 6202 UINT64_C(209733632), // ST3Threev2s_POST 6203 UINT64_C(201344000), // ST3Threev4h 6204 UINT64_C(209732608), // ST3Threev4h_POST 6205 UINT64_C(1275086848), // ST3Threev4s 6206 UINT64_C(1283475456), // ST3Threev4s_POST 6207 UINT64_C(201342976), // ST3Threev8b 6208 UINT64_C(209731584), // ST3Threev8b_POST 6209 UINT64_C(1275085824), // ST3Threev8h 6210 UINT64_C(1283474432), // ST3Threev8h_POST 6211 UINT64_C(3846201344), // ST3W 6212 UINT64_C(3847282688), // ST3W_IMM 6213 UINT64_C(218128384), // ST3i16 6214 UINT64_C(226516992), // ST3i16_POST 6215 UINT64_C(218144768), // ST3i32 6216 UINT64_C(226533376), // ST3i32_POST 6217 UINT64_C(218145792), // ST3i64 6218 UINT64_C(226534400), // ST3i64_POST 6219 UINT64_C(218112000), // ST3i8 6220 UINT64_C(226500608), // ST3i8_POST 6221 UINT64_C(3831521280), // ST4B 6222 UINT64_C(3832602624), // ST4B_IMM 6223 UINT64_C(3856687104), // ST4D 6224 UINT64_C(3857768448), // ST4D_IMM 6225 UINT64_C(1275068416), // ST4Fourv16b 6226 UINT64_C(1283457024), // ST4Fourv16b_POST 6227 UINT64_C(1275071488), // ST4Fourv2d 6228 UINT64_C(1283460096), // ST4Fourv2d_POST 6229 UINT64_C(201328640), // ST4Fourv2s 6230 UINT64_C(209717248), // ST4Fourv2s_POST 6231 UINT64_C(201327616), // ST4Fourv4h 6232 UINT64_C(209716224), // ST4Fourv4h_POST 6233 UINT64_C(1275070464), // ST4Fourv4s 6234 UINT64_C(1283459072), // ST4Fourv4s_POST 6235 UINT64_C(201326592), // ST4Fourv8b 6236 UINT64_C(209715200), // ST4Fourv8b_POST 6237 UINT64_C(1275069440), // ST4Fourv8h 6238 UINT64_C(1283458048), // ST4Fourv8h_POST 6239 UINT64_C(3839909888), // ST4H 6240 UINT64_C(3840991232), // ST4H_IMM 6241 UINT64_C(3839885312), // ST4Q 6242 UINT64_C(3837788160), // ST4Q_IMM 6243 UINT64_C(3848298496), // ST4W 6244 UINT64_C(3849379840), // ST4W_IMM 6245 UINT64_C(220225536), // ST4i16 6246 UINT64_C(228614144), // ST4i16_POST 6247 UINT64_C(220241920), // ST4i32 6248 UINT64_C(228630528), // ST4i32_POST 6249 UINT64_C(220242944), // ST4i64 6250 UINT64_C(228631552), // ST4i64_POST 6251 UINT64_C(220209152), // ST4i8 6252 UINT64_C(228597760), // ST4i8_POST 6253 UINT64_C(4164915200), // ST64B 6254 UINT64_C(4162891776), // ST64BV 6255 UINT64_C(4162887680), // ST64BV0 6256 UINT64_C(3651141632), // STGM 6257 UINT64_C(3642755072), // STGOffset 6258 UINT64_C(1761607680), // STGPi 6259 UINT64_C(3642754048), // STGPostIndex 6260 UINT64_C(1753219072), // STGPpost 6261 UINT64_C(1769996288), // STGPpre 6262 UINT64_C(3642756096), // STGPreIndex 6263 UINT64_C(2566920192), // STILPW 6264 UINT64_C(2566916096), // STILPWpre 6265 UINT64_C(3640662016), // STILPX 6266 UINT64_C(3640657920), // STILPXpre 6267 UINT64_C(218203136), // STL1 6268 UINT64_C(144669696), // STLLRB 6269 UINT64_C(1218411520), // STLLRH 6270 UINT64_C(2292153344), // STLLRW 6271 UINT64_C(3365895168), // STLLRX 6272 UINT64_C(144702464), // STLRB 6273 UINT64_C(1218444288), // STLRH 6274 UINT64_C(2292186112), // STLRW 6275 UINT64_C(2575304704), // STLRWpre 6276 UINT64_C(3365927936), // STLRX 6277 UINT64_C(3649046528), // STLRXpre 6278 UINT64_C(419430400), // STLURBi 6279 UINT64_C(1493172224), // STLURHi 6280 UINT64_C(2566914048), // STLURWi 6281 UINT64_C(3640655872), // STLURXi 6282 UINT64_C(486541312), // STLURbi 6283 UINT64_C(3707766784), // STLURdi 6284 UINT64_C(1560283136), // STLURhi 6285 UINT64_C(494929920), // STLURqi 6286 UINT64_C(2634024960), // STLURsi 6287 UINT64_C(2283831296), // STLXPW 6288 UINT64_C(3357573120), // STLXPX 6289 UINT64_C(134250496), // STLXRB 6290 UINT64_C(1207992320), // STLXRH 6291 UINT64_C(2281734144), // STLXRW 6292 UINT64_C(3355475968), // STLXRX 6293 UINT64_C(1811939328), // STNPDi 6294 UINT64_C(2885681152), // STNPQi 6295 UINT64_C(738197504), // STNPSi 6296 UINT64_C(671088640), // STNPWi 6297 UINT64_C(2818572288), // STNPXi 6298 UINT64_C(2686451713), // STNT1B_2Z 6299 UINT64_C(2690646017), // STNT1B_2Z_IMM 6300 UINT64_C(2686484481), // STNT1B_4Z 6301 UINT64_C(2690678785), // STNT1B_4Z_IMM 6302 UINT64_C(2707423240), // STNT1B_VG2_M2ZPXI 6303 UINT64_C(2703228936), // STNT1B_VG2_M2ZPXX 6304 UINT64_C(2707456008), // STNT1B_VG4_M4ZPXI 6305 UINT64_C(2703261704), // STNT1B_VG4_M4ZPXX 6306 UINT64_C(3826311168), // STNT1B_ZRI 6307 UINT64_C(3825229824), // STNT1B_ZRR 6308 UINT64_C(3825213440), // STNT1B_ZZR_D_REAL 6309 UINT64_C(3829407744), // STNT1B_ZZR_S_REAL 6310 UINT64_C(2686476289), // STNT1D_2Z 6311 UINT64_C(2690670593), // STNT1D_2Z_IMM 6312 UINT64_C(2686509057), // STNT1D_4Z 6313 UINT64_C(2690703361), // STNT1D_4Z_IMM 6314 UINT64_C(2707447816), // STNT1D_VG2_M2ZPXI 6315 UINT64_C(2703253512), // STNT1D_VG2_M2ZPXX 6316 UINT64_C(2707480584), // STNT1D_VG4_M4ZPXI 6317 UINT64_C(2703286280), // STNT1D_VG4_M4ZPXX 6318 UINT64_C(3851476992), // STNT1D_ZRI 6319 UINT64_C(3850395648), // STNT1D_ZRR 6320 UINT64_C(3850379264), // STNT1D_ZZR_D_REAL 6321 UINT64_C(2686459905), // STNT1H_2Z 6322 UINT64_C(2690654209), // STNT1H_2Z_IMM 6323 UINT64_C(2686492673), // STNT1H_4Z 6324 UINT64_C(2690686977), // STNT1H_4Z_IMM 6325 UINT64_C(2707431432), // STNT1H_VG2_M2ZPXI 6326 UINT64_C(2703237128), // STNT1H_VG2_M2ZPXX 6327 UINT64_C(2707464200), // STNT1H_VG4_M4ZPXI 6328 UINT64_C(2703269896), // STNT1H_VG4_M4ZPXX 6329 UINT64_C(3834699776), // STNT1H_ZRI 6330 UINT64_C(3833618432), // STNT1H_ZRR 6331 UINT64_C(3833602048), // STNT1H_ZZR_D_REAL 6332 UINT64_C(3837796352), // STNT1H_ZZR_S_REAL 6333 UINT64_C(2686468097), // STNT1W_2Z 6334 UINT64_C(2690662401), // STNT1W_2Z_IMM 6335 UINT64_C(2686500865), // STNT1W_4Z 6336 UINT64_C(2690695169), // STNT1W_4Z_IMM 6337 UINT64_C(2707439624), // STNT1W_VG2_M2ZPXI 6338 UINT64_C(2703245320), // STNT1W_VG2_M2ZPXX 6339 UINT64_C(2707472392), // STNT1W_VG4_M4ZPXI 6340 UINT64_C(2703278088), // STNT1W_VG4_M4ZPXX 6341 UINT64_C(3843088384), // STNT1W_ZRI 6342 UINT64_C(3842007040), // STNT1W_ZRR 6343 UINT64_C(3841990656), // STNT1W_ZZR_D_REAL 6344 UINT64_C(3846184960), // STNT1W_ZZR_S_REAL 6345 UINT64_C(1828716544), // STPDi 6346 UINT64_C(1820327936), // STPDpost 6347 UINT64_C(1837105152), // STPDpre 6348 UINT64_C(2902458368), // STPQi 6349 UINT64_C(2894069760), // STPQpost 6350 UINT64_C(2910846976), // STPQpre 6351 UINT64_C(754974720), // STPSi 6352 UINT64_C(746586112), // STPSpost 6353 UINT64_C(763363328), // STPSpre 6354 UINT64_C(687865856), // STPWi 6355 UINT64_C(679477248), // STPWpost 6356 UINT64_C(696254464), // STPWpre 6357 UINT64_C(2835349504), // STPXi 6358 UINT64_C(2826960896), // STPXpost 6359 UINT64_C(2843738112), // STPXpre 6360 UINT64_C(939525120), // STRBBpost 6361 UINT64_C(939527168), // STRBBpre 6362 UINT64_C(941639680), // STRBBroW 6363 UINT64_C(941647872), // STRBBroX 6364 UINT64_C(956301312), // STRBBui 6365 UINT64_C(1006633984), // STRBpost 6366 UINT64_C(1006636032), // STRBpre 6367 UINT64_C(1008748544), // STRBroW 6368 UINT64_C(1008756736), // STRBroX 6369 UINT64_C(1023410176), // STRBui 6370 UINT64_C(4227859456), // STRDpost 6371 UINT64_C(4227861504), // STRDpre 6372 UINT64_C(4229974016), // STRDroW 6373 UINT64_C(4229982208), // STRDroX 6374 UINT64_C(4244635648), // STRDui 6375 UINT64_C(2013266944), // STRHHpost 6376 UINT64_C(2013268992), // STRHHpre 6377 UINT64_C(2015381504), // STRHHroW 6378 UINT64_C(2015389696), // STRHHroX 6379 UINT64_C(2030043136), // STRHHui 6380 UINT64_C(2080375808), // STRHpost 6381 UINT64_C(2080377856), // STRHpre 6382 UINT64_C(2082490368), // STRHroW 6383 UINT64_C(2082498560), // STRHroX 6384 UINT64_C(2097152000), // STRHui 6385 UINT64_C(1015022592), // STRQpost 6386 UINT64_C(1015024640), // STRQpre 6387 UINT64_C(1017137152), // STRQroW 6388 UINT64_C(1017145344), // STRQroX 6389 UINT64_C(1031798784), // STRQui 6390 UINT64_C(3154117632), // STRSpost 6391 UINT64_C(3154119680), // STRSpre 6392 UINT64_C(3156232192), // STRSroW 6393 UINT64_C(3156240384), // STRSroX 6394 UINT64_C(3170893824), // STRSui 6395 UINT64_C(3087008768), // STRWpost 6396 UINT64_C(3087010816), // STRWpre 6397 UINT64_C(3089123328), // STRWroW 6398 UINT64_C(3089131520), // STRWroX 6399 UINT64_C(3103784960), // STRWui 6400 UINT64_C(4160750592), // STRXpost 6401 UINT64_C(4160752640), // STRXpre 6402 UINT64_C(4162865152), // STRXroW 6403 UINT64_C(4162873344), // STRXroX 6404 UINT64_C(4177526784), // STRXui 6405 UINT64_C(3850371072), // STR_PXI 6406 UINT64_C(3779035136), // STR_TX 6407 UINT64_C(3776970752), // STR_ZA 6408 UINT64_C(3850387456), // STR_ZXI 6409 UINT64_C(939526144), // STTRBi 6410 UINT64_C(2013267968), // STTRHi 6411 UINT64_C(3087009792), // STTRWi 6412 UINT64_C(4160751616), // STTRXi 6413 UINT64_C(939524096), // STURBBi 6414 UINT64_C(1006632960), // STURBi 6415 UINT64_C(4227858432), // STURDi 6416 UINT64_C(2013265920), // STURHHi 6417 UINT64_C(2080374784), // STURHi 6418 UINT64_C(1015021568), // STURQi 6419 UINT64_C(3154116608), // STURSi 6420 UINT64_C(3087007744), // STURWi 6421 UINT64_C(4160749568), // STURXi 6422 UINT64_C(2283798528), // STXPW 6423 UINT64_C(3357540352), // STXPX 6424 UINT64_C(134217728), // STXRB 6425 UINT64_C(1207959552), // STXRH 6426 UINT64_C(2281701376), // STXRW 6427 UINT64_C(3355443200), // STXRX 6428 UINT64_C(3655337984), // STZ2GOffset 6429 UINT64_C(3655336960), // STZ2GPostIndex 6430 UINT64_C(3655339008), // STZ2GPreIndex 6431 UINT64_C(3642753024), // STZGM 6432 UINT64_C(3646949376), // STZGOffset 6433 UINT64_C(3646948352), // STZGPostIndex 6434 UINT64_C(3646950400), // STZGPreIndex 6435 UINT64_C(3514826752), // SUBG 6436 UINT64_C(1163948032), // SUBHNB_ZZZ_B 6437 UINT64_C(1168142336), // SUBHNB_ZZZ_H 6438 UINT64_C(1172336640), // SUBHNB_ZZZ_S 6439 UINT64_C(1163949056), // SUBHNT_ZZZ_B 6440 UINT64_C(1168143360), // SUBHNT_ZZZ_H 6441 UINT64_C(1172337664), // SUBHNT_ZZZ_S 6442 UINT64_C(245391360), // SUBHNv2i64_v2i32 6443 UINT64_C(1319133184), // SUBHNv2i64_v4i32 6444 UINT64_C(241197056), // SUBHNv4i32_v4i16 6445 UINT64_C(1314938880), // SUBHNv4i32_v8i16 6446 UINT64_C(1310744576), // SUBHNv8i16_v16i8 6447 UINT64_C(237002752), // SUBHNv8i16_v8i8 6448 UINT64_C(2596274176), // SUBP 6449 UINT64_C(3133145088), // SUBPS 6450 UINT64_C(623099904), // SUBR_ZI_B 6451 UINT64_C(635682816), // SUBR_ZI_D 6452 UINT64_C(627294208), // SUBR_ZI_H 6453 UINT64_C(631488512), // SUBR_ZI_S 6454 UINT64_C(67305472), // SUBR_ZPmZ_B 6455 UINT64_C(79888384), // SUBR_ZPmZ_D 6456 UINT64_C(71499776), // SUBR_ZPmZ_H 6457 UINT64_C(75694080), // SUBR_ZPmZ_S 6458 UINT64_C(1895825408), // SUBSWri 6459 UINT64_C(1795162112), // SUBSWrs 6460 UINT64_C(1797259264), // SUBSWrx 6461 UINT64_C(4043309056), // SUBSXri 6462 UINT64_C(3942645760), // SUBSXrs 6463 UINT64_C(3944742912), // SUBSXrx 6464 UINT64_C(3944767488), // SUBSXrx64 6465 UINT64_C(1358954496), // SUBWri 6466 UINT64_C(1258291200), // SUBWrs 6467 UINT64_C(1260388352), // SUBWrx 6468 UINT64_C(3506438144), // SUBXri 6469 UINT64_C(3405774848), // SUBXrs 6470 UINT64_C(3407872000), // SUBXrx 6471 UINT64_C(3407896576), // SUBXrx64 6472 UINT64_C(3252688920), // SUB_VG2_M2Z2Z_D 6473 UINT64_C(3248494616), // SUB_VG2_M2Z2Z_S 6474 UINT64_C(3244300312), // SUB_VG2_M2ZZ_D 6475 UINT64_C(3240106008), // SUB_VG2_M2ZZ_S 6476 UINT64_C(3252689944), // SUB_VG2_M2Z_D 6477 UINT64_C(3248495640), // SUB_VG2_M2Z_S 6478 UINT64_C(3252754456), // SUB_VG4_M4Z4Z_D 6479 UINT64_C(3248560152), // SUB_VG4_M4Z4Z_S 6480 UINT64_C(3245348888), // SUB_VG4_M4ZZ_D 6481 UINT64_C(3241154584), // SUB_VG4_M4ZZ_S 6482 UINT64_C(3252755480), // SUB_VG4_M4Z_D 6483 UINT64_C(3248561176), // SUB_VG4_M4Z_S 6484 UINT64_C(622968832), // SUB_ZI_B 6485 UINT64_C(635551744), // SUB_ZI_D 6486 UINT64_C(627163136), // SUB_ZI_H 6487 UINT64_C(631357440), // SUB_ZI_S 6488 UINT64_C(67174400), // SUB_ZPmZ_B 6489 UINT64_C(79757312), // SUB_ZPmZ_D 6490 UINT64_C(71368704), // SUB_ZPmZ_H 6491 UINT64_C(75563008), // SUB_ZPmZ_S 6492 UINT64_C(69207040), // SUB_ZZZ_B 6493 UINT64_C(81789952), // SUB_ZZZ_D 6494 UINT64_C(73401344), // SUB_ZZZ_H 6495 UINT64_C(77595648), // SUB_ZZZ_S 6496 UINT64_C(1847624704), // SUBv16i8 6497 UINT64_C(2128643072), // SUBv1i64 6498 UINT64_C(782271488), // SUBv2i32 6499 UINT64_C(1860207616), // SUBv2i64 6500 UINT64_C(778077184), // SUBv4i16 6501 UINT64_C(1856013312), // SUBv4i32 6502 UINT64_C(1851819008), // SUBv8i16 6503 UINT64_C(773882880), // SUBv8i8 6504 UINT64_C(3243249720), // SUDOT_VG2_M2ZZI_BToS 6505 UINT64_C(3240104984), // SUDOT_VG2_M2ZZ_BToS 6506 UINT64_C(3243282488), // SUDOT_VG4_M4ZZI_BToS 6507 UINT64_C(3241153560), // SUDOT_VG4_M4ZZ_BToS 6508 UINT64_C(1151343616), // SUDOT_ZZZI 6509 UINT64_C(1325461504), // SUDOTlanev16i8 6510 UINT64_C(251719680), // SUDOTlanev8i8 6511 UINT64_C(3238002708), // SUMLALL_MZZI_BtoS 6512 UINT64_C(3239051312), // SUMLALL_VG2_M2ZZI_BtoS 6513 UINT64_C(3240099860), // SUMLALL_VG2_M2ZZ_BtoS 6514 UINT64_C(3239084080), // SUMLALL_VG4_M4ZZI_BtoS 6515 UINT64_C(3241148436), // SUMLALL_VG4_M4ZZ_BtoS 6516 UINT64_C(2699034624), // SUMOPA_MPPZZ_D 6517 UINT64_C(2694840320), // SUMOPA_MPPZZ_S 6518 UINT64_C(2699034640), // SUMOPS_MPPZZ_D 6519 UINT64_C(2694840336), // SUMOPS_MPPZZ_S 6520 UINT64_C(99694592), // SUNPKHI_ZZ_D 6521 UINT64_C(91305984), // SUNPKHI_ZZ_H 6522 UINT64_C(95500288), // SUNPKHI_ZZ_S 6523 UINT64_C(99629056), // SUNPKLO_ZZ_D 6524 UINT64_C(91240448), // SUNPKLO_ZZ_H 6525 UINT64_C(95434752), // SUNPKLO_ZZ_S 6526 UINT64_C(3253067776), // SUNPK_VG2_2ZZ_D 6527 UINT64_C(3244679168), // SUNPK_VG2_2ZZ_H 6528 UINT64_C(3248873472), // SUNPK_VG2_2ZZ_S 6529 UINT64_C(3254116352), // SUNPK_VG4_4Z2Z_D 6530 UINT64_C(3245727744), // SUNPK_VG4_4Z2Z_H 6531 UINT64_C(3249922048), // SUNPK_VG4_4Z2Z_S 6532 UINT64_C(1142718464), // SUQADD_ZPmZ_B 6533 UINT64_C(1155301376), // SUQADD_ZPmZ_D 6534 UINT64_C(1146912768), // SUQADD_ZPmZ_H 6535 UINT64_C(1151107072), // SUQADD_ZPmZ_S 6536 UINT64_C(1310734336), // SUQADDv16i8 6537 UINT64_C(1583364096), // SUQADDv1i16 6538 UINT64_C(1587558400), // SUQADDv1i32 6539 UINT64_C(1591752704), // SUQADDv1i64 6540 UINT64_C(1579169792), // SUQADDv1i8 6541 UINT64_C(245381120), // SUQADDv2i32 6542 UINT64_C(1323317248), // SUQADDv2i64 6543 UINT64_C(241186816), // SUQADDv4i16 6544 UINT64_C(1319122944), // SUQADDv4i32 6545 UINT64_C(1314928640), // SUQADDv8i16 6546 UINT64_C(236992512), // SUQADDv8i8 6547 UINT64_C(3243278392), // SUVDOT_VG4_M4ZZI_BToS 6548 UINT64_C(3556769793), // SVC 6549 UINT64_C(3243245600), // SVDOT_VG2_M2ZZI_HtoS 6550 UINT64_C(3243278368), // SVDOT_VG4_M4ZZI_BtoS 6551 UINT64_C(3251669000), // SVDOT_VG4_M4ZZI_HtoD 6552 UINT64_C(950042624), // SWPAB 6553 UINT64_C(2023784448), // SWPAH 6554 UINT64_C(954236928), // SWPALB 6555 UINT64_C(2027978752), // SWPALH 6556 UINT64_C(3101720576), // SWPALW 6557 UINT64_C(4175462400), // SWPALX 6558 UINT64_C(3097526272), // SWPAW 6559 UINT64_C(4171268096), // SWPAX 6560 UINT64_C(941654016), // SWPB 6561 UINT64_C(2015395840), // SWPH 6562 UINT64_C(945848320), // SWPLB 6563 UINT64_C(2019590144), // SWPLH 6564 UINT64_C(3093331968), // SWPLW 6565 UINT64_C(4167073792), // SWPLX 6566 UINT64_C(421560320), // SWPP 6567 UINT64_C(429948928), // SWPPA 6568 UINT64_C(434143232), // SWPPAL 6569 UINT64_C(425754624), // SWPPL 6570 UINT64_C(3089137664), // SWPW 6571 UINT64_C(4162879488), // SWPX 6572 UINT64_C(80781312), // SXTB_ZPmZ_D 6573 UINT64_C(72392704), // SXTB_ZPmZ_H 6574 UINT64_C(76587008), // SXTB_ZPmZ_S 6575 UINT64_C(80912384), // SXTH_ZPmZ_D 6576 UINT64_C(76718080), // SXTH_ZPmZ_S 6577 UINT64_C(81043456), // SXTW_ZPmZ_D 6578 UINT64_C(3576168448), // SYSLxt 6579 UINT64_C(3578265600), // SYSPxt 6580 UINT64_C(3578265631), // SYSPxt_XZR 6581 UINT64_C(3574071296), // SYSxt 6582 UINT64_C(1140914176), // TBLQ_ZZZ_B 6583 UINT64_C(1153497088), // TBLQ_ZZZ_D 6584 UINT64_C(1145108480), // TBLQ_ZZZ_H 6585 UINT64_C(1149302784), // TBLQ_ZZZ_S 6586 UINT64_C(85993472), // TBL_ZZZZ_B 6587 UINT64_C(98576384), // TBL_ZZZZ_D 6588 UINT64_C(90187776), // TBL_ZZZZ_H 6589 UINT64_C(94382080), // TBL_ZZZZ_S 6590 UINT64_C(85995520), // TBL_ZZZ_B 6591 UINT64_C(98578432), // TBL_ZZZ_D 6592 UINT64_C(90189824), // TBL_ZZZ_H 6593 UINT64_C(94384128), // TBL_ZZZ_S 6594 UINT64_C(1308647424), // TBLv16i8Four 6595 UINT64_C(1308622848), // TBLv16i8One 6596 UINT64_C(1308639232), // TBLv16i8Three 6597 UINT64_C(1308631040), // TBLv16i8Two 6598 UINT64_C(234905600), // TBLv8i8Four 6599 UINT64_C(234881024), // TBLv8i8One 6600 UINT64_C(234897408), // TBLv8i8Three 6601 UINT64_C(234889216), // TBLv8i8Two 6602 UINT64_C(922746880), // TBNZW 6603 UINT64_C(3070230528), // TBNZX 6604 UINT64_C(85996544), // TBXQ_ZZZ_B 6605 UINT64_C(98579456), // TBXQ_ZZZ_D 6606 UINT64_C(90190848), // TBXQ_ZZZ_H 6607 UINT64_C(94385152), // TBXQ_ZZZ_S 6608 UINT64_C(85994496), // TBX_ZZZ_B 6609 UINT64_C(98577408), // TBX_ZZZ_D 6610 UINT64_C(90188800), // TBX_ZZZ_H 6611 UINT64_C(94383104), // TBX_ZZZ_S 6612 UINT64_C(1308651520), // TBXv16i8Four 6613 UINT64_C(1308626944), // TBXv16i8One 6614 UINT64_C(1308643328), // TBXv16i8Three 6615 UINT64_C(1308635136), // TBXv16i8Two 6616 UINT64_C(234909696), // TBXv8i8Four 6617 UINT64_C(234885120), // TBXv8i8One 6618 UINT64_C(234901504), // TBXv8i8Three 6619 UINT64_C(234893312), // TBXv8i8Two 6620 UINT64_C(905969664), // TBZW 6621 UINT64_C(3053453312), // TBZX 6622 UINT64_C(3563061248), // TCANCEL 6623 UINT64_C(3573756031), // TCOMMIT 6624 UINT64_C(3574297312), // TRCIT 6625 UINT64_C(86003712), // TRN1_PPP_B 6626 UINT64_C(98586624), // TRN1_PPP_D 6627 UINT64_C(90198016), // TRN1_PPP_H 6628 UINT64_C(94392320), // TRN1_PPP_S 6629 UINT64_C(86011904), // TRN1_ZZZ_B 6630 UINT64_C(98594816), // TRN1_ZZZ_D 6631 UINT64_C(90206208), // TRN1_ZZZ_H 6632 UINT64_C(94377984), // TRN1_ZZZ_Q 6633 UINT64_C(94400512), // TRN1_ZZZ_S 6634 UINT64_C(1308633088), // TRN1v16i8 6635 UINT64_C(243279872), // TRN1v2i32 6636 UINT64_C(1321216000), // TRN1v2i64 6637 UINT64_C(239085568), // TRN1v4i16 6638 UINT64_C(1317021696), // TRN1v4i32 6639 UINT64_C(1312827392), // TRN1v8i16 6640 UINT64_C(234891264), // TRN1v8i8 6641 UINT64_C(86004736), // TRN2_PPP_B 6642 UINT64_C(98587648), // TRN2_PPP_D 6643 UINT64_C(90199040), // TRN2_PPP_H 6644 UINT64_C(94393344), // TRN2_PPP_S 6645 UINT64_C(86012928), // TRN2_ZZZ_B 6646 UINT64_C(98595840), // TRN2_ZZZ_D 6647 UINT64_C(90207232), // TRN2_ZZZ_H 6648 UINT64_C(94379008), // TRN2_ZZZ_Q 6649 UINT64_C(94401536), // TRN2_ZZZ_S 6650 UINT64_C(1308649472), // TRN2v16i8 6651 UINT64_C(243296256), // TRN2v2i32 6652 UINT64_C(1321232384), // TRN2v2i64 6653 UINT64_C(239101952), // TRN2v4i16 6654 UINT64_C(1317038080), // TRN2v4i32 6655 UINT64_C(1312843776), // TRN2v8i16 6656 UINT64_C(234907648), // TRN2v8i8 6657 UINT64_C(3573752415), // TSB 6658 UINT64_C(3575853152), // TSTART 6659 UINT64_C(3575853408), // TTEST 6660 UINT64_C(1170262016), // UABALB_ZZZ_D 6661 UINT64_C(1161873408), // UABALB_ZZZ_H 6662 UINT64_C(1166067712), // UABALB_ZZZ_S 6663 UINT64_C(1170263040), // UABALT_ZZZ_D 6664 UINT64_C(1161874432), // UABALT_ZZZ_H 6665 UINT64_C(1166068736), // UABALT_ZZZ_S 6666 UINT64_C(1847611392), // UABALv16i8_v8i16 6667 UINT64_C(782258176), // UABALv2i32_v2i64 6668 UINT64_C(778063872), // UABALv4i16_v4i32 6669 UINT64_C(1856000000), // UABALv4i32_v2i64 6670 UINT64_C(1851805696), // UABALv8i16_v4i32 6671 UINT64_C(773869568), // UABALv8i8_v8i16 6672 UINT64_C(1157692416), // UABA_ZZZ_B 6673 UINT64_C(1170275328), // UABA_ZZZ_D 6674 UINT64_C(1161886720), // UABA_ZZZ_H 6675 UINT64_C(1166081024), // UABA_ZZZ_S 6676 UINT64_C(1847622656), // UABAv16i8 6677 UINT64_C(782269440), // UABAv2i32 6678 UINT64_C(778075136), // UABAv4i16 6679 UINT64_C(1856011264), // UABAv4i32 6680 UINT64_C(1851816960), // UABAv8i16 6681 UINT64_C(773880832), // UABAv8i8 6682 UINT64_C(1170225152), // UABDLB_ZZZ_D 6683 UINT64_C(1161836544), // UABDLB_ZZZ_H 6684 UINT64_C(1166030848), // UABDLB_ZZZ_S 6685 UINT64_C(1170226176), // UABDLT_ZZZ_D 6686 UINT64_C(1161837568), // UABDLT_ZZZ_H 6687 UINT64_C(1166031872), // UABDLT_ZZZ_S 6688 UINT64_C(1847619584), // UABDLv16i8_v8i16 6689 UINT64_C(782266368), // UABDLv2i32_v2i64 6690 UINT64_C(778072064), // UABDLv4i16_v4i32 6691 UINT64_C(1856008192), // UABDLv4i32_v2i64 6692 UINT64_C(1851813888), // UABDLv8i16_v4i32 6693 UINT64_C(773877760), // UABDLv8i8_v8i16 6694 UINT64_C(67960832), // UABD_ZPmZ_B 6695 UINT64_C(80543744), // UABD_ZPmZ_D 6696 UINT64_C(72155136), // UABD_ZPmZ_H 6697 UINT64_C(76349440), // UABD_ZPmZ_S 6698 UINT64_C(1847620608), // UABDv16i8 6699 UINT64_C(782267392), // UABDv2i32 6700 UINT64_C(778073088), // UABDv4i16 6701 UINT64_C(1856009216), // UABDv4i32 6702 UINT64_C(1851814912), // UABDv8i16 6703 UINT64_C(773878784), // UABDv8i8 6704 UINT64_C(1153802240), // UADALP_ZPmZ_D 6705 UINT64_C(1145413632), // UADALP_ZPmZ_H 6706 UINT64_C(1149607936), // UADALP_ZPmZ_S 6707 UINT64_C(1847617536), // UADALPv16i8_v8i16 6708 UINT64_C(782264320), // UADALPv2i32_v1i64 6709 UINT64_C(778070016), // UADALPv4i16_v2i32 6710 UINT64_C(1856006144), // UADALPv4i32_v2i64 6711 UINT64_C(1851811840), // UADALPv8i16_v4i32 6712 UINT64_C(773875712), // UADALPv8i8_v4i16 6713 UINT64_C(1170212864), // UADDLB_ZZZ_D 6714 UINT64_C(1161824256), // UADDLB_ZZZ_H 6715 UINT64_C(1166018560), // UADDLB_ZZZ_S 6716 UINT64_C(1847601152), // UADDLPv16i8_v8i16 6717 UINT64_C(782247936), // UADDLPv2i32_v1i64 6718 UINT64_C(778053632), // UADDLPv4i16_v2i32 6719 UINT64_C(1855989760), // UADDLPv4i32_v2i64 6720 UINT64_C(1851795456), // UADDLPv8i16_v4i32 6721 UINT64_C(773859328), // UADDLPv8i8_v4i16 6722 UINT64_C(1170213888), // UADDLT_ZZZ_D 6723 UINT64_C(1161825280), // UADDLT_ZZZ_H 6724 UINT64_C(1166019584), // UADDLT_ZZZ_S 6725 UINT64_C(1848653824), // UADDLVv16i8v 6726 UINT64_C(779106304), // UADDLVv4i16v 6727 UINT64_C(1857042432), // UADDLVv4i32v 6728 UINT64_C(1852848128), // UADDLVv8i16v 6729 UINT64_C(774912000), // UADDLVv8i8v 6730 UINT64_C(1847590912), // UADDLv16i8_v8i16 6731 UINT64_C(782237696), // UADDLv2i32_v2i64 6732 UINT64_C(778043392), // UADDLv4i16_v4i32 6733 UINT64_C(1855979520), // UADDLv4i32_v2i64 6734 UINT64_C(1851785216), // UADDLv8i16_v4i32 6735 UINT64_C(773849088), // UADDLv8i8_v8i16 6736 UINT64_C(67182592), // UADDV_VPZ_B 6737 UINT64_C(79765504), // UADDV_VPZ_D 6738 UINT64_C(71376896), // UADDV_VPZ_H 6739 UINT64_C(75571200), // UADDV_VPZ_S 6740 UINT64_C(1170229248), // UADDWB_ZZZ_D 6741 UINT64_C(1161840640), // UADDWB_ZZZ_H 6742 UINT64_C(1166034944), // UADDWB_ZZZ_S 6743 UINT64_C(1170230272), // UADDWT_ZZZ_D 6744 UINT64_C(1161841664), // UADDWT_ZZZ_H 6745 UINT64_C(1166035968), // UADDWT_ZZZ_S 6746 UINT64_C(1847595008), // UADDWv16i8_v8i16 6747 UINT64_C(782241792), // UADDWv2i32_v2i64 6748 UINT64_C(778047488), // UADDWv4i16_v4i32 6749 UINT64_C(1855983616), // UADDWv4i32_v2i64 6750 UINT64_C(1851789312), // UADDWv8i16_v4i32 6751 UINT64_C(773853184), // UADDWv8i8_v8i16 6752 UINT64_C(1392508928), // UBFMWri 6753 UINT64_C(3544186880), // UBFMXri 6754 UINT64_C(3240150017), // UCLAMP_VG2_2Z2Z_B 6755 UINT64_C(3252732929), // UCLAMP_VG2_2Z2Z_D 6756 UINT64_C(3244344321), // UCLAMP_VG2_2Z2Z_H 6757 UINT64_C(3248538625), // UCLAMP_VG2_2Z2Z_S 6758 UINT64_C(3240152065), // UCLAMP_VG4_4Z4Z_B 6759 UINT64_C(3252734977), // UCLAMP_VG4_4Z4Z_D 6760 UINT64_C(3244346369), // UCLAMP_VG4_4Z4Z_H 6761 UINT64_C(3248540673), // UCLAMP_VG4_4Z4Z_S 6762 UINT64_C(1140900864), // UCLAMP_ZZZ_B 6763 UINT64_C(1153483776), // UCLAMP_ZZZ_D 6764 UINT64_C(1145095168), // UCLAMP_ZZZ_H 6765 UINT64_C(1149289472), // UCLAMP_ZZZ_S 6766 UINT64_C(507740160), // UCVTFSWDri 6767 UINT64_C(516128768), // UCVTFSWHri 6768 UINT64_C(503545856), // UCVTFSWSri 6769 UINT64_C(2655191040), // UCVTFSXDri 6770 UINT64_C(2663579648), // UCVTFSXHri 6771 UINT64_C(2650996736), // UCVTFSXSri 6772 UINT64_C(509804544), // UCVTFUWDri 6773 UINT64_C(518193152), // UCVTFUWHri 6774 UINT64_C(505610240), // UCVTFUWSri 6775 UINT64_C(2657288192), // UCVTFUXDri 6776 UINT64_C(2665676800), // UCVTFUXHri 6777 UINT64_C(2653093888), // UCVTFUXSri 6778 UINT64_C(3240288288), // UCVTF_2Z2Z_StoS 6779 UINT64_C(3241336864), // UCVTF_4Z4Z_StoS 6780 UINT64_C(1708630016), // UCVTF_ZPmZ_DtoD 6781 UINT64_C(1700241408), // UCVTF_ZPmZ_DtoH 6782 UINT64_C(1708498944), // UCVTF_ZPmZ_DtoS 6783 UINT64_C(1699979264), // UCVTF_ZPmZ_HtoH 6784 UINT64_C(1708236800), // UCVTF_ZPmZ_StoD 6785 UINT64_C(1700110336), // UCVTF_ZPmZ_StoH 6786 UINT64_C(1704304640), // UCVTF_ZPmZ_StoS 6787 UINT64_C(2134959104), // UCVTFd 6788 UINT64_C(2131813376), // UCVTFh 6789 UINT64_C(2132861952), // UCVTFs 6790 UINT64_C(2121914368), // UCVTFv1i16 6791 UINT64_C(2116147200), // UCVTFv1i32 6792 UINT64_C(2120341504), // UCVTFv1i64 6793 UINT64_C(773969920), // UCVTFv2f32 6794 UINT64_C(1851906048), // UCVTFv2f64 6795 UINT64_C(790684672), // UCVTFv2i32_shift 6796 UINT64_C(1866523648), // UCVTFv2i64_shift 6797 UINT64_C(779737088), // UCVTFv4f16 6798 UINT64_C(1847711744), // UCVTFv4f32 6799 UINT64_C(789636096), // UCVTFv4i16_shift 6800 UINT64_C(1864426496), // UCVTFv4i32_shift 6801 UINT64_C(1853478912), // UCVTFv8f16 6802 UINT64_C(1863377920), // UCVTFv8i16_shift 6803 UINT64_C(0), // UDF 6804 UINT64_C(81199104), // UDIVR_ZPmZ_D 6805 UINT64_C(77004800), // UDIVR_ZPmZ_S 6806 UINT64_C(448792576), // UDIVWr 6807 UINT64_C(2596276224), // UDIVXr 6808 UINT64_C(81068032), // UDIV_ZPmZ_D 6809 UINT64_C(76873728), // UDIV_ZPmZ_S 6810 UINT64_C(3248493584), // UDOT_VG2_M2Z2Z_BtoS 6811 UINT64_C(3252687888), // UDOT_VG2_M2Z2Z_HtoD 6812 UINT64_C(3252687896), // UDOT_VG2_M2Z2Z_HtoS 6813 UINT64_C(3243249712), // UDOT_VG2_M2ZZI_BToS 6814 UINT64_C(3243249680), // UDOT_VG2_M2ZZI_HToS 6815 UINT64_C(3251634200), // UDOT_VG2_M2ZZI_HtoD 6816 UINT64_C(3240104976), // UDOT_VG2_M2ZZ_BtoS 6817 UINT64_C(3244299280), // UDOT_VG2_M2ZZ_HtoD 6818 UINT64_C(3244299288), // UDOT_VG2_M2ZZ_HtoS 6819 UINT64_C(3248559120), // UDOT_VG4_M4Z4Z_BtoS 6820 UINT64_C(3252753424), // UDOT_VG4_M4Z4Z_HtoD 6821 UINT64_C(3252753432), // UDOT_VG4_M4Z4Z_HtoS 6822 UINT64_C(3243282480), // UDOT_VG4_M4ZZI_BtoS 6823 UINT64_C(3243282448), // UDOT_VG4_M4ZZI_HToS 6824 UINT64_C(3251666968), // UDOT_VG4_M4ZZI_HtoD 6825 UINT64_C(3241153552), // UDOT_VG4_M4ZZ_BtoS 6826 UINT64_C(3245347856), // UDOT_VG4_M4ZZ_HtoD 6827 UINT64_C(3245347864), // UDOT_VG4_M4ZZ_HtoS 6828 UINT64_C(1155531776), // UDOT_ZZZI_D 6829 UINT64_C(1149291520), // UDOT_ZZZI_HtoS 6830 UINT64_C(1151337472), // UDOT_ZZZI_S 6831 UINT64_C(1153434624), // UDOT_ZZZ_D 6832 UINT64_C(1140902912), // UDOT_ZZZ_HtoS 6833 UINT64_C(1149240320), // UDOT_ZZZ_S 6834 UINT64_C(1870716928), // UDOTlanev16i8 6835 UINT64_C(796975104), // UDOTlanev8i8 6836 UINT64_C(1853920256), // UDOTv16i8 6837 UINT64_C(780178432), // UDOTv8i8 6838 UINT64_C(1141997568), // UHADD_ZPmZ_B 6839 UINT64_C(1154580480), // UHADD_ZPmZ_D 6840 UINT64_C(1146191872), // UHADD_ZPmZ_H 6841 UINT64_C(1150386176), // UHADD_ZPmZ_S 6842 UINT64_C(1847591936), // UHADDv16i8 6843 UINT64_C(782238720), // UHADDv2i32 6844 UINT64_C(778044416), // UHADDv4i16 6845 UINT64_C(1855980544), // UHADDv4i32 6846 UINT64_C(1851786240), // UHADDv8i16 6847 UINT64_C(773850112), // UHADDv8i8 6848 UINT64_C(1142390784), // UHSUBR_ZPmZ_B 6849 UINT64_C(1154973696), // UHSUBR_ZPmZ_D 6850 UINT64_C(1146585088), // UHSUBR_ZPmZ_H 6851 UINT64_C(1150779392), // UHSUBR_ZPmZ_S 6852 UINT64_C(1142128640), // UHSUB_ZPmZ_B 6853 UINT64_C(1154711552), // UHSUB_ZPmZ_D 6854 UINT64_C(1146322944), // UHSUB_ZPmZ_H 6855 UINT64_C(1150517248), // UHSUB_ZPmZ_S 6856 UINT64_C(1847600128), // UHSUBv16i8 6857 UINT64_C(782246912), // UHSUBv2i32 6858 UINT64_C(778052608), // UHSUBv4i16 6859 UINT64_C(1855988736), // UHSUBv4i32 6860 UINT64_C(1851794432), // UHSUBv8i16 6861 UINT64_C(773858304), // UHSUBv8i8 6862 UINT64_C(2610954240), // UMADDLrrr 6863 UINT64_C(1142267904), // UMAXP_ZPmZ_B 6864 UINT64_C(1154850816), // UMAXP_ZPmZ_D 6865 UINT64_C(1146462208), // UMAXP_ZPmZ_H 6866 UINT64_C(1150656512), // UMAXP_ZPmZ_S 6867 UINT64_C(1847632896), // UMAXPv16i8 6868 UINT64_C(782279680), // UMAXPv2i32 6869 UINT64_C(778085376), // UMAXPv4i16 6870 UINT64_C(1856021504), // UMAXPv4i32 6871 UINT64_C(1851827200), // UMAXPv8i16 6872 UINT64_C(773891072), // UMAXPv8i8 6873 UINT64_C(67969024), // UMAXQV_VPZ_B 6874 UINT64_C(80551936), // UMAXQV_VPZ_D 6875 UINT64_C(72163328), // UMAXQV_VPZ_H 6876 UINT64_C(76357632), // UMAXQV_VPZ_S 6877 UINT64_C(67706880), // UMAXV_VPZ_B 6878 UINT64_C(80289792), // UMAXV_VPZ_D 6879 UINT64_C(71901184), // UMAXV_VPZ_H 6880 UINT64_C(76095488), // UMAXV_VPZ_S 6881 UINT64_C(1848682496), // UMAXVv16i8v 6882 UINT64_C(779134976), // UMAXVv4i16v 6883 UINT64_C(1857071104), // UMAXVv4i32v 6884 UINT64_C(1852876800), // UMAXVv8i16v 6885 UINT64_C(774940672), // UMAXVv8i8v 6886 UINT64_C(298057728), // UMAXWri 6887 UINT64_C(448816128), // UMAXWrr 6888 UINT64_C(2445541376), // UMAXXri 6889 UINT64_C(2596299776), // UMAXXrr 6890 UINT64_C(3240144897), // UMAX_VG2_2Z2Z_B 6891 UINT64_C(3252727809), // UMAX_VG2_2Z2Z_D 6892 UINT64_C(3244339201), // UMAX_VG2_2Z2Z_H 6893 UINT64_C(3248533505), // UMAX_VG2_2Z2Z_S 6894 UINT64_C(3240140801), // UMAX_VG2_2ZZ_B 6895 UINT64_C(3252723713), // UMAX_VG2_2ZZ_D 6896 UINT64_C(3244335105), // UMAX_VG2_2ZZ_H 6897 UINT64_C(3248529409), // UMAX_VG2_2ZZ_S 6898 UINT64_C(3240146945), // UMAX_VG4_4Z4Z_B 6899 UINT64_C(3252729857), // UMAX_VG4_4Z4Z_D 6900 UINT64_C(3244341249), // UMAX_VG4_4Z4Z_H 6901 UINT64_C(3248535553), // UMAX_VG4_4Z4Z_S 6902 UINT64_C(3240142849), // UMAX_VG4_4ZZ_B 6903 UINT64_C(3252725761), // UMAX_VG4_4ZZ_D 6904 UINT64_C(3244337153), // UMAX_VG4_4ZZ_H 6905 UINT64_C(3248531457), // UMAX_VG4_4ZZ_S 6906 UINT64_C(623493120), // UMAX_ZI_B 6907 UINT64_C(636076032), // UMAX_ZI_D 6908 UINT64_C(627687424), // UMAX_ZI_H 6909 UINT64_C(631881728), // UMAX_ZI_S 6910 UINT64_C(67698688), // UMAX_ZPmZ_B 6911 UINT64_C(80281600), // UMAX_ZPmZ_D 6912 UINT64_C(71892992), // UMAX_ZPmZ_H 6913 UINT64_C(76087296), // UMAX_ZPmZ_S 6914 UINT64_C(1847616512), // UMAXv16i8 6915 UINT64_C(782263296), // UMAXv2i32 6916 UINT64_C(778068992), // UMAXv4i16 6917 UINT64_C(1856005120), // UMAXv4i32 6918 UINT64_C(1851810816), // UMAXv8i16 6919 UINT64_C(773874688), // UMAXv8i8 6920 UINT64_C(1142398976), // UMINP_ZPmZ_B 6921 UINT64_C(1154981888), // UMINP_ZPmZ_D 6922 UINT64_C(1146593280), // UMINP_ZPmZ_H 6923 UINT64_C(1150787584), // UMINP_ZPmZ_S 6924 UINT64_C(1847634944), // UMINPv16i8 6925 UINT64_C(782281728), // UMINPv2i32 6926 UINT64_C(778087424), // UMINPv4i16 6927 UINT64_C(1856023552), // UMINPv4i32 6928 UINT64_C(1851829248), // UMINPv8i16 6929 UINT64_C(773893120), // UMINPv8i8 6930 UINT64_C(68100096), // UMINQV_VPZ_B 6931 UINT64_C(80683008), // UMINQV_VPZ_D 6932 UINT64_C(72294400), // UMINQV_VPZ_H 6933 UINT64_C(76488704), // UMINQV_VPZ_S 6934 UINT64_C(67837952), // UMINV_VPZ_B 6935 UINT64_C(80420864), // UMINV_VPZ_D 6936 UINT64_C(72032256), // UMINV_VPZ_H 6937 UINT64_C(76226560), // UMINV_VPZ_S 6938 UINT64_C(1848748032), // UMINVv16i8v 6939 UINT64_C(779200512), // UMINVv4i16v 6940 UINT64_C(1857136640), // UMINVv4i32v 6941 UINT64_C(1852942336), // UMINVv8i16v 6942 UINT64_C(775006208), // UMINVv8i8v 6943 UINT64_C(298582016), // UMINWri 6944 UINT64_C(448818176), // UMINWrr 6945 UINT64_C(2446065664), // UMINXri 6946 UINT64_C(2596301824), // UMINXrr 6947 UINT64_C(3240144929), // UMIN_VG2_2Z2Z_B 6948 UINT64_C(3252727841), // UMIN_VG2_2Z2Z_D 6949 UINT64_C(3244339233), // UMIN_VG2_2Z2Z_H 6950 UINT64_C(3248533537), // UMIN_VG2_2Z2Z_S 6951 UINT64_C(3240140833), // UMIN_VG2_2ZZ_B 6952 UINT64_C(3252723745), // UMIN_VG2_2ZZ_D 6953 UINT64_C(3244335137), // UMIN_VG2_2ZZ_H 6954 UINT64_C(3248529441), // UMIN_VG2_2ZZ_S 6955 UINT64_C(3240146977), // UMIN_VG4_4Z4Z_B 6956 UINT64_C(3252729889), // UMIN_VG4_4Z4Z_D 6957 UINT64_C(3244341281), // UMIN_VG4_4Z4Z_H 6958 UINT64_C(3248535585), // UMIN_VG4_4Z4Z_S 6959 UINT64_C(3240142881), // UMIN_VG4_4ZZ_B 6960 UINT64_C(3252725793), // UMIN_VG4_4ZZ_D 6961 UINT64_C(3244337185), // UMIN_VG4_4ZZ_H 6962 UINT64_C(3248531489), // UMIN_VG4_4ZZ_S 6963 UINT64_C(623624192), // UMIN_ZI_B 6964 UINT64_C(636207104), // UMIN_ZI_D 6965 UINT64_C(627818496), // UMIN_ZI_H 6966 UINT64_C(632012800), // UMIN_ZI_S 6967 UINT64_C(67829760), // UMIN_ZPmZ_B 6968 UINT64_C(80412672), // UMIN_ZPmZ_D 6969 UINT64_C(72024064), // UMIN_ZPmZ_H 6970 UINT64_C(76218368), // UMIN_ZPmZ_S 6971 UINT64_C(1847618560), // UMINv16i8 6972 UINT64_C(782265344), // UMINv2i32 6973 UINT64_C(778071040), // UMINv4i16 6974 UINT64_C(1856007168), // UMINv4i32 6975 UINT64_C(1851812864), // UMINv8i16 6976 UINT64_C(773876736), // UMINv8i8 6977 UINT64_C(1155567616), // UMLALB_ZZZI_D 6978 UINT64_C(1151373312), // UMLALB_ZZZI_S 6979 UINT64_C(1153452032), // UMLALB_ZZZ_D 6980 UINT64_C(1145063424), // UMLALB_ZZZ_H 6981 UINT64_C(1149257728), // UMLALB_ZZZ_S 6982 UINT64_C(3238002704), // UMLALL_MZZI_BtoS 6983 UINT64_C(3246391312), // UMLALL_MZZI_HtoD 6984 UINT64_C(3240100880), // UMLALL_MZZ_BtoS 6985 UINT64_C(3244295184), // UMLALL_MZZ_HtoD 6986 UINT64_C(3248488464), // UMLALL_VG2_M2Z2Z_BtoS 6987 UINT64_C(3252682768), // UMLALL_VG2_M2Z2Z_HtoD 6988 UINT64_C(3239051280), // UMLALL_VG2_M2ZZI_BtoS 6989 UINT64_C(3247439888), // UMLALL_VG2_M2ZZI_HtoD 6990 UINT64_C(3240099856), // UMLALL_VG2_M2ZZ_BtoS 6991 UINT64_C(3244294160), // UMLALL_VG2_M2ZZ_HtoD 6992 UINT64_C(3248554000), // UMLALL_VG4_M4Z4Z_BtoS 6993 UINT64_C(3252748304), // UMLALL_VG4_M4Z4Z_HtoD 6994 UINT64_C(3239084048), // UMLALL_VG4_M4ZZI_BtoS 6995 UINT64_C(3247472656), // UMLALL_VG4_M4ZZI_HtoD 6996 UINT64_C(3241148432), // UMLALL_VG4_M4ZZ_BtoS 6997 UINT64_C(3245342736), // UMLALL_VG4_M4ZZ_HtoD 6998 UINT64_C(1155568640), // UMLALT_ZZZI_D 6999 UINT64_C(1151374336), // UMLALT_ZZZI_S 7000 UINT64_C(1153453056), // UMLALT_ZZZ_D 7001 UINT64_C(1145064448), // UMLALT_ZZZ_H 7002 UINT64_C(1149258752), // UMLALT_ZZZ_S 7003 UINT64_C(3250589712), // UMLAL_MZZI_S 7004 UINT64_C(3244297232), // UMLAL_MZZ_S 7005 UINT64_C(3252684816), // UMLAL_VG2_M2Z2Z_S 7006 UINT64_C(3251638288), // UMLAL_VG2_M2ZZI_S 7007 UINT64_C(3244296208), // UMLAL_VG2_M2ZZ_S 7008 UINT64_C(3252750352), // UMLAL_VG4_M4Z4Z_S 7009 UINT64_C(3251671056), // UMLAL_VG4_M4ZZI_S 7010 UINT64_C(3245344784), // UMLAL_VG4_M4ZZ_S 7011 UINT64_C(1847623680), // UMLALv16i8_v8i16 7012 UINT64_C(796925952), // UMLALv2i32_indexed 7013 UINT64_C(782270464), // UMLALv2i32_v2i64 7014 UINT64_C(792731648), // UMLALv4i16_indexed 7015 UINT64_C(778076160), // UMLALv4i16_v4i32 7016 UINT64_C(1870667776), // UMLALv4i32_indexed 7017 UINT64_C(1856012288), // UMLALv4i32_v2i64 7018 UINT64_C(1866473472), // UMLALv8i16_indexed 7019 UINT64_C(1851817984), // UMLALv8i16_v4i32 7020 UINT64_C(773881856), // UMLALv8i8_v8i16 7021 UINT64_C(1155575808), // UMLSLB_ZZZI_D 7022 UINT64_C(1151381504), // UMLSLB_ZZZI_S 7023 UINT64_C(1153456128), // UMLSLB_ZZZ_D 7024 UINT64_C(1145067520), // UMLSLB_ZZZ_H 7025 UINT64_C(1149261824), // UMLSLB_ZZZ_S 7026 UINT64_C(3238002712), // UMLSLL_MZZI_BtoS 7027 UINT64_C(3246391320), // UMLSLL_MZZI_HtoD 7028 UINT64_C(3240100888), // UMLSLL_MZZ_BtoS 7029 UINT64_C(3244295192), // UMLSLL_MZZ_HtoD 7030 UINT64_C(3248488472), // UMLSLL_VG2_M2Z2Z_BtoS 7031 UINT64_C(3252682776), // UMLSLL_VG2_M2Z2Z_HtoD 7032 UINT64_C(3239051288), // UMLSLL_VG2_M2ZZI_BtoS 7033 UINT64_C(3247439896), // UMLSLL_VG2_M2ZZI_HtoD 7034 UINT64_C(3240099864), // UMLSLL_VG2_M2ZZ_BtoS 7035 UINT64_C(3244294168), // UMLSLL_VG2_M2ZZ_HtoD 7036 UINT64_C(3248554008), // UMLSLL_VG4_M4Z4Z_BtoS 7037 UINT64_C(3252748312), // UMLSLL_VG4_M4Z4Z_HtoD 7038 UINT64_C(3239084056), // UMLSLL_VG4_M4ZZI_BtoS 7039 UINT64_C(3247472664), // UMLSLL_VG4_M4ZZI_HtoD 7040 UINT64_C(3241148440), // UMLSLL_VG4_M4ZZ_BtoS 7041 UINT64_C(3245342744), // UMLSLL_VG4_M4ZZ_HtoD 7042 UINT64_C(1155576832), // UMLSLT_ZZZI_D 7043 UINT64_C(1151382528), // UMLSLT_ZZZI_S 7044 UINT64_C(1153457152), // UMLSLT_ZZZ_D 7045 UINT64_C(1145068544), // UMLSLT_ZZZ_H 7046 UINT64_C(1149262848), // UMLSLT_ZZZ_S 7047 UINT64_C(3250589720), // UMLSL_MZZI_S 7048 UINT64_C(3244297240), // UMLSL_MZZ_S 7049 UINT64_C(3252684824), // UMLSL_VG2_M2Z2Z_S 7050 UINT64_C(3251638296), // UMLSL_VG2_M2ZZI_S 7051 UINT64_C(3244296216), // UMLSL_VG2_M2ZZ_S 7052 UINT64_C(3252750360), // UMLSL_VG4_M4Z4Z_S 7053 UINT64_C(3251671064), // UMLSL_VG4_M4ZZI_S 7054 UINT64_C(3245344792), // UMLSL_VG4_M4ZZ_S 7055 UINT64_C(1847631872), // UMLSLv16i8_v8i16 7056 UINT64_C(796942336), // UMLSLv2i32_indexed 7057 UINT64_C(782278656), // UMLSLv2i32_v2i64 7058 UINT64_C(792748032), // UMLSLv4i16_indexed 7059 UINT64_C(778084352), // UMLSLv4i16_v4i32 7060 UINT64_C(1870684160), // UMLSLv4i32_indexed 7061 UINT64_C(1856020480), // UMLSLv4i32_v2i64 7062 UINT64_C(1866489856), // UMLSLv8i16_indexed 7063 UINT64_C(1851826176), // UMLSLv8i16_v4i32 7064 UINT64_C(773890048), // UMLSLv8i8_v8i16 7065 UINT64_C(1853924352), // UMMLA 7066 UINT64_C(1170249728), // UMMLA_ZZZ 7067 UINT64_C(2715811840), // UMOPA_MPPZZ_D 7068 UINT64_C(2709520392), // UMOPA_MPPZZ_HtoS 7069 UINT64_C(2711617536), // UMOPA_MPPZZ_S 7070 UINT64_C(2715811856), // UMOPS_MPPZZ_D 7071 UINT64_C(2709520408), // UMOPS_MPPZZ_HtoS 7072 UINT64_C(2711617552), // UMOPS_MPPZZ_S 7073 UINT64_C(235027456), // UMOVvi16 7074 UINT64_C(235027456), // UMOVvi16_idx0 7075 UINT64_C(235158528), // UMOVvi32 7076 UINT64_C(235158528), // UMOVvi32_idx0 7077 UINT64_C(1309162496), // UMOVvi64 7078 UINT64_C(1309162496), // UMOVvi64_idx0 7079 UINT64_C(234961920), // UMOVvi8 7080 UINT64_C(234961920), // UMOVvi8_idx0 7081 UINT64_C(2610987008), // UMSUBLrrr 7082 UINT64_C(68354048), // UMULH_ZPmZ_B 7083 UINT64_C(80936960), // UMULH_ZPmZ_D 7084 UINT64_C(72548352), // UMULH_ZPmZ_H 7085 UINT64_C(76742656), // UMULH_ZPmZ_S 7086 UINT64_C(69233664), // UMULH_ZZZ_B 7087 UINT64_C(81816576), // UMULH_ZZZ_D 7088 UINT64_C(73427968), // UMULH_ZZZ_H 7089 UINT64_C(77622272), // UMULH_ZZZ_S 7090 UINT64_C(2613051392), // UMULHrr 7091 UINT64_C(1155584000), // UMULLB_ZZZI_D 7092 UINT64_C(1151389696), // UMULLB_ZZZI_S 7093 UINT64_C(1170241536), // UMULLB_ZZZ_D 7094 UINT64_C(1161852928), // UMULLB_ZZZ_H 7095 UINT64_C(1166047232), // UMULLB_ZZZ_S 7096 UINT64_C(1155585024), // UMULLT_ZZZI_D 7097 UINT64_C(1151390720), // UMULLT_ZZZI_S 7098 UINT64_C(1170242560), // UMULLT_ZZZ_D 7099 UINT64_C(1161853952), // UMULLT_ZZZ_H 7100 UINT64_C(1166048256), // UMULLT_ZZZ_S 7101 UINT64_C(1847640064), // UMULLv16i8_v8i16 7102 UINT64_C(796958720), // UMULLv2i32_indexed 7103 UINT64_C(782286848), // UMULLv2i32_v2i64 7104 UINT64_C(792764416), // UMULLv4i16_indexed 7105 UINT64_C(778092544), // UMULLv4i16_v4i32 7106 UINT64_C(1870700544), // UMULLv4i32_indexed 7107 UINT64_C(1856028672), // UMULLv4i32_v2i64 7108 UINT64_C(1866506240), // UMULLv8i16_indexed 7109 UINT64_C(1851834368), // UMULLv8i16_v4i32 7110 UINT64_C(773898240), // UMULLv8i8_v8i16 7111 UINT64_C(623230976), // UQADD_ZI_B 7112 UINT64_C(635813888), // UQADD_ZI_D 7113 UINT64_C(627425280), // UQADD_ZI_H 7114 UINT64_C(631619584), // UQADD_ZI_S 7115 UINT64_C(1142521856), // UQADD_ZPmZ_B 7116 UINT64_C(1155104768), // UQADD_ZPmZ_D 7117 UINT64_C(1146716160), // UQADD_ZPmZ_H 7118 UINT64_C(1150910464), // UQADD_ZPmZ_S 7119 UINT64_C(69211136), // UQADD_ZZZ_B 7120 UINT64_C(81794048), // UQADD_ZZZ_D 7121 UINT64_C(73405440), // UQADD_ZZZ_H 7122 UINT64_C(77599744), // UQADD_ZZZ_S 7123 UINT64_C(1847593984), // UQADDv16i8 7124 UINT64_C(2120223744), // UQADDv1i16 7125 UINT64_C(2124418048), // UQADDv1i32 7126 UINT64_C(2128612352), // UQADDv1i64 7127 UINT64_C(2116029440), // UQADDv1i8 7128 UINT64_C(782240768), // UQADDv2i32 7129 UINT64_C(1860176896), // UQADDv2i64 7130 UINT64_C(778046464), // UQADDv4i16 7131 UINT64_C(1855982592), // UQADDv4i32 7132 UINT64_C(1851788288), // UQADDv8i16 7133 UINT64_C(773852160), // UQADDv8i8 7134 UINT64_C(1160857600), // UQCVTN_Z2Z_StoH 7135 UINT64_C(3249791072), // UQCVTN_Z4Z_DtoH 7136 UINT64_C(3241402464), // UQCVTN_Z4Z_StoB 7137 UINT64_C(3240353824), // UQCVT_Z2Z_StoH 7138 UINT64_C(3249791008), // UQCVT_Z4Z_DtoH 7139 UINT64_C(3241402400), // UQCVT_Z4Z_StoB 7140 UINT64_C(69270528), // UQDECB_WPiI 7141 UINT64_C(70319104), // UQDECB_XPiI 7142 UINT64_C(81853440), // UQDECD_WPiI 7143 UINT64_C(82902016), // UQDECD_XPiI 7144 UINT64_C(81841152), // UQDECD_ZPiI 7145 UINT64_C(73464832), // UQDECH_WPiI 7146 UINT64_C(74513408), // UQDECH_XPiI 7147 UINT64_C(73452544), // UQDECH_ZPiI 7148 UINT64_C(623609856), // UQDECP_WP_B 7149 UINT64_C(636192768), // UQDECP_WP_D 7150 UINT64_C(627804160), // UQDECP_WP_H 7151 UINT64_C(631998464), // UQDECP_WP_S 7152 UINT64_C(623610880), // UQDECP_XP_B 7153 UINT64_C(636193792), // UQDECP_XP_D 7154 UINT64_C(627805184), // UQDECP_XP_H 7155 UINT64_C(631999488), // UQDECP_XP_S 7156 UINT64_C(636190720), // UQDECP_ZP_D 7157 UINT64_C(627802112), // UQDECP_ZP_H 7158 UINT64_C(631996416), // UQDECP_ZP_S 7159 UINT64_C(77659136), // UQDECW_WPiI 7160 UINT64_C(78707712), // UQDECW_XPiI 7161 UINT64_C(77646848), // UQDECW_ZPiI 7162 UINT64_C(69268480), // UQINCB_WPiI 7163 UINT64_C(70317056), // UQINCB_XPiI 7164 UINT64_C(81851392), // UQINCD_WPiI 7165 UINT64_C(82899968), // UQINCD_XPiI 7166 UINT64_C(81839104), // UQINCD_ZPiI 7167 UINT64_C(73462784), // UQINCH_WPiI 7168 UINT64_C(74511360), // UQINCH_XPiI 7169 UINT64_C(73450496), // UQINCH_ZPiI 7170 UINT64_C(623478784), // UQINCP_WP_B 7171 UINT64_C(636061696), // UQINCP_WP_D 7172 UINT64_C(627673088), // UQINCP_WP_H 7173 UINT64_C(631867392), // UQINCP_WP_S 7174 UINT64_C(623479808), // UQINCP_XP_B 7175 UINT64_C(636062720), // UQINCP_XP_D 7176 UINT64_C(627674112), // UQINCP_XP_H 7177 UINT64_C(631868416), // UQINCP_XP_S 7178 UINT64_C(636059648), // UQINCP_ZP_D 7179 UINT64_C(627671040), // UQINCP_ZP_H 7180 UINT64_C(631865344), // UQINCP_ZP_S 7181 UINT64_C(77657088), // UQINCW_WPiI 7182 UINT64_C(78705664), // UQINCW_XPiI 7183 UINT64_C(77644800), // UQINCW_ZPiI 7184 UINT64_C(1141866496), // UQRSHLR_ZPmZ_B 7185 UINT64_C(1154449408), // UQRSHLR_ZPmZ_D 7186 UINT64_C(1146060800), // UQRSHLR_ZPmZ_H 7187 UINT64_C(1150255104), // UQRSHLR_ZPmZ_S 7188 UINT64_C(1141604352), // UQRSHL_ZPmZ_B 7189 UINT64_C(1154187264), // UQRSHL_ZPmZ_D 7190 UINT64_C(1145798656), // UQRSHL_ZPmZ_H 7191 UINT64_C(1149992960), // UQRSHL_ZPmZ_S 7192 UINT64_C(1847614464), // UQRSHLv16i8 7193 UINT64_C(2120244224), // UQRSHLv1i16 7194 UINT64_C(2124438528), // UQRSHLv1i32 7195 UINT64_C(2128632832), // UQRSHLv1i64 7196 UINT64_C(2116049920), // UQRSHLv1i8 7197 UINT64_C(782261248), // UQRSHLv2i32 7198 UINT64_C(1860197376), // UQRSHLv2i64 7199 UINT64_C(778066944), // UQRSHLv4i16 7200 UINT64_C(1856003072), // UQRSHLv4i32 7201 UINT64_C(1851808768), // UQRSHLv8i16 7202 UINT64_C(773872640), // UQRSHLv8i8 7203 UINT64_C(1160263680), // UQRSHRNB_ZZI_B 7204 UINT64_C(1160787968), // UQRSHRNB_ZZI_H 7205 UINT64_C(1163933696), // UQRSHRNB_ZZI_S 7206 UINT64_C(1160264704), // UQRSHRNT_ZZI_B 7207 UINT64_C(1160788992), // UQRSHRNT_ZZI_H 7208 UINT64_C(1163934720), // UQRSHRNT_ZZI_S 7209 UINT64_C(3244350496), // UQRSHRN_VG4_Z4ZI_B 7210 UINT64_C(3248544800), // UQRSHRN_VG4_Z4ZI_H 7211 UINT64_C(2131270656), // UQRSHRNb 7212 UINT64_C(2131794944), // UQRSHRNh 7213 UINT64_C(2132843520), // UQRSHRNs 7214 UINT64_C(1862835200), // UQRSHRNv16i8_shift 7215 UINT64_C(790666240), // UQRSHRNv2i32_shift 7216 UINT64_C(789617664), // UQRSHRNv4i16_shift 7217 UINT64_C(1864408064), // UQRSHRNv4i32_shift 7218 UINT64_C(1863359488), // UQRSHRNv8i16_shift 7219 UINT64_C(789093376), // UQRSHRNv8i8_shift 7220 UINT64_C(3252737056), // UQRSHR_VG2_Z2ZI_H 7221 UINT64_C(3244349472), // UQRSHR_VG4_Z4ZI_B 7222 UINT64_C(3248543776), // UQRSHR_VG4_Z4ZI_H 7223 UINT64_C(1141735424), // UQSHLR_ZPmZ_B 7224 UINT64_C(1154318336), // UQSHLR_ZPmZ_D 7225 UINT64_C(1145929728), // UQSHLR_ZPmZ_H 7226 UINT64_C(1150124032), // UQSHLR_ZPmZ_S 7227 UINT64_C(67600640), // UQSHL_ZPmI_B 7228 UINT64_C(75988992), // UQSHL_ZPmI_D 7229 UINT64_C(67600896), // UQSHL_ZPmI_H 7230 UINT64_C(71794688), // UQSHL_ZPmI_S 7231 UINT64_C(1141473280), // UQSHL_ZPmZ_B 7232 UINT64_C(1154056192), // UQSHL_ZPmZ_D 7233 UINT64_C(1145667584), // UQSHL_ZPmZ_H 7234 UINT64_C(1149861888), // UQSHL_ZPmZ_S 7235 UINT64_C(2131260416), // UQSHLb 7236 UINT64_C(2134930432), // UQSHLd 7237 UINT64_C(2131784704), // UQSHLh 7238 UINT64_C(2132833280), // UQSHLs 7239 UINT64_C(1847610368), // UQSHLv16i8 7240 UINT64_C(1862824960), // UQSHLv16i8_shift 7241 UINT64_C(2120240128), // UQSHLv1i16 7242 UINT64_C(2124434432), // UQSHLv1i32 7243 UINT64_C(2128628736), // UQSHLv1i64 7244 UINT64_C(2116045824), // UQSHLv1i8 7245 UINT64_C(782257152), // UQSHLv2i32 7246 UINT64_C(790656000), // UQSHLv2i32_shift 7247 UINT64_C(1860193280), // UQSHLv2i64 7248 UINT64_C(1866494976), // UQSHLv2i64_shift 7249 UINT64_C(778062848), // UQSHLv4i16 7250 UINT64_C(789607424), // UQSHLv4i16_shift 7251 UINT64_C(1855998976), // UQSHLv4i32 7252 UINT64_C(1864397824), // UQSHLv4i32_shift 7253 UINT64_C(1851804672), // UQSHLv8i16 7254 UINT64_C(1863349248), // UQSHLv8i16_shift 7255 UINT64_C(773868544), // UQSHLv8i8 7256 UINT64_C(789083136), // UQSHLv8i8_shift 7257 UINT64_C(1160261632), // UQSHRNB_ZZI_B 7258 UINT64_C(1160785920), // UQSHRNB_ZZI_H 7259 UINT64_C(1163931648), // UQSHRNB_ZZI_S 7260 UINT64_C(1160262656), // UQSHRNT_ZZI_B 7261 UINT64_C(1160786944), // UQSHRNT_ZZI_H 7262 UINT64_C(1163932672), // UQSHRNT_ZZI_S 7263 UINT64_C(2131268608), // UQSHRNb 7264 UINT64_C(2131792896), // UQSHRNh 7265 UINT64_C(2132841472), // UQSHRNs 7266 UINT64_C(1862833152), // UQSHRNv16i8_shift 7267 UINT64_C(790664192), // UQSHRNv2i32_shift 7268 UINT64_C(789615616), // UQSHRNv4i16_shift 7269 UINT64_C(1864406016), // UQSHRNv4i32_shift 7270 UINT64_C(1863357440), // UQSHRNv8i16_shift 7271 UINT64_C(789091328), // UQSHRNv8i8_shift 7272 UINT64_C(1142915072), // UQSUBR_ZPmZ_B 7273 UINT64_C(1155497984), // UQSUBR_ZPmZ_D 7274 UINT64_C(1147109376), // UQSUBR_ZPmZ_H 7275 UINT64_C(1151303680), // UQSUBR_ZPmZ_S 7276 UINT64_C(623362048), // UQSUB_ZI_B 7277 UINT64_C(635944960), // UQSUB_ZI_D 7278 UINT64_C(627556352), // UQSUB_ZI_H 7279 UINT64_C(631750656), // UQSUB_ZI_S 7280 UINT64_C(1142652928), // UQSUB_ZPmZ_B 7281 UINT64_C(1155235840), // UQSUB_ZPmZ_D 7282 UINT64_C(1146847232), // UQSUB_ZPmZ_H 7283 UINT64_C(1151041536), // UQSUB_ZPmZ_S 7284 UINT64_C(69213184), // UQSUB_ZZZ_B 7285 UINT64_C(81796096), // UQSUB_ZZZ_D 7286 UINT64_C(73407488), // UQSUB_ZZZ_H 7287 UINT64_C(77601792), // UQSUB_ZZZ_S 7288 UINT64_C(1847602176), // UQSUBv16i8 7289 UINT64_C(2120231936), // UQSUBv1i16 7290 UINT64_C(2124426240), // UQSUBv1i32 7291 UINT64_C(2128620544), // UQSUBv1i64 7292 UINT64_C(2116037632), // UQSUBv1i8 7293 UINT64_C(782248960), // UQSUBv2i32 7294 UINT64_C(1860185088), // UQSUBv2i64 7295 UINT64_C(778054656), // UQSUBv4i16 7296 UINT64_C(1855990784), // UQSUBv4i32 7297 UINT64_C(1851796480), // UQSUBv8i16 7298 UINT64_C(773860352), // UQSUBv8i8 7299 UINT64_C(1160267776), // UQXTNB_ZZ_B 7300 UINT64_C(1160792064), // UQXTNB_ZZ_H 7301 UINT64_C(1163937792), // UQXTNB_ZZ_S 7302 UINT64_C(1160268800), // UQXTNT_ZZ_B 7303 UINT64_C(1160793088), // UQXTNT_ZZ_H 7304 UINT64_C(1163938816), // UQXTNT_ZZ_S 7305 UINT64_C(1847674880), // UQXTNv16i8 7306 UINT64_C(2120304640), // UQXTNv1i16 7307 UINT64_C(2124498944), // UQXTNv1i32 7308 UINT64_C(2116110336), // UQXTNv1i8 7309 UINT64_C(782321664), // UQXTNv2i32 7310 UINT64_C(778127360), // UQXTNv4i16 7311 UINT64_C(1856063488), // UQXTNv4i32 7312 UINT64_C(1851869184), // UQXTNv8i16 7313 UINT64_C(773933056), // UQXTNv8i8 7314 UINT64_C(1149280256), // URECPE_ZPmZ_S 7315 UINT64_C(245483520), // URECPEv2i32 7316 UINT64_C(1319225344), // URECPEv4i32 7317 UINT64_C(1142259712), // URHADD_ZPmZ_B 7318 UINT64_C(1154842624), // URHADD_ZPmZ_D 7319 UINT64_C(1146454016), // URHADD_ZPmZ_H 7320 UINT64_C(1150648320), // URHADD_ZPmZ_S 7321 UINT64_C(1847596032), // URHADDv16i8 7322 UINT64_C(782242816), // URHADDv2i32 7323 UINT64_C(778048512), // URHADDv4i16 7324 UINT64_C(1855984640), // URHADDv4i32 7325 UINT64_C(1851790336), // URHADDv8i16 7326 UINT64_C(773854208), // URHADDv8i8 7327 UINT64_C(1141342208), // URSHLR_ZPmZ_B 7328 UINT64_C(1153925120), // URSHLR_ZPmZ_D 7329 UINT64_C(1145536512), // URSHLR_ZPmZ_H 7330 UINT64_C(1149730816), // URSHLR_ZPmZ_S 7331 UINT64_C(3240145441), // URSHL_VG2_2Z2Z_B 7332 UINT64_C(3252728353), // URSHL_VG2_2Z2Z_D 7333 UINT64_C(3244339745), // URSHL_VG2_2Z2Z_H 7334 UINT64_C(3248534049), // URSHL_VG2_2Z2Z_S 7335 UINT64_C(3240141345), // URSHL_VG2_2ZZ_B 7336 UINT64_C(3252724257), // URSHL_VG2_2ZZ_D 7337 UINT64_C(3244335649), // URSHL_VG2_2ZZ_H 7338 UINT64_C(3248529953), // URSHL_VG2_2ZZ_S 7339 UINT64_C(3240147489), // URSHL_VG4_4Z4Z_B 7340 UINT64_C(3252730401), // URSHL_VG4_4Z4Z_D 7341 UINT64_C(3244341793), // URSHL_VG4_4Z4Z_H 7342 UINT64_C(3248536097), // URSHL_VG4_4Z4Z_S 7343 UINT64_C(3240143393), // URSHL_VG4_4ZZ_B 7344 UINT64_C(3252726305), // URSHL_VG4_4ZZ_D 7345 UINT64_C(3244337697), // URSHL_VG4_4ZZ_H 7346 UINT64_C(3248532001), // URSHL_VG4_4ZZ_S 7347 UINT64_C(1141080064), // URSHL_ZPmZ_B 7348 UINT64_C(1153662976), // URSHL_ZPmZ_D 7349 UINT64_C(1145274368), // URSHL_ZPmZ_H 7350 UINT64_C(1149468672), // URSHL_ZPmZ_S 7351 UINT64_C(1847612416), // URSHLv16i8 7352 UINT64_C(2128630784), // URSHLv1i64 7353 UINT64_C(782259200), // URSHLv2i32 7354 UINT64_C(1860195328), // URSHLv2i64 7355 UINT64_C(778064896), // URSHLv4i16 7356 UINT64_C(1856001024), // URSHLv4i32 7357 UINT64_C(1851806720), // URSHLv8i16 7358 UINT64_C(773870592), // URSHLv8i8 7359 UINT64_C(67993856), // URSHR_ZPmI_B 7360 UINT64_C(76382208), // URSHR_ZPmI_D 7361 UINT64_C(67994112), // URSHR_ZPmI_H 7362 UINT64_C(72187904), // URSHR_ZPmI_S 7363 UINT64_C(2134909952), // URSHRd 7364 UINT64_C(1862804480), // URSHRv16i8_shift 7365 UINT64_C(790635520), // URSHRv2i32_shift 7366 UINT64_C(1866474496), // URSHRv2i64_shift 7367 UINT64_C(789586944), // URSHRv4i16_shift 7368 UINT64_C(1864377344), // URSHRv4i32_shift 7369 UINT64_C(1863328768), // URSHRv8i16_shift 7370 UINT64_C(789062656), // URSHRv8i8_shift 7371 UINT64_C(1149345792), // URSQRTE_ZPmZ_S 7372 UINT64_C(782354432), // URSQRTEv2i32 7373 UINT64_C(1856096256), // URSQRTEv4i32 7374 UINT64_C(1158212608), // URSRA_ZZI_B 7375 UINT64_C(1166076928), // URSRA_ZZI_D 7376 UINT64_C(1158736896), // URSRA_ZZI_H 7377 UINT64_C(1161882624), // URSRA_ZZI_S 7378 UINT64_C(2134914048), // URSRAd 7379 UINT64_C(1862808576), // URSRAv16i8_shift 7380 UINT64_C(790639616), // URSRAv2i32_shift 7381 UINT64_C(1866478592), // URSRAv2i64_shift 7382 UINT64_C(789591040), // URSRAv4i16_shift 7383 UINT64_C(1864381440), // URSRAv4i32_shift 7384 UINT64_C(1863332864), // URSRAv8i16_shift 7385 UINT64_C(789066752), // URSRAv8i8_shift 7386 UINT64_C(3248493576), // USDOT_VG2_M2Z2Z_BToS 7387 UINT64_C(3243249704), // USDOT_VG2_M2ZZI_BToS 7388 UINT64_C(3240104968), // USDOT_VG2_M2ZZ_BToS 7389 UINT64_C(3248559112), // USDOT_VG4_M4Z4Z_BToS 7390 UINT64_C(3243282472), // USDOT_VG4_M4ZZI_BToS 7391 UINT64_C(3241153544), // USDOT_VG4_M4ZZ_BToS 7392 UINT64_C(1149270016), // USDOT_ZZZ 7393 UINT64_C(1151342592), // USDOT_ZZZI 7394 UINT64_C(1333850112), // USDOTlanev16i8 7395 UINT64_C(260108288), // USDOTlanev8i8 7396 UINT64_C(1317051392), // USDOTv16i8 7397 UINT64_C(243309568), // USDOTv8i8 7398 UINT64_C(1161865216), // USHLLB_ZZI_D 7399 UINT64_C(1158195200), // USHLLB_ZZI_H 7400 UINT64_C(1158719488), // USHLLB_ZZI_S 7401 UINT64_C(1161866240), // USHLLT_ZZI_D 7402 UINT64_C(1158196224), // USHLLT_ZZI_H 7403 UINT64_C(1158720512), // USHLLT_ZZI_S 7404 UINT64_C(1862837248), // USHLLv16i8_shift 7405 UINT64_C(790668288), // USHLLv2i32_shift 7406 UINT64_C(789619712), // USHLLv4i16_shift 7407 UINT64_C(1864410112), // USHLLv4i32_shift 7408 UINT64_C(1863361536), // USHLLv8i16_shift 7409 UINT64_C(789095424), // USHLLv8i8_shift 7410 UINT64_C(1847608320), // USHLv16i8 7411 UINT64_C(2128626688), // USHLv1i64 7412 UINT64_C(782255104), // USHLv2i32 7413 UINT64_C(1860191232), // USHLv2i64 7414 UINT64_C(778060800), // USHLv4i16 7415 UINT64_C(1855996928), // USHLv4i32 7416 UINT64_C(1851802624), // USHLv8i16 7417 UINT64_C(773866496), // USHLv8i8 7418 UINT64_C(2134901760), // USHRd 7419 UINT64_C(1862796288), // USHRv16i8_shift 7420 UINT64_C(790627328), // USHRv2i32_shift 7421 UINT64_C(1866466304), // USHRv2i64_shift 7422 UINT64_C(789578752), // USHRv4i16_shift 7423 UINT64_C(1864369152), // USHRv4i32_shift 7424 UINT64_C(1863320576), // USHRv8i16_shift 7425 UINT64_C(789054464), // USHRv8i8_shift 7426 UINT64_C(3238002692), // USMLALL_MZZI_BtoS 7427 UINT64_C(3240100868), // USMLALL_MZZ_BtoS 7428 UINT64_C(3248488452), // USMLALL_VG2_M2Z2Z_BtoS 7429 UINT64_C(3239051296), // USMLALL_VG2_M2ZZI_BtoS 7430 UINT64_C(3240099844), // USMLALL_VG2_M2ZZ_BtoS 7431 UINT64_C(3248553988), // USMLALL_VG4_M4Z4Z_BtoS 7432 UINT64_C(3239084064), // USMLALL_VG4_M4ZZI_BtoS 7433 UINT64_C(3241148420), // USMLALL_VG4_M4ZZ_BtoS 7434 UINT64_C(1317055488), // USMMLA 7435 UINT64_C(1166055424), // USMMLA_ZZZ 7436 UINT64_C(2713714688), // USMOPA_MPPZZ_D 7437 UINT64_C(2709520384), // USMOPA_MPPZZ_S 7438 UINT64_C(2713714704), // USMOPS_MPPZZ_D 7439 UINT64_C(2709520400), // USMOPS_MPPZZ_S 7440 UINT64_C(1142784000), // USQADD_ZPmZ_B 7441 UINT64_C(1155366912), // USQADD_ZPmZ_D 7442 UINT64_C(1146978304), // USQADD_ZPmZ_H 7443 UINT64_C(1151172608), // USQADD_ZPmZ_S 7444 UINT64_C(1847605248), // USQADDv16i8 7445 UINT64_C(2120235008), // USQADDv1i16 7446 UINT64_C(2124429312), // USQADDv1i32 7447 UINT64_C(2128623616), // USQADDv1i64 7448 UINT64_C(2116040704), // USQADDv1i8 7449 UINT64_C(782252032), // USQADDv2i32 7450 UINT64_C(1860188160), // USQADDv2i64 7451 UINT64_C(778057728), // USQADDv4i16 7452 UINT64_C(1855993856), // USQADDv4i32 7453 UINT64_C(1851799552), // USQADDv8i16 7454 UINT64_C(773863424), // USQADDv8i8 7455 UINT64_C(1158210560), // USRA_ZZI_B 7456 UINT64_C(1166074880), // USRA_ZZI_D 7457 UINT64_C(1158734848), // USRA_ZZI_H 7458 UINT64_C(1161880576), // USRA_ZZI_S 7459 UINT64_C(2134905856), // USRAd 7460 UINT64_C(1862800384), // USRAv16i8_shift 7461 UINT64_C(790631424), // USRAv2i32_shift 7462 UINT64_C(1866470400), // USRAv2i64_shift 7463 UINT64_C(789582848), // USRAv4i16_shift 7464 UINT64_C(1864373248), // USRAv4i32_shift 7465 UINT64_C(1863324672), // USRAv8i16_shift 7466 UINT64_C(789058560), // USRAv8i8_shift 7467 UINT64_C(1170216960), // USUBLB_ZZZ_D 7468 UINT64_C(1161828352), // USUBLB_ZZZ_H 7469 UINT64_C(1166022656), // USUBLB_ZZZ_S 7470 UINT64_C(1170217984), // USUBLT_ZZZ_D 7471 UINT64_C(1161829376), // USUBLT_ZZZ_H 7472 UINT64_C(1166023680), // USUBLT_ZZZ_S 7473 UINT64_C(1847599104), // USUBLv16i8_v8i16 7474 UINT64_C(782245888), // USUBLv2i32_v2i64 7475 UINT64_C(778051584), // USUBLv4i16_v4i32 7476 UINT64_C(1855987712), // USUBLv4i32_v2i64 7477 UINT64_C(1851793408), // USUBLv8i16_v4i32 7478 UINT64_C(773857280), // USUBLv8i8_v8i16 7479 UINT64_C(1170233344), // USUBWB_ZZZ_D 7480 UINT64_C(1161844736), // USUBWB_ZZZ_H 7481 UINT64_C(1166039040), // USUBWB_ZZZ_S 7482 UINT64_C(1170234368), // USUBWT_ZZZ_D 7483 UINT64_C(1161845760), // USUBWT_ZZZ_H 7484 UINT64_C(1166040064), // USUBWT_ZZZ_S 7485 UINT64_C(1847603200), // USUBWv16i8_v8i16 7486 UINT64_C(782249984), // USUBWv2i32_v2i64 7487 UINT64_C(778055680), // USUBWv4i16_v4i32 7488 UINT64_C(1855991808), // USUBWv4i32_v2i64 7489 UINT64_C(1851797504), // USUBWv8i16_v4i32 7490 UINT64_C(773861376), // USUBWv8i8_v8i16 7491 UINT64_C(3243278376), // USVDOT_VG4_M4ZZI_BToS 7492 UINT64_C(99825664), // UUNPKHI_ZZ_D 7493 UINT64_C(91437056), // UUNPKHI_ZZ_H 7494 UINT64_C(95631360), // UUNPKHI_ZZ_S 7495 UINT64_C(99760128), // UUNPKLO_ZZ_D 7496 UINT64_C(91371520), // UUNPKLO_ZZ_H 7497 UINT64_C(95565824), // UUNPKLO_ZZ_S 7498 UINT64_C(3253067777), // UUNPK_VG2_2ZZ_D 7499 UINT64_C(3244679169), // UUNPK_VG2_2ZZ_H 7500 UINT64_C(3248873473), // UUNPK_VG2_2ZZ_S 7501 UINT64_C(3254116353), // UUNPK_VG4_4Z2Z_D 7502 UINT64_C(3245727745), // UUNPK_VG4_4Z2Z_H 7503 UINT64_C(3249922049), // UUNPK_VG4_4Z2Z_S 7504 UINT64_C(3243245616), // UVDOT_VG2_M2ZZI_HtoS 7505 UINT64_C(3243278384), // UVDOT_VG4_M4ZZI_BtoS 7506 UINT64_C(3251669016), // UVDOT_VG4_M4ZZI_HtoD 7507 UINT64_C(80846848), // UXTB_ZPmZ_D 7508 UINT64_C(72458240), // UXTB_ZPmZ_H 7509 UINT64_C(76652544), // UXTB_ZPmZ_S 7510 UINT64_C(80977920), // UXTH_ZPmZ_D 7511 UINT64_C(76783616), // UXTH_ZPmZ_S 7512 UINT64_C(81108992), // UXTW_ZPmZ_D 7513 UINT64_C(86001664), // UZP1_PPP_B 7514 UINT64_C(98584576), // UZP1_PPP_D 7515 UINT64_C(90195968), // UZP1_PPP_H 7516 UINT64_C(94390272), // UZP1_PPP_S 7517 UINT64_C(86009856), // UZP1_ZZZ_B 7518 UINT64_C(98592768), // UZP1_ZZZ_D 7519 UINT64_C(90204160), // UZP1_ZZZ_H 7520 UINT64_C(94373888), // UZP1_ZZZ_Q 7521 UINT64_C(94398464), // UZP1_ZZZ_S 7522 UINT64_C(1308628992), // UZP1v16i8 7523 UINT64_C(243275776), // UZP1v2i32 7524 UINT64_C(1321211904), // UZP1v2i64 7525 UINT64_C(239081472), // UZP1v4i16 7526 UINT64_C(1317017600), // UZP1v4i32 7527 UINT64_C(1312823296), // UZP1v8i16 7528 UINT64_C(234887168), // UZP1v8i8 7529 UINT64_C(86002688), // UZP2_PPP_B 7530 UINT64_C(98585600), // UZP2_PPP_D 7531 UINT64_C(90196992), // UZP2_PPP_H 7532 UINT64_C(94391296), // UZP2_PPP_S 7533 UINT64_C(86010880), // UZP2_ZZZ_B 7534 UINT64_C(98593792), // UZP2_ZZZ_D 7535 UINT64_C(90205184), // UZP2_ZZZ_H 7536 UINT64_C(94374912), // UZP2_ZZZ_Q 7537 UINT64_C(94399488), // UZP2_ZZZ_S 7538 UINT64_C(1308645376), // UZP2v16i8 7539 UINT64_C(243292160), // UZP2v2i32 7540 UINT64_C(1321228288), // UZP2v2i64 7541 UINT64_C(239097856), // UZP2v4i16 7542 UINT64_C(1317033984), // UZP2v4i32 7543 UINT64_C(1312839680), // UZP2v8i16 7544 UINT64_C(234903552), // UZP2v8i8 7545 UINT64_C(1140910080), // UZPQ1_ZZZ_B 7546 UINT64_C(1153492992), // UZPQ1_ZZZ_D 7547 UINT64_C(1145104384), // UZPQ1_ZZZ_H 7548 UINT64_C(1149298688), // UZPQ1_ZZZ_S 7549 UINT64_C(1140911104), // UZPQ2_ZZZ_B 7550 UINT64_C(1153494016), // UZPQ2_ZZZ_D 7551 UINT64_C(1145105408), // UZPQ2_ZZZ_H 7552 UINT64_C(1149299712), // UZPQ2_ZZZ_S 7553 UINT64_C(3240153089), // UZP_VG2_2ZZZ_B 7554 UINT64_C(3252736001), // UZP_VG2_2ZZZ_D 7555 UINT64_C(3244347393), // UZP_VG2_2ZZZ_H 7556 UINT64_C(3240154113), // UZP_VG2_2ZZZ_Q 7557 UINT64_C(3248541697), // UZP_VG2_2ZZZ_S 7558 UINT64_C(3241598978), // UZP_VG4_4Z4Z_B 7559 UINT64_C(3254181890), // UZP_VG4_4Z4Z_D 7560 UINT64_C(3245793282), // UZP_VG4_4Z4Z_H 7561 UINT64_C(3241664514), // UZP_VG4_4Z4Z_Q 7562 UINT64_C(3249987586), // UZP_VG4_4Z4Z_S 7563 UINT64_C(3573747712), // WFET 7564 UINT64_C(3573747744), // WFIT 7565 UINT64_C(622874640), // WHILEGE_2PXX_B 7566 UINT64_C(635457552), // WHILEGE_2PXX_D 7567 UINT64_C(627068944), // WHILEGE_2PXX_H 7568 UINT64_C(631263248), // WHILEGE_2PXX_S 7569 UINT64_C(622870544), // WHILEGE_CXX_B 7570 UINT64_C(635453456), // WHILEGE_CXX_D 7571 UINT64_C(627064848), // WHILEGE_CXX_H 7572 UINT64_C(631259152), // WHILEGE_CXX_S 7573 UINT64_C(622854144), // WHILEGE_PWW_B 7574 UINT64_C(635437056), // WHILEGE_PWW_D 7575 UINT64_C(627048448), // WHILEGE_PWW_H 7576 UINT64_C(631242752), // WHILEGE_PWW_S 7577 UINT64_C(622858240), // WHILEGE_PXX_B 7578 UINT64_C(635441152), // WHILEGE_PXX_D 7579 UINT64_C(627052544), // WHILEGE_PXX_H 7580 UINT64_C(631246848), // WHILEGE_PXX_S 7581 UINT64_C(622874641), // WHILEGT_2PXX_B 7582 UINT64_C(635457553), // WHILEGT_2PXX_D 7583 UINT64_C(627068945), // WHILEGT_2PXX_H 7584 UINT64_C(631263249), // WHILEGT_2PXX_S 7585 UINT64_C(622870552), // WHILEGT_CXX_B 7586 UINT64_C(635453464), // WHILEGT_CXX_D 7587 UINT64_C(627064856), // WHILEGT_CXX_H 7588 UINT64_C(631259160), // WHILEGT_CXX_S 7589 UINT64_C(622854160), // WHILEGT_PWW_B 7590 UINT64_C(635437072), // WHILEGT_PWW_D 7591 UINT64_C(627048464), // WHILEGT_PWW_H 7592 UINT64_C(631242768), // WHILEGT_PWW_S 7593 UINT64_C(622858256), // WHILEGT_PXX_B 7594 UINT64_C(635441168), // WHILEGT_PXX_D 7595 UINT64_C(627052560), // WHILEGT_PXX_H 7596 UINT64_C(631246864), // WHILEGT_PXX_S 7597 UINT64_C(622876689), // WHILEHI_2PXX_B 7598 UINT64_C(635459601), // WHILEHI_2PXX_D 7599 UINT64_C(627070993), // WHILEHI_2PXX_H 7600 UINT64_C(631265297), // WHILEHI_2PXX_S 7601 UINT64_C(622872600), // WHILEHI_CXX_B 7602 UINT64_C(635455512), // WHILEHI_CXX_D 7603 UINT64_C(627066904), // WHILEHI_CXX_H 7604 UINT64_C(631261208), // WHILEHI_CXX_S 7605 UINT64_C(622856208), // WHILEHI_PWW_B 7606 UINT64_C(635439120), // WHILEHI_PWW_D 7607 UINT64_C(627050512), // WHILEHI_PWW_H 7608 UINT64_C(631244816), // WHILEHI_PWW_S 7609 UINT64_C(622860304), // WHILEHI_PXX_B 7610 UINT64_C(635443216), // WHILEHI_PXX_D 7611 UINT64_C(627054608), // WHILEHI_PXX_H 7612 UINT64_C(631248912), // WHILEHI_PXX_S 7613 UINT64_C(622876688), // WHILEHS_2PXX_B 7614 UINT64_C(635459600), // WHILEHS_2PXX_D 7615 UINT64_C(627070992), // WHILEHS_2PXX_H 7616 UINT64_C(631265296), // WHILEHS_2PXX_S 7617 UINT64_C(622872592), // WHILEHS_CXX_B 7618 UINT64_C(635455504), // WHILEHS_CXX_D 7619 UINT64_C(627066896), // WHILEHS_CXX_H 7620 UINT64_C(631261200), // WHILEHS_CXX_S 7621 UINT64_C(622856192), // WHILEHS_PWW_B 7622 UINT64_C(635439104), // WHILEHS_PWW_D 7623 UINT64_C(627050496), // WHILEHS_PWW_H 7624 UINT64_C(631244800), // WHILEHS_PWW_S 7625 UINT64_C(622860288), // WHILEHS_PXX_B 7626 UINT64_C(635443200), // WHILEHS_PXX_D 7627 UINT64_C(627054592), // WHILEHS_PXX_H 7628 UINT64_C(631248896), // WHILEHS_PXX_S 7629 UINT64_C(622875665), // WHILELE_2PXX_B 7630 UINT64_C(635458577), // WHILELE_2PXX_D 7631 UINT64_C(627069969), // WHILELE_2PXX_H 7632 UINT64_C(631264273), // WHILELE_2PXX_S 7633 UINT64_C(622871576), // WHILELE_CXX_B 7634 UINT64_C(635454488), // WHILELE_CXX_D 7635 UINT64_C(627065880), // WHILELE_CXX_H 7636 UINT64_C(631260184), // WHILELE_CXX_S 7637 UINT64_C(622855184), // WHILELE_PWW_B 7638 UINT64_C(635438096), // WHILELE_PWW_D 7639 UINT64_C(627049488), // WHILELE_PWW_H 7640 UINT64_C(631243792), // WHILELE_PWW_S 7641 UINT64_C(622859280), // WHILELE_PXX_B 7642 UINT64_C(635442192), // WHILELE_PXX_D 7643 UINT64_C(627053584), // WHILELE_PXX_H 7644 UINT64_C(631247888), // WHILELE_PXX_S 7645 UINT64_C(622877712), // WHILELO_2PXX_B 7646 UINT64_C(635460624), // WHILELO_2PXX_D 7647 UINT64_C(627072016), // WHILELO_2PXX_H 7648 UINT64_C(631266320), // WHILELO_2PXX_S 7649 UINT64_C(622873616), // WHILELO_CXX_B 7650 UINT64_C(635456528), // WHILELO_CXX_D 7651 UINT64_C(627067920), // WHILELO_CXX_H 7652 UINT64_C(631262224), // WHILELO_CXX_S 7653 UINT64_C(622857216), // WHILELO_PWW_B 7654 UINT64_C(635440128), // WHILELO_PWW_D 7655 UINT64_C(627051520), // WHILELO_PWW_H 7656 UINT64_C(631245824), // WHILELO_PWW_S 7657 UINT64_C(622861312), // WHILELO_PXX_B 7658 UINT64_C(635444224), // WHILELO_PXX_D 7659 UINT64_C(627055616), // WHILELO_PXX_H 7660 UINT64_C(631249920), // WHILELO_PXX_S 7661 UINT64_C(622877713), // WHILELS_2PXX_B 7662 UINT64_C(635460625), // WHILELS_2PXX_D 7663 UINT64_C(627072017), // WHILELS_2PXX_H 7664 UINT64_C(631266321), // WHILELS_2PXX_S 7665 UINT64_C(622873624), // WHILELS_CXX_B 7666 UINT64_C(635456536), // WHILELS_CXX_D 7667 UINT64_C(627067928), // WHILELS_CXX_H 7668 UINT64_C(631262232), // WHILELS_CXX_S 7669 UINT64_C(622857232), // WHILELS_PWW_B 7670 UINT64_C(635440144), // WHILELS_PWW_D 7671 UINT64_C(627051536), // WHILELS_PWW_H 7672 UINT64_C(631245840), // WHILELS_PWW_S 7673 UINT64_C(622861328), // WHILELS_PXX_B 7674 UINT64_C(635444240), // WHILELS_PXX_D 7675 UINT64_C(627055632), // WHILELS_PXX_H 7676 UINT64_C(631249936), // WHILELS_PXX_S 7677 UINT64_C(622875664), // WHILELT_2PXX_B 7678 UINT64_C(635458576), // WHILELT_2PXX_D 7679 UINT64_C(627069968), // WHILELT_2PXX_H 7680 UINT64_C(631264272), // WHILELT_2PXX_S 7681 UINT64_C(622871568), // WHILELT_CXX_B 7682 UINT64_C(635454480), // WHILELT_CXX_D 7683 UINT64_C(627065872), // WHILELT_CXX_H 7684 UINT64_C(631260176), // WHILELT_CXX_S 7685 UINT64_C(622855168), // WHILELT_PWW_B 7686 UINT64_C(635438080), // WHILELT_PWW_D 7687 UINT64_C(627049472), // WHILELT_PWW_H 7688 UINT64_C(631243776), // WHILELT_PWW_S 7689 UINT64_C(622859264), // WHILELT_PXX_B 7690 UINT64_C(635442176), // WHILELT_PXX_D 7691 UINT64_C(627053568), // WHILELT_PXX_H 7692 UINT64_C(631247872), // WHILELT_PXX_S 7693 UINT64_C(622866448), // WHILERW_PXX_B 7694 UINT64_C(635449360), // WHILERW_PXX_D 7695 UINT64_C(627060752), // WHILERW_PXX_H 7696 UINT64_C(631255056), // WHILERW_PXX_S 7697 UINT64_C(622866432), // WHILEWR_PXX_B 7698 UINT64_C(635449344), // WHILEWR_PXX_D 7699 UINT64_C(627060736), // WHILEWR_PXX_H 7700 UINT64_C(631255040), // WHILEWR_PXX_S 7701 UINT64_C(623415296), // WRFFR 7702 UINT64_C(3573563455), // XAFLAG 7703 UINT64_C(3464495104), // XAR 7704 UINT64_C(69743616), // XAR_ZZZI_B 7705 UINT64_C(77607936), // XAR_ZZZI_D 7706 UINT64_C(70267904), // XAR_ZZZI_H 7707 UINT64_C(73413632), // XAR_ZZZI_S 7708 UINT64_C(3670099936), // XPACD 7709 UINT64_C(3670098912), // XPACI 7710 UINT64_C(3573752063), // XPACLRI 7711 UINT64_C(1310795776), // XTNv16i8 7712 UINT64_C(245442560), // XTNv2i32 7713 UINT64_C(241248256), // XTNv4i16 7714 UINT64_C(1319184384), // XTNv4i32 7715 UINT64_C(1314990080), // XTNv8i16 7716 UINT64_C(237053952), // XTNv8i8 7717 UINT64_C(3221749760), // ZERO_M 7718 UINT64_C(3222044672), // ZERO_MXI_2Z 7719 UINT64_C(3222175744), // ZERO_MXI_4Z 7720 UINT64_C(3222077440), // ZERO_MXI_VG2_2Z 7721 UINT64_C(3222208512), // ZERO_MXI_VG2_4Z 7722 UINT64_C(3222011904), // ZERO_MXI_VG2_Z 7723 UINT64_C(3222110208), // ZERO_MXI_VG4_2Z 7724 UINT64_C(3222241280), // ZERO_MXI_VG4_4Z 7725 UINT64_C(3222142976), // ZERO_MXI_VG4_Z 7726 UINT64_C(3225944065), // ZERO_T 7727 UINT64_C(85999616), // ZIP1_PPP_B 7728 UINT64_C(98582528), // ZIP1_PPP_D 7729 UINT64_C(90193920), // ZIP1_PPP_H 7730 UINT64_C(94388224), // ZIP1_PPP_S 7731 UINT64_C(86007808), // ZIP1_ZZZ_B 7732 UINT64_C(98590720), // ZIP1_ZZZ_D 7733 UINT64_C(90202112), // ZIP1_ZZZ_H 7734 UINT64_C(94371840), // ZIP1_ZZZ_Q 7735 UINT64_C(94396416), // ZIP1_ZZZ_S 7736 UINT64_C(1308637184), // ZIP1v16i8 7737 UINT64_C(243283968), // ZIP1v2i32 7738 UINT64_C(1321220096), // ZIP1v2i64 7739 UINT64_C(239089664), // ZIP1v4i16 7740 UINT64_C(1317025792), // ZIP1v4i32 7741 UINT64_C(1312831488), // ZIP1v8i16 7742 UINT64_C(234895360), // ZIP1v8i8 7743 UINT64_C(86000640), // ZIP2_PPP_B 7744 UINT64_C(98583552), // ZIP2_PPP_D 7745 UINT64_C(90194944), // ZIP2_PPP_H 7746 UINT64_C(94389248), // ZIP2_PPP_S 7747 UINT64_C(86008832), // ZIP2_ZZZ_B 7748 UINT64_C(98591744), // ZIP2_ZZZ_D 7749 UINT64_C(90203136), // ZIP2_ZZZ_H 7750 UINT64_C(94372864), // ZIP2_ZZZ_Q 7751 UINT64_C(94397440), // ZIP2_ZZZ_S 7752 UINT64_C(1308653568), // ZIP2v16i8 7753 UINT64_C(243300352), // ZIP2v2i32 7754 UINT64_C(1321236480), // ZIP2v2i64 7755 UINT64_C(239106048), // ZIP2v4i16 7756 UINT64_C(1317042176), // ZIP2v4i32 7757 UINT64_C(1312847872), // ZIP2v8i16 7758 UINT64_C(234911744), // ZIP2v8i8 7759 UINT64_C(1140908032), // ZIPQ1_ZZZ_B 7760 UINT64_C(1153490944), // ZIPQ1_ZZZ_D 7761 UINT64_C(1145102336), // ZIPQ1_ZZZ_H 7762 UINT64_C(1149296640), // ZIPQ1_ZZZ_S 7763 UINT64_C(1140909056), // ZIPQ2_ZZZ_B 7764 UINT64_C(1153491968), // ZIPQ2_ZZZ_D 7765 UINT64_C(1145103360), // ZIPQ2_ZZZ_H 7766 UINT64_C(1149297664), // ZIPQ2_ZZZ_S 7767 UINT64_C(3240153088), // ZIP_VG2_2ZZZ_B 7768 UINT64_C(3252736000), // ZIP_VG2_2ZZZ_D 7769 UINT64_C(3244347392), // ZIP_VG2_2ZZZ_H 7770 UINT64_C(3240154112), // ZIP_VG2_2ZZZ_Q 7771 UINT64_C(3248541696), // ZIP_VG2_2ZZZ_S 7772 UINT64_C(3241598976), // ZIP_VG4_4Z4Z_B 7773 UINT64_C(3254181888), // ZIP_VG4_4Z4Z_D 7774 UINT64_C(3245793280), // ZIP_VG4_4Z4Z_H 7775 UINT64_C(3241664512), // ZIP_VG4_4Z4Z_Q 7776 UINT64_C(3249987584), // ZIP_VG4_4Z4Z_S 7777 UINT64_C(1169176576), // anonymous_15148 7778 UINT64_C(1169164288), // anonymous_15149 7779 UINT64_C(1169172480), // anonymous_5481 7780 UINT64_C(0) 7781 }; 7782 const unsigned opcode = MI.getOpcode(); 7783 uint64_t Value = InstBits[opcode]; 7784 uint64_t op = 0; 7785 (void)op; // suppress warning 7786 switch (opcode) { 7787 case AArch64::AUTIA1716: 7788 case AArch64::AUTIASP: 7789 case AArch64::AUTIAZ: 7790 case AArch64::AUTIB1716: 7791 case AArch64::AUTIBSP: 7792 case AArch64::AUTIBZ: 7793 case AArch64::AXFLAG: 7794 case AArch64::BRB_IALL: 7795 case AArch64::BRB_INJ: 7796 case AArch64::CFINV: 7797 case AArch64::DRPS: 7798 case AArch64::ERET: 7799 case AArch64::ERETAA: 7800 case AArch64::ERETAB: 7801 case AArch64::PACIA1716: 7802 case AArch64::PACIASP: 7803 case AArch64::PACIAZ: 7804 case AArch64::PACIB1716: 7805 case AArch64::PACIBSP: 7806 case AArch64::PACIBZ: 7807 case AArch64::RETAA: 7808 case AArch64::RETAB: 7809 case AArch64::SB: 7810 case AArch64::SETFFR: 7811 case AArch64::TCOMMIT: 7812 case AArch64::TSB: 7813 case AArch64::XAFLAG: 7814 case AArch64::XPACLRI: 7815 case AArch64::ZERO_T: { 7816 break; 7817 } 7818 case AArch64::DSBnXS: { 7819 // op: CRm 7820 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7821 op &= UINT64_C(12); 7822 op <<= 8; 7823 Value |= op; 7824 break; 7825 } 7826 case AArch64::CLREX: 7827 case AArch64::DMB: 7828 case AArch64::DSB: 7829 case AArch64::ISB: { 7830 // op: CRm 7831 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 7832 op &= UINT64_C(15); 7833 op <<= 8; 7834 Value |= op; 7835 break; 7836 } 7837 case AArch64::PTRUE_C_B: 7838 case AArch64::PTRUE_C_D: 7839 case AArch64::PTRUE_C_H: 7840 case AArch64::PTRUE_C_S: { 7841 // op: PNd 7842 op = EncodePPR_p8to15(MI, 0, Fixups, STI); 7843 op &= UINT64_C(7); 7844 Value |= op; 7845 break; 7846 } 7847 case AArch64::WHILEGE_CXX_B: 7848 case AArch64::WHILEGE_CXX_D: 7849 case AArch64::WHILEGE_CXX_H: 7850 case AArch64::WHILEGE_CXX_S: 7851 case AArch64::WHILEGT_CXX_B: 7852 case AArch64::WHILEGT_CXX_D: 7853 case AArch64::WHILEGT_CXX_H: 7854 case AArch64::WHILEGT_CXX_S: 7855 case AArch64::WHILEHI_CXX_B: 7856 case AArch64::WHILEHI_CXX_D: 7857 case AArch64::WHILEHI_CXX_H: 7858 case AArch64::WHILEHI_CXX_S: 7859 case AArch64::WHILEHS_CXX_B: 7860 case AArch64::WHILEHS_CXX_D: 7861 case AArch64::WHILEHS_CXX_H: 7862 case AArch64::WHILEHS_CXX_S: 7863 case AArch64::WHILELE_CXX_B: 7864 case AArch64::WHILELE_CXX_D: 7865 case AArch64::WHILELE_CXX_H: 7866 case AArch64::WHILELE_CXX_S: 7867 case AArch64::WHILELO_CXX_B: 7868 case AArch64::WHILELO_CXX_D: 7869 case AArch64::WHILELO_CXX_H: 7870 case AArch64::WHILELO_CXX_S: 7871 case AArch64::WHILELS_CXX_B: 7872 case AArch64::WHILELS_CXX_D: 7873 case AArch64::WHILELS_CXX_H: 7874 case AArch64::WHILELS_CXX_S: 7875 case AArch64::WHILELT_CXX_B: 7876 case AArch64::WHILELT_CXX_D: 7877 case AArch64::WHILELT_CXX_H: 7878 case AArch64::WHILELT_CXX_S: { 7879 // op: PNd 7880 op = EncodePPR_p8to15(MI, 0, Fixups, STI); 7881 op &= UINT64_C(7); 7882 Value |= op; 7883 // op: Rn 7884 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7885 op &= UINT64_C(31); 7886 op <<= 5; 7887 Value |= op; 7888 // op: vl 7889 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 7890 op &= UINT64_C(1); 7891 op <<= 13; 7892 Value |= op; 7893 // op: Rm 7894 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7895 op &= UINT64_C(31); 7896 op <<= 16; 7897 Value |= op; 7898 break; 7899 } 7900 case AArch64::SEL_VG2_2ZP2Z2Z_B: 7901 case AArch64::SEL_VG2_2ZP2Z2Z_D: 7902 case AArch64::SEL_VG2_2ZP2Z2Z_H: 7903 case AArch64::SEL_VG2_2ZP2Z2Z_S: { 7904 // op: PNg 7905 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 7906 op &= UINT64_C(7); 7907 op <<= 10; 7908 Value |= op; 7909 // op: Zm 7910 op = EncodeRegAsMultipleOf<2>(MI, 3, Fixups, STI); 7911 op &= UINT64_C(15); 7912 op <<= 17; 7913 Value |= op; 7914 // op: Zn 7915 op = EncodeRegAsMultipleOf<2>(MI, 2, Fixups, STI); 7916 op &= UINT64_C(15); 7917 op <<= 6; 7918 Value |= op; 7919 // op: Zd 7920 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 7921 op &= UINT64_C(15); 7922 op <<= 1; 7923 Value |= op; 7924 break; 7925 } 7926 case AArch64::SEL_VG4_4ZP4Z4Z_B: 7927 case AArch64::SEL_VG4_4ZP4Z4Z_D: 7928 case AArch64::SEL_VG4_4ZP4Z4Z_H: 7929 case AArch64::SEL_VG4_4ZP4Z4Z_S: { 7930 // op: PNg 7931 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 7932 op &= UINT64_C(7); 7933 op <<= 10; 7934 Value |= op; 7935 // op: Zm 7936 op = EncodeRegAsMultipleOf<4>(MI, 3, Fixups, STI); 7937 op &= UINT64_C(7); 7938 op <<= 18; 7939 Value |= op; 7940 // op: Zn 7941 op = EncodeRegAsMultipleOf<4>(MI, 2, Fixups, STI); 7942 op &= UINT64_C(7); 7943 op <<= 7; 7944 Value |= op; 7945 // op: Zd 7946 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 7947 op &= UINT64_C(7); 7948 op <<= 2; 7949 Value |= op; 7950 break; 7951 } 7952 case AArch64::WHILEGE_2PXX_B: 7953 case AArch64::WHILEGE_2PXX_D: 7954 case AArch64::WHILEGE_2PXX_H: 7955 case AArch64::WHILEGE_2PXX_S: 7956 case AArch64::WHILEGT_2PXX_B: 7957 case AArch64::WHILEGT_2PXX_D: 7958 case AArch64::WHILEGT_2PXX_H: 7959 case AArch64::WHILEGT_2PXX_S: 7960 case AArch64::WHILEHI_2PXX_B: 7961 case AArch64::WHILEHI_2PXX_D: 7962 case AArch64::WHILEHI_2PXX_H: 7963 case AArch64::WHILEHI_2PXX_S: 7964 case AArch64::WHILEHS_2PXX_B: 7965 case AArch64::WHILEHS_2PXX_D: 7966 case AArch64::WHILEHS_2PXX_H: 7967 case AArch64::WHILEHS_2PXX_S: 7968 case AArch64::WHILELE_2PXX_B: 7969 case AArch64::WHILELE_2PXX_D: 7970 case AArch64::WHILELE_2PXX_H: 7971 case AArch64::WHILELE_2PXX_S: 7972 case AArch64::WHILELO_2PXX_B: 7973 case AArch64::WHILELO_2PXX_D: 7974 case AArch64::WHILELO_2PXX_H: 7975 case AArch64::WHILELO_2PXX_S: 7976 case AArch64::WHILELS_2PXX_B: 7977 case AArch64::WHILELS_2PXX_D: 7978 case AArch64::WHILELS_2PXX_H: 7979 case AArch64::WHILELS_2PXX_S: 7980 case AArch64::WHILELT_2PXX_B: 7981 case AArch64::WHILELT_2PXX_D: 7982 case AArch64::WHILELT_2PXX_H: 7983 case AArch64::WHILELT_2PXX_S: { 7984 // op: Pd 7985 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 7986 op &= UINT64_C(7); 7987 op <<= 1; 7988 Value |= op; 7989 // op: Rn 7990 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 7991 op &= UINT64_C(31); 7992 op <<= 5; 7993 Value |= op; 7994 // op: Rm 7995 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 7996 op &= UINT64_C(31); 7997 op <<= 16; 7998 Value |= op; 7999 break; 8000 } 8001 case AArch64::PFALSE: 8002 case AArch64::RDFFR_P_REAL: { 8003 // op: Pd 8004 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8005 op &= UINT64_C(15); 8006 Value |= op; 8007 break; 8008 } 8009 case AArch64::PEXT_2PCI_B: 8010 case AArch64::PEXT_2PCI_D: 8011 case AArch64::PEXT_2PCI_H: 8012 case AArch64::PEXT_2PCI_S: { 8013 // op: Pd 8014 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8015 op &= UINT64_C(15); 8016 Value |= op; 8017 // op: PNn 8018 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 8019 op &= UINT64_C(7); 8020 op <<= 5; 8021 Value |= op; 8022 // op: index 8023 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8024 op &= UINT64_C(1); 8025 op <<= 8; 8026 Value |= op; 8027 break; 8028 } 8029 case AArch64::PEXT_PCI_B: 8030 case AArch64::PEXT_PCI_D: 8031 case AArch64::PEXT_PCI_H: 8032 case AArch64::PEXT_PCI_S: { 8033 // op: Pd 8034 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8035 op &= UINT64_C(15); 8036 Value |= op; 8037 // op: PNn 8038 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 8039 op &= UINT64_C(7); 8040 op <<= 5; 8041 Value |= op; 8042 // op: index 8043 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8044 op &= UINT64_C(3); 8045 op <<= 8; 8046 Value |= op; 8047 break; 8048 } 8049 case AArch64::ANDS_PPzPP: 8050 case AArch64::AND_PPzPP: 8051 case AArch64::BICS_PPzPP: 8052 case AArch64::BIC_PPzPP: 8053 case AArch64::BRKPAS_PPzPP: 8054 case AArch64::BRKPA_PPzPP: 8055 case AArch64::BRKPBS_PPzPP: 8056 case AArch64::BRKPB_PPzPP: 8057 case AArch64::EORS_PPzPP: 8058 case AArch64::EOR_PPzPP: 8059 case AArch64::NANDS_PPzPP: 8060 case AArch64::NAND_PPzPP: 8061 case AArch64::NORS_PPzPP: 8062 case AArch64::NOR_PPzPP: 8063 case AArch64::ORNS_PPzPP: 8064 case AArch64::ORN_PPzPP: 8065 case AArch64::ORRS_PPzPP: 8066 case AArch64::ORR_PPzPP: 8067 case AArch64::SEL_PPPP: { 8068 // op: Pd 8069 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8070 op &= UINT64_C(15); 8071 Value |= op; 8072 // op: Pg 8073 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8074 op &= UINT64_C(15); 8075 op <<= 10; 8076 Value |= op; 8077 // op: Pm 8078 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8079 op &= UINT64_C(15); 8080 op <<= 16; 8081 Value |= op; 8082 // op: Pn 8083 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8084 op &= UINT64_C(15); 8085 op <<= 5; 8086 Value |= op; 8087 break; 8088 } 8089 case AArch64::BRKAS_PPzP: 8090 case AArch64::BRKA_PPzP: 8091 case AArch64::BRKBS_PPzP: 8092 case AArch64::BRKB_PPzP: { 8093 // op: Pd 8094 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8095 op &= UINT64_C(15); 8096 Value |= op; 8097 // op: Pg 8098 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8099 op &= UINT64_C(15); 8100 op <<= 10; 8101 Value |= op; 8102 // op: Pn 8103 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8104 op &= UINT64_C(15); 8105 op <<= 5; 8106 Value |= op; 8107 break; 8108 } 8109 case AArch64::RDFFRS_PPz: 8110 case AArch64::RDFFR_PPz_REAL: { 8111 // op: Pd 8112 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8113 op &= UINT64_C(15); 8114 Value |= op; 8115 // op: Pg 8116 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8117 op &= UINT64_C(15); 8118 op <<= 5; 8119 Value |= op; 8120 break; 8121 } 8122 case AArch64::CMPEQ_PPzZZ_B: 8123 case AArch64::CMPEQ_PPzZZ_D: 8124 case AArch64::CMPEQ_PPzZZ_H: 8125 case AArch64::CMPEQ_PPzZZ_S: 8126 case AArch64::CMPEQ_WIDE_PPzZZ_B: 8127 case AArch64::CMPEQ_WIDE_PPzZZ_H: 8128 case AArch64::CMPEQ_WIDE_PPzZZ_S: 8129 case AArch64::CMPGE_PPzZZ_B: 8130 case AArch64::CMPGE_PPzZZ_D: 8131 case AArch64::CMPGE_PPzZZ_H: 8132 case AArch64::CMPGE_PPzZZ_S: 8133 case AArch64::CMPGE_WIDE_PPzZZ_B: 8134 case AArch64::CMPGE_WIDE_PPzZZ_H: 8135 case AArch64::CMPGE_WIDE_PPzZZ_S: 8136 case AArch64::CMPGT_PPzZZ_B: 8137 case AArch64::CMPGT_PPzZZ_D: 8138 case AArch64::CMPGT_PPzZZ_H: 8139 case AArch64::CMPGT_PPzZZ_S: 8140 case AArch64::CMPGT_WIDE_PPzZZ_B: 8141 case AArch64::CMPGT_WIDE_PPzZZ_H: 8142 case AArch64::CMPGT_WIDE_PPzZZ_S: 8143 case AArch64::CMPHI_PPzZZ_B: 8144 case AArch64::CMPHI_PPzZZ_D: 8145 case AArch64::CMPHI_PPzZZ_H: 8146 case AArch64::CMPHI_PPzZZ_S: 8147 case AArch64::CMPHI_WIDE_PPzZZ_B: 8148 case AArch64::CMPHI_WIDE_PPzZZ_H: 8149 case AArch64::CMPHI_WIDE_PPzZZ_S: 8150 case AArch64::CMPHS_PPzZZ_B: 8151 case AArch64::CMPHS_PPzZZ_D: 8152 case AArch64::CMPHS_PPzZZ_H: 8153 case AArch64::CMPHS_PPzZZ_S: 8154 case AArch64::CMPHS_WIDE_PPzZZ_B: 8155 case AArch64::CMPHS_WIDE_PPzZZ_H: 8156 case AArch64::CMPHS_WIDE_PPzZZ_S: 8157 case AArch64::CMPLE_WIDE_PPzZZ_B: 8158 case AArch64::CMPLE_WIDE_PPzZZ_H: 8159 case AArch64::CMPLE_WIDE_PPzZZ_S: 8160 case AArch64::CMPLO_WIDE_PPzZZ_B: 8161 case AArch64::CMPLO_WIDE_PPzZZ_H: 8162 case AArch64::CMPLO_WIDE_PPzZZ_S: 8163 case AArch64::CMPLS_WIDE_PPzZZ_B: 8164 case AArch64::CMPLS_WIDE_PPzZZ_H: 8165 case AArch64::CMPLS_WIDE_PPzZZ_S: 8166 case AArch64::CMPLT_WIDE_PPzZZ_B: 8167 case AArch64::CMPLT_WIDE_PPzZZ_H: 8168 case AArch64::CMPLT_WIDE_PPzZZ_S: 8169 case AArch64::CMPNE_PPzZZ_B: 8170 case AArch64::CMPNE_PPzZZ_D: 8171 case AArch64::CMPNE_PPzZZ_H: 8172 case AArch64::CMPNE_PPzZZ_S: 8173 case AArch64::CMPNE_WIDE_PPzZZ_B: 8174 case AArch64::CMPNE_WIDE_PPzZZ_H: 8175 case AArch64::CMPNE_WIDE_PPzZZ_S: 8176 case AArch64::FACGE_PPzZZ_D: 8177 case AArch64::FACGE_PPzZZ_H: 8178 case AArch64::FACGE_PPzZZ_S: 8179 case AArch64::FACGT_PPzZZ_D: 8180 case AArch64::FACGT_PPzZZ_H: 8181 case AArch64::FACGT_PPzZZ_S: 8182 case AArch64::FCMEQ_PPzZZ_D: 8183 case AArch64::FCMEQ_PPzZZ_H: 8184 case AArch64::FCMEQ_PPzZZ_S: 8185 case AArch64::FCMGE_PPzZZ_D: 8186 case AArch64::FCMGE_PPzZZ_H: 8187 case AArch64::FCMGE_PPzZZ_S: 8188 case AArch64::FCMGT_PPzZZ_D: 8189 case AArch64::FCMGT_PPzZZ_H: 8190 case AArch64::FCMGT_PPzZZ_S: 8191 case AArch64::FCMNE_PPzZZ_D: 8192 case AArch64::FCMNE_PPzZZ_H: 8193 case AArch64::FCMNE_PPzZZ_S: 8194 case AArch64::FCMUO_PPzZZ_D: 8195 case AArch64::FCMUO_PPzZZ_H: 8196 case AArch64::FCMUO_PPzZZ_S: 8197 case AArch64::MATCH_PPzZZ_B: 8198 case AArch64::MATCH_PPzZZ_H: 8199 case AArch64::NMATCH_PPzZZ_B: 8200 case AArch64::NMATCH_PPzZZ_H: { 8201 // op: Pd 8202 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8203 op &= UINT64_C(15); 8204 Value |= op; 8205 // op: Pg 8206 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8207 op &= UINT64_C(7); 8208 op <<= 10; 8209 Value |= op; 8210 // op: Zm 8211 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8212 op &= UINT64_C(31); 8213 op <<= 16; 8214 Value |= op; 8215 // op: Zn 8216 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8217 op &= UINT64_C(31); 8218 op <<= 5; 8219 Value |= op; 8220 break; 8221 } 8222 case AArch64::FCMEQ_PPzZ0_D: 8223 case AArch64::FCMEQ_PPzZ0_H: 8224 case AArch64::FCMEQ_PPzZ0_S: 8225 case AArch64::FCMGE_PPzZ0_D: 8226 case AArch64::FCMGE_PPzZ0_H: 8227 case AArch64::FCMGE_PPzZ0_S: 8228 case AArch64::FCMGT_PPzZ0_D: 8229 case AArch64::FCMGT_PPzZ0_H: 8230 case AArch64::FCMGT_PPzZ0_S: 8231 case AArch64::FCMLE_PPzZ0_D: 8232 case AArch64::FCMLE_PPzZ0_H: 8233 case AArch64::FCMLE_PPzZ0_S: 8234 case AArch64::FCMLT_PPzZ0_D: 8235 case AArch64::FCMLT_PPzZ0_H: 8236 case AArch64::FCMLT_PPzZ0_S: 8237 case AArch64::FCMNE_PPzZ0_D: 8238 case AArch64::FCMNE_PPzZ0_H: 8239 case AArch64::FCMNE_PPzZ0_S: { 8240 // op: Pd 8241 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8242 op &= UINT64_C(15); 8243 Value |= op; 8244 // op: Pg 8245 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8246 op &= UINT64_C(7); 8247 op <<= 10; 8248 Value |= op; 8249 // op: Zn 8250 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8251 op &= UINT64_C(31); 8252 op <<= 5; 8253 Value |= op; 8254 break; 8255 } 8256 case AArch64::CMPEQ_PPzZI_B: 8257 case AArch64::CMPEQ_PPzZI_D: 8258 case AArch64::CMPEQ_PPzZI_H: 8259 case AArch64::CMPEQ_PPzZI_S: 8260 case AArch64::CMPGE_PPzZI_B: 8261 case AArch64::CMPGE_PPzZI_D: 8262 case AArch64::CMPGE_PPzZI_H: 8263 case AArch64::CMPGE_PPzZI_S: 8264 case AArch64::CMPGT_PPzZI_B: 8265 case AArch64::CMPGT_PPzZI_D: 8266 case AArch64::CMPGT_PPzZI_H: 8267 case AArch64::CMPGT_PPzZI_S: 8268 case AArch64::CMPLE_PPzZI_B: 8269 case AArch64::CMPLE_PPzZI_D: 8270 case AArch64::CMPLE_PPzZI_H: 8271 case AArch64::CMPLE_PPzZI_S: 8272 case AArch64::CMPLT_PPzZI_B: 8273 case AArch64::CMPLT_PPzZI_D: 8274 case AArch64::CMPLT_PPzZI_H: 8275 case AArch64::CMPLT_PPzZI_S: 8276 case AArch64::CMPNE_PPzZI_B: 8277 case AArch64::CMPNE_PPzZI_D: 8278 case AArch64::CMPNE_PPzZI_H: 8279 case AArch64::CMPNE_PPzZI_S: { 8280 // op: Pd 8281 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8282 op &= UINT64_C(15); 8283 Value |= op; 8284 // op: Pg 8285 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8286 op &= UINT64_C(7); 8287 op <<= 10; 8288 Value |= op; 8289 // op: Zn 8290 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8291 op &= UINT64_C(31); 8292 op <<= 5; 8293 Value |= op; 8294 // op: imm5 8295 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8296 op &= UINT64_C(31); 8297 op <<= 16; 8298 Value |= op; 8299 break; 8300 } 8301 case AArch64::CMPHI_PPzZI_B: 8302 case AArch64::CMPHI_PPzZI_D: 8303 case AArch64::CMPHI_PPzZI_H: 8304 case AArch64::CMPHI_PPzZI_S: 8305 case AArch64::CMPHS_PPzZI_B: 8306 case AArch64::CMPHS_PPzZI_D: 8307 case AArch64::CMPHS_PPzZI_H: 8308 case AArch64::CMPHS_PPzZI_S: 8309 case AArch64::CMPLO_PPzZI_B: 8310 case AArch64::CMPLO_PPzZI_D: 8311 case AArch64::CMPLO_PPzZI_H: 8312 case AArch64::CMPLO_PPzZI_S: 8313 case AArch64::CMPLS_PPzZI_B: 8314 case AArch64::CMPLS_PPzZI_D: 8315 case AArch64::CMPLS_PPzZI_H: 8316 case AArch64::CMPLS_PPzZI_S: { 8317 // op: Pd 8318 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8319 op &= UINT64_C(15); 8320 Value |= op; 8321 // op: Pg 8322 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8323 op &= UINT64_C(7); 8324 op <<= 10; 8325 Value |= op; 8326 // op: Zn 8327 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8328 op &= UINT64_C(31); 8329 op <<= 5; 8330 Value |= op; 8331 // op: imm7 8332 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8333 op &= UINT64_C(127); 8334 op <<= 14; 8335 Value |= op; 8336 break; 8337 } 8338 case AArch64::BRKA_PPmP: 8339 case AArch64::BRKB_PPmP: { 8340 // op: Pd 8341 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8342 op &= UINT64_C(15); 8343 Value |= op; 8344 // op: Pg 8345 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8346 op &= UINT64_C(15); 8347 op <<= 10; 8348 Value |= op; 8349 // op: Pn 8350 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8351 op &= UINT64_C(15); 8352 op <<= 5; 8353 Value |= op; 8354 break; 8355 } 8356 case AArch64::TRN1_PPP_B: 8357 case AArch64::TRN1_PPP_D: 8358 case AArch64::TRN1_PPP_H: 8359 case AArch64::TRN1_PPP_S: 8360 case AArch64::TRN2_PPP_B: 8361 case AArch64::TRN2_PPP_D: 8362 case AArch64::TRN2_PPP_H: 8363 case AArch64::TRN2_PPP_S: 8364 case AArch64::UZP1_PPP_B: 8365 case AArch64::UZP1_PPP_D: 8366 case AArch64::UZP1_PPP_H: 8367 case AArch64::UZP1_PPP_S: 8368 case AArch64::UZP2_PPP_B: 8369 case AArch64::UZP2_PPP_D: 8370 case AArch64::UZP2_PPP_H: 8371 case AArch64::UZP2_PPP_S: 8372 case AArch64::ZIP1_PPP_B: 8373 case AArch64::ZIP1_PPP_D: 8374 case AArch64::ZIP1_PPP_H: 8375 case AArch64::ZIP1_PPP_S: 8376 case AArch64::ZIP2_PPP_B: 8377 case AArch64::ZIP2_PPP_D: 8378 case AArch64::ZIP2_PPP_H: 8379 case AArch64::ZIP2_PPP_S: { 8380 // op: Pd 8381 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8382 op &= UINT64_C(15); 8383 Value |= op; 8384 // op: Pm 8385 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8386 op &= UINT64_C(15); 8387 op <<= 16; 8388 Value |= op; 8389 // op: Pn 8390 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8391 op &= UINT64_C(15); 8392 op <<= 5; 8393 Value |= op; 8394 break; 8395 } 8396 case AArch64::PUNPKHI_PP: 8397 case AArch64::PUNPKLO_PP: 8398 case AArch64::REV_PP_B: 8399 case AArch64::REV_PP_D: 8400 case AArch64::REV_PP_H: 8401 case AArch64::REV_PP_S: { 8402 // op: Pd 8403 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8404 op &= UINT64_C(15); 8405 Value |= op; 8406 // op: Pn 8407 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8408 op &= UINT64_C(15); 8409 op <<= 5; 8410 Value |= op; 8411 break; 8412 } 8413 case AArch64::WHILEGE_PWW_B: 8414 case AArch64::WHILEGE_PWW_D: 8415 case AArch64::WHILEGE_PWW_H: 8416 case AArch64::WHILEGE_PWW_S: 8417 case AArch64::WHILEGE_PXX_B: 8418 case AArch64::WHILEGE_PXX_D: 8419 case AArch64::WHILEGE_PXX_H: 8420 case AArch64::WHILEGE_PXX_S: 8421 case AArch64::WHILEGT_PWW_B: 8422 case AArch64::WHILEGT_PWW_D: 8423 case AArch64::WHILEGT_PWW_H: 8424 case AArch64::WHILEGT_PWW_S: 8425 case AArch64::WHILEGT_PXX_B: 8426 case AArch64::WHILEGT_PXX_D: 8427 case AArch64::WHILEGT_PXX_H: 8428 case AArch64::WHILEGT_PXX_S: 8429 case AArch64::WHILEHI_PWW_B: 8430 case AArch64::WHILEHI_PWW_D: 8431 case AArch64::WHILEHI_PWW_H: 8432 case AArch64::WHILEHI_PWW_S: 8433 case AArch64::WHILEHI_PXX_B: 8434 case AArch64::WHILEHI_PXX_D: 8435 case AArch64::WHILEHI_PXX_H: 8436 case AArch64::WHILEHI_PXX_S: 8437 case AArch64::WHILEHS_PWW_B: 8438 case AArch64::WHILEHS_PWW_D: 8439 case AArch64::WHILEHS_PWW_H: 8440 case AArch64::WHILEHS_PWW_S: 8441 case AArch64::WHILEHS_PXX_B: 8442 case AArch64::WHILEHS_PXX_D: 8443 case AArch64::WHILEHS_PXX_H: 8444 case AArch64::WHILEHS_PXX_S: 8445 case AArch64::WHILELE_PWW_B: 8446 case AArch64::WHILELE_PWW_D: 8447 case AArch64::WHILELE_PWW_H: 8448 case AArch64::WHILELE_PWW_S: 8449 case AArch64::WHILELE_PXX_B: 8450 case AArch64::WHILELE_PXX_D: 8451 case AArch64::WHILELE_PXX_H: 8452 case AArch64::WHILELE_PXX_S: 8453 case AArch64::WHILELO_PWW_B: 8454 case AArch64::WHILELO_PWW_D: 8455 case AArch64::WHILELO_PWW_H: 8456 case AArch64::WHILELO_PWW_S: 8457 case AArch64::WHILELO_PXX_B: 8458 case AArch64::WHILELO_PXX_D: 8459 case AArch64::WHILELO_PXX_H: 8460 case AArch64::WHILELO_PXX_S: 8461 case AArch64::WHILELS_PWW_B: 8462 case AArch64::WHILELS_PWW_D: 8463 case AArch64::WHILELS_PWW_H: 8464 case AArch64::WHILELS_PWW_S: 8465 case AArch64::WHILELS_PXX_B: 8466 case AArch64::WHILELS_PXX_D: 8467 case AArch64::WHILELS_PXX_H: 8468 case AArch64::WHILELS_PXX_S: 8469 case AArch64::WHILELT_PWW_B: 8470 case AArch64::WHILELT_PWW_D: 8471 case AArch64::WHILELT_PWW_H: 8472 case AArch64::WHILELT_PWW_S: 8473 case AArch64::WHILELT_PXX_B: 8474 case AArch64::WHILELT_PXX_D: 8475 case AArch64::WHILELT_PXX_H: 8476 case AArch64::WHILELT_PXX_S: 8477 case AArch64::WHILERW_PXX_B: 8478 case AArch64::WHILERW_PXX_D: 8479 case AArch64::WHILERW_PXX_H: 8480 case AArch64::WHILERW_PXX_S: 8481 case AArch64::WHILEWR_PXX_B: 8482 case AArch64::WHILEWR_PXX_D: 8483 case AArch64::WHILEWR_PXX_H: 8484 case AArch64::WHILEWR_PXX_S: { 8485 // op: Pd 8486 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8487 op &= UINT64_C(15); 8488 Value |= op; 8489 // op: Rm 8490 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8491 op &= UINT64_C(31); 8492 op <<= 16; 8493 Value |= op; 8494 // op: Rn 8495 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8496 op &= UINT64_C(31); 8497 op <<= 5; 8498 Value |= op; 8499 break; 8500 } 8501 case AArch64::PMOV_PZI_B: { 8502 // op: Pd 8503 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8504 op &= UINT64_C(15); 8505 Value |= op; 8506 // op: Zn 8507 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8508 op &= UINT64_C(31); 8509 op <<= 5; 8510 Value |= op; 8511 break; 8512 } 8513 case AArch64::PMOV_PZI_D: { 8514 // op: Pd 8515 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8516 op &= UINT64_C(15); 8517 Value |= op; 8518 // op: Zn 8519 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8520 op &= UINT64_C(31); 8521 op <<= 5; 8522 Value |= op; 8523 // op: index 8524 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8525 Value |= (op & UINT64_C(4)) << 20; 8526 Value |= (op & UINT64_C(3)) << 17; 8527 break; 8528 } 8529 case AArch64::PMOV_PZI_H: { 8530 // op: Pd 8531 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8532 op &= UINT64_C(15); 8533 Value |= op; 8534 // op: Zn 8535 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8536 op &= UINT64_C(31); 8537 op <<= 5; 8538 Value |= op; 8539 // op: index 8540 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8541 op &= UINT64_C(1); 8542 op <<= 17; 8543 Value |= op; 8544 break; 8545 } 8546 case AArch64::PMOV_PZI_S: { 8547 // op: Pd 8548 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8549 op &= UINT64_C(15); 8550 Value |= op; 8551 // op: Zn 8552 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8553 op &= UINT64_C(31); 8554 op <<= 5; 8555 Value |= op; 8556 // op: index 8557 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8558 op &= UINT64_C(3); 8559 op <<= 17; 8560 Value |= op; 8561 break; 8562 } 8563 case AArch64::PTRUES_B: 8564 case AArch64::PTRUES_D: 8565 case AArch64::PTRUES_H: 8566 case AArch64::PTRUES_S: 8567 case AArch64::PTRUE_B: 8568 case AArch64::PTRUE_D: 8569 case AArch64::PTRUE_H: 8570 case AArch64::PTRUE_S: { 8571 // op: Pd 8572 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8573 op &= UINT64_C(15); 8574 Value |= op; 8575 // op: pattern 8576 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8577 op &= UINT64_C(31); 8578 op <<= 5; 8579 Value |= op; 8580 break; 8581 } 8582 case AArch64::BRKNS_PPzP: 8583 case AArch64::BRKN_PPzP: { 8584 // op: Pdm 8585 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8586 op &= UINT64_C(15); 8587 Value |= op; 8588 // op: Pg 8589 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8590 op &= UINT64_C(15); 8591 op <<= 10; 8592 Value |= op; 8593 // op: Pn 8594 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8595 op &= UINT64_C(15); 8596 op <<= 5; 8597 Value |= op; 8598 break; 8599 } 8600 case AArch64::PFIRST_B: 8601 case AArch64::PNEXT_B: 8602 case AArch64::PNEXT_D: 8603 case AArch64::PNEXT_H: 8604 case AArch64::PNEXT_S: { 8605 // op: Pdn 8606 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8607 op &= UINT64_C(15); 8608 Value |= op; 8609 // op: Pg 8610 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8611 op &= UINT64_C(15); 8612 op <<= 5; 8613 Value |= op; 8614 break; 8615 } 8616 case AArch64::PTEST_PP: { 8617 // op: Pg 8618 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8619 op &= UINT64_C(15); 8620 op <<= 10; 8621 Value |= op; 8622 // op: Pn 8623 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8624 op &= UINT64_C(15); 8625 op <<= 5; 8626 Value |= op; 8627 break; 8628 } 8629 case AArch64::CNTP_XPP_B: 8630 case AArch64::CNTP_XPP_D: 8631 case AArch64::CNTP_XPP_H: 8632 case AArch64::CNTP_XPP_S: { 8633 // op: Pg 8634 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8635 op &= UINT64_C(15); 8636 op <<= 10; 8637 Value |= op; 8638 // op: Pn 8639 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8640 op &= UINT64_C(15); 8641 op <<= 5; 8642 Value |= op; 8643 // op: Rd 8644 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8645 op &= UINT64_C(31); 8646 Value |= op; 8647 break; 8648 } 8649 case AArch64::SEL_ZPZZ_B: 8650 case AArch64::SEL_ZPZZ_D: 8651 case AArch64::SEL_ZPZZ_H: 8652 case AArch64::SEL_ZPZZ_S: { 8653 // op: Pg 8654 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8655 op &= UINT64_C(15); 8656 op <<= 10; 8657 Value |= op; 8658 // op: Zd 8659 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8660 op &= UINT64_C(31); 8661 Value |= op; 8662 // op: Zm 8663 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8664 op &= UINT64_C(31); 8665 op <<= 16; 8666 Value |= op; 8667 // op: Zn 8668 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8669 op &= UINT64_C(31); 8670 op <<= 5; 8671 Value |= op; 8672 break; 8673 } 8674 case AArch64::LASTA_RPZ_B: 8675 case AArch64::LASTA_RPZ_D: 8676 case AArch64::LASTA_RPZ_H: 8677 case AArch64::LASTA_RPZ_S: 8678 case AArch64::LASTB_RPZ_B: 8679 case AArch64::LASTB_RPZ_D: 8680 case AArch64::LASTB_RPZ_H: 8681 case AArch64::LASTB_RPZ_S: { 8682 // op: Pg 8683 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8684 op &= UINT64_C(7); 8685 op <<= 10; 8686 Value |= op; 8687 // op: Rd 8688 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8689 op &= UINT64_C(31); 8690 Value |= op; 8691 // op: Zn 8692 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8693 op &= UINT64_C(31); 8694 op <<= 5; 8695 Value |= op; 8696 break; 8697 } 8698 case AArch64::CLASTA_RPZ_B: 8699 case AArch64::CLASTA_RPZ_D: 8700 case AArch64::CLASTA_RPZ_H: 8701 case AArch64::CLASTA_RPZ_S: 8702 case AArch64::CLASTB_RPZ_B: 8703 case AArch64::CLASTB_RPZ_D: 8704 case AArch64::CLASTB_RPZ_H: 8705 case AArch64::CLASTB_RPZ_S: { 8706 // op: Pg 8707 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8708 op &= UINT64_C(7); 8709 op <<= 10; 8710 Value |= op; 8711 // op: Rdn 8712 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8713 op &= UINT64_C(31); 8714 Value |= op; 8715 // op: Zm 8716 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8717 op &= UINT64_C(31); 8718 op <<= 5; 8719 Value |= op; 8720 break; 8721 } 8722 case AArch64::LD2B: 8723 case AArch64::LD2D: 8724 case AArch64::LD2H: 8725 case AArch64::LD2Q: 8726 case AArch64::LD2W: 8727 case AArch64::LD3B: 8728 case AArch64::LD3D: 8729 case AArch64::LD3H: 8730 case AArch64::LD3Q: 8731 case AArch64::LD3W: 8732 case AArch64::LD4B: 8733 case AArch64::LD4D: 8734 case AArch64::LD4H: 8735 case AArch64::LD4Q: 8736 case AArch64::LD4W: 8737 case AArch64::LDNT1B_ZRR: 8738 case AArch64::LDNT1D_ZRR: 8739 case AArch64::LDNT1H_ZRR: 8740 case AArch64::LDNT1W_ZRR: 8741 case AArch64::ST1B: 8742 case AArch64::ST1B_D: 8743 case AArch64::ST1B_H: 8744 case AArch64::ST1B_S: 8745 case AArch64::ST1D: 8746 case AArch64::ST1D_Q: 8747 case AArch64::ST1H: 8748 case AArch64::ST1H_D: 8749 case AArch64::ST1H_S: 8750 case AArch64::ST1W: 8751 case AArch64::ST1W_D: 8752 case AArch64::ST1W_Q: 8753 case AArch64::ST2B: 8754 case AArch64::ST2D: 8755 case AArch64::ST2H: 8756 case AArch64::ST2W: 8757 case AArch64::ST3B: 8758 case AArch64::ST3D: 8759 case AArch64::ST3H: 8760 case AArch64::ST3W: 8761 case AArch64::ST4B: 8762 case AArch64::ST4D: 8763 case AArch64::ST4H: 8764 case AArch64::ST4W: 8765 case AArch64::STNT1B_ZRR: 8766 case AArch64::STNT1D_ZRR: 8767 case AArch64::STNT1H_ZRR: 8768 case AArch64::STNT1W_ZRR: { 8769 // op: Pg 8770 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8771 op &= UINT64_C(7); 8772 op <<= 10; 8773 Value |= op; 8774 // op: Rm 8775 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8776 op &= UINT64_C(31); 8777 op <<= 16; 8778 Value |= op; 8779 // op: Rn 8780 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8781 op &= UINT64_C(31); 8782 op <<= 5; 8783 Value |= op; 8784 // op: Zt 8785 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8786 op &= UINT64_C(31); 8787 Value |= op; 8788 break; 8789 } 8790 case AArch64::LDNT1B_ZZR_D_REAL: 8791 case AArch64::LDNT1B_ZZR_S_REAL: 8792 case AArch64::LDNT1D_ZZR_D_REAL: 8793 case AArch64::LDNT1H_ZZR_D_REAL: 8794 case AArch64::LDNT1H_ZZR_S_REAL: 8795 case AArch64::LDNT1SB_ZZR_D_REAL: 8796 case AArch64::LDNT1SB_ZZR_S_REAL: 8797 case AArch64::LDNT1SH_ZZR_D_REAL: 8798 case AArch64::LDNT1SH_ZZR_S_REAL: 8799 case AArch64::LDNT1SW_ZZR_D_REAL: 8800 case AArch64::LDNT1W_ZZR_D_REAL: 8801 case AArch64::LDNT1W_ZZR_S_REAL: 8802 case AArch64::STNT1B_ZZR_D_REAL: 8803 case AArch64::STNT1B_ZZR_S_REAL: 8804 case AArch64::STNT1D_ZZR_D_REAL: 8805 case AArch64::STNT1H_ZZR_D_REAL: 8806 case AArch64::STNT1H_ZZR_S_REAL: 8807 case AArch64::STNT1W_ZZR_D_REAL: 8808 case AArch64::STNT1W_ZZR_S_REAL: { 8809 // op: Pg 8810 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8811 op &= UINT64_C(7); 8812 op <<= 10; 8813 Value |= op; 8814 // op: Rm 8815 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8816 op &= UINT64_C(31); 8817 op <<= 16; 8818 Value |= op; 8819 // op: Zn 8820 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8821 op &= UINT64_C(31); 8822 op <<= 5; 8823 Value |= op; 8824 // op: Zt 8825 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8826 op &= UINT64_C(31); 8827 Value |= op; 8828 break; 8829 } 8830 case AArch64::GLD1B_D_REAL: 8831 case AArch64::GLD1B_D_SXTW_REAL: 8832 case AArch64::GLD1B_D_UXTW_REAL: 8833 case AArch64::GLD1B_S_SXTW_REAL: 8834 case AArch64::GLD1B_S_UXTW_REAL: 8835 case AArch64::GLD1D_REAL: 8836 case AArch64::GLD1D_SCALED_REAL: 8837 case AArch64::GLD1D_SXTW_REAL: 8838 case AArch64::GLD1D_SXTW_SCALED_REAL: 8839 case AArch64::GLD1D_UXTW_REAL: 8840 case AArch64::GLD1D_UXTW_SCALED_REAL: 8841 case AArch64::GLD1H_D_REAL: 8842 case AArch64::GLD1H_D_SCALED_REAL: 8843 case AArch64::GLD1H_D_SXTW_REAL: 8844 case AArch64::GLD1H_D_SXTW_SCALED_REAL: 8845 case AArch64::GLD1H_D_UXTW_REAL: 8846 case AArch64::GLD1H_D_UXTW_SCALED_REAL: 8847 case AArch64::GLD1H_S_SXTW_REAL: 8848 case AArch64::GLD1H_S_SXTW_SCALED_REAL: 8849 case AArch64::GLD1H_S_UXTW_REAL: 8850 case AArch64::GLD1H_S_UXTW_SCALED_REAL: 8851 case AArch64::GLD1SB_D_REAL: 8852 case AArch64::GLD1SB_D_SXTW_REAL: 8853 case AArch64::GLD1SB_D_UXTW_REAL: 8854 case AArch64::GLD1SB_S_SXTW_REAL: 8855 case AArch64::GLD1SB_S_UXTW_REAL: 8856 case AArch64::GLD1SH_D_REAL: 8857 case AArch64::GLD1SH_D_SCALED_REAL: 8858 case AArch64::GLD1SH_D_SXTW_REAL: 8859 case AArch64::GLD1SH_D_SXTW_SCALED_REAL: 8860 case AArch64::GLD1SH_D_UXTW_REAL: 8861 case AArch64::GLD1SH_D_UXTW_SCALED_REAL: 8862 case AArch64::GLD1SH_S_SXTW_REAL: 8863 case AArch64::GLD1SH_S_SXTW_SCALED_REAL: 8864 case AArch64::GLD1SH_S_UXTW_REAL: 8865 case AArch64::GLD1SH_S_UXTW_SCALED_REAL: 8866 case AArch64::GLD1SW_D_REAL: 8867 case AArch64::GLD1SW_D_SCALED_REAL: 8868 case AArch64::GLD1SW_D_SXTW_REAL: 8869 case AArch64::GLD1SW_D_SXTW_SCALED_REAL: 8870 case AArch64::GLD1SW_D_UXTW_REAL: 8871 case AArch64::GLD1SW_D_UXTW_SCALED_REAL: 8872 case AArch64::GLD1W_D_REAL: 8873 case AArch64::GLD1W_D_SCALED_REAL: 8874 case AArch64::GLD1W_D_SXTW_REAL: 8875 case AArch64::GLD1W_D_SXTW_SCALED_REAL: 8876 case AArch64::GLD1W_D_UXTW_REAL: 8877 case AArch64::GLD1W_D_UXTW_SCALED_REAL: 8878 case AArch64::GLD1W_SXTW_REAL: 8879 case AArch64::GLD1W_SXTW_SCALED_REAL: 8880 case AArch64::GLD1W_UXTW_REAL: 8881 case AArch64::GLD1W_UXTW_SCALED_REAL: 8882 case AArch64::GLDFF1B_D_REAL: 8883 case AArch64::GLDFF1B_D_SXTW_REAL: 8884 case AArch64::GLDFF1B_D_UXTW_REAL: 8885 case AArch64::GLDFF1B_S_SXTW_REAL: 8886 case AArch64::GLDFF1B_S_UXTW_REAL: 8887 case AArch64::GLDFF1D_REAL: 8888 case AArch64::GLDFF1D_SCALED_REAL: 8889 case AArch64::GLDFF1D_SXTW_REAL: 8890 case AArch64::GLDFF1D_SXTW_SCALED_REAL: 8891 case AArch64::GLDFF1D_UXTW_REAL: 8892 case AArch64::GLDFF1D_UXTW_SCALED_REAL: 8893 case AArch64::GLDFF1H_D_REAL: 8894 case AArch64::GLDFF1H_D_SCALED_REAL: 8895 case AArch64::GLDFF1H_D_SXTW_REAL: 8896 case AArch64::GLDFF1H_D_SXTW_SCALED_REAL: 8897 case AArch64::GLDFF1H_D_UXTW_REAL: 8898 case AArch64::GLDFF1H_D_UXTW_SCALED_REAL: 8899 case AArch64::GLDFF1H_S_SXTW_REAL: 8900 case AArch64::GLDFF1H_S_SXTW_SCALED_REAL: 8901 case AArch64::GLDFF1H_S_UXTW_REAL: 8902 case AArch64::GLDFF1H_S_UXTW_SCALED_REAL: 8903 case AArch64::GLDFF1SB_D_REAL: 8904 case AArch64::GLDFF1SB_D_SXTW_REAL: 8905 case AArch64::GLDFF1SB_D_UXTW_REAL: 8906 case AArch64::GLDFF1SB_S_SXTW_REAL: 8907 case AArch64::GLDFF1SB_S_UXTW_REAL: 8908 case AArch64::GLDFF1SH_D_REAL: 8909 case AArch64::GLDFF1SH_D_SCALED_REAL: 8910 case AArch64::GLDFF1SH_D_SXTW_REAL: 8911 case AArch64::GLDFF1SH_D_SXTW_SCALED_REAL: 8912 case AArch64::GLDFF1SH_D_UXTW_REAL: 8913 case AArch64::GLDFF1SH_D_UXTW_SCALED_REAL: 8914 case AArch64::GLDFF1SH_S_SXTW_REAL: 8915 case AArch64::GLDFF1SH_S_SXTW_SCALED_REAL: 8916 case AArch64::GLDFF1SH_S_UXTW_REAL: 8917 case AArch64::GLDFF1SH_S_UXTW_SCALED_REAL: 8918 case AArch64::GLDFF1SW_D_REAL: 8919 case AArch64::GLDFF1SW_D_SCALED_REAL: 8920 case AArch64::GLDFF1SW_D_SXTW_REAL: 8921 case AArch64::GLDFF1SW_D_SXTW_SCALED_REAL: 8922 case AArch64::GLDFF1SW_D_UXTW_REAL: 8923 case AArch64::GLDFF1SW_D_UXTW_SCALED_REAL: 8924 case AArch64::GLDFF1W_D_REAL: 8925 case AArch64::GLDFF1W_D_SCALED_REAL: 8926 case AArch64::GLDFF1W_D_SXTW_REAL: 8927 case AArch64::GLDFF1W_D_SXTW_SCALED_REAL: 8928 case AArch64::GLDFF1W_D_UXTW_REAL: 8929 case AArch64::GLDFF1W_D_UXTW_SCALED_REAL: 8930 case AArch64::GLDFF1W_SXTW_REAL: 8931 case AArch64::GLDFF1W_SXTW_SCALED_REAL: 8932 case AArch64::GLDFF1W_UXTW_REAL: 8933 case AArch64::GLDFF1W_UXTW_SCALED_REAL: 8934 case AArch64::SST1B_D: 8935 case AArch64::SST1B_D_SXTW: 8936 case AArch64::SST1B_D_UXTW: 8937 case AArch64::SST1B_S_SXTW: 8938 case AArch64::SST1B_S_UXTW: 8939 case AArch64::SST1D: 8940 case AArch64::SST1D_SCALED: 8941 case AArch64::SST1D_SXTW: 8942 case AArch64::SST1D_SXTW_SCALED: 8943 case AArch64::SST1D_UXTW: 8944 case AArch64::SST1D_UXTW_SCALED: 8945 case AArch64::SST1H_D: 8946 case AArch64::SST1H_D_SCALED: 8947 case AArch64::SST1H_D_SXTW: 8948 case AArch64::SST1H_D_SXTW_SCALED: 8949 case AArch64::SST1H_D_UXTW: 8950 case AArch64::SST1H_D_UXTW_SCALED: 8951 case AArch64::SST1H_S_SXTW: 8952 case AArch64::SST1H_S_SXTW_SCALED: 8953 case AArch64::SST1H_S_UXTW: 8954 case AArch64::SST1H_S_UXTW_SCALED: 8955 case AArch64::SST1W_D: 8956 case AArch64::SST1W_D_SCALED: 8957 case AArch64::SST1W_D_SXTW: 8958 case AArch64::SST1W_D_SXTW_SCALED: 8959 case AArch64::SST1W_D_UXTW: 8960 case AArch64::SST1W_D_UXTW_SCALED: 8961 case AArch64::SST1W_SXTW: 8962 case AArch64::SST1W_SXTW_SCALED: 8963 case AArch64::SST1W_UXTW: 8964 case AArch64::SST1W_UXTW_SCALED: { 8965 // op: Pg 8966 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 8967 op &= UINT64_C(7); 8968 op <<= 10; 8969 Value |= op; 8970 // op: Rn 8971 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 8972 op &= UINT64_C(31); 8973 op <<= 5; 8974 Value |= op; 8975 // op: Zm 8976 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 8977 op &= UINT64_C(31); 8978 op <<= 16; 8979 Value |= op; 8980 // op: Zt 8981 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 8982 op &= UINT64_C(31); 8983 Value |= op; 8984 break; 8985 } 8986 case AArch64::PRFB_D_SCALED: 8987 case AArch64::PRFB_D_SXTW_SCALED: 8988 case AArch64::PRFB_D_UXTW_SCALED: 8989 case AArch64::PRFB_S_SXTW_SCALED: 8990 case AArch64::PRFB_S_UXTW_SCALED: 8991 case AArch64::PRFD_D_SCALED: 8992 case AArch64::PRFD_D_SXTW_SCALED: 8993 case AArch64::PRFD_D_UXTW_SCALED: 8994 case AArch64::PRFD_S_SXTW_SCALED: 8995 case AArch64::PRFD_S_UXTW_SCALED: 8996 case AArch64::PRFH_D_SCALED: 8997 case AArch64::PRFH_D_SXTW_SCALED: 8998 case AArch64::PRFH_D_UXTW_SCALED: 8999 case AArch64::PRFH_S_SXTW_SCALED: 9000 case AArch64::PRFH_S_UXTW_SCALED: 9001 case AArch64::PRFW_D_SCALED: 9002 case AArch64::PRFW_D_SXTW_SCALED: 9003 case AArch64::PRFW_D_UXTW_SCALED: 9004 case AArch64::PRFW_S_SXTW_SCALED: 9005 case AArch64::PRFW_S_UXTW_SCALED: { 9006 // op: Pg 9007 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9008 op &= UINT64_C(7); 9009 op <<= 10; 9010 Value |= op; 9011 // op: Rn 9012 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9013 op &= UINT64_C(31); 9014 op <<= 5; 9015 Value |= op; 9016 // op: Zm 9017 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9018 op &= UINT64_C(31); 9019 op <<= 16; 9020 Value |= op; 9021 // op: prfop 9022 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9023 op &= UINT64_C(15); 9024 Value |= op; 9025 break; 9026 } 9027 case AArch64::LD1B_D_IMM_REAL: 9028 case AArch64::LD1B_H_IMM_REAL: 9029 case AArch64::LD1B_IMM_REAL: 9030 case AArch64::LD1B_S_IMM_REAL: 9031 case AArch64::LD1D_IMM_REAL: 9032 case AArch64::LD1H_D_IMM_REAL: 9033 case AArch64::LD1H_IMM_REAL: 9034 case AArch64::LD1H_S_IMM_REAL: 9035 case AArch64::LD1SB_D_IMM_REAL: 9036 case AArch64::LD1SB_H_IMM_REAL: 9037 case AArch64::LD1SB_S_IMM_REAL: 9038 case AArch64::LD1SH_D_IMM_REAL: 9039 case AArch64::LD1SH_S_IMM_REAL: 9040 case AArch64::LD1SW_D_IMM_REAL: 9041 case AArch64::LD1W_D_IMM_REAL: 9042 case AArch64::LD1W_IMM_REAL: 9043 case AArch64::LDNF1B_D_IMM_REAL: 9044 case AArch64::LDNF1B_H_IMM_REAL: 9045 case AArch64::LDNF1B_IMM_REAL: 9046 case AArch64::LDNF1B_S_IMM_REAL: 9047 case AArch64::LDNF1D_IMM_REAL: 9048 case AArch64::LDNF1H_D_IMM_REAL: 9049 case AArch64::LDNF1H_IMM_REAL: 9050 case AArch64::LDNF1H_S_IMM_REAL: 9051 case AArch64::LDNF1SB_D_IMM_REAL: 9052 case AArch64::LDNF1SB_H_IMM_REAL: 9053 case AArch64::LDNF1SB_S_IMM_REAL: 9054 case AArch64::LDNF1SH_D_IMM_REAL: 9055 case AArch64::LDNF1SH_S_IMM_REAL: 9056 case AArch64::LDNF1SW_D_IMM_REAL: 9057 case AArch64::LDNF1W_D_IMM_REAL: 9058 case AArch64::LDNF1W_IMM_REAL: 9059 case AArch64::ST1B_D_IMM: 9060 case AArch64::ST1B_H_IMM: 9061 case AArch64::ST1B_IMM: 9062 case AArch64::ST1B_S_IMM: 9063 case AArch64::ST1D_IMM: 9064 case AArch64::ST1D_Q_IMM: 9065 case AArch64::ST1H_D_IMM: 9066 case AArch64::ST1H_IMM: 9067 case AArch64::ST1H_S_IMM: 9068 case AArch64::ST1W_D_IMM: 9069 case AArch64::ST1W_IMM: 9070 case AArch64::ST1W_Q_IMM: 9071 case AArch64::ST2B_IMM: 9072 case AArch64::ST2D_IMM: 9073 case AArch64::ST2H_IMM: 9074 case AArch64::ST2W_IMM: 9075 case AArch64::ST3B_IMM: 9076 case AArch64::ST3D_IMM: 9077 case AArch64::ST3H_IMM: 9078 case AArch64::ST3W_IMM: 9079 case AArch64::ST4B_IMM: 9080 case AArch64::ST4D_IMM: 9081 case AArch64::ST4H_IMM: 9082 case AArch64::ST4W_IMM: 9083 case AArch64::STNT1B_ZRI: 9084 case AArch64::STNT1D_ZRI: 9085 case AArch64::STNT1H_ZRI: 9086 case AArch64::STNT1W_ZRI: { 9087 // op: Pg 9088 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9089 op &= UINT64_C(7); 9090 op <<= 10; 9091 Value |= op; 9092 // op: Rn 9093 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9094 op &= UINT64_C(31); 9095 op <<= 5; 9096 Value |= op; 9097 // op: Zt 9098 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9099 op &= UINT64_C(31); 9100 Value |= op; 9101 // op: imm4 9102 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9103 op &= UINT64_C(15); 9104 op <<= 16; 9105 Value |= op; 9106 break; 9107 } 9108 case AArch64::LD1RB_D_IMM: 9109 case AArch64::LD1RB_H_IMM: 9110 case AArch64::LD1RB_IMM: 9111 case AArch64::LD1RB_S_IMM: 9112 case AArch64::LD1RD_IMM: 9113 case AArch64::LD1RH_D_IMM: 9114 case AArch64::LD1RH_IMM: 9115 case AArch64::LD1RH_S_IMM: 9116 case AArch64::LD1RSB_D_IMM: 9117 case AArch64::LD1RSB_H_IMM: 9118 case AArch64::LD1RSB_S_IMM: 9119 case AArch64::LD1RSH_D_IMM: 9120 case AArch64::LD1RSH_S_IMM: 9121 case AArch64::LD1RSW_IMM: 9122 case AArch64::LD1RW_D_IMM: 9123 case AArch64::LD1RW_IMM: { 9124 // op: Pg 9125 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9126 op &= UINT64_C(7); 9127 op <<= 10; 9128 Value |= op; 9129 // op: Rn 9130 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9131 op &= UINT64_C(31); 9132 op <<= 5; 9133 Value |= op; 9134 // op: Zt 9135 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9136 op &= UINT64_C(31); 9137 Value |= op; 9138 // op: imm6 9139 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9140 op &= UINT64_C(63); 9141 op <<= 16; 9142 Value |= op; 9143 break; 9144 } 9145 case AArch64::ANDV_VPZ_B: 9146 case AArch64::ANDV_VPZ_D: 9147 case AArch64::ANDV_VPZ_H: 9148 case AArch64::ANDV_VPZ_S: 9149 case AArch64::EORV_VPZ_B: 9150 case AArch64::EORV_VPZ_D: 9151 case AArch64::EORV_VPZ_H: 9152 case AArch64::EORV_VPZ_S: 9153 case AArch64::LASTA_VPZ_B: 9154 case AArch64::LASTA_VPZ_D: 9155 case AArch64::LASTA_VPZ_H: 9156 case AArch64::LASTA_VPZ_S: 9157 case AArch64::LASTB_VPZ_B: 9158 case AArch64::LASTB_VPZ_D: 9159 case AArch64::LASTB_VPZ_H: 9160 case AArch64::LASTB_VPZ_S: 9161 case AArch64::ORV_VPZ_B: 9162 case AArch64::ORV_VPZ_D: 9163 case AArch64::ORV_VPZ_H: 9164 case AArch64::ORV_VPZ_S: 9165 case AArch64::SADDV_VPZ_B: 9166 case AArch64::SADDV_VPZ_H: 9167 case AArch64::SADDV_VPZ_S: 9168 case AArch64::SMAXV_VPZ_B: 9169 case AArch64::SMAXV_VPZ_D: 9170 case AArch64::SMAXV_VPZ_H: 9171 case AArch64::SMAXV_VPZ_S: 9172 case AArch64::SMINV_VPZ_B: 9173 case AArch64::SMINV_VPZ_D: 9174 case AArch64::SMINV_VPZ_H: 9175 case AArch64::SMINV_VPZ_S: 9176 case AArch64::UADDV_VPZ_B: 9177 case AArch64::UADDV_VPZ_D: 9178 case AArch64::UADDV_VPZ_H: 9179 case AArch64::UADDV_VPZ_S: 9180 case AArch64::UMAXV_VPZ_B: 9181 case AArch64::UMAXV_VPZ_D: 9182 case AArch64::UMAXV_VPZ_H: 9183 case AArch64::UMAXV_VPZ_S: 9184 case AArch64::UMINV_VPZ_B: 9185 case AArch64::UMINV_VPZ_D: 9186 case AArch64::UMINV_VPZ_H: 9187 case AArch64::UMINV_VPZ_S: { 9188 // op: Pg 9189 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9190 op &= UINT64_C(7); 9191 op <<= 10; 9192 Value |= op; 9193 // op: Vd 9194 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9195 op &= UINT64_C(31); 9196 Value |= op; 9197 // op: Zn 9198 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9199 op &= UINT64_C(31); 9200 op <<= 5; 9201 Value |= op; 9202 break; 9203 } 9204 case AArch64::CLASTA_VPZ_B: 9205 case AArch64::CLASTA_VPZ_D: 9206 case AArch64::CLASTA_VPZ_H: 9207 case AArch64::CLASTA_VPZ_S: 9208 case AArch64::CLASTB_VPZ_B: 9209 case AArch64::CLASTB_VPZ_D: 9210 case AArch64::CLASTB_VPZ_H: 9211 case AArch64::CLASTB_VPZ_S: 9212 case AArch64::FADDA_VPZ_D: 9213 case AArch64::FADDA_VPZ_H: 9214 case AArch64::FADDA_VPZ_S: { 9215 // op: Pg 9216 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9217 op &= UINT64_C(7); 9218 op <<= 10; 9219 Value |= op; 9220 // op: Vdn 9221 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9222 op &= UINT64_C(31); 9223 Value |= op; 9224 // op: Zm 9225 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9226 op &= UINT64_C(31); 9227 op <<= 5; 9228 Value |= op; 9229 break; 9230 } 9231 case AArch64::FMAD_ZPmZZ_D: 9232 case AArch64::FMAD_ZPmZZ_H: 9233 case AArch64::FMAD_ZPmZZ_S: 9234 case AArch64::FMSB_ZPmZZ_D: 9235 case AArch64::FMSB_ZPmZZ_H: 9236 case AArch64::FMSB_ZPmZZ_S: 9237 case AArch64::FNMAD_ZPmZZ_D: 9238 case AArch64::FNMAD_ZPmZZ_H: 9239 case AArch64::FNMAD_ZPmZZ_S: 9240 case AArch64::FNMSB_ZPmZZ_D: 9241 case AArch64::FNMSB_ZPmZZ_H: 9242 case AArch64::FNMSB_ZPmZZ_S: { 9243 // op: Pg 9244 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9245 op &= UINT64_C(7); 9246 op <<= 10; 9247 Value |= op; 9248 // op: Za 9249 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 9250 op &= UINT64_C(31); 9251 op <<= 16; 9252 Value |= op; 9253 // op: Zdn 9254 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9255 op &= UINT64_C(31); 9256 Value |= op; 9257 // op: Zm 9258 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9259 op &= UINT64_C(31); 9260 op <<= 5; 9261 Value |= op; 9262 break; 9263 } 9264 case AArch64::COMPACT_ZPZ_D: 9265 case AArch64::COMPACT_ZPZ_S: 9266 case AArch64::MOVPRFX_ZPzZ_B: 9267 case AArch64::MOVPRFX_ZPzZ_D: 9268 case AArch64::MOVPRFX_ZPzZ_H: 9269 case AArch64::MOVPRFX_ZPzZ_S: { 9270 // op: Pg 9271 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9272 op &= UINT64_C(7); 9273 op <<= 10; 9274 Value |= op; 9275 // op: Zd 9276 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9277 op &= UINT64_C(31); 9278 Value |= op; 9279 // op: Zn 9280 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9281 op &= UINT64_C(31); 9282 op <<= 5; 9283 Value |= op; 9284 break; 9285 } 9286 case AArch64::BFMLA_ZPmZZ: 9287 case AArch64::BFMLS_ZPmZZ: 9288 case AArch64::FMLA_ZPmZZ_D: 9289 case AArch64::FMLA_ZPmZZ_H: 9290 case AArch64::FMLA_ZPmZZ_S: 9291 case AArch64::FMLS_ZPmZZ_D: 9292 case AArch64::FMLS_ZPmZZ_H: 9293 case AArch64::FMLS_ZPmZZ_S: 9294 case AArch64::FNMLA_ZPmZZ_D: 9295 case AArch64::FNMLA_ZPmZZ_H: 9296 case AArch64::FNMLA_ZPmZZ_S: 9297 case AArch64::FNMLS_ZPmZZ_D: 9298 case AArch64::FNMLS_ZPmZZ_H: 9299 case AArch64::FNMLS_ZPmZZ_S: 9300 case AArch64::MLA_ZPmZZ_B: 9301 case AArch64::MLA_ZPmZZ_D: 9302 case AArch64::MLA_ZPmZZ_H: 9303 case AArch64::MLA_ZPmZZ_S: 9304 case AArch64::MLS_ZPmZZ_B: 9305 case AArch64::MLS_ZPmZZ_D: 9306 case AArch64::MLS_ZPmZZ_H: 9307 case AArch64::MLS_ZPmZZ_S: { 9308 // op: Pg 9309 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9310 op &= UINT64_C(7); 9311 op <<= 10; 9312 Value |= op; 9313 // op: Zda 9314 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9315 op &= UINT64_C(31); 9316 Value |= op; 9317 // op: Zm 9318 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 9319 op &= UINT64_C(31); 9320 op <<= 16; 9321 Value |= op; 9322 // op: Zn 9323 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9324 op &= UINT64_C(31); 9325 op <<= 5; 9326 Value |= op; 9327 break; 9328 } 9329 case AArch64::MAD_ZPmZZ_B: 9330 case AArch64::MAD_ZPmZZ_D: 9331 case AArch64::MAD_ZPmZZ_H: 9332 case AArch64::MAD_ZPmZZ_S: 9333 case AArch64::MSB_ZPmZZ_B: 9334 case AArch64::MSB_ZPmZZ_D: 9335 case AArch64::MSB_ZPmZZ_H: 9336 case AArch64::MSB_ZPmZZ_S: { 9337 // op: Pg 9338 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9339 op &= UINT64_C(7); 9340 op <<= 10; 9341 Value |= op; 9342 // op: Zdn 9343 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9344 op &= UINT64_C(31); 9345 Value |= op; 9346 // op: Za 9347 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 9348 op &= UINT64_C(31); 9349 op <<= 5; 9350 Value |= op; 9351 // op: Zm 9352 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9353 op &= UINT64_C(31); 9354 op <<= 16; 9355 Value |= op; 9356 break; 9357 } 9358 case AArch64::ADD_ZPmZ_B: 9359 case AArch64::ADD_ZPmZ_D: 9360 case AArch64::ADD_ZPmZ_H: 9361 case AArch64::ADD_ZPmZ_S: 9362 case AArch64::AND_ZPmZ_B: 9363 case AArch64::AND_ZPmZ_D: 9364 case AArch64::AND_ZPmZ_H: 9365 case AArch64::AND_ZPmZ_S: 9366 case AArch64::ASRR_ZPmZ_B: 9367 case AArch64::ASRR_ZPmZ_D: 9368 case AArch64::ASRR_ZPmZ_H: 9369 case AArch64::ASRR_ZPmZ_S: 9370 case AArch64::ASR_WIDE_ZPmZ_B: 9371 case AArch64::ASR_WIDE_ZPmZ_H: 9372 case AArch64::ASR_WIDE_ZPmZ_S: 9373 case AArch64::ASR_ZPmZ_B: 9374 case AArch64::ASR_ZPmZ_D: 9375 case AArch64::ASR_ZPmZ_H: 9376 case AArch64::ASR_ZPmZ_S: 9377 case AArch64::BFADD_ZPZmZ: 9378 case AArch64::BFMAXNM_ZPZmZ: 9379 case AArch64::BFMAX_ZPZmZ: 9380 case AArch64::BFMINNM_ZPZmZ: 9381 case AArch64::BFMIN_ZPZmZ: 9382 case AArch64::BFMUL_ZPZmZ: 9383 case AArch64::BFSUB_ZPZmZ: 9384 case AArch64::BIC_ZPmZ_B: 9385 case AArch64::BIC_ZPmZ_D: 9386 case AArch64::BIC_ZPmZ_H: 9387 case AArch64::BIC_ZPmZ_S: 9388 case AArch64::CLASTA_ZPZ_B: 9389 case AArch64::CLASTA_ZPZ_D: 9390 case AArch64::CLASTA_ZPZ_H: 9391 case AArch64::CLASTA_ZPZ_S: 9392 case AArch64::CLASTB_ZPZ_B: 9393 case AArch64::CLASTB_ZPZ_D: 9394 case AArch64::CLASTB_ZPZ_H: 9395 case AArch64::CLASTB_ZPZ_S: 9396 case AArch64::EOR_ZPmZ_B: 9397 case AArch64::EOR_ZPmZ_D: 9398 case AArch64::EOR_ZPmZ_H: 9399 case AArch64::EOR_ZPmZ_S: 9400 case AArch64::FABD_ZPmZ_D: 9401 case AArch64::FABD_ZPmZ_H: 9402 case AArch64::FABD_ZPmZ_S: 9403 case AArch64::FADD_ZPmZ_D: 9404 case AArch64::FADD_ZPmZ_H: 9405 case AArch64::FADD_ZPmZ_S: 9406 case AArch64::FDIVR_ZPmZ_D: 9407 case AArch64::FDIVR_ZPmZ_H: 9408 case AArch64::FDIVR_ZPmZ_S: 9409 case AArch64::FDIV_ZPmZ_D: 9410 case AArch64::FDIV_ZPmZ_H: 9411 case AArch64::FDIV_ZPmZ_S: 9412 case AArch64::FMAXNM_ZPmZ_D: 9413 case AArch64::FMAXNM_ZPmZ_H: 9414 case AArch64::FMAXNM_ZPmZ_S: 9415 case AArch64::FMAX_ZPmZ_D: 9416 case AArch64::FMAX_ZPmZ_H: 9417 case AArch64::FMAX_ZPmZ_S: 9418 case AArch64::FMINNM_ZPmZ_D: 9419 case AArch64::FMINNM_ZPmZ_H: 9420 case AArch64::FMINNM_ZPmZ_S: 9421 case AArch64::FMIN_ZPmZ_D: 9422 case AArch64::FMIN_ZPmZ_H: 9423 case AArch64::FMIN_ZPmZ_S: 9424 case AArch64::FMULX_ZPmZ_D: 9425 case AArch64::FMULX_ZPmZ_H: 9426 case AArch64::FMULX_ZPmZ_S: 9427 case AArch64::FMUL_ZPmZ_D: 9428 case AArch64::FMUL_ZPmZ_H: 9429 case AArch64::FMUL_ZPmZ_S: 9430 case AArch64::FSCALE_ZPmZ_D: 9431 case AArch64::FSCALE_ZPmZ_H: 9432 case AArch64::FSCALE_ZPmZ_S: 9433 case AArch64::FSUBR_ZPmZ_D: 9434 case AArch64::FSUBR_ZPmZ_H: 9435 case AArch64::FSUBR_ZPmZ_S: 9436 case AArch64::FSUB_ZPmZ_D: 9437 case AArch64::FSUB_ZPmZ_H: 9438 case AArch64::FSUB_ZPmZ_S: 9439 case AArch64::LSLR_ZPmZ_B: 9440 case AArch64::LSLR_ZPmZ_D: 9441 case AArch64::LSLR_ZPmZ_H: 9442 case AArch64::LSLR_ZPmZ_S: 9443 case AArch64::LSL_WIDE_ZPmZ_B: 9444 case AArch64::LSL_WIDE_ZPmZ_H: 9445 case AArch64::LSL_WIDE_ZPmZ_S: 9446 case AArch64::LSL_ZPmZ_B: 9447 case AArch64::LSL_ZPmZ_D: 9448 case AArch64::LSL_ZPmZ_H: 9449 case AArch64::LSL_ZPmZ_S: 9450 case AArch64::LSRR_ZPmZ_B: 9451 case AArch64::LSRR_ZPmZ_D: 9452 case AArch64::LSRR_ZPmZ_H: 9453 case AArch64::LSRR_ZPmZ_S: 9454 case AArch64::LSR_WIDE_ZPmZ_B: 9455 case AArch64::LSR_WIDE_ZPmZ_H: 9456 case AArch64::LSR_WIDE_ZPmZ_S: 9457 case AArch64::LSR_ZPmZ_B: 9458 case AArch64::LSR_ZPmZ_D: 9459 case AArch64::LSR_ZPmZ_H: 9460 case AArch64::LSR_ZPmZ_S: 9461 case AArch64::MUL_ZPmZ_B: 9462 case AArch64::MUL_ZPmZ_D: 9463 case AArch64::MUL_ZPmZ_H: 9464 case AArch64::MUL_ZPmZ_S: 9465 case AArch64::ORR_ZPmZ_B: 9466 case AArch64::ORR_ZPmZ_D: 9467 case AArch64::ORR_ZPmZ_H: 9468 case AArch64::ORR_ZPmZ_S: 9469 case AArch64::SABD_ZPmZ_B: 9470 case AArch64::SABD_ZPmZ_D: 9471 case AArch64::SABD_ZPmZ_H: 9472 case AArch64::SABD_ZPmZ_S: 9473 case AArch64::SDIVR_ZPmZ_D: 9474 case AArch64::SDIVR_ZPmZ_S: 9475 case AArch64::SDIV_ZPmZ_D: 9476 case AArch64::SDIV_ZPmZ_S: 9477 case AArch64::SMAX_ZPmZ_B: 9478 case AArch64::SMAX_ZPmZ_D: 9479 case AArch64::SMAX_ZPmZ_H: 9480 case AArch64::SMAX_ZPmZ_S: 9481 case AArch64::SMIN_ZPmZ_B: 9482 case AArch64::SMIN_ZPmZ_D: 9483 case AArch64::SMIN_ZPmZ_H: 9484 case AArch64::SMIN_ZPmZ_S: 9485 case AArch64::SMULH_ZPmZ_B: 9486 case AArch64::SMULH_ZPmZ_D: 9487 case AArch64::SMULH_ZPmZ_H: 9488 case AArch64::SMULH_ZPmZ_S: 9489 case AArch64::SPLICE_ZPZ_B: 9490 case AArch64::SPLICE_ZPZ_D: 9491 case AArch64::SPLICE_ZPZ_H: 9492 case AArch64::SPLICE_ZPZ_S: 9493 case AArch64::SUBR_ZPmZ_B: 9494 case AArch64::SUBR_ZPmZ_D: 9495 case AArch64::SUBR_ZPmZ_H: 9496 case AArch64::SUBR_ZPmZ_S: 9497 case AArch64::SUB_ZPmZ_B: 9498 case AArch64::SUB_ZPmZ_D: 9499 case AArch64::SUB_ZPmZ_H: 9500 case AArch64::SUB_ZPmZ_S: 9501 case AArch64::UABD_ZPmZ_B: 9502 case AArch64::UABD_ZPmZ_D: 9503 case AArch64::UABD_ZPmZ_H: 9504 case AArch64::UABD_ZPmZ_S: 9505 case AArch64::UDIVR_ZPmZ_D: 9506 case AArch64::UDIVR_ZPmZ_S: 9507 case AArch64::UDIV_ZPmZ_D: 9508 case AArch64::UDIV_ZPmZ_S: 9509 case AArch64::UMAX_ZPmZ_B: 9510 case AArch64::UMAX_ZPmZ_D: 9511 case AArch64::UMAX_ZPmZ_H: 9512 case AArch64::UMAX_ZPmZ_S: 9513 case AArch64::UMIN_ZPmZ_B: 9514 case AArch64::UMIN_ZPmZ_D: 9515 case AArch64::UMIN_ZPmZ_H: 9516 case AArch64::UMIN_ZPmZ_S: 9517 case AArch64::UMULH_ZPmZ_B: 9518 case AArch64::UMULH_ZPmZ_D: 9519 case AArch64::UMULH_ZPmZ_H: 9520 case AArch64::UMULH_ZPmZ_S: { 9521 // op: Pg 9522 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9523 op &= UINT64_C(7); 9524 op <<= 10; 9525 Value |= op; 9526 // op: Zdn 9527 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9528 op &= UINT64_C(31); 9529 Value |= op; 9530 // op: Zm 9531 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9532 op &= UINT64_C(31); 9533 op <<= 5; 9534 Value |= op; 9535 break; 9536 } 9537 case AArch64::FADD_ZPmI_D: 9538 case AArch64::FADD_ZPmI_H: 9539 case AArch64::FADD_ZPmI_S: 9540 case AArch64::FMAXNM_ZPmI_D: 9541 case AArch64::FMAXNM_ZPmI_H: 9542 case AArch64::FMAXNM_ZPmI_S: 9543 case AArch64::FMAX_ZPmI_D: 9544 case AArch64::FMAX_ZPmI_H: 9545 case AArch64::FMAX_ZPmI_S: 9546 case AArch64::FMINNM_ZPmI_D: 9547 case AArch64::FMINNM_ZPmI_H: 9548 case AArch64::FMINNM_ZPmI_S: 9549 case AArch64::FMIN_ZPmI_D: 9550 case AArch64::FMIN_ZPmI_H: 9551 case AArch64::FMIN_ZPmI_S: 9552 case AArch64::FMUL_ZPmI_D: 9553 case AArch64::FMUL_ZPmI_H: 9554 case AArch64::FMUL_ZPmI_S: 9555 case AArch64::FSUBR_ZPmI_D: 9556 case AArch64::FSUBR_ZPmI_H: 9557 case AArch64::FSUBR_ZPmI_S: 9558 case AArch64::FSUB_ZPmI_D: 9559 case AArch64::FSUB_ZPmI_H: 9560 case AArch64::FSUB_ZPmI_S: { 9561 // op: Pg 9562 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9563 op &= UINT64_C(7); 9564 op <<= 10; 9565 Value |= op; 9566 // op: Zdn 9567 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9568 op &= UINT64_C(31); 9569 Value |= op; 9570 // op: i1 9571 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9572 op &= UINT64_C(1); 9573 op <<= 5; 9574 Value |= op; 9575 break; 9576 } 9577 case AArch64::LSL_ZPmI_H: 9578 case AArch64::SQSHLU_ZPmI_H: 9579 case AArch64::SQSHL_ZPmI_H: 9580 case AArch64::UQSHL_ZPmI_H: { 9581 // op: Pg 9582 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9583 op &= UINT64_C(7); 9584 op <<= 10; 9585 Value |= op; 9586 // op: Zdn 9587 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9588 op &= UINT64_C(31); 9589 Value |= op; 9590 // op: imm 9591 op = getVecShiftL16OpValue(MI, 3, Fixups, STI); 9592 op &= UINT64_C(15); 9593 op <<= 5; 9594 Value |= op; 9595 break; 9596 } 9597 case AArch64::LSL_ZPmI_S: 9598 case AArch64::SQSHLU_ZPmI_S: 9599 case AArch64::SQSHL_ZPmI_S: 9600 case AArch64::UQSHL_ZPmI_S: { 9601 // op: Pg 9602 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9603 op &= UINT64_C(7); 9604 op <<= 10; 9605 Value |= op; 9606 // op: Zdn 9607 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9608 op &= UINT64_C(31); 9609 Value |= op; 9610 // op: imm 9611 op = getVecShiftL32OpValue(MI, 3, Fixups, STI); 9612 op &= UINT64_C(31); 9613 op <<= 5; 9614 Value |= op; 9615 break; 9616 } 9617 case AArch64::LSL_ZPmI_D: 9618 case AArch64::SQSHLU_ZPmI_D: 9619 case AArch64::SQSHL_ZPmI_D: 9620 case AArch64::UQSHL_ZPmI_D: { 9621 // op: Pg 9622 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9623 op &= UINT64_C(7); 9624 op <<= 10; 9625 Value |= op; 9626 // op: Zdn 9627 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9628 op &= UINT64_C(31); 9629 Value |= op; 9630 // op: imm 9631 op = getVecShiftL64OpValue(MI, 3, Fixups, STI); 9632 Value |= (op & UINT64_C(32)) << 17; 9633 Value |= (op & UINT64_C(31)) << 5; 9634 break; 9635 } 9636 case AArch64::LSL_ZPmI_B: 9637 case AArch64::SQSHLU_ZPmI_B: 9638 case AArch64::SQSHL_ZPmI_B: 9639 case AArch64::UQSHL_ZPmI_B: { 9640 // op: Pg 9641 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9642 op &= UINT64_C(7); 9643 op <<= 10; 9644 Value |= op; 9645 // op: Zdn 9646 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9647 op &= UINT64_C(31); 9648 Value |= op; 9649 // op: imm 9650 op = getVecShiftL8OpValue(MI, 3, Fixups, STI); 9651 op &= UINT64_C(7); 9652 op <<= 5; 9653 Value |= op; 9654 break; 9655 } 9656 case AArch64::ASRD_ZPmI_H: 9657 case AArch64::ASR_ZPmI_H: 9658 case AArch64::LSR_ZPmI_H: 9659 case AArch64::SRSHR_ZPmI_H: 9660 case AArch64::URSHR_ZPmI_H: { 9661 // op: Pg 9662 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9663 op &= UINT64_C(7); 9664 op <<= 10; 9665 Value |= op; 9666 // op: Zdn 9667 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9668 op &= UINT64_C(31); 9669 Value |= op; 9670 // op: imm 9671 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 9672 op &= UINT64_C(15); 9673 op <<= 5; 9674 Value |= op; 9675 break; 9676 } 9677 case AArch64::ASRD_ZPmI_S: 9678 case AArch64::ASR_ZPmI_S: 9679 case AArch64::LSR_ZPmI_S: 9680 case AArch64::SRSHR_ZPmI_S: 9681 case AArch64::URSHR_ZPmI_S: { 9682 // op: Pg 9683 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9684 op &= UINT64_C(7); 9685 op <<= 10; 9686 Value |= op; 9687 // op: Zdn 9688 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9689 op &= UINT64_C(31); 9690 Value |= op; 9691 // op: imm 9692 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 9693 op &= UINT64_C(31); 9694 op <<= 5; 9695 Value |= op; 9696 break; 9697 } 9698 case AArch64::ASRD_ZPmI_D: 9699 case AArch64::ASR_ZPmI_D: 9700 case AArch64::LSR_ZPmI_D: 9701 case AArch64::SRSHR_ZPmI_D: 9702 case AArch64::URSHR_ZPmI_D: { 9703 // op: Pg 9704 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9705 op &= UINT64_C(7); 9706 op <<= 10; 9707 Value |= op; 9708 // op: Zdn 9709 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9710 op &= UINT64_C(31); 9711 Value |= op; 9712 // op: imm 9713 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 9714 Value |= (op & UINT64_C(32)) << 17; 9715 Value |= (op & UINT64_C(31)) << 5; 9716 break; 9717 } 9718 case AArch64::ASRD_ZPmI_B: 9719 case AArch64::ASR_ZPmI_B: 9720 case AArch64::LSR_ZPmI_B: 9721 case AArch64::SRSHR_ZPmI_B: 9722 case AArch64::URSHR_ZPmI_B: { 9723 // op: Pg 9724 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9725 op &= UINT64_C(7); 9726 op <<= 10; 9727 Value |= op; 9728 // op: Zdn 9729 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9730 op &= UINT64_C(31); 9731 Value |= op; 9732 // op: imm 9733 op = getVecShiftR8OpValue(MI, 3, Fixups, STI); 9734 op &= UINT64_C(7); 9735 op <<= 5; 9736 Value |= op; 9737 break; 9738 } 9739 case AArch64::ADDP_ZPmZ_B: 9740 case AArch64::ADDP_ZPmZ_D: 9741 case AArch64::ADDP_ZPmZ_H: 9742 case AArch64::ADDP_ZPmZ_S: 9743 case AArch64::FADDP_ZPmZZ_D: 9744 case AArch64::FADDP_ZPmZZ_H: 9745 case AArch64::FADDP_ZPmZZ_S: 9746 case AArch64::FMAXNMP_ZPmZZ_D: 9747 case AArch64::FMAXNMP_ZPmZZ_H: 9748 case AArch64::FMAXNMP_ZPmZZ_S: 9749 case AArch64::FMAXP_ZPmZZ_D: 9750 case AArch64::FMAXP_ZPmZZ_H: 9751 case AArch64::FMAXP_ZPmZZ_S: 9752 case AArch64::FMINNMP_ZPmZZ_D: 9753 case AArch64::FMINNMP_ZPmZZ_H: 9754 case AArch64::FMINNMP_ZPmZZ_S: 9755 case AArch64::FMINP_ZPmZZ_D: 9756 case AArch64::FMINP_ZPmZZ_H: 9757 case AArch64::FMINP_ZPmZZ_S: 9758 case AArch64::SHADD_ZPmZ_B: 9759 case AArch64::SHADD_ZPmZ_D: 9760 case AArch64::SHADD_ZPmZ_H: 9761 case AArch64::SHADD_ZPmZ_S: 9762 case AArch64::SHSUBR_ZPmZ_B: 9763 case AArch64::SHSUBR_ZPmZ_D: 9764 case AArch64::SHSUBR_ZPmZ_H: 9765 case AArch64::SHSUBR_ZPmZ_S: 9766 case AArch64::SHSUB_ZPmZ_B: 9767 case AArch64::SHSUB_ZPmZ_D: 9768 case AArch64::SHSUB_ZPmZ_H: 9769 case AArch64::SHSUB_ZPmZ_S: 9770 case AArch64::SMAXP_ZPmZ_B: 9771 case AArch64::SMAXP_ZPmZ_D: 9772 case AArch64::SMAXP_ZPmZ_H: 9773 case AArch64::SMAXP_ZPmZ_S: 9774 case AArch64::SMINP_ZPmZ_B: 9775 case AArch64::SMINP_ZPmZ_D: 9776 case AArch64::SMINP_ZPmZ_H: 9777 case AArch64::SMINP_ZPmZ_S: 9778 case AArch64::SQADD_ZPmZ_B: 9779 case AArch64::SQADD_ZPmZ_D: 9780 case AArch64::SQADD_ZPmZ_H: 9781 case AArch64::SQADD_ZPmZ_S: 9782 case AArch64::SQRSHLR_ZPmZ_B: 9783 case AArch64::SQRSHLR_ZPmZ_D: 9784 case AArch64::SQRSHLR_ZPmZ_H: 9785 case AArch64::SQRSHLR_ZPmZ_S: 9786 case AArch64::SQRSHL_ZPmZ_B: 9787 case AArch64::SQRSHL_ZPmZ_D: 9788 case AArch64::SQRSHL_ZPmZ_H: 9789 case AArch64::SQRSHL_ZPmZ_S: 9790 case AArch64::SQSHLR_ZPmZ_B: 9791 case AArch64::SQSHLR_ZPmZ_D: 9792 case AArch64::SQSHLR_ZPmZ_H: 9793 case AArch64::SQSHLR_ZPmZ_S: 9794 case AArch64::SQSHL_ZPmZ_B: 9795 case AArch64::SQSHL_ZPmZ_D: 9796 case AArch64::SQSHL_ZPmZ_H: 9797 case AArch64::SQSHL_ZPmZ_S: 9798 case AArch64::SQSUBR_ZPmZ_B: 9799 case AArch64::SQSUBR_ZPmZ_D: 9800 case AArch64::SQSUBR_ZPmZ_H: 9801 case AArch64::SQSUBR_ZPmZ_S: 9802 case AArch64::SQSUB_ZPmZ_B: 9803 case AArch64::SQSUB_ZPmZ_D: 9804 case AArch64::SQSUB_ZPmZ_H: 9805 case AArch64::SQSUB_ZPmZ_S: 9806 case AArch64::SRHADD_ZPmZ_B: 9807 case AArch64::SRHADD_ZPmZ_D: 9808 case AArch64::SRHADD_ZPmZ_H: 9809 case AArch64::SRHADD_ZPmZ_S: 9810 case AArch64::SRSHLR_ZPmZ_B: 9811 case AArch64::SRSHLR_ZPmZ_D: 9812 case AArch64::SRSHLR_ZPmZ_H: 9813 case AArch64::SRSHLR_ZPmZ_S: 9814 case AArch64::SRSHL_ZPmZ_B: 9815 case AArch64::SRSHL_ZPmZ_D: 9816 case AArch64::SRSHL_ZPmZ_H: 9817 case AArch64::SRSHL_ZPmZ_S: 9818 case AArch64::SUQADD_ZPmZ_B: 9819 case AArch64::SUQADD_ZPmZ_D: 9820 case AArch64::SUQADD_ZPmZ_H: 9821 case AArch64::SUQADD_ZPmZ_S: 9822 case AArch64::UHADD_ZPmZ_B: 9823 case AArch64::UHADD_ZPmZ_D: 9824 case AArch64::UHADD_ZPmZ_H: 9825 case AArch64::UHADD_ZPmZ_S: 9826 case AArch64::UHSUBR_ZPmZ_B: 9827 case AArch64::UHSUBR_ZPmZ_D: 9828 case AArch64::UHSUBR_ZPmZ_H: 9829 case AArch64::UHSUBR_ZPmZ_S: 9830 case AArch64::UHSUB_ZPmZ_B: 9831 case AArch64::UHSUB_ZPmZ_D: 9832 case AArch64::UHSUB_ZPmZ_H: 9833 case AArch64::UHSUB_ZPmZ_S: 9834 case AArch64::UMAXP_ZPmZ_B: 9835 case AArch64::UMAXP_ZPmZ_D: 9836 case AArch64::UMAXP_ZPmZ_H: 9837 case AArch64::UMAXP_ZPmZ_S: 9838 case AArch64::UMINP_ZPmZ_B: 9839 case AArch64::UMINP_ZPmZ_D: 9840 case AArch64::UMINP_ZPmZ_H: 9841 case AArch64::UMINP_ZPmZ_S: 9842 case AArch64::UQADD_ZPmZ_B: 9843 case AArch64::UQADD_ZPmZ_D: 9844 case AArch64::UQADD_ZPmZ_H: 9845 case AArch64::UQADD_ZPmZ_S: 9846 case AArch64::UQRSHLR_ZPmZ_B: 9847 case AArch64::UQRSHLR_ZPmZ_D: 9848 case AArch64::UQRSHLR_ZPmZ_H: 9849 case AArch64::UQRSHLR_ZPmZ_S: 9850 case AArch64::UQRSHL_ZPmZ_B: 9851 case AArch64::UQRSHL_ZPmZ_D: 9852 case AArch64::UQRSHL_ZPmZ_H: 9853 case AArch64::UQRSHL_ZPmZ_S: 9854 case AArch64::UQSHLR_ZPmZ_B: 9855 case AArch64::UQSHLR_ZPmZ_D: 9856 case AArch64::UQSHLR_ZPmZ_H: 9857 case AArch64::UQSHLR_ZPmZ_S: 9858 case AArch64::UQSHL_ZPmZ_B: 9859 case AArch64::UQSHL_ZPmZ_D: 9860 case AArch64::UQSHL_ZPmZ_H: 9861 case AArch64::UQSHL_ZPmZ_S: 9862 case AArch64::UQSUBR_ZPmZ_B: 9863 case AArch64::UQSUBR_ZPmZ_D: 9864 case AArch64::UQSUBR_ZPmZ_H: 9865 case AArch64::UQSUBR_ZPmZ_S: 9866 case AArch64::UQSUB_ZPmZ_B: 9867 case AArch64::UQSUB_ZPmZ_D: 9868 case AArch64::UQSUB_ZPmZ_H: 9869 case AArch64::UQSUB_ZPmZ_S: 9870 case AArch64::URHADD_ZPmZ_B: 9871 case AArch64::URHADD_ZPmZ_D: 9872 case AArch64::URHADD_ZPmZ_H: 9873 case AArch64::URHADD_ZPmZ_S: 9874 case AArch64::URSHLR_ZPmZ_B: 9875 case AArch64::URSHLR_ZPmZ_D: 9876 case AArch64::URSHLR_ZPmZ_H: 9877 case AArch64::URSHLR_ZPmZ_S: 9878 case AArch64::URSHL_ZPmZ_B: 9879 case AArch64::URSHL_ZPmZ_D: 9880 case AArch64::URSHL_ZPmZ_H: 9881 case AArch64::URSHL_ZPmZ_S: 9882 case AArch64::USQADD_ZPmZ_B: 9883 case AArch64::USQADD_ZPmZ_D: 9884 case AArch64::USQADD_ZPmZ_H: 9885 case AArch64::USQADD_ZPmZ_S: { 9886 // op: Pg 9887 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9888 op &= UINT64_C(7); 9889 op <<= 10; 9890 Value |= op; 9891 // op: Zm 9892 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9893 op &= UINT64_C(31); 9894 op <<= 5; 9895 Value |= op; 9896 // op: Zdn 9897 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9898 op &= UINT64_C(31); 9899 Value |= op; 9900 break; 9901 } 9902 case AArch64::SPLICE_ZPZZ_B: 9903 case AArch64::SPLICE_ZPZZ_D: 9904 case AArch64::SPLICE_ZPZZ_H: 9905 case AArch64::SPLICE_ZPZZ_S: { 9906 // op: Pg 9907 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9908 op &= UINT64_C(7); 9909 op <<= 10; 9910 Value |= op; 9911 // op: Zn 9912 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9913 op &= UINT64_C(31); 9914 op <<= 5; 9915 Value |= op; 9916 // op: Zd 9917 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9918 op &= UINT64_C(31); 9919 Value |= op; 9920 break; 9921 } 9922 case AArch64::GLD1B_D_IMM_REAL: 9923 case AArch64::GLD1B_S_IMM_REAL: 9924 case AArch64::GLD1D_IMM_REAL: 9925 case AArch64::GLD1H_D_IMM_REAL: 9926 case AArch64::GLD1H_S_IMM_REAL: 9927 case AArch64::GLD1SB_D_IMM_REAL: 9928 case AArch64::GLD1SB_S_IMM_REAL: 9929 case AArch64::GLD1SH_D_IMM_REAL: 9930 case AArch64::GLD1SH_S_IMM_REAL: 9931 case AArch64::GLD1SW_D_IMM_REAL: 9932 case AArch64::GLD1W_D_IMM_REAL: 9933 case AArch64::GLD1W_IMM_REAL: 9934 case AArch64::GLDFF1B_D_IMM_REAL: 9935 case AArch64::GLDFF1B_S_IMM_REAL: 9936 case AArch64::GLDFF1D_IMM_REAL: 9937 case AArch64::GLDFF1H_D_IMM_REAL: 9938 case AArch64::GLDFF1H_S_IMM_REAL: 9939 case AArch64::GLDFF1SB_D_IMM_REAL: 9940 case AArch64::GLDFF1SB_S_IMM_REAL: 9941 case AArch64::GLDFF1SH_D_IMM_REAL: 9942 case AArch64::GLDFF1SH_S_IMM_REAL: 9943 case AArch64::GLDFF1SW_D_IMM_REAL: 9944 case AArch64::GLDFF1W_D_IMM_REAL: 9945 case AArch64::GLDFF1W_IMM_REAL: { 9946 // op: Pg 9947 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9948 op &= UINT64_C(7); 9949 op <<= 10; 9950 Value |= op; 9951 // op: Zn 9952 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9953 op &= UINT64_C(31); 9954 op <<= 5; 9955 Value |= op; 9956 // op: Zt 9957 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9958 op &= UINT64_C(31); 9959 Value |= op; 9960 // op: imm5 9961 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9962 op &= UINT64_C(31); 9963 op <<= 16; 9964 Value |= op; 9965 break; 9966 } 9967 case AArch64::PRFB_D_PZI: 9968 case AArch64::PRFB_S_PZI: 9969 case AArch64::PRFD_D_PZI: 9970 case AArch64::PRFD_S_PZI: 9971 case AArch64::PRFH_D_PZI: 9972 case AArch64::PRFH_S_PZI: 9973 case AArch64::PRFW_D_PZI: 9974 case AArch64::PRFW_S_PZI: { 9975 // op: Pg 9976 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 9977 op &= UINT64_C(7); 9978 op <<= 10; 9979 Value |= op; 9980 // op: Zn 9981 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 9982 op &= UINT64_C(31); 9983 op <<= 5; 9984 Value |= op; 9985 // op: imm5 9986 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 9987 op &= UINT64_C(31); 9988 op <<= 16; 9989 Value |= op; 9990 // op: prfop 9991 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 9992 op &= UINT64_C(15); 9993 Value |= op; 9994 break; 9995 } 9996 case AArch64::SADALP_ZPmZ_D: 9997 case AArch64::SADALP_ZPmZ_H: 9998 case AArch64::SADALP_ZPmZ_S: 9999 case AArch64::UADALP_ZPmZ_D: 10000 case AArch64::UADALP_ZPmZ_H: 10001 case AArch64::UADALP_ZPmZ_S: { 10002 // op: Pg 10003 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 10004 op &= UINT64_C(7); 10005 op <<= 10; 10006 Value |= op; 10007 // op: Zn 10008 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10009 op &= UINT64_C(31); 10010 op <<= 5; 10011 Value |= op; 10012 // op: Zda 10013 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10014 op &= UINT64_C(31); 10015 Value |= op; 10016 break; 10017 } 10018 case AArch64::SST1B_D_IMM: 10019 case AArch64::SST1B_S_IMM: 10020 case AArch64::SST1D_IMM: 10021 case AArch64::SST1H_D_IMM: 10022 case AArch64::SST1H_S_IMM: 10023 case AArch64::SST1W_D_IMM: 10024 case AArch64::SST1W_IMM: { 10025 // op: Pg 10026 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 10027 op &= UINT64_C(7); 10028 op <<= 10; 10029 Value |= op; 10030 // op: imm5 10031 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10032 op &= UINT64_C(31); 10033 op <<= 16; 10034 Value |= op; 10035 // op: Zn 10036 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10037 op &= UINT64_C(31); 10038 op <<= 5; 10039 Value |= op; 10040 // op: Zt 10041 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10042 op &= UINT64_C(31); 10043 Value |= op; 10044 break; 10045 } 10046 case AArch64::FCPY_ZPmI_D: 10047 case AArch64::FCPY_ZPmI_H: 10048 case AArch64::FCPY_ZPmI_S: { 10049 // op: Pg 10050 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10051 op &= UINT64_C(15); 10052 op <<= 16; 10053 Value |= op; 10054 // op: Zd 10055 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10056 op &= UINT64_C(31); 10057 Value |= op; 10058 // op: imm8 10059 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10060 op &= UINT64_C(255); 10061 op <<= 5; 10062 Value |= op; 10063 break; 10064 } 10065 case AArch64::CPY_ZPmR_B: 10066 case AArch64::CPY_ZPmR_D: 10067 case AArch64::CPY_ZPmR_H: 10068 case AArch64::CPY_ZPmR_S: { 10069 // op: Pg 10070 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10071 op &= UINT64_C(7); 10072 op <<= 10; 10073 Value |= op; 10074 // op: Rn 10075 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10076 op &= UINT64_C(31); 10077 op <<= 5; 10078 Value |= op; 10079 // op: Zd 10080 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10081 op &= UINT64_C(31); 10082 Value |= op; 10083 break; 10084 } 10085 case AArch64::CPY_ZPmV_B: 10086 case AArch64::CPY_ZPmV_D: 10087 case AArch64::CPY_ZPmV_H: 10088 case AArch64::CPY_ZPmV_S: { 10089 // op: Pg 10090 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10091 op &= UINT64_C(7); 10092 op <<= 10; 10093 Value |= op; 10094 // op: Vn 10095 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10096 op &= UINT64_C(31); 10097 op <<= 5; 10098 Value |= op; 10099 // op: Zd 10100 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10101 op &= UINT64_C(31); 10102 Value |= op; 10103 break; 10104 } 10105 case AArch64::ABS_ZPmZ_B: 10106 case AArch64::ABS_ZPmZ_D: 10107 case AArch64::ABS_ZPmZ_H: 10108 case AArch64::ABS_ZPmZ_S: 10109 case AArch64::CLS_ZPmZ_B: 10110 case AArch64::CLS_ZPmZ_D: 10111 case AArch64::CLS_ZPmZ_H: 10112 case AArch64::CLS_ZPmZ_S: 10113 case AArch64::CLZ_ZPmZ_B: 10114 case AArch64::CLZ_ZPmZ_D: 10115 case AArch64::CLZ_ZPmZ_H: 10116 case AArch64::CLZ_ZPmZ_S: 10117 case AArch64::CNOT_ZPmZ_B: 10118 case AArch64::CNOT_ZPmZ_D: 10119 case AArch64::CNOT_ZPmZ_H: 10120 case AArch64::CNOT_ZPmZ_S: 10121 case AArch64::CNT_ZPmZ_B: 10122 case AArch64::CNT_ZPmZ_D: 10123 case AArch64::CNT_ZPmZ_H: 10124 case AArch64::CNT_ZPmZ_S: 10125 case AArch64::FABS_ZPmZ_D: 10126 case AArch64::FABS_ZPmZ_H: 10127 case AArch64::FABS_ZPmZ_S: 10128 case AArch64::FCVTX_ZPmZ_DtoS: 10129 case AArch64::FCVTZS_ZPmZ_DtoD: 10130 case AArch64::FCVTZS_ZPmZ_DtoS: 10131 case AArch64::FCVTZS_ZPmZ_HtoD: 10132 case AArch64::FCVTZS_ZPmZ_HtoH: 10133 case AArch64::FCVTZS_ZPmZ_HtoS: 10134 case AArch64::FCVTZS_ZPmZ_StoD: 10135 case AArch64::FCVTZS_ZPmZ_StoS: 10136 case AArch64::FCVTZU_ZPmZ_DtoD: 10137 case AArch64::FCVTZU_ZPmZ_DtoS: 10138 case AArch64::FCVTZU_ZPmZ_HtoD: 10139 case AArch64::FCVTZU_ZPmZ_HtoH: 10140 case AArch64::FCVTZU_ZPmZ_HtoS: 10141 case AArch64::FCVTZU_ZPmZ_StoD: 10142 case AArch64::FCVTZU_ZPmZ_StoS: 10143 case AArch64::FCVT_ZPmZ_DtoH: 10144 case AArch64::FCVT_ZPmZ_DtoS: 10145 case AArch64::FCVT_ZPmZ_HtoD: 10146 case AArch64::FCVT_ZPmZ_HtoS: 10147 case AArch64::FCVT_ZPmZ_StoD: 10148 case AArch64::FCVT_ZPmZ_StoH: 10149 case AArch64::FLOGB_ZPmZ_D: 10150 case AArch64::FLOGB_ZPmZ_H: 10151 case AArch64::FLOGB_ZPmZ_S: 10152 case AArch64::FNEG_ZPmZ_D: 10153 case AArch64::FNEG_ZPmZ_H: 10154 case AArch64::FNEG_ZPmZ_S: 10155 case AArch64::FRECPX_ZPmZ_D: 10156 case AArch64::FRECPX_ZPmZ_H: 10157 case AArch64::FRECPX_ZPmZ_S: 10158 case AArch64::FRINTA_ZPmZ_D: 10159 case AArch64::FRINTA_ZPmZ_H: 10160 case AArch64::FRINTA_ZPmZ_S: 10161 case AArch64::FRINTI_ZPmZ_D: 10162 case AArch64::FRINTI_ZPmZ_H: 10163 case AArch64::FRINTI_ZPmZ_S: 10164 case AArch64::FRINTM_ZPmZ_D: 10165 case AArch64::FRINTM_ZPmZ_H: 10166 case AArch64::FRINTM_ZPmZ_S: 10167 case AArch64::FRINTN_ZPmZ_D: 10168 case AArch64::FRINTN_ZPmZ_H: 10169 case AArch64::FRINTN_ZPmZ_S: 10170 case AArch64::FRINTP_ZPmZ_D: 10171 case AArch64::FRINTP_ZPmZ_H: 10172 case AArch64::FRINTP_ZPmZ_S: 10173 case AArch64::FRINTX_ZPmZ_D: 10174 case AArch64::FRINTX_ZPmZ_H: 10175 case AArch64::FRINTX_ZPmZ_S: 10176 case AArch64::FRINTZ_ZPmZ_D: 10177 case AArch64::FRINTZ_ZPmZ_H: 10178 case AArch64::FRINTZ_ZPmZ_S: 10179 case AArch64::FSQRT_ZPmZ_D: 10180 case AArch64::FSQRT_ZPmZ_H: 10181 case AArch64::FSQRT_ZPmZ_S: 10182 case AArch64::MOVPRFX_ZPmZ_B: 10183 case AArch64::MOVPRFX_ZPmZ_D: 10184 case AArch64::MOVPRFX_ZPmZ_H: 10185 case AArch64::MOVPRFX_ZPmZ_S: 10186 case AArch64::NEG_ZPmZ_B: 10187 case AArch64::NEG_ZPmZ_D: 10188 case AArch64::NEG_ZPmZ_H: 10189 case AArch64::NEG_ZPmZ_S: 10190 case AArch64::NOT_ZPmZ_B: 10191 case AArch64::NOT_ZPmZ_D: 10192 case AArch64::NOT_ZPmZ_H: 10193 case AArch64::NOT_ZPmZ_S: 10194 case AArch64::SCVTF_ZPmZ_DtoD: 10195 case AArch64::SCVTF_ZPmZ_DtoH: 10196 case AArch64::SCVTF_ZPmZ_DtoS: 10197 case AArch64::SCVTF_ZPmZ_HtoH: 10198 case AArch64::SCVTF_ZPmZ_StoD: 10199 case AArch64::SCVTF_ZPmZ_StoH: 10200 case AArch64::SCVTF_ZPmZ_StoS: 10201 case AArch64::SQABS_ZPmZ_B: 10202 case AArch64::SQABS_ZPmZ_D: 10203 case AArch64::SQABS_ZPmZ_H: 10204 case AArch64::SQABS_ZPmZ_S: 10205 case AArch64::SQNEG_ZPmZ_B: 10206 case AArch64::SQNEG_ZPmZ_D: 10207 case AArch64::SQNEG_ZPmZ_H: 10208 case AArch64::SQNEG_ZPmZ_S: 10209 case AArch64::SXTB_ZPmZ_D: 10210 case AArch64::SXTB_ZPmZ_H: 10211 case AArch64::SXTB_ZPmZ_S: 10212 case AArch64::SXTH_ZPmZ_D: 10213 case AArch64::SXTH_ZPmZ_S: 10214 case AArch64::SXTW_ZPmZ_D: 10215 case AArch64::UCVTF_ZPmZ_DtoD: 10216 case AArch64::UCVTF_ZPmZ_DtoH: 10217 case AArch64::UCVTF_ZPmZ_DtoS: 10218 case AArch64::UCVTF_ZPmZ_HtoH: 10219 case AArch64::UCVTF_ZPmZ_StoD: 10220 case AArch64::UCVTF_ZPmZ_StoH: 10221 case AArch64::UCVTF_ZPmZ_StoS: 10222 case AArch64::URECPE_ZPmZ_S: 10223 case AArch64::URSQRTE_ZPmZ_S: 10224 case AArch64::UXTB_ZPmZ_D: 10225 case AArch64::UXTB_ZPmZ_H: 10226 case AArch64::UXTB_ZPmZ_S: 10227 case AArch64::UXTH_ZPmZ_D: 10228 case AArch64::UXTH_ZPmZ_S: 10229 case AArch64::UXTW_ZPmZ_D: { 10230 // op: Pg 10231 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10232 op &= UINT64_C(7); 10233 op <<= 10; 10234 Value |= op; 10235 // op: Zd 10236 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10237 op &= UINT64_C(31); 10238 Value |= op; 10239 // op: Zn 10240 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10241 op &= UINT64_C(31); 10242 op <<= 5; 10243 Value |= op; 10244 break; 10245 } 10246 case AArch64::DECP_ZP_D: 10247 case AArch64::DECP_ZP_H: 10248 case AArch64::DECP_ZP_S: 10249 case AArch64::INCP_ZP_D: 10250 case AArch64::INCP_ZP_H: 10251 case AArch64::INCP_ZP_S: 10252 case AArch64::SQDECP_ZP_D: 10253 case AArch64::SQDECP_ZP_H: 10254 case AArch64::SQDECP_ZP_S: 10255 case AArch64::SQINCP_ZP_D: 10256 case AArch64::SQINCP_ZP_H: 10257 case AArch64::SQINCP_ZP_S: 10258 case AArch64::UQDECP_ZP_D: 10259 case AArch64::UQDECP_ZP_H: 10260 case AArch64::UQDECP_ZP_S: 10261 case AArch64::UQINCP_ZP_D: 10262 case AArch64::UQINCP_ZP_H: 10263 case AArch64::UQINCP_ZP_S: { 10264 // op: Pm 10265 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10266 op &= UINT64_C(15); 10267 op <<= 5; 10268 Value |= op; 10269 // op: Zdn 10270 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10271 op &= UINT64_C(31); 10272 Value |= op; 10273 break; 10274 } 10275 case AArch64::ADDHA_MPPZ_S: 10276 case AArch64::ADDVA_MPPZ_S: { 10277 // op: Pm 10278 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10279 op &= UINT64_C(7); 10280 op <<= 13; 10281 Value |= op; 10282 // op: Pn 10283 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10284 op &= UINT64_C(7); 10285 op <<= 10; 10286 Value |= op; 10287 // op: Zn 10288 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 10289 op &= UINT64_C(31); 10290 op <<= 5; 10291 Value |= op; 10292 // op: ZAda 10293 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10294 op &= UINT64_C(3); 10295 Value |= op; 10296 break; 10297 } 10298 case AArch64::ADDHA_MPPZ_D: 10299 case AArch64::ADDVA_MPPZ_D: { 10300 // op: Pm 10301 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 10302 op &= UINT64_C(7); 10303 op <<= 13; 10304 Value |= op; 10305 // op: Pn 10306 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10307 op &= UINT64_C(7); 10308 op <<= 10; 10309 Value |= op; 10310 // op: Zn 10311 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 10312 op &= UINT64_C(31); 10313 op <<= 5; 10314 Value |= op; 10315 // op: ZAda 10316 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10317 op &= UINT64_C(7); 10318 Value |= op; 10319 break; 10320 } 10321 case AArch64::WRFFR: { 10322 // op: Pn 10323 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10324 op &= UINT64_C(15); 10325 op <<= 5; 10326 Value |= op; 10327 break; 10328 } 10329 case AArch64::LDR_PXI: 10330 case AArch64::STR_PXI: { 10331 // op: Pt 10332 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10333 op &= UINT64_C(15); 10334 Value |= op; 10335 // op: Rn 10336 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 10337 op &= UINT64_C(31); 10338 op <<= 5; 10339 Value |= op; 10340 // op: imm9 10341 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10342 Value |= (op & UINT64_C(504)) << 13; 10343 Value |= (op & UINT64_C(7)) << 10; 10344 break; 10345 } 10346 case AArch64::XPACD: 10347 case AArch64::XPACI: { 10348 // op: Rd 10349 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10350 op &= UINT64_C(31); 10351 Value |= op; 10352 break; 10353 } 10354 case AArch64::CNTP_XCI_B: 10355 case AArch64::CNTP_XCI_D: 10356 case AArch64::CNTP_XCI_H: 10357 case AArch64::CNTP_XCI_S: { 10358 // op: Rd 10359 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10360 op &= UINT64_C(31); 10361 Value |= op; 10362 // op: PNn 10363 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 10364 op &= UINT64_C(15); 10365 op <<= 5; 10366 Value |= op; 10367 // op: vl 10368 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10369 op &= UINT64_C(1); 10370 op <<= 10; 10371 Value |= op; 10372 break; 10373 } 10374 case AArch64::ADDPL_XXI: 10375 case AArch64::ADDSPL_XXI: 10376 case AArch64::ADDSVL_XXI: 10377 case AArch64::ADDVL_XXI: { 10378 // op: Rd 10379 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 10380 op &= UINT64_C(31); 10381 Value |= op; 10382 // op: Rn 10383 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 10384 op &= UINT64_C(31); 10385 op <<= 16; 10386 Value |= op; 10387 // op: imm6 10388 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 10389 op &= UINT64_C(63); 10390 op <<= 5; 10391 Value |= op; 10392 break; 10393 } 10394 case AArch64::ABSWr: 10395 case AArch64::ABSXr: 10396 case AArch64::ABSv16i8: 10397 case AArch64::ABSv1i64: 10398 case AArch64::ABSv2i32: 10399 case AArch64::ABSv2i64: 10400 case AArch64::ABSv4i16: 10401 case AArch64::ABSv4i32: 10402 case AArch64::ABSv8i16: 10403 case AArch64::ABSv8i8: 10404 case AArch64::ADDPv2i64p: 10405 case AArch64::ADDVv16i8v: 10406 case AArch64::ADDVv4i16v: 10407 case AArch64::ADDVv4i32v: 10408 case AArch64::ADDVv8i16v: 10409 case AArch64::ADDVv8i8v: 10410 case AArch64::AESIMCrr: 10411 case AArch64::AESMCrr: 10412 case AArch64::BFCVT: 10413 case AArch64::BFCVTN: 10414 case AArch64::CLSWr: 10415 case AArch64::CLSXr: 10416 case AArch64::CLSv16i8: 10417 case AArch64::CLSv2i32: 10418 case AArch64::CLSv4i16: 10419 case AArch64::CLSv4i32: 10420 case AArch64::CLSv8i16: 10421 case AArch64::CLSv8i8: 10422 case AArch64::CLZWr: 10423 case AArch64::CLZXr: 10424 case AArch64::CLZv16i8: 10425 case AArch64::CLZv2i32: 10426 case AArch64::CLZv4i16: 10427 case AArch64::CLZv4i32: 10428 case AArch64::CLZv8i16: 10429 case AArch64::CLZv8i8: 10430 case AArch64::CMEQv16i8rz: 10431 case AArch64::CMEQv1i64rz: 10432 case AArch64::CMEQv2i32rz: 10433 case AArch64::CMEQv2i64rz: 10434 case AArch64::CMEQv4i16rz: 10435 case AArch64::CMEQv4i32rz: 10436 case AArch64::CMEQv8i16rz: 10437 case AArch64::CMEQv8i8rz: 10438 case AArch64::CMGEv16i8rz: 10439 case AArch64::CMGEv1i64rz: 10440 case AArch64::CMGEv2i32rz: 10441 case AArch64::CMGEv2i64rz: 10442 case AArch64::CMGEv4i16rz: 10443 case AArch64::CMGEv4i32rz: 10444 case AArch64::CMGEv8i16rz: 10445 case AArch64::CMGEv8i8rz: 10446 case AArch64::CMGTv16i8rz: 10447 case AArch64::CMGTv1i64rz: 10448 case AArch64::CMGTv2i32rz: 10449 case AArch64::CMGTv2i64rz: 10450 case AArch64::CMGTv4i16rz: 10451 case AArch64::CMGTv4i32rz: 10452 case AArch64::CMGTv8i16rz: 10453 case AArch64::CMGTv8i8rz: 10454 case AArch64::CMLEv16i8rz: 10455 case AArch64::CMLEv1i64rz: 10456 case AArch64::CMLEv2i32rz: 10457 case AArch64::CMLEv2i64rz: 10458 case AArch64::CMLEv4i16rz: 10459 case AArch64::CMLEv4i32rz: 10460 case AArch64::CMLEv8i16rz: 10461 case AArch64::CMLEv8i8rz: 10462 case AArch64::CMLTv16i8rz: 10463 case AArch64::CMLTv1i64rz: 10464 case AArch64::CMLTv2i32rz: 10465 case AArch64::CMLTv2i64rz: 10466 case AArch64::CMLTv4i16rz: 10467 case AArch64::CMLTv4i32rz: 10468 case AArch64::CMLTv8i16rz: 10469 case AArch64::CMLTv8i8rz: 10470 case AArch64::CNTWr: 10471 case AArch64::CNTXr: 10472 case AArch64::CNTv16i8: 10473 case AArch64::CNTv8i8: 10474 case AArch64::CTZWr: 10475 case AArch64::CTZXr: 10476 case AArch64::DUPv16i8gpr: 10477 case AArch64::DUPv2i32gpr: 10478 case AArch64::DUPv2i64gpr: 10479 case AArch64::DUPv4i16gpr: 10480 case AArch64::DUPv4i32gpr: 10481 case AArch64::DUPv8i16gpr: 10482 case AArch64::DUPv8i8gpr: 10483 case AArch64::FABSDr: 10484 case AArch64::FABSHr: 10485 case AArch64::FABSSr: 10486 case AArch64::FABSv2f32: 10487 case AArch64::FABSv2f64: 10488 case AArch64::FABSv4f16: 10489 case AArch64::FABSv4f32: 10490 case AArch64::FABSv8f16: 10491 case AArch64::FADDPv2i16p: 10492 case AArch64::FADDPv2i32p: 10493 case AArch64::FADDPv2i64p: 10494 case AArch64::FCMEQv1i16rz: 10495 case AArch64::FCMEQv1i32rz: 10496 case AArch64::FCMEQv1i64rz: 10497 case AArch64::FCMEQv2i32rz: 10498 case AArch64::FCMEQv2i64rz: 10499 case AArch64::FCMEQv4i16rz: 10500 case AArch64::FCMEQv4i32rz: 10501 case AArch64::FCMEQv8i16rz: 10502 case AArch64::FCMGEv1i16rz: 10503 case AArch64::FCMGEv1i32rz: 10504 case AArch64::FCMGEv1i64rz: 10505 case AArch64::FCMGEv2i32rz: 10506 case AArch64::FCMGEv2i64rz: 10507 case AArch64::FCMGEv4i16rz: 10508 case AArch64::FCMGEv4i32rz: 10509 case AArch64::FCMGEv8i16rz: 10510 case AArch64::FCMGTv1i16rz: 10511 case AArch64::FCMGTv1i32rz: 10512 case AArch64::FCMGTv1i64rz: 10513 case AArch64::FCMGTv2i32rz: 10514 case AArch64::FCMGTv2i64rz: 10515 case AArch64::FCMGTv4i16rz: 10516 case AArch64::FCMGTv4i32rz: 10517 case AArch64::FCMGTv8i16rz: 10518 case AArch64::FCMLEv1i16rz: 10519 case AArch64::FCMLEv1i32rz: 10520 case AArch64::FCMLEv1i64rz: 10521 case AArch64::FCMLEv2i32rz: 10522 case AArch64::FCMLEv2i64rz: 10523 case AArch64::FCMLEv4i16rz: 10524 case AArch64::FCMLEv4i32rz: 10525 case AArch64::FCMLEv8i16rz: 10526 case AArch64::FCMLTv1i16rz: 10527 case AArch64::FCMLTv1i32rz: 10528 case AArch64::FCMLTv1i64rz: 10529 case AArch64::FCMLTv2i32rz: 10530 case AArch64::FCMLTv2i64rz: 10531 case AArch64::FCMLTv4i16rz: 10532 case AArch64::FCMLTv4i32rz: 10533 case AArch64::FCMLTv8i16rz: 10534 case AArch64::FCVTASUWDr: 10535 case AArch64::FCVTASUWHr: 10536 case AArch64::FCVTASUWSr: 10537 case AArch64::FCVTASUXDr: 10538 case AArch64::FCVTASUXHr: 10539 case AArch64::FCVTASUXSr: 10540 case AArch64::FCVTASv1f16: 10541 case AArch64::FCVTASv1i32: 10542 case AArch64::FCVTASv1i64: 10543 case AArch64::FCVTASv2f32: 10544 case AArch64::FCVTASv2f64: 10545 case AArch64::FCVTASv4f16: 10546 case AArch64::FCVTASv4f32: 10547 case AArch64::FCVTASv8f16: 10548 case AArch64::FCVTAUUWDr: 10549 case AArch64::FCVTAUUWHr: 10550 case AArch64::FCVTAUUWSr: 10551 case AArch64::FCVTAUUXDr: 10552 case AArch64::FCVTAUUXHr: 10553 case AArch64::FCVTAUUXSr: 10554 case AArch64::FCVTAUv1f16: 10555 case AArch64::FCVTAUv1i32: 10556 case AArch64::FCVTAUv1i64: 10557 case AArch64::FCVTAUv2f32: 10558 case AArch64::FCVTAUv2f64: 10559 case AArch64::FCVTAUv4f16: 10560 case AArch64::FCVTAUv4f32: 10561 case AArch64::FCVTAUv8f16: 10562 case AArch64::FCVTDHr: 10563 case AArch64::FCVTDSr: 10564 case AArch64::FCVTHDr: 10565 case AArch64::FCVTHSr: 10566 case AArch64::FCVTLv2i32: 10567 case AArch64::FCVTLv4i16: 10568 case AArch64::FCVTLv4i32: 10569 case AArch64::FCVTLv8i16: 10570 case AArch64::FCVTMSUWDr: 10571 case AArch64::FCVTMSUWHr: 10572 case AArch64::FCVTMSUWSr: 10573 case AArch64::FCVTMSUXDr: 10574 case AArch64::FCVTMSUXHr: 10575 case AArch64::FCVTMSUXSr: 10576 case AArch64::FCVTMSv1f16: 10577 case AArch64::FCVTMSv1i32: 10578 case AArch64::FCVTMSv1i64: 10579 case AArch64::FCVTMSv2f32: 10580 case AArch64::FCVTMSv2f64: 10581 case AArch64::FCVTMSv4f16: 10582 case AArch64::FCVTMSv4f32: 10583 case AArch64::FCVTMSv8f16: 10584 case AArch64::FCVTMUUWDr: 10585 case AArch64::FCVTMUUWHr: 10586 case AArch64::FCVTMUUWSr: 10587 case AArch64::FCVTMUUXDr: 10588 case AArch64::FCVTMUUXHr: 10589 case AArch64::FCVTMUUXSr: 10590 case AArch64::FCVTMUv1f16: 10591 case AArch64::FCVTMUv1i32: 10592 case AArch64::FCVTMUv1i64: 10593 case AArch64::FCVTMUv2f32: 10594 case AArch64::FCVTMUv2f64: 10595 case AArch64::FCVTMUv4f16: 10596 case AArch64::FCVTMUv4f32: 10597 case AArch64::FCVTMUv8f16: 10598 case AArch64::FCVTNSUWDr: 10599 case AArch64::FCVTNSUWHr: 10600 case AArch64::FCVTNSUWSr: 10601 case AArch64::FCVTNSUXDr: 10602 case AArch64::FCVTNSUXHr: 10603 case AArch64::FCVTNSUXSr: 10604 case AArch64::FCVTNSv1f16: 10605 case AArch64::FCVTNSv1i32: 10606 case AArch64::FCVTNSv1i64: 10607 case AArch64::FCVTNSv2f32: 10608 case AArch64::FCVTNSv2f64: 10609 case AArch64::FCVTNSv4f16: 10610 case AArch64::FCVTNSv4f32: 10611 case AArch64::FCVTNSv8f16: 10612 case AArch64::FCVTNUUWDr: 10613 case AArch64::FCVTNUUWHr: 10614 case AArch64::FCVTNUUWSr: 10615 case AArch64::FCVTNUUXDr: 10616 case AArch64::FCVTNUUXHr: 10617 case AArch64::FCVTNUUXSr: 10618 case AArch64::FCVTNUv1f16: 10619 case AArch64::FCVTNUv1i32: 10620 case AArch64::FCVTNUv1i64: 10621 case AArch64::FCVTNUv2f32: 10622 case AArch64::FCVTNUv2f64: 10623 case AArch64::FCVTNUv4f16: 10624 case AArch64::FCVTNUv4f32: 10625 case AArch64::FCVTNUv8f16: 10626 case AArch64::FCVTNv2i32: 10627 case AArch64::FCVTNv4i16: 10628 case AArch64::FCVTPSUWDr: 10629 case AArch64::FCVTPSUWHr: 10630 case AArch64::FCVTPSUWSr: 10631 case AArch64::FCVTPSUXDr: 10632 case AArch64::FCVTPSUXHr: 10633 case AArch64::FCVTPSUXSr: 10634 case AArch64::FCVTPSv1f16: 10635 case AArch64::FCVTPSv1i32: 10636 case AArch64::FCVTPSv1i64: 10637 case AArch64::FCVTPSv2f32: 10638 case AArch64::FCVTPSv2f64: 10639 case AArch64::FCVTPSv4f16: 10640 case AArch64::FCVTPSv4f32: 10641 case AArch64::FCVTPSv8f16: 10642 case AArch64::FCVTPUUWDr: 10643 case AArch64::FCVTPUUWHr: 10644 case AArch64::FCVTPUUWSr: 10645 case AArch64::FCVTPUUXDr: 10646 case AArch64::FCVTPUUXHr: 10647 case AArch64::FCVTPUUXSr: 10648 case AArch64::FCVTPUv1f16: 10649 case AArch64::FCVTPUv1i32: 10650 case AArch64::FCVTPUv1i64: 10651 case AArch64::FCVTPUv2f32: 10652 case AArch64::FCVTPUv2f64: 10653 case AArch64::FCVTPUv4f16: 10654 case AArch64::FCVTPUv4f32: 10655 case AArch64::FCVTPUv8f16: 10656 case AArch64::FCVTSDr: 10657 case AArch64::FCVTSHr: 10658 case AArch64::FCVTXNv1i64: 10659 case AArch64::FCVTXNv2f32: 10660 case AArch64::FCVTZSUWDr: 10661 case AArch64::FCVTZSUWHr: 10662 case AArch64::FCVTZSUWSr: 10663 case AArch64::FCVTZSUXDr: 10664 case AArch64::FCVTZSUXHr: 10665 case AArch64::FCVTZSUXSr: 10666 case AArch64::FCVTZSv1f16: 10667 case AArch64::FCVTZSv1i32: 10668 case AArch64::FCVTZSv1i64: 10669 case AArch64::FCVTZSv2f32: 10670 case AArch64::FCVTZSv2f64: 10671 case AArch64::FCVTZSv4f16: 10672 case AArch64::FCVTZSv4f32: 10673 case AArch64::FCVTZSv8f16: 10674 case AArch64::FCVTZUUWDr: 10675 case AArch64::FCVTZUUWHr: 10676 case AArch64::FCVTZUUWSr: 10677 case AArch64::FCVTZUUXDr: 10678 case AArch64::FCVTZUUXHr: 10679 case AArch64::FCVTZUUXSr: 10680 case AArch64::FCVTZUv1f16: 10681 case AArch64::FCVTZUv1i32: 10682 case AArch64::FCVTZUv1i64: 10683 case AArch64::FCVTZUv2f32: 10684 case AArch64::FCVTZUv2f64: 10685 case AArch64::FCVTZUv4f16: 10686 case AArch64::FCVTZUv4f32: 10687 case AArch64::FCVTZUv8f16: 10688 case AArch64::FJCVTZS: 10689 case AArch64::FMAXNMPv2i16p: 10690 case AArch64::FMAXNMPv2i32p: 10691 case AArch64::FMAXNMPv2i64p: 10692 case AArch64::FMAXNMVv4i16v: 10693 case AArch64::FMAXNMVv4i32v: 10694 case AArch64::FMAXNMVv8i16v: 10695 case AArch64::FMAXPv2i16p: 10696 case AArch64::FMAXPv2i32p: 10697 case AArch64::FMAXPv2i64p: 10698 case AArch64::FMAXVv4i16v: 10699 case AArch64::FMAXVv4i32v: 10700 case AArch64::FMAXVv8i16v: 10701 case AArch64::FMINNMPv2i16p: 10702 case AArch64::FMINNMPv2i32p: 10703 case AArch64::FMINNMPv2i64p: 10704 case AArch64::FMINNMVv4i16v: 10705 case AArch64::FMINNMVv4i32v: 10706 case AArch64::FMINNMVv8i16v: 10707 case AArch64::FMINPv2i16p: 10708 case AArch64::FMINPv2i32p: 10709 case AArch64::FMINPv2i64p: 10710 case AArch64::FMINVv4i16v: 10711 case AArch64::FMINVv4i32v: 10712 case AArch64::FMINVv8i16v: 10713 case AArch64::FMOVDXHighr: 10714 case AArch64::FMOVDXr: 10715 case AArch64::FMOVDr: 10716 case AArch64::FMOVHWr: 10717 case AArch64::FMOVHXr: 10718 case AArch64::FMOVHr: 10719 case AArch64::FMOVSWr: 10720 case AArch64::FMOVSr: 10721 case AArch64::FMOVWHr: 10722 case AArch64::FMOVWSr: 10723 case AArch64::FMOVXDHighr: 10724 case AArch64::FMOVXDr: 10725 case AArch64::FMOVXHr: 10726 case AArch64::FNEGDr: 10727 case AArch64::FNEGHr: 10728 case AArch64::FNEGSr: 10729 case AArch64::FNEGv2f32: 10730 case AArch64::FNEGv2f64: 10731 case AArch64::FNEGv4f16: 10732 case AArch64::FNEGv4f32: 10733 case AArch64::FNEGv8f16: 10734 case AArch64::FRECPEv1f16: 10735 case AArch64::FRECPEv1i32: 10736 case AArch64::FRECPEv1i64: 10737 case AArch64::FRECPEv2f32: 10738 case AArch64::FRECPEv2f64: 10739 case AArch64::FRECPEv4f16: 10740 case AArch64::FRECPEv4f32: 10741 case AArch64::FRECPEv8f16: 10742 case AArch64::FRECPXv1f16: 10743 case AArch64::FRECPXv1i32: 10744 case AArch64::FRECPXv1i64: 10745 case AArch64::FRINT32XDr: 10746 case AArch64::FRINT32XSr: 10747 case AArch64::FRINT32Xv2f32: 10748 case AArch64::FRINT32Xv2f64: 10749 case AArch64::FRINT32Xv4f32: 10750 case AArch64::FRINT32ZDr: 10751 case AArch64::FRINT32ZSr: 10752 case AArch64::FRINT32Zv2f32: 10753 case AArch64::FRINT32Zv2f64: 10754 case AArch64::FRINT32Zv4f32: 10755 case AArch64::FRINT64XDr: 10756 case AArch64::FRINT64XSr: 10757 case AArch64::FRINT64Xv2f32: 10758 case AArch64::FRINT64Xv2f64: 10759 case AArch64::FRINT64Xv4f32: 10760 case AArch64::FRINT64ZDr: 10761 case AArch64::FRINT64ZSr: 10762 case AArch64::FRINT64Zv2f32: 10763 case AArch64::FRINT64Zv2f64: 10764 case AArch64::FRINT64Zv4f32: 10765 case AArch64::FRINTADr: 10766 case AArch64::FRINTAHr: 10767 case AArch64::FRINTASr: 10768 case AArch64::FRINTAv2f32: 10769 case AArch64::FRINTAv2f64: 10770 case AArch64::FRINTAv4f16: 10771 case AArch64::FRINTAv4f32: 10772 case AArch64::FRINTAv8f16: 10773 case AArch64::FRINTIDr: 10774 case AArch64::FRINTIHr: 10775 case AArch64::FRINTISr: 10776 case AArch64::FRINTIv2f32: 10777 case AArch64::FRINTIv2f64: 10778 case AArch64::FRINTIv4f16: 10779 case AArch64::FRINTIv4f32: 10780 case AArch64::FRINTIv8f16: 10781 case AArch64::FRINTMDr: 10782 case AArch64::FRINTMHr: 10783 case AArch64::FRINTMSr: 10784 case AArch64::FRINTMv2f32: 10785 case AArch64::FRINTMv2f64: 10786 case AArch64::FRINTMv4f16: 10787 case AArch64::FRINTMv4f32: 10788 case AArch64::FRINTMv8f16: 10789 case AArch64::FRINTNDr: 10790 case AArch64::FRINTNHr: 10791 case AArch64::FRINTNSr: 10792 case AArch64::FRINTNv2f32: 10793 case AArch64::FRINTNv2f64: 10794 case AArch64::FRINTNv4f16: 10795 case AArch64::FRINTNv4f32: 10796 case AArch64::FRINTNv8f16: 10797 case AArch64::FRINTPDr: 10798 case AArch64::FRINTPHr: 10799 case AArch64::FRINTPSr: 10800 case AArch64::FRINTPv2f32: 10801 case AArch64::FRINTPv2f64: 10802 case AArch64::FRINTPv4f16: 10803 case AArch64::FRINTPv4f32: 10804 case AArch64::FRINTPv8f16: 10805 case AArch64::FRINTXDr: 10806 case AArch64::FRINTXHr: 10807 case AArch64::FRINTXSr: 10808 case AArch64::FRINTXv2f32: 10809 case AArch64::FRINTXv2f64: 10810 case AArch64::FRINTXv4f16: 10811 case AArch64::FRINTXv4f32: 10812 case AArch64::FRINTXv8f16: 10813 case AArch64::FRINTZDr: 10814 case AArch64::FRINTZHr: 10815 case AArch64::FRINTZSr: 10816 case AArch64::FRINTZv2f32: 10817 case AArch64::FRINTZv2f64: 10818 case AArch64::FRINTZv4f16: 10819 case AArch64::FRINTZv4f32: 10820 case AArch64::FRINTZv8f16: 10821 case AArch64::FRSQRTEv1f16: 10822 case AArch64::FRSQRTEv1i32: 10823 case AArch64::FRSQRTEv1i64: 10824 case AArch64::FRSQRTEv2f32: 10825 case AArch64::FRSQRTEv2f64: 10826 case AArch64::FRSQRTEv4f16: 10827 case AArch64::FRSQRTEv4f32: 10828 case AArch64::FRSQRTEv8f16: 10829 case AArch64::FSQRTDr: 10830 case AArch64::FSQRTHr: 10831 case AArch64::FSQRTSr: 10832 case AArch64::FSQRTv2f32: 10833 case AArch64::FSQRTv2f64: 10834 case AArch64::FSQRTv4f16: 10835 case AArch64::FSQRTv4f32: 10836 case AArch64::FSQRTv8f16: 10837 case AArch64::NEGv16i8: 10838 case AArch64::NEGv1i64: 10839 case AArch64::NEGv2i32: 10840 case AArch64::NEGv2i64: 10841 case AArch64::NEGv4i16: 10842 case AArch64::NEGv4i32: 10843 case AArch64::NEGv8i16: 10844 case AArch64::NEGv8i8: 10845 case AArch64::NOTv16i8: 10846 case AArch64::NOTv8i8: 10847 case AArch64::RBITWr: 10848 case AArch64::RBITXr: 10849 case AArch64::RBITv16i8: 10850 case AArch64::RBITv8i8: 10851 case AArch64::REV16Wr: 10852 case AArch64::REV16Xr: 10853 case AArch64::REV16v16i8: 10854 case AArch64::REV16v8i8: 10855 case AArch64::REV32Xr: 10856 case AArch64::REV32v16i8: 10857 case AArch64::REV32v4i16: 10858 case AArch64::REV32v8i16: 10859 case AArch64::REV32v8i8: 10860 case AArch64::REV64v16i8: 10861 case AArch64::REV64v2i32: 10862 case AArch64::REV64v4i16: 10863 case AArch64::REV64v4i32: 10864 case AArch64::REV64v8i16: 10865 case AArch64::REV64v8i8: 10866 case AArch64::REVWr: 10867 case AArch64::REVXr: 10868 case AArch64::SADDLPv16i8_v8i16: 10869 case AArch64::SADDLPv2i32_v1i64: 10870 case AArch64::SADDLPv4i16_v2i32: 10871 case AArch64::SADDLPv4i32_v2i64: 10872 case AArch64::SADDLPv8i16_v4i32: 10873 case AArch64::SADDLPv8i8_v4i16: 10874 case AArch64::SADDLVv16i8v: 10875 case AArch64::SADDLVv4i16v: 10876 case AArch64::SADDLVv4i32v: 10877 case AArch64::SADDLVv8i16v: 10878 case AArch64::SADDLVv8i8v: 10879 case AArch64::SCVTFUWDri: 10880 case AArch64::SCVTFUWHri: 10881 case AArch64::SCVTFUWSri: 10882 case AArch64::SCVTFUXDri: 10883 case AArch64::SCVTFUXHri: 10884 case AArch64::SCVTFUXSri: 10885 case AArch64::SCVTFv1i16: 10886 case AArch64::SCVTFv1i32: 10887 case AArch64::SCVTFv1i64: 10888 case AArch64::SCVTFv2f32: 10889 case AArch64::SCVTFv2f64: 10890 case AArch64::SCVTFv4f16: 10891 case AArch64::SCVTFv4f32: 10892 case AArch64::SCVTFv8f16: 10893 case AArch64::SHA1Hrr: 10894 case AArch64::SHLLv16i8: 10895 case AArch64::SHLLv2i32: 10896 case AArch64::SHLLv4i16: 10897 case AArch64::SHLLv4i32: 10898 case AArch64::SHLLv8i16: 10899 case AArch64::SHLLv8i8: 10900 case AArch64::SMAXVv16i8v: 10901 case AArch64::SMAXVv4i16v: 10902 case AArch64::SMAXVv4i32v: 10903 case AArch64::SMAXVv8i16v: 10904 case AArch64::SMAXVv8i8v: 10905 case AArch64::SMINVv16i8v: 10906 case AArch64::SMINVv4i16v: 10907 case AArch64::SMINVv4i32v: 10908 case AArch64::SMINVv8i16v: 10909 case AArch64::SMINVv8i8v: 10910 case AArch64::SMOVvi16to32_idx0: 10911 case AArch64::SMOVvi16to64_idx0: 10912 case AArch64::SMOVvi32to64_idx0: 10913 case AArch64::SMOVvi8to32_idx0: 10914 case AArch64::SMOVvi8to64_idx0: 10915 case AArch64::SQABSv16i8: 10916 case AArch64::SQABSv1i16: 10917 case AArch64::SQABSv1i32: 10918 case AArch64::SQABSv1i64: 10919 case AArch64::SQABSv1i8: 10920 case AArch64::SQABSv2i32: 10921 case AArch64::SQABSv2i64: 10922 case AArch64::SQABSv4i16: 10923 case AArch64::SQABSv4i32: 10924 case AArch64::SQABSv8i16: 10925 case AArch64::SQABSv8i8: 10926 case AArch64::SQNEGv16i8: 10927 case AArch64::SQNEGv1i16: 10928 case AArch64::SQNEGv1i32: 10929 case AArch64::SQNEGv1i64: 10930 case AArch64::SQNEGv1i8: 10931 case AArch64::SQNEGv2i32: 10932 case AArch64::SQNEGv2i64: 10933 case AArch64::SQNEGv4i16: 10934 case AArch64::SQNEGv4i32: 10935 case AArch64::SQNEGv8i16: 10936 case AArch64::SQNEGv8i8: 10937 case AArch64::SQXTNv1i16: 10938 case AArch64::SQXTNv1i32: 10939 case AArch64::SQXTNv1i8: 10940 case AArch64::SQXTNv2i32: 10941 case AArch64::SQXTNv4i16: 10942 case AArch64::SQXTNv8i8: 10943 case AArch64::SQXTUNv1i16: 10944 case AArch64::SQXTUNv1i32: 10945 case AArch64::SQXTUNv1i8: 10946 case AArch64::SQXTUNv2i32: 10947 case AArch64::SQXTUNv4i16: 10948 case AArch64::SQXTUNv8i8: 10949 case AArch64::UADDLPv16i8_v8i16: 10950 case AArch64::UADDLPv2i32_v1i64: 10951 case AArch64::UADDLPv4i16_v2i32: 10952 case AArch64::UADDLPv4i32_v2i64: 10953 case AArch64::UADDLPv8i16_v4i32: 10954 case AArch64::UADDLPv8i8_v4i16: 10955 case AArch64::UADDLVv16i8v: 10956 case AArch64::UADDLVv4i16v: 10957 case AArch64::UADDLVv4i32v: 10958 case AArch64::UADDLVv8i16v: 10959 case AArch64::UADDLVv8i8v: 10960 case AArch64::UCVTFUWDri: 10961 case AArch64::UCVTFUWHri: 10962 case AArch64::UCVTFUWSri: 10963 case AArch64::UCVTFUXDri: 10964 case AArch64::UCVTFUXHri: 10965 case AArch64::UCVTFUXSri: 10966 case AArch64::UCVTFv1i16: 10967 case AArch64::UCVTFv1i32: 10968 case AArch64::UCVTFv1i64: 10969 case AArch64::UCVTFv2f32: 10970 case AArch64::UCVTFv2f64: 10971 case AArch64::UCVTFv4f16: 10972 case AArch64::UCVTFv4f32: 10973 case AArch64::UCVTFv8f16: 10974 case AArch64::UMAXVv16i8v: 10975 case AArch64::UMAXVv4i16v: 10976 case AArch64::UMAXVv4i32v: 10977 case AArch64::UMAXVv8i16v: 10978 case AArch64::UMAXVv8i8v: 10979 case AArch64::UMINVv16i8v: 10980 case AArch64::UMINVv4i16v: 10981 case AArch64::UMINVv4i32v: 10982 case AArch64::UMINVv8i16v: 10983 case AArch64::UMINVv8i8v: 10984 case AArch64::UMOVvi16_idx0: 10985 case AArch64::UMOVvi32_idx0: 10986 case AArch64::UMOVvi64_idx0: 10987 case AArch64::UMOVvi8_idx0: 10988 case AArch64::UQXTNv1i16: 10989 case AArch64::UQXTNv1i32: 10990 case AArch64::UQXTNv1i8: 10991 case AArch64::UQXTNv2i32: 10992 case AArch64::UQXTNv4i16: 10993 case AArch64::UQXTNv8i8: 10994 case AArch64::URECPEv2i32: 10995 case AArch64::URECPEv4i32: 10996 case AArch64::URSQRTEv2i32: 10997 case AArch64::URSQRTEv4i32: 10998 case AArch64::XTNv2i32: 10999 case AArch64::XTNv4i16: 11000 case AArch64::XTNv8i8: { 11001 // op: Rd 11002 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11003 op &= UINT64_C(31); 11004 Value |= op; 11005 // op: Rn 11006 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11007 op &= UINT64_C(31); 11008 op <<= 5; 11009 Value |= op; 11010 break; 11011 } 11012 case AArch64::FMULXv1i16_indexed: 11013 case AArch64::FMULXv4i16_indexed: 11014 case AArch64::FMULXv8i16_indexed: 11015 case AArch64::FMULv1i16_indexed: 11016 case AArch64::FMULv4i16_indexed: 11017 case AArch64::FMULv8i16_indexed: 11018 case AArch64::MULv4i16_indexed: 11019 case AArch64::MULv8i16_indexed: 11020 case AArch64::SMULLv4i16_indexed: 11021 case AArch64::SMULLv8i16_indexed: 11022 case AArch64::SQDMULHv1i16_indexed: 11023 case AArch64::SQDMULHv4i16_indexed: 11024 case AArch64::SQDMULHv8i16_indexed: 11025 case AArch64::SQDMULLv1i32_indexed: 11026 case AArch64::SQDMULLv4i16_indexed: 11027 case AArch64::SQDMULLv8i16_indexed: 11028 case AArch64::SQRDMULHv1i16_indexed: 11029 case AArch64::SQRDMULHv4i16_indexed: 11030 case AArch64::SQRDMULHv8i16_indexed: 11031 case AArch64::UMULLv4i16_indexed: 11032 case AArch64::UMULLv8i16_indexed: { 11033 // op: Rd 11034 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11035 op &= UINT64_C(31); 11036 Value |= op; 11037 // op: Rn 11038 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11039 op &= UINT64_C(31); 11040 op <<= 5; 11041 Value |= op; 11042 // op: Rm 11043 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11044 op &= UINT64_C(15); 11045 op <<= 16; 11046 Value |= op; 11047 // op: idx 11048 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11049 Value |= (op & UINT64_C(3)) << 20; 11050 Value |= (op & UINT64_C(4)) << 9; 11051 break; 11052 } 11053 case AArch64::ADCSWr: 11054 case AArch64::ADCSXr: 11055 case AArch64::ADCWr: 11056 case AArch64::ADCXr: 11057 case AArch64::ADDHNv2i64_v2i32: 11058 case AArch64::ADDHNv4i32_v4i16: 11059 case AArch64::ADDHNv8i16_v8i8: 11060 case AArch64::ADDPv16i8: 11061 case AArch64::ADDPv2i32: 11062 case AArch64::ADDPv2i64: 11063 case AArch64::ADDPv4i16: 11064 case AArch64::ADDPv4i32: 11065 case AArch64::ADDPv8i16: 11066 case AArch64::ADDPv8i8: 11067 case AArch64::ADDv16i8: 11068 case AArch64::ADDv1i64: 11069 case AArch64::ADDv2i32: 11070 case AArch64::ADDv2i64: 11071 case AArch64::ADDv4i16: 11072 case AArch64::ADDv4i32: 11073 case AArch64::ADDv8i16: 11074 case AArch64::ADDv8i8: 11075 case AArch64::ANDv16i8: 11076 case AArch64::ANDv8i8: 11077 case AArch64::ASRVWr: 11078 case AArch64::ASRVXr: 11079 case AArch64::BICv16i8: 11080 case AArch64::BICv8i8: 11081 case AArch64::CMEQv16i8: 11082 case AArch64::CMEQv1i64: 11083 case AArch64::CMEQv2i32: 11084 case AArch64::CMEQv2i64: 11085 case AArch64::CMEQv4i16: 11086 case AArch64::CMEQv4i32: 11087 case AArch64::CMEQv8i16: 11088 case AArch64::CMEQv8i8: 11089 case AArch64::CMGEv16i8: 11090 case AArch64::CMGEv1i64: 11091 case AArch64::CMGEv2i32: 11092 case AArch64::CMGEv2i64: 11093 case AArch64::CMGEv4i16: 11094 case AArch64::CMGEv4i32: 11095 case AArch64::CMGEv8i16: 11096 case AArch64::CMGEv8i8: 11097 case AArch64::CMGTv16i8: 11098 case AArch64::CMGTv1i64: 11099 case AArch64::CMGTv2i32: 11100 case AArch64::CMGTv2i64: 11101 case AArch64::CMGTv4i16: 11102 case AArch64::CMGTv4i32: 11103 case AArch64::CMGTv8i16: 11104 case AArch64::CMGTv8i8: 11105 case AArch64::CMHIv16i8: 11106 case AArch64::CMHIv1i64: 11107 case AArch64::CMHIv2i32: 11108 case AArch64::CMHIv2i64: 11109 case AArch64::CMHIv4i16: 11110 case AArch64::CMHIv4i32: 11111 case AArch64::CMHIv8i16: 11112 case AArch64::CMHIv8i8: 11113 case AArch64::CMHSv16i8: 11114 case AArch64::CMHSv1i64: 11115 case AArch64::CMHSv2i32: 11116 case AArch64::CMHSv2i64: 11117 case AArch64::CMHSv4i16: 11118 case AArch64::CMHSv4i32: 11119 case AArch64::CMHSv8i16: 11120 case AArch64::CMHSv8i8: 11121 case AArch64::CMTSTv16i8: 11122 case AArch64::CMTSTv1i64: 11123 case AArch64::CMTSTv2i32: 11124 case AArch64::CMTSTv2i64: 11125 case AArch64::CMTSTv4i16: 11126 case AArch64::CMTSTv4i32: 11127 case AArch64::CMTSTv8i16: 11128 case AArch64::CMTSTv8i8: 11129 case AArch64::CRC32Brr: 11130 case AArch64::CRC32CBrr: 11131 case AArch64::CRC32CHrr: 11132 case AArch64::CRC32CWrr: 11133 case AArch64::CRC32CXrr: 11134 case AArch64::CRC32Hrr: 11135 case AArch64::CRC32Wrr: 11136 case AArch64::CRC32Xrr: 11137 case AArch64::EORv16i8: 11138 case AArch64::EORv8i8: 11139 case AArch64::FABD16: 11140 case AArch64::FABD32: 11141 case AArch64::FABD64: 11142 case AArch64::FABDv2f32: 11143 case AArch64::FABDv2f64: 11144 case AArch64::FABDv4f16: 11145 case AArch64::FABDv4f32: 11146 case AArch64::FABDv8f16: 11147 case AArch64::FACGE16: 11148 case AArch64::FACGE32: 11149 case AArch64::FACGE64: 11150 case AArch64::FACGEv2f32: 11151 case AArch64::FACGEv2f64: 11152 case AArch64::FACGEv4f16: 11153 case AArch64::FACGEv4f32: 11154 case AArch64::FACGEv8f16: 11155 case AArch64::FACGT16: 11156 case AArch64::FACGT32: 11157 case AArch64::FACGT64: 11158 case AArch64::FACGTv2f32: 11159 case AArch64::FACGTv2f64: 11160 case AArch64::FACGTv4f16: 11161 case AArch64::FACGTv4f32: 11162 case AArch64::FACGTv8f16: 11163 case AArch64::FADDDrr: 11164 case AArch64::FADDHrr: 11165 case AArch64::FADDPv2f32: 11166 case AArch64::FADDPv2f64: 11167 case AArch64::FADDPv4f16: 11168 case AArch64::FADDPv4f32: 11169 case AArch64::FADDPv8f16: 11170 case AArch64::FADDSrr: 11171 case AArch64::FADDv2f32: 11172 case AArch64::FADDv2f64: 11173 case AArch64::FADDv4f16: 11174 case AArch64::FADDv4f32: 11175 case AArch64::FADDv8f16: 11176 case AArch64::FCMEQ16: 11177 case AArch64::FCMEQ32: 11178 case AArch64::FCMEQ64: 11179 case AArch64::FCMEQv2f32: 11180 case AArch64::FCMEQv2f64: 11181 case AArch64::FCMEQv4f16: 11182 case AArch64::FCMEQv4f32: 11183 case AArch64::FCMEQv8f16: 11184 case AArch64::FCMGE16: 11185 case AArch64::FCMGE32: 11186 case AArch64::FCMGE64: 11187 case AArch64::FCMGEv2f32: 11188 case AArch64::FCMGEv2f64: 11189 case AArch64::FCMGEv4f16: 11190 case AArch64::FCMGEv4f32: 11191 case AArch64::FCMGEv8f16: 11192 case AArch64::FCMGT16: 11193 case AArch64::FCMGT32: 11194 case AArch64::FCMGT64: 11195 case AArch64::FCMGTv2f32: 11196 case AArch64::FCMGTv2f64: 11197 case AArch64::FCMGTv4f16: 11198 case AArch64::FCMGTv4f32: 11199 case AArch64::FCMGTv8f16: 11200 case AArch64::FDIVDrr: 11201 case AArch64::FDIVHrr: 11202 case AArch64::FDIVSrr: 11203 case AArch64::FDIVv2f32: 11204 case AArch64::FDIVv2f64: 11205 case AArch64::FDIVv4f16: 11206 case AArch64::FDIVv4f32: 11207 case AArch64::FDIVv8f16: 11208 case AArch64::FMAXDrr: 11209 case AArch64::FMAXHrr: 11210 case AArch64::FMAXNMDrr: 11211 case AArch64::FMAXNMHrr: 11212 case AArch64::FMAXNMPv2f32: 11213 case AArch64::FMAXNMPv2f64: 11214 case AArch64::FMAXNMPv4f16: 11215 case AArch64::FMAXNMPv4f32: 11216 case AArch64::FMAXNMPv8f16: 11217 case AArch64::FMAXNMSrr: 11218 case AArch64::FMAXNMv2f32: 11219 case AArch64::FMAXNMv2f64: 11220 case AArch64::FMAXNMv4f16: 11221 case AArch64::FMAXNMv4f32: 11222 case AArch64::FMAXNMv8f16: 11223 case AArch64::FMAXPv2f32: 11224 case AArch64::FMAXPv2f64: 11225 case AArch64::FMAXPv4f16: 11226 case AArch64::FMAXPv4f32: 11227 case AArch64::FMAXPv8f16: 11228 case AArch64::FMAXSrr: 11229 case AArch64::FMAXv2f32: 11230 case AArch64::FMAXv2f64: 11231 case AArch64::FMAXv4f16: 11232 case AArch64::FMAXv4f32: 11233 case AArch64::FMAXv8f16: 11234 case AArch64::FMINDrr: 11235 case AArch64::FMINHrr: 11236 case AArch64::FMINNMDrr: 11237 case AArch64::FMINNMHrr: 11238 case AArch64::FMINNMPv2f32: 11239 case AArch64::FMINNMPv2f64: 11240 case AArch64::FMINNMPv4f16: 11241 case AArch64::FMINNMPv4f32: 11242 case AArch64::FMINNMPv8f16: 11243 case AArch64::FMINNMSrr: 11244 case AArch64::FMINNMv2f32: 11245 case AArch64::FMINNMv2f64: 11246 case AArch64::FMINNMv4f16: 11247 case AArch64::FMINNMv4f32: 11248 case AArch64::FMINNMv8f16: 11249 case AArch64::FMINPv2f32: 11250 case AArch64::FMINPv2f64: 11251 case AArch64::FMINPv4f16: 11252 case AArch64::FMINPv4f32: 11253 case AArch64::FMINPv8f16: 11254 case AArch64::FMINSrr: 11255 case AArch64::FMINv2f32: 11256 case AArch64::FMINv2f64: 11257 case AArch64::FMINv4f16: 11258 case AArch64::FMINv4f32: 11259 case AArch64::FMINv8f16: 11260 case AArch64::FMULDrr: 11261 case AArch64::FMULHrr: 11262 case AArch64::FMULSrr: 11263 case AArch64::FMULX16: 11264 case AArch64::FMULX32: 11265 case AArch64::FMULX64: 11266 case AArch64::FMULXv2f32: 11267 case AArch64::FMULXv2f64: 11268 case AArch64::FMULXv4f16: 11269 case AArch64::FMULXv4f32: 11270 case AArch64::FMULXv8f16: 11271 case AArch64::FMULv2f32: 11272 case AArch64::FMULv2f64: 11273 case AArch64::FMULv4f16: 11274 case AArch64::FMULv4f32: 11275 case AArch64::FMULv8f16: 11276 case AArch64::FNMULDrr: 11277 case AArch64::FNMULHrr: 11278 case AArch64::FNMULSrr: 11279 case AArch64::FRECPS16: 11280 case AArch64::FRECPS32: 11281 case AArch64::FRECPS64: 11282 case AArch64::FRECPSv2f32: 11283 case AArch64::FRECPSv2f64: 11284 case AArch64::FRECPSv4f16: 11285 case AArch64::FRECPSv4f32: 11286 case AArch64::FRECPSv8f16: 11287 case AArch64::FRSQRTS16: 11288 case AArch64::FRSQRTS32: 11289 case AArch64::FRSQRTS64: 11290 case AArch64::FRSQRTSv2f32: 11291 case AArch64::FRSQRTSv2f64: 11292 case AArch64::FRSQRTSv4f16: 11293 case AArch64::FRSQRTSv4f32: 11294 case AArch64::FRSQRTSv8f16: 11295 case AArch64::FSUBDrr: 11296 case AArch64::FSUBHrr: 11297 case AArch64::FSUBSrr: 11298 case AArch64::FSUBv2f32: 11299 case AArch64::FSUBv2f64: 11300 case AArch64::FSUBv4f16: 11301 case AArch64::FSUBv4f32: 11302 case AArch64::FSUBv8f16: 11303 case AArch64::GMI: 11304 case AArch64::IRG: 11305 case AArch64::LSLVWr: 11306 case AArch64::LSLVXr: 11307 case AArch64::LSRVWr: 11308 case AArch64::LSRVXr: 11309 case AArch64::MULv16i8: 11310 case AArch64::MULv2i32: 11311 case AArch64::MULv4i16: 11312 case AArch64::MULv4i32: 11313 case AArch64::MULv8i16: 11314 case AArch64::MULv8i8: 11315 case AArch64::ORNv16i8: 11316 case AArch64::ORNv8i8: 11317 case AArch64::ORRv16i8: 11318 case AArch64::ORRv8i8: 11319 case AArch64::PACGA: 11320 case AArch64::PMULLv16i8: 11321 case AArch64::PMULLv1i64: 11322 case AArch64::PMULLv2i64: 11323 case AArch64::PMULLv8i8: 11324 case AArch64::PMULv16i8: 11325 case AArch64::PMULv8i8: 11326 case AArch64::RADDHNv2i64_v2i32: 11327 case AArch64::RADDHNv4i32_v4i16: 11328 case AArch64::RADDHNv8i16_v8i8: 11329 case AArch64::RORVWr: 11330 case AArch64::RORVXr: 11331 case AArch64::RSUBHNv2i64_v2i32: 11332 case AArch64::RSUBHNv4i32_v4i16: 11333 case AArch64::RSUBHNv8i16_v8i8: 11334 case AArch64::SABDLv16i8_v8i16: 11335 case AArch64::SABDLv2i32_v2i64: 11336 case AArch64::SABDLv4i16_v4i32: 11337 case AArch64::SABDLv4i32_v2i64: 11338 case AArch64::SABDLv8i16_v4i32: 11339 case AArch64::SABDLv8i8_v8i16: 11340 case AArch64::SABDv16i8: 11341 case AArch64::SABDv2i32: 11342 case AArch64::SABDv4i16: 11343 case AArch64::SABDv4i32: 11344 case AArch64::SABDv8i16: 11345 case AArch64::SABDv8i8: 11346 case AArch64::SADDLv16i8_v8i16: 11347 case AArch64::SADDLv2i32_v2i64: 11348 case AArch64::SADDLv4i16_v4i32: 11349 case AArch64::SADDLv4i32_v2i64: 11350 case AArch64::SADDLv8i16_v4i32: 11351 case AArch64::SADDLv8i8_v8i16: 11352 case AArch64::SADDWv16i8_v8i16: 11353 case AArch64::SADDWv2i32_v2i64: 11354 case AArch64::SADDWv4i16_v4i32: 11355 case AArch64::SADDWv4i32_v2i64: 11356 case AArch64::SADDWv8i16_v4i32: 11357 case AArch64::SADDWv8i8_v8i16: 11358 case AArch64::SBCSWr: 11359 case AArch64::SBCSXr: 11360 case AArch64::SBCWr: 11361 case AArch64::SBCXr: 11362 case AArch64::SDIVWr: 11363 case AArch64::SDIVXr: 11364 case AArch64::SHADDv16i8: 11365 case AArch64::SHADDv2i32: 11366 case AArch64::SHADDv4i16: 11367 case AArch64::SHADDv4i32: 11368 case AArch64::SHADDv8i16: 11369 case AArch64::SHADDv8i8: 11370 case AArch64::SHSUBv16i8: 11371 case AArch64::SHSUBv2i32: 11372 case AArch64::SHSUBv4i16: 11373 case AArch64::SHSUBv4i32: 11374 case AArch64::SHSUBv8i16: 11375 case AArch64::SHSUBv8i8: 11376 case AArch64::SMAXPv16i8: 11377 case AArch64::SMAXPv2i32: 11378 case AArch64::SMAXPv4i16: 11379 case AArch64::SMAXPv4i32: 11380 case AArch64::SMAXPv8i16: 11381 case AArch64::SMAXPv8i8: 11382 case AArch64::SMAXWrr: 11383 case AArch64::SMAXXrr: 11384 case AArch64::SMAXv16i8: 11385 case AArch64::SMAXv2i32: 11386 case AArch64::SMAXv4i16: 11387 case AArch64::SMAXv4i32: 11388 case AArch64::SMAXv8i16: 11389 case AArch64::SMAXv8i8: 11390 case AArch64::SMINPv16i8: 11391 case AArch64::SMINPv2i32: 11392 case AArch64::SMINPv4i16: 11393 case AArch64::SMINPv4i32: 11394 case AArch64::SMINPv8i16: 11395 case AArch64::SMINPv8i8: 11396 case AArch64::SMINWrr: 11397 case AArch64::SMINXrr: 11398 case AArch64::SMINv16i8: 11399 case AArch64::SMINv2i32: 11400 case AArch64::SMINv4i16: 11401 case AArch64::SMINv4i32: 11402 case AArch64::SMINv8i16: 11403 case AArch64::SMINv8i8: 11404 case AArch64::SMULLv16i8_v8i16: 11405 case AArch64::SMULLv2i32_v2i64: 11406 case AArch64::SMULLv4i16_v4i32: 11407 case AArch64::SMULLv4i32_v2i64: 11408 case AArch64::SMULLv8i16_v4i32: 11409 case AArch64::SMULLv8i8_v8i16: 11410 case AArch64::SQADDv16i8: 11411 case AArch64::SQADDv1i16: 11412 case AArch64::SQADDv1i32: 11413 case AArch64::SQADDv1i64: 11414 case AArch64::SQADDv1i8: 11415 case AArch64::SQADDv2i32: 11416 case AArch64::SQADDv2i64: 11417 case AArch64::SQADDv4i16: 11418 case AArch64::SQADDv4i32: 11419 case AArch64::SQADDv8i16: 11420 case AArch64::SQADDv8i8: 11421 case AArch64::SQDMULHv1i16: 11422 case AArch64::SQDMULHv1i32: 11423 case AArch64::SQDMULHv2i32: 11424 case AArch64::SQDMULHv4i16: 11425 case AArch64::SQDMULHv4i32: 11426 case AArch64::SQDMULHv8i16: 11427 case AArch64::SQDMULLi16: 11428 case AArch64::SQDMULLi32: 11429 case AArch64::SQDMULLv2i32_v2i64: 11430 case AArch64::SQDMULLv4i16_v4i32: 11431 case AArch64::SQDMULLv4i32_v2i64: 11432 case AArch64::SQDMULLv8i16_v4i32: 11433 case AArch64::SQRDMULHv1i16: 11434 case AArch64::SQRDMULHv1i32: 11435 case AArch64::SQRDMULHv2i32: 11436 case AArch64::SQRDMULHv4i16: 11437 case AArch64::SQRDMULHv4i32: 11438 case AArch64::SQRDMULHv8i16: 11439 case AArch64::SQRSHLv16i8: 11440 case AArch64::SQRSHLv1i16: 11441 case AArch64::SQRSHLv1i32: 11442 case AArch64::SQRSHLv1i64: 11443 case AArch64::SQRSHLv1i8: 11444 case AArch64::SQRSHLv2i32: 11445 case AArch64::SQRSHLv2i64: 11446 case AArch64::SQRSHLv4i16: 11447 case AArch64::SQRSHLv4i32: 11448 case AArch64::SQRSHLv8i16: 11449 case AArch64::SQRSHLv8i8: 11450 case AArch64::SQSHLv16i8: 11451 case AArch64::SQSHLv1i16: 11452 case AArch64::SQSHLv1i32: 11453 case AArch64::SQSHLv1i64: 11454 case AArch64::SQSHLv1i8: 11455 case AArch64::SQSHLv2i32: 11456 case AArch64::SQSHLv2i64: 11457 case AArch64::SQSHLv4i16: 11458 case AArch64::SQSHLv4i32: 11459 case AArch64::SQSHLv8i16: 11460 case AArch64::SQSHLv8i8: 11461 case AArch64::SQSUBv16i8: 11462 case AArch64::SQSUBv1i16: 11463 case AArch64::SQSUBv1i32: 11464 case AArch64::SQSUBv1i64: 11465 case AArch64::SQSUBv1i8: 11466 case AArch64::SQSUBv2i32: 11467 case AArch64::SQSUBv2i64: 11468 case AArch64::SQSUBv4i16: 11469 case AArch64::SQSUBv4i32: 11470 case AArch64::SQSUBv8i16: 11471 case AArch64::SQSUBv8i8: 11472 case AArch64::SRHADDv16i8: 11473 case AArch64::SRHADDv2i32: 11474 case AArch64::SRHADDv4i16: 11475 case AArch64::SRHADDv4i32: 11476 case AArch64::SRHADDv8i16: 11477 case AArch64::SRHADDv8i8: 11478 case AArch64::SRSHLv16i8: 11479 case AArch64::SRSHLv1i64: 11480 case AArch64::SRSHLv2i32: 11481 case AArch64::SRSHLv2i64: 11482 case AArch64::SRSHLv4i16: 11483 case AArch64::SRSHLv4i32: 11484 case AArch64::SRSHLv8i16: 11485 case AArch64::SRSHLv8i8: 11486 case AArch64::SSHLv16i8: 11487 case AArch64::SSHLv1i64: 11488 case AArch64::SSHLv2i32: 11489 case AArch64::SSHLv2i64: 11490 case AArch64::SSHLv4i16: 11491 case AArch64::SSHLv4i32: 11492 case AArch64::SSHLv8i16: 11493 case AArch64::SSHLv8i8: 11494 case AArch64::SSUBLv16i8_v8i16: 11495 case AArch64::SSUBLv2i32_v2i64: 11496 case AArch64::SSUBLv4i16_v4i32: 11497 case AArch64::SSUBLv4i32_v2i64: 11498 case AArch64::SSUBLv8i16_v4i32: 11499 case AArch64::SSUBLv8i8_v8i16: 11500 case AArch64::SSUBWv16i8_v8i16: 11501 case AArch64::SSUBWv2i32_v2i64: 11502 case AArch64::SSUBWv4i16_v4i32: 11503 case AArch64::SSUBWv4i32_v2i64: 11504 case AArch64::SSUBWv8i16_v4i32: 11505 case AArch64::SSUBWv8i8_v8i16: 11506 case AArch64::SUBHNv2i64_v2i32: 11507 case AArch64::SUBHNv4i32_v4i16: 11508 case AArch64::SUBHNv8i16_v8i8: 11509 case AArch64::SUBP: 11510 case AArch64::SUBPS: 11511 case AArch64::SUBv16i8: 11512 case AArch64::SUBv1i64: 11513 case AArch64::SUBv2i32: 11514 case AArch64::SUBv2i64: 11515 case AArch64::SUBv4i16: 11516 case AArch64::SUBv4i32: 11517 case AArch64::SUBv8i16: 11518 case AArch64::SUBv8i8: 11519 case AArch64::TRN1v16i8: 11520 case AArch64::TRN1v2i32: 11521 case AArch64::TRN1v2i64: 11522 case AArch64::TRN1v4i16: 11523 case AArch64::TRN1v4i32: 11524 case AArch64::TRN1v8i16: 11525 case AArch64::TRN1v8i8: 11526 case AArch64::TRN2v16i8: 11527 case AArch64::TRN2v2i32: 11528 case AArch64::TRN2v2i64: 11529 case AArch64::TRN2v4i16: 11530 case AArch64::TRN2v4i32: 11531 case AArch64::TRN2v8i16: 11532 case AArch64::TRN2v8i8: 11533 case AArch64::UABDLv16i8_v8i16: 11534 case AArch64::UABDLv2i32_v2i64: 11535 case AArch64::UABDLv4i16_v4i32: 11536 case AArch64::UABDLv4i32_v2i64: 11537 case AArch64::UABDLv8i16_v4i32: 11538 case AArch64::UABDLv8i8_v8i16: 11539 case AArch64::UABDv16i8: 11540 case AArch64::UABDv2i32: 11541 case AArch64::UABDv4i16: 11542 case AArch64::UABDv4i32: 11543 case AArch64::UABDv8i16: 11544 case AArch64::UABDv8i8: 11545 case AArch64::UADDLv16i8_v8i16: 11546 case AArch64::UADDLv2i32_v2i64: 11547 case AArch64::UADDLv4i16_v4i32: 11548 case AArch64::UADDLv4i32_v2i64: 11549 case AArch64::UADDLv8i16_v4i32: 11550 case AArch64::UADDLv8i8_v8i16: 11551 case AArch64::UADDWv16i8_v8i16: 11552 case AArch64::UADDWv2i32_v2i64: 11553 case AArch64::UADDWv4i16_v4i32: 11554 case AArch64::UADDWv4i32_v2i64: 11555 case AArch64::UADDWv8i16_v4i32: 11556 case AArch64::UADDWv8i8_v8i16: 11557 case AArch64::UDIVWr: 11558 case AArch64::UDIVXr: 11559 case AArch64::UHADDv16i8: 11560 case AArch64::UHADDv2i32: 11561 case AArch64::UHADDv4i16: 11562 case AArch64::UHADDv4i32: 11563 case AArch64::UHADDv8i16: 11564 case AArch64::UHADDv8i8: 11565 case AArch64::UHSUBv16i8: 11566 case AArch64::UHSUBv2i32: 11567 case AArch64::UHSUBv4i16: 11568 case AArch64::UHSUBv4i32: 11569 case AArch64::UHSUBv8i16: 11570 case AArch64::UHSUBv8i8: 11571 case AArch64::UMAXPv16i8: 11572 case AArch64::UMAXPv2i32: 11573 case AArch64::UMAXPv4i16: 11574 case AArch64::UMAXPv4i32: 11575 case AArch64::UMAXPv8i16: 11576 case AArch64::UMAXPv8i8: 11577 case AArch64::UMAXWrr: 11578 case AArch64::UMAXXrr: 11579 case AArch64::UMAXv16i8: 11580 case AArch64::UMAXv2i32: 11581 case AArch64::UMAXv4i16: 11582 case AArch64::UMAXv4i32: 11583 case AArch64::UMAXv8i16: 11584 case AArch64::UMAXv8i8: 11585 case AArch64::UMINPv16i8: 11586 case AArch64::UMINPv2i32: 11587 case AArch64::UMINPv4i16: 11588 case AArch64::UMINPv4i32: 11589 case AArch64::UMINPv8i16: 11590 case AArch64::UMINPv8i8: 11591 case AArch64::UMINWrr: 11592 case AArch64::UMINXrr: 11593 case AArch64::UMINv16i8: 11594 case AArch64::UMINv2i32: 11595 case AArch64::UMINv4i16: 11596 case AArch64::UMINv4i32: 11597 case AArch64::UMINv8i16: 11598 case AArch64::UMINv8i8: 11599 case AArch64::UMULLv16i8_v8i16: 11600 case AArch64::UMULLv2i32_v2i64: 11601 case AArch64::UMULLv4i16_v4i32: 11602 case AArch64::UMULLv4i32_v2i64: 11603 case AArch64::UMULLv8i16_v4i32: 11604 case AArch64::UMULLv8i8_v8i16: 11605 case AArch64::UQADDv16i8: 11606 case AArch64::UQADDv1i16: 11607 case AArch64::UQADDv1i32: 11608 case AArch64::UQADDv1i64: 11609 case AArch64::UQADDv1i8: 11610 case AArch64::UQADDv2i32: 11611 case AArch64::UQADDv2i64: 11612 case AArch64::UQADDv4i16: 11613 case AArch64::UQADDv4i32: 11614 case AArch64::UQADDv8i16: 11615 case AArch64::UQADDv8i8: 11616 case AArch64::UQRSHLv16i8: 11617 case AArch64::UQRSHLv1i16: 11618 case AArch64::UQRSHLv1i32: 11619 case AArch64::UQRSHLv1i64: 11620 case AArch64::UQRSHLv1i8: 11621 case AArch64::UQRSHLv2i32: 11622 case AArch64::UQRSHLv2i64: 11623 case AArch64::UQRSHLv4i16: 11624 case AArch64::UQRSHLv4i32: 11625 case AArch64::UQRSHLv8i16: 11626 case AArch64::UQRSHLv8i8: 11627 case AArch64::UQSHLv16i8: 11628 case AArch64::UQSHLv1i16: 11629 case AArch64::UQSHLv1i32: 11630 case AArch64::UQSHLv1i64: 11631 case AArch64::UQSHLv1i8: 11632 case AArch64::UQSHLv2i32: 11633 case AArch64::UQSHLv2i64: 11634 case AArch64::UQSHLv4i16: 11635 case AArch64::UQSHLv4i32: 11636 case AArch64::UQSHLv8i16: 11637 case AArch64::UQSHLv8i8: 11638 case AArch64::UQSUBv16i8: 11639 case AArch64::UQSUBv1i16: 11640 case AArch64::UQSUBv1i32: 11641 case AArch64::UQSUBv1i64: 11642 case AArch64::UQSUBv1i8: 11643 case AArch64::UQSUBv2i32: 11644 case AArch64::UQSUBv2i64: 11645 case AArch64::UQSUBv4i16: 11646 case AArch64::UQSUBv4i32: 11647 case AArch64::UQSUBv8i16: 11648 case AArch64::UQSUBv8i8: 11649 case AArch64::URHADDv16i8: 11650 case AArch64::URHADDv2i32: 11651 case AArch64::URHADDv4i16: 11652 case AArch64::URHADDv4i32: 11653 case AArch64::URHADDv8i16: 11654 case AArch64::URHADDv8i8: 11655 case AArch64::URSHLv16i8: 11656 case AArch64::URSHLv1i64: 11657 case AArch64::URSHLv2i32: 11658 case AArch64::URSHLv2i64: 11659 case AArch64::URSHLv4i16: 11660 case AArch64::URSHLv4i32: 11661 case AArch64::URSHLv8i16: 11662 case AArch64::URSHLv8i8: 11663 case AArch64::USHLv16i8: 11664 case AArch64::USHLv1i64: 11665 case AArch64::USHLv2i32: 11666 case AArch64::USHLv2i64: 11667 case AArch64::USHLv4i16: 11668 case AArch64::USHLv4i32: 11669 case AArch64::USHLv8i16: 11670 case AArch64::USHLv8i8: 11671 case AArch64::USUBLv16i8_v8i16: 11672 case AArch64::USUBLv2i32_v2i64: 11673 case AArch64::USUBLv4i16_v4i32: 11674 case AArch64::USUBLv4i32_v2i64: 11675 case AArch64::USUBLv8i16_v4i32: 11676 case AArch64::USUBLv8i8_v8i16: 11677 case AArch64::USUBWv16i8_v8i16: 11678 case AArch64::USUBWv2i32_v2i64: 11679 case AArch64::USUBWv4i16_v4i32: 11680 case AArch64::USUBWv4i32_v2i64: 11681 case AArch64::USUBWv8i16_v4i32: 11682 case AArch64::USUBWv8i8_v8i16: 11683 case AArch64::UZP1v16i8: 11684 case AArch64::UZP1v2i32: 11685 case AArch64::UZP1v2i64: 11686 case AArch64::UZP1v4i16: 11687 case AArch64::UZP1v4i32: 11688 case AArch64::UZP1v8i16: 11689 case AArch64::UZP1v8i8: 11690 case AArch64::UZP2v16i8: 11691 case AArch64::UZP2v2i32: 11692 case AArch64::UZP2v2i64: 11693 case AArch64::UZP2v4i16: 11694 case AArch64::UZP2v4i32: 11695 case AArch64::UZP2v8i16: 11696 case AArch64::UZP2v8i8: 11697 case AArch64::ZIP1v16i8: 11698 case AArch64::ZIP1v2i32: 11699 case AArch64::ZIP1v2i64: 11700 case AArch64::ZIP1v4i16: 11701 case AArch64::ZIP1v4i32: 11702 case AArch64::ZIP1v8i16: 11703 case AArch64::ZIP1v8i8: 11704 case AArch64::ZIP2v16i8: 11705 case AArch64::ZIP2v2i32: 11706 case AArch64::ZIP2v2i64: 11707 case AArch64::ZIP2v4i16: 11708 case AArch64::ZIP2v4i32: 11709 case AArch64::ZIP2v8i16: 11710 case AArch64::ZIP2v8i8: { 11711 // op: Rd 11712 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11713 op &= UINT64_C(31); 11714 Value |= op; 11715 // op: Rn 11716 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11717 op &= UINT64_C(31); 11718 op <<= 5; 11719 Value |= op; 11720 // op: Rm 11721 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11722 op &= UINT64_C(31); 11723 op <<= 16; 11724 Value |= op; 11725 break; 11726 } 11727 case AArch64::FMADDDrrr: 11728 case AArch64::FMADDHrrr: 11729 case AArch64::FMADDSrrr: 11730 case AArch64::FMSUBDrrr: 11731 case AArch64::FMSUBHrrr: 11732 case AArch64::FMSUBSrrr: 11733 case AArch64::FNMADDDrrr: 11734 case AArch64::FNMADDHrrr: 11735 case AArch64::FNMADDSrrr: 11736 case AArch64::FNMSUBDrrr: 11737 case AArch64::FNMSUBHrrr: 11738 case AArch64::FNMSUBSrrr: 11739 case AArch64::MADDWrrr: 11740 case AArch64::MADDXrrr: 11741 case AArch64::MSUBWrrr: 11742 case AArch64::MSUBXrrr: 11743 case AArch64::SMADDLrrr: 11744 case AArch64::SMSUBLrrr: 11745 case AArch64::UMADDLrrr: 11746 case AArch64::UMSUBLrrr: { 11747 // op: Rd 11748 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11749 op &= UINT64_C(31); 11750 Value |= op; 11751 // op: Rn 11752 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11753 op &= UINT64_C(31); 11754 op <<= 5; 11755 Value |= op; 11756 // op: Rm 11757 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11758 op &= UINT64_C(31); 11759 op <<= 16; 11760 Value |= op; 11761 // op: Ra 11762 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11763 op &= UINT64_C(31); 11764 op <<= 10; 11765 Value |= op; 11766 break; 11767 } 11768 case AArch64::CSELWr: 11769 case AArch64::CSELXr: 11770 case AArch64::CSINCWr: 11771 case AArch64::CSINCXr: 11772 case AArch64::CSINVWr: 11773 case AArch64::CSINVXr: 11774 case AArch64::CSNEGWr: 11775 case AArch64::CSNEGXr: 11776 case AArch64::FCSELDrrr: 11777 case AArch64::FCSELHrrr: 11778 case AArch64::FCSELSrrr: { 11779 // op: Rd 11780 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11781 op &= UINT64_C(31); 11782 Value |= op; 11783 // op: Rn 11784 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11785 op &= UINT64_C(31); 11786 op <<= 5; 11787 Value |= op; 11788 // op: Rm 11789 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11790 op &= UINT64_C(31); 11791 op <<= 16; 11792 Value |= op; 11793 // op: cond 11794 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11795 op &= UINT64_C(15); 11796 op <<= 12; 11797 Value |= op; 11798 break; 11799 } 11800 case AArch64::ADDSXrx64: 11801 case AArch64::ADDXrx64: 11802 case AArch64::SUBSXrx64: 11803 case AArch64::SUBXrx64: { 11804 // op: Rd 11805 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11806 op &= UINT64_C(31); 11807 Value |= op; 11808 // op: Rn 11809 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11810 op &= UINT64_C(31); 11811 op <<= 5; 11812 Value |= op; 11813 // op: Rm 11814 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11815 op &= UINT64_C(31); 11816 op <<= 16; 11817 Value |= op; 11818 // op: ext 11819 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11820 Value |= (op & UINT64_C(32)) << 10; 11821 Value |= (op & UINT64_C(7)) << 10; 11822 break; 11823 } 11824 case AArch64::ADDSWrx: 11825 case AArch64::ADDSXrx: 11826 case AArch64::ADDWrx: 11827 case AArch64::ADDXrx: 11828 case AArch64::SUBSWrx: 11829 case AArch64::SUBSXrx: 11830 case AArch64::SUBWrx: 11831 case AArch64::SUBXrx: { 11832 // op: Rd 11833 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11834 op &= UINT64_C(31); 11835 Value |= op; 11836 // op: Rn 11837 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11838 op &= UINT64_C(31); 11839 op <<= 5; 11840 Value |= op; 11841 // op: Rm 11842 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11843 op &= UINT64_C(31); 11844 op <<= 16; 11845 Value |= op; 11846 // op: extend 11847 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11848 op &= UINT64_C(63); 11849 op <<= 10; 11850 Value |= op; 11851 break; 11852 } 11853 case AArch64::FMULXv1i32_indexed: 11854 case AArch64::FMULXv2i32_indexed: 11855 case AArch64::FMULXv4i32_indexed: 11856 case AArch64::FMULv1i32_indexed: 11857 case AArch64::FMULv2i32_indexed: 11858 case AArch64::FMULv4i32_indexed: 11859 case AArch64::MULv2i32_indexed: 11860 case AArch64::MULv4i32_indexed: 11861 case AArch64::SMULLv2i32_indexed: 11862 case AArch64::SMULLv4i32_indexed: 11863 case AArch64::SQDMULHv1i32_indexed: 11864 case AArch64::SQDMULHv2i32_indexed: 11865 case AArch64::SQDMULHv4i32_indexed: 11866 case AArch64::SQDMULLv1i64_indexed: 11867 case AArch64::SQDMULLv2i32_indexed: 11868 case AArch64::SQDMULLv4i32_indexed: 11869 case AArch64::SQRDMULHv1i32_indexed: 11870 case AArch64::SQRDMULHv2i32_indexed: 11871 case AArch64::SQRDMULHv4i32_indexed: 11872 case AArch64::UMULLv2i32_indexed: 11873 case AArch64::UMULLv4i32_indexed: { 11874 // op: Rd 11875 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11876 op &= UINT64_C(31); 11877 Value |= op; 11878 // op: Rn 11879 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11880 op &= UINT64_C(31); 11881 op <<= 5; 11882 Value |= op; 11883 // op: Rm 11884 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11885 op &= UINT64_C(31); 11886 op <<= 16; 11887 Value |= op; 11888 // op: idx 11889 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11890 Value |= (op & UINT64_C(1)) << 21; 11891 Value |= (op & UINT64_C(2)) << 10; 11892 break; 11893 } 11894 case AArch64::FMULXv1i64_indexed: 11895 case AArch64::FMULXv2i64_indexed: 11896 case AArch64::FMULv1i64_indexed: 11897 case AArch64::FMULv2i64_indexed: { 11898 // op: Rd 11899 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11900 op &= UINT64_C(31); 11901 Value |= op; 11902 // op: Rn 11903 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11904 op &= UINT64_C(31); 11905 op <<= 5; 11906 Value |= op; 11907 // op: Rm 11908 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11909 op &= UINT64_C(31); 11910 op <<= 16; 11911 Value |= op; 11912 // op: idx 11913 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11914 op &= UINT64_C(1); 11915 op <<= 11; 11916 Value |= op; 11917 break; 11918 } 11919 case AArch64::EXTv16i8: { 11920 // op: Rd 11921 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11922 op &= UINT64_C(31); 11923 Value |= op; 11924 // op: Rn 11925 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11926 op &= UINT64_C(31); 11927 op <<= 5; 11928 Value |= op; 11929 // op: Rm 11930 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11931 op &= UINT64_C(31); 11932 op <<= 16; 11933 Value |= op; 11934 // op: imm 11935 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11936 op &= UINT64_C(15); 11937 op <<= 11; 11938 Value |= op; 11939 break; 11940 } 11941 case AArch64::EXTRWrri: { 11942 // op: Rd 11943 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11944 op &= UINT64_C(31); 11945 Value |= op; 11946 // op: Rn 11947 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11948 op &= UINT64_C(31); 11949 op <<= 5; 11950 Value |= op; 11951 // op: Rm 11952 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11953 op &= UINT64_C(31); 11954 op <<= 16; 11955 Value |= op; 11956 // op: imm 11957 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11958 op &= UINT64_C(31); 11959 op <<= 10; 11960 Value |= op; 11961 break; 11962 } 11963 case AArch64::EXTRXrri: { 11964 // op: Rd 11965 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11966 op &= UINT64_C(31); 11967 Value |= op; 11968 // op: Rn 11969 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11970 op &= UINT64_C(31); 11971 op <<= 5; 11972 Value |= op; 11973 // op: Rm 11974 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11975 op &= UINT64_C(31); 11976 op <<= 16; 11977 Value |= op; 11978 // op: imm 11979 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 11980 op &= UINT64_C(63); 11981 op <<= 10; 11982 Value |= op; 11983 break; 11984 } 11985 case AArch64::EXTv8i8: { 11986 // op: Rd 11987 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 11988 op &= UINT64_C(31); 11989 Value |= op; 11990 // op: Rn 11991 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 11992 op &= UINT64_C(31); 11993 op <<= 5; 11994 Value |= op; 11995 // op: Rm 11996 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 11997 op &= UINT64_C(31); 11998 op <<= 16; 11999 Value |= op; 12000 // op: imm 12001 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12002 op &= UINT64_C(7); 12003 op <<= 11; 12004 Value |= op; 12005 break; 12006 } 12007 case AArch64::FCADDv2f32: 12008 case AArch64::FCADDv2f64: 12009 case AArch64::FCADDv4f16: 12010 case AArch64::FCADDv4f32: 12011 case AArch64::FCADDv8f16: { 12012 // op: Rd 12013 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12014 op &= UINT64_C(31); 12015 Value |= op; 12016 // op: Rn 12017 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12018 op &= UINT64_C(31); 12019 op <<= 5; 12020 Value |= op; 12021 // op: Rm 12022 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12023 op &= UINT64_C(31); 12024 op <<= 16; 12025 Value |= op; 12026 // op: rot 12027 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12028 op &= UINT64_C(1); 12029 op <<= 12; 12030 Value |= op; 12031 break; 12032 } 12033 case AArch64::ADDSWrs: 12034 case AArch64::ADDSXrs: 12035 case AArch64::ADDWrs: 12036 case AArch64::ADDXrs: 12037 case AArch64::ANDSWrs: 12038 case AArch64::ANDSXrs: 12039 case AArch64::ANDWrs: 12040 case AArch64::ANDXrs: 12041 case AArch64::BICSWrs: 12042 case AArch64::BICSXrs: 12043 case AArch64::BICWrs: 12044 case AArch64::BICXrs: 12045 case AArch64::EONWrs: 12046 case AArch64::EONXrs: 12047 case AArch64::EORWrs: 12048 case AArch64::EORXrs: 12049 case AArch64::ORNWrs: 12050 case AArch64::ORNXrs: 12051 case AArch64::ORRWrs: 12052 case AArch64::ORRXrs: 12053 case AArch64::SUBSWrs: 12054 case AArch64::SUBSXrs: 12055 case AArch64::SUBWrs: 12056 case AArch64::SUBXrs: { 12057 // op: Rd 12058 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12059 op &= UINT64_C(31); 12060 Value |= op; 12061 // op: Rn 12062 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12063 op &= UINT64_C(31); 12064 op <<= 5; 12065 Value |= op; 12066 // op: Rm 12067 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12068 op &= UINT64_C(31); 12069 op <<= 16; 12070 Value |= op; 12071 // op: shift 12072 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12073 Value |= (op & UINT64_C(192)) << 16; 12074 Value |= (op & UINT64_C(63)) << 10; 12075 break; 12076 } 12077 case AArch64::SMULHrr: 12078 case AArch64::UMULHrr: { 12079 // op: Rd 12080 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12081 op &= UINT64_C(31); 12082 Value |= op; 12083 // op: Rn 12084 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12085 op &= UINT64_C(31); 12086 op <<= 5; 12087 Value |= op; 12088 // op: Rm 12089 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12090 op &= UINT64_C(31); 12091 op <<= 16; 12092 Value |= op; 12093 Value = fixMulHigh(MI, Value, STI); 12094 break; 12095 } 12096 case AArch64::DUPv2i64lane: 12097 case AArch64::UMOVvi64: { 12098 // op: Rd 12099 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12100 op &= UINT64_C(31); 12101 Value |= op; 12102 // op: Rn 12103 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12104 op &= UINT64_C(31); 12105 op <<= 5; 12106 Value |= op; 12107 // op: idx 12108 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12109 op &= UINT64_C(1); 12110 op <<= 20; 12111 Value |= op; 12112 break; 12113 } 12114 case AArch64::DUPv16i8lane: 12115 case AArch64::DUPv8i8lane: 12116 case AArch64::SMOVvi8to32: 12117 case AArch64::SMOVvi8to64: 12118 case AArch64::UMOVvi8: { 12119 // op: Rd 12120 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12121 op &= UINT64_C(31); 12122 Value |= op; 12123 // op: Rn 12124 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12125 op &= UINT64_C(31); 12126 op <<= 5; 12127 Value |= op; 12128 // op: idx 12129 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12130 op &= UINT64_C(15); 12131 op <<= 17; 12132 Value |= op; 12133 break; 12134 } 12135 case AArch64::DUPv2i32lane: 12136 case AArch64::DUPv4i32lane: 12137 case AArch64::SMOVvi32to64: 12138 case AArch64::UMOVvi32: { 12139 // op: Rd 12140 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12141 op &= UINT64_C(31); 12142 Value |= op; 12143 // op: Rn 12144 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12145 op &= UINT64_C(31); 12146 op <<= 5; 12147 Value |= op; 12148 // op: idx 12149 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12150 op &= UINT64_C(3); 12151 op <<= 19; 12152 Value |= op; 12153 break; 12154 } 12155 case AArch64::DUPv4i16lane: 12156 case AArch64::DUPv8i16lane: 12157 case AArch64::SMOVvi16to32: 12158 case AArch64::SMOVvi16to64: 12159 case AArch64::UMOVvi16: { 12160 // op: Rd 12161 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12162 op &= UINT64_C(31); 12163 Value |= op; 12164 // op: Rn 12165 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12166 op &= UINT64_C(31); 12167 op <<= 5; 12168 Value |= op; 12169 // op: idx 12170 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12171 op &= UINT64_C(7); 12172 op <<= 18; 12173 Value |= op; 12174 break; 12175 } 12176 case AArch64::ADDSWri: 12177 case AArch64::ADDSXri: 12178 case AArch64::ADDWri: 12179 case AArch64::ADDXri: 12180 case AArch64::SUBSWri: 12181 case AArch64::SUBSXri: 12182 case AArch64::SUBWri: 12183 case AArch64::SUBXri: { 12184 // op: Rd 12185 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12186 op &= UINT64_C(31); 12187 Value |= op; 12188 // op: Rn 12189 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12190 op &= UINT64_C(31); 12191 op <<= 5; 12192 Value |= op; 12193 // op: imm 12194 op = getAddSubImmOpValue(MI, 2, Fixups, STI); 12195 op &= UINT64_C(16383); 12196 op <<= 10; 12197 Value |= op; 12198 break; 12199 } 12200 case AArch64::SMAXWri: 12201 case AArch64::SMAXXri: 12202 case AArch64::SMINWri: 12203 case AArch64::SMINXri: 12204 case AArch64::UMAXWri: 12205 case AArch64::UMAXXri: 12206 case AArch64::UMINWri: 12207 case AArch64::UMINXri: { 12208 // op: Rd 12209 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12210 op &= UINT64_C(31); 12211 Value |= op; 12212 // op: Rn 12213 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12214 op &= UINT64_C(31); 12215 op <<= 5; 12216 Value |= op; 12217 // op: imm 12218 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12219 op &= UINT64_C(255); 12220 op <<= 10; 12221 Value |= op; 12222 break; 12223 } 12224 case AArch64::ANDSWri: 12225 case AArch64::ANDWri: 12226 case AArch64::EORWri: 12227 case AArch64::ORRWri: { 12228 // op: Rd 12229 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12230 op &= UINT64_C(31); 12231 Value |= op; 12232 // op: Rn 12233 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12234 op &= UINT64_C(31); 12235 op <<= 5; 12236 Value |= op; 12237 // op: imm 12238 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12239 op &= UINT64_C(4095); 12240 op <<= 10; 12241 Value |= op; 12242 break; 12243 } 12244 case AArch64::ANDSXri: 12245 case AArch64::ANDXri: 12246 case AArch64::EORXri: 12247 case AArch64::ORRXri: { 12248 // op: Rd 12249 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12250 op &= UINT64_C(31); 12251 Value |= op; 12252 // op: Rn 12253 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12254 op &= UINT64_C(31); 12255 op <<= 5; 12256 Value |= op; 12257 // op: imm 12258 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12259 op &= UINT64_C(8191); 12260 op <<= 10; 12261 Value |= op; 12262 break; 12263 } 12264 case AArch64::SHLv4i16_shift: 12265 case AArch64::SHLv8i16_shift: 12266 case AArch64::SQSHLUh: 12267 case AArch64::SQSHLUv4i16_shift: 12268 case AArch64::SQSHLUv8i16_shift: 12269 case AArch64::SQSHLh: 12270 case AArch64::SQSHLv4i16_shift: 12271 case AArch64::SQSHLv8i16_shift: 12272 case AArch64::SSHLLv4i16_shift: 12273 case AArch64::SSHLLv8i16_shift: 12274 case AArch64::UQSHLh: 12275 case AArch64::UQSHLv4i16_shift: 12276 case AArch64::UQSHLv8i16_shift: 12277 case AArch64::USHLLv4i16_shift: 12278 case AArch64::USHLLv8i16_shift: { 12279 // op: Rd 12280 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12281 op &= UINT64_C(31); 12282 Value |= op; 12283 // op: Rn 12284 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12285 op &= UINT64_C(31); 12286 op <<= 5; 12287 Value |= op; 12288 // op: imm 12289 op = getVecShiftL16OpValue(MI, 2, Fixups, STI); 12290 op &= UINT64_C(15); 12291 op <<= 16; 12292 Value |= op; 12293 break; 12294 } 12295 case AArch64::SHLv2i32_shift: 12296 case AArch64::SHLv4i32_shift: 12297 case AArch64::SQSHLUs: 12298 case AArch64::SQSHLUv2i32_shift: 12299 case AArch64::SQSHLUv4i32_shift: 12300 case AArch64::SQSHLs: 12301 case AArch64::SQSHLv2i32_shift: 12302 case AArch64::SQSHLv4i32_shift: 12303 case AArch64::SSHLLv2i32_shift: 12304 case AArch64::SSHLLv4i32_shift: 12305 case AArch64::UQSHLs: 12306 case AArch64::UQSHLv2i32_shift: 12307 case AArch64::UQSHLv4i32_shift: 12308 case AArch64::USHLLv2i32_shift: 12309 case AArch64::USHLLv4i32_shift: { 12310 // op: Rd 12311 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12312 op &= UINT64_C(31); 12313 Value |= op; 12314 // op: Rn 12315 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12316 op &= UINT64_C(31); 12317 op <<= 5; 12318 Value |= op; 12319 // op: imm 12320 op = getVecShiftL32OpValue(MI, 2, Fixups, STI); 12321 op &= UINT64_C(31); 12322 op <<= 16; 12323 Value |= op; 12324 break; 12325 } 12326 case AArch64::SHLd: 12327 case AArch64::SHLv2i64_shift: 12328 case AArch64::SQSHLUd: 12329 case AArch64::SQSHLUv2i64_shift: 12330 case AArch64::SQSHLd: 12331 case AArch64::SQSHLv2i64_shift: 12332 case AArch64::UQSHLd: 12333 case AArch64::UQSHLv2i64_shift: { 12334 // op: Rd 12335 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12336 op &= UINT64_C(31); 12337 Value |= op; 12338 // op: Rn 12339 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12340 op &= UINT64_C(31); 12341 op <<= 5; 12342 Value |= op; 12343 // op: imm 12344 op = getVecShiftL64OpValue(MI, 2, Fixups, STI); 12345 op &= UINT64_C(63); 12346 op <<= 16; 12347 Value |= op; 12348 break; 12349 } 12350 case AArch64::SHLv16i8_shift: 12351 case AArch64::SHLv8i8_shift: 12352 case AArch64::SQSHLUb: 12353 case AArch64::SQSHLUv16i8_shift: 12354 case AArch64::SQSHLUv8i8_shift: 12355 case AArch64::SQSHLb: 12356 case AArch64::SQSHLv16i8_shift: 12357 case AArch64::SQSHLv8i8_shift: 12358 case AArch64::SSHLLv16i8_shift: 12359 case AArch64::SSHLLv8i8_shift: 12360 case AArch64::UQSHLb: 12361 case AArch64::UQSHLv16i8_shift: 12362 case AArch64::UQSHLv8i8_shift: 12363 case AArch64::USHLLv16i8_shift: 12364 case AArch64::USHLLv8i8_shift: { 12365 // op: Rd 12366 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12367 op &= UINT64_C(31); 12368 Value |= op; 12369 // op: Rn 12370 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12371 op &= UINT64_C(31); 12372 op <<= 5; 12373 Value |= op; 12374 // op: imm 12375 op = getVecShiftL8OpValue(MI, 2, Fixups, STI); 12376 op &= UINT64_C(7); 12377 op <<= 16; 12378 Value |= op; 12379 break; 12380 } 12381 case AArch64::FCVTZSh: 12382 case AArch64::FCVTZSv4i16_shift: 12383 case AArch64::FCVTZSv8i16_shift: 12384 case AArch64::FCVTZUh: 12385 case AArch64::FCVTZUv4i16_shift: 12386 case AArch64::FCVTZUv8i16_shift: 12387 case AArch64::SCVTFh: 12388 case AArch64::SCVTFv4i16_shift: 12389 case AArch64::SCVTFv8i16_shift: 12390 case AArch64::SQRSHRNh: 12391 case AArch64::SQRSHRUNh: 12392 case AArch64::SQSHRNh: 12393 case AArch64::SQSHRUNh: 12394 case AArch64::SRSHRv4i16_shift: 12395 case AArch64::SRSHRv8i16_shift: 12396 case AArch64::SSHRv4i16_shift: 12397 case AArch64::SSHRv8i16_shift: 12398 case AArch64::UCVTFh: 12399 case AArch64::UCVTFv4i16_shift: 12400 case AArch64::UCVTFv8i16_shift: 12401 case AArch64::UQRSHRNh: 12402 case AArch64::UQSHRNh: 12403 case AArch64::URSHRv4i16_shift: 12404 case AArch64::URSHRv8i16_shift: 12405 case AArch64::USHRv4i16_shift: 12406 case AArch64::USHRv8i16_shift: { 12407 // op: Rd 12408 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12409 op &= UINT64_C(31); 12410 Value |= op; 12411 // op: Rn 12412 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12413 op &= UINT64_C(31); 12414 op <<= 5; 12415 Value |= op; 12416 // op: imm 12417 op = getVecShiftR16OpValue(MI, 2, Fixups, STI); 12418 op &= UINT64_C(15); 12419 op <<= 16; 12420 Value |= op; 12421 break; 12422 } 12423 case AArch64::RSHRNv8i8_shift: 12424 case AArch64::SHRNv8i8_shift: 12425 case AArch64::SQRSHRNv8i8_shift: 12426 case AArch64::SQRSHRUNv8i8_shift: 12427 case AArch64::SQSHRNv8i8_shift: 12428 case AArch64::SQSHRUNv8i8_shift: 12429 case AArch64::UQRSHRNv8i8_shift: 12430 case AArch64::UQSHRNv8i8_shift: { 12431 // op: Rd 12432 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12433 op &= UINT64_C(31); 12434 Value |= op; 12435 // op: Rn 12436 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12437 op &= UINT64_C(31); 12438 op <<= 5; 12439 Value |= op; 12440 // op: imm 12441 op = getVecShiftR16OpValue(MI, 2, Fixups, STI); 12442 op &= UINT64_C(7); 12443 op <<= 16; 12444 Value |= op; 12445 break; 12446 } 12447 case AArch64::RSHRNv4i16_shift: 12448 case AArch64::SHRNv4i16_shift: 12449 case AArch64::SQRSHRNv4i16_shift: 12450 case AArch64::SQRSHRUNv4i16_shift: 12451 case AArch64::SQSHRNv4i16_shift: 12452 case AArch64::SQSHRUNv4i16_shift: 12453 case AArch64::UQRSHRNv4i16_shift: 12454 case AArch64::UQSHRNv4i16_shift: { 12455 // op: Rd 12456 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12457 op &= UINT64_C(31); 12458 Value |= op; 12459 // op: Rn 12460 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12461 op &= UINT64_C(31); 12462 op <<= 5; 12463 Value |= op; 12464 // op: imm 12465 op = getVecShiftR32OpValue(MI, 2, Fixups, STI); 12466 op &= UINT64_C(15); 12467 op <<= 16; 12468 Value |= op; 12469 break; 12470 } 12471 case AArch64::FCVTZSs: 12472 case AArch64::FCVTZSv2i32_shift: 12473 case AArch64::FCVTZSv4i32_shift: 12474 case AArch64::FCVTZUs: 12475 case AArch64::FCVTZUv2i32_shift: 12476 case AArch64::FCVTZUv4i32_shift: 12477 case AArch64::SCVTFs: 12478 case AArch64::SCVTFv2i32_shift: 12479 case AArch64::SCVTFv4i32_shift: 12480 case AArch64::SQRSHRNs: 12481 case AArch64::SQRSHRUNs: 12482 case AArch64::SQSHRNs: 12483 case AArch64::SQSHRUNs: 12484 case AArch64::SRSHRv2i32_shift: 12485 case AArch64::SRSHRv4i32_shift: 12486 case AArch64::SSHRv2i32_shift: 12487 case AArch64::SSHRv4i32_shift: 12488 case AArch64::UCVTFs: 12489 case AArch64::UCVTFv2i32_shift: 12490 case AArch64::UCVTFv4i32_shift: 12491 case AArch64::UQRSHRNs: 12492 case AArch64::UQSHRNs: 12493 case AArch64::URSHRv2i32_shift: 12494 case AArch64::URSHRv4i32_shift: 12495 case AArch64::USHRv2i32_shift: 12496 case AArch64::USHRv4i32_shift: { 12497 // op: Rd 12498 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12499 op &= UINT64_C(31); 12500 Value |= op; 12501 // op: Rn 12502 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12503 op &= UINT64_C(31); 12504 op <<= 5; 12505 Value |= op; 12506 // op: imm 12507 op = getVecShiftR32OpValue(MI, 2, Fixups, STI); 12508 op &= UINT64_C(31); 12509 op <<= 16; 12510 Value |= op; 12511 break; 12512 } 12513 case AArch64::RSHRNv2i32_shift: 12514 case AArch64::SHRNv2i32_shift: 12515 case AArch64::SQRSHRNv2i32_shift: 12516 case AArch64::SQRSHRUNv2i32_shift: 12517 case AArch64::SQSHRNv2i32_shift: 12518 case AArch64::SQSHRUNv2i32_shift: 12519 case AArch64::UQRSHRNv2i32_shift: 12520 case AArch64::UQSHRNv2i32_shift: { 12521 // op: Rd 12522 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12523 op &= UINT64_C(31); 12524 Value |= op; 12525 // op: Rn 12526 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12527 op &= UINT64_C(31); 12528 op <<= 5; 12529 Value |= op; 12530 // op: imm 12531 op = getVecShiftR64OpValue(MI, 2, Fixups, STI); 12532 op &= UINT64_C(31); 12533 op <<= 16; 12534 Value |= op; 12535 break; 12536 } 12537 case AArch64::FCVTZSd: 12538 case AArch64::FCVTZSv2i64_shift: 12539 case AArch64::FCVTZUd: 12540 case AArch64::FCVTZUv2i64_shift: 12541 case AArch64::SCVTFd: 12542 case AArch64::SCVTFv2i64_shift: 12543 case AArch64::SRSHRd: 12544 case AArch64::SRSHRv2i64_shift: 12545 case AArch64::SSHRd: 12546 case AArch64::SSHRv2i64_shift: 12547 case AArch64::UCVTFd: 12548 case AArch64::UCVTFv2i64_shift: 12549 case AArch64::URSHRd: 12550 case AArch64::URSHRv2i64_shift: 12551 case AArch64::USHRd: 12552 case AArch64::USHRv2i64_shift: { 12553 // op: Rd 12554 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12555 op &= UINT64_C(31); 12556 Value |= op; 12557 // op: Rn 12558 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12559 op &= UINT64_C(31); 12560 op <<= 5; 12561 Value |= op; 12562 // op: imm 12563 op = getVecShiftR64OpValue(MI, 2, Fixups, STI); 12564 op &= UINT64_C(63); 12565 op <<= 16; 12566 Value |= op; 12567 break; 12568 } 12569 case AArch64::SQRSHRNb: 12570 case AArch64::SQRSHRUNb: 12571 case AArch64::SQSHRNb: 12572 case AArch64::SQSHRUNb: 12573 case AArch64::SRSHRv16i8_shift: 12574 case AArch64::SRSHRv8i8_shift: 12575 case AArch64::SSHRv16i8_shift: 12576 case AArch64::SSHRv8i8_shift: 12577 case AArch64::UQRSHRNb: 12578 case AArch64::UQSHRNb: 12579 case AArch64::URSHRv16i8_shift: 12580 case AArch64::URSHRv8i8_shift: 12581 case AArch64::USHRv16i8_shift: 12582 case AArch64::USHRv8i8_shift: { 12583 // op: Rd 12584 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12585 op &= UINT64_C(31); 12586 Value |= op; 12587 // op: Rn 12588 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12589 op &= UINT64_C(31); 12590 op <<= 5; 12591 Value |= op; 12592 // op: imm 12593 op = getVecShiftR8OpValue(MI, 2, Fixups, STI); 12594 op &= UINT64_C(7); 12595 op <<= 16; 12596 Value |= op; 12597 break; 12598 } 12599 case AArch64::ADDG: 12600 case AArch64::SUBG: { 12601 // op: Rd 12602 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12603 op &= UINT64_C(31); 12604 Value |= op; 12605 // op: Rn 12606 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12607 op &= UINT64_C(31); 12608 op <<= 5; 12609 Value |= op; 12610 // op: imm6 12611 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12612 op &= UINT64_C(63); 12613 op <<= 16; 12614 Value |= op; 12615 // op: imm4 12616 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12617 op &= UINT64_C(15); 12618 op <<= 10; 12619 Value |= op; 12620 break; 12621 } 12622 case AArch64::SBFMWri: 12623 case AArch64::UBFMWri: { 12624 // op: Rd 12625 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12626 op &= UINT64_C(31); 12627 Value |= op; 12628 // op: Rn 12629 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12630 op &= UINT64_C(31); 12631 op <<= 5; 12632 Value |= op; 12633 // op: immr 12634 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12635 op &= UINT64_C(31); 12636 op <<= 16; 12637 Value |= op; 12638 // op: imms 12639 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12640 op &= UINT64_C(31); 12641 op <<= 10; 12642 Value |= op; 12643 break; 12644 } 12645 case AArch64::SBFMXri: 12646 case AArch64::UBFMXri: { 12647 // op: Rd 12648 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12649 op &= UINT64_C(31); 12650 Value |= op; 12651 // op: Rn 12652 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12653 op &= UINT64_C(31); 12654 op <<= 5; 12655 Value |= op; 12656 // op: immr 12657 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12658 op &= UINT64_C(63); 12659 op <<= 16; 12660 Value |= op; 12661 // op: imms 12662 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12663 op &= UINT64_C(63); 12664 op <<= 10; 12665 Value |= op; 12666 break; 12667 } 12668 case AArch64::FCVTZSSWDri: 12669 case AArch64::FCVTZSSWHri: 12670 case AArch64::FCVTZSSWSri: 12671 case AArch64::FCVTZUSWDri: 12672 case AArch64::FCVTZUSWHri: 12673 case AArch64::FCVTZUSWSri: 12674 case AArch64::SCVTFSWDri: 12675 case AArch64::SCVTFSWHri: 12676 case AArch64::SCVTFSWSri: 12677 case AArch64::UCVTFSWDri: 12678 case AArch64::UCVTFSWHri: 12679 case AArch64::UCVTFSWSri: { 12680 // op: Rd 12681 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12682 op &= UINT64_C(31); 12683 Value |= op; 12684 // op: Rn 12685 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12686 op &= UINT64_C(31); 12687 op <<= 5; 12688 Value |= op; 12689 // op: scale 12690 op = getFixedPointScaleOpValue(MI, 2, Fixups, STI); 12691 op &= UINT64_C(31); 12692 op <<= 10; 12693 Value |= op; 12694 break; 12695 } 12696 case AArch64::FCVTZSSXDri: 12697 case AArch64::FCVTZSSXHri: 12698 case AArch64::FCVTZSSXSri: 12699 case AArch64::FCVTZUSXDri: 12700 case AArch64::FCVTZUSXHri: 12701 case AArch64::FCVTZUSXSri: 12702 case AArch64::SCVTFSXDri: 12703 case AArch64::SCVTFSXHri: 12704 case AArch64::SCVTFSXSri: 12705 case AArch64::UCVTFSXDri: 12706 case AArch64::UCVTFSXHri: 12707 case AArch64::UCVTFSXSri: { 12708 // op: Rd 12709 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12710 op &= UINT64_C(31); 12711 Value |= op; 12712 // op: Rn 12713 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12714 op &= UINT64_C(31); 12715 op <<= 5; 12716 Value |= op; 12717 // op: scale 12718 op = getFixedPointScaleOpValue(MI, 2, Fixups, STI); 12719 op &= UINT64_C(63); 12720 op <<= 10; 12721 Value |= op; 12722 break; 12723 } 12724 case AArch64::BFMWri: { 12725 // op: Rd 12726 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12727 op &= UINT64_C(31); 12728 Value |= op; 12729 // op: Rn 12730 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12731 op &= UINT64_C(31); 12732 op <<= 5; 12733 Value |= op; 12734 // op: immr 12735 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12736 op &= UINT64_C(31); 12737 op <<= 16; 12738 Value |= op; 12739 // op: imms 12740 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 12741 op &= UINT64_C(31); 12742 op <<= 10; 12743 Value |= op; 12744 break; 12745 } 12746 case AArch64::BFMXri: { 12747 // op: Rd 12748 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12749 op &= UINT64_C(31); 12750 Value |= op; 12751 // op: Rn 12752 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12753 op &= UINT64_C(31); 12754 op <<= 5; 12755 Value |= op; 12756 // op: immr 12757 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12758 op &= UINT64_C(63); 12759 op <<= 16; 12760 Value |= op; 12761 // op: imms 12762 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 12763 op &= UINT64_C(63); 12764 op <<= 10; 12765 Value |= op; 12766 break; 12767 } 12768 case AArch64::FMOVDi: 12769 case AArch64::FMOVHi: 12770 case AArch64::FMOVSi: { 12771 // op: Rd 12772 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12773 op &= UINT64_C(31); 12774 Value |= op; 12775 // op: imm 12776 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12777 op &= UINT64_C(255); 12778 op <<= 13; 12779 Value |= op; 12780 break; 12781 } 12782 case AArch64::MOVNWi: 12783 case AArch64::MOVNXi: { 12784 // op: Rd 12785 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12786 op &= UINT64_C(31); 12787 Value |= op; 12788 // op: imm 12789 op = getMoveWideImmOpValue(MI, 1, Fixups, STI); 12790 op &= UINT64_C(65535); 12791 op <<= 5; 12792 Value |= op; 12793 // op: shift 12794 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12795 op &= UINT64_C(48); 12796 op <<= 17; 12797 Value |= op; 12798 break; 12799 } 12800 case AArch64::MOVZWi: 12801 case AArch64::MOVZXi: { 12802 // op: Rd 12803 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12804 op &= UINT64_C(31); 12805 Value |= op; 12806 // op: imm 12807 op = getMoveWideImmOpValue(MI, 1, Fixups, STI); 12808 op &= UINT64_C(65535); 12809 op <<= 5; 12810 Value |= op; 12811 // op: shift 12812 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 12813 op &= UINT64_C(48); 12814 op <<= 17; 12815 Value |= op; 12816 Value = fixMOVZ(MI, Value, STI); 12817 break; 12818 } 12819 case AArch64::MOVKWi: 12820 case AArch64::MOVKXi: { 12821 // op: Rd 12822 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12823 op &= UINT64_C(31); 12824 Value |= op; 12825 // op: imm 12826 op = getMoveWideImmOpValue(MI, 2, Fixups, STI); 12827 op &= UINT64_C(65535); 12828 op <<= 5; 12829 Value |= op; 12830 // op: shift 12831 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 12832 op &= UINT64_C(48); 12833 op <<= 17; 12834 Value |= op; 12835 break; 12836 } 12837 case AArch64::CNTB_XPiI: 12838 case AArch64::CNTD_XPiI: 12839 case AArch64::CNTH_XPiI: 12840 case AArch64::CNTW_XPiI: { 12841 // op: Rd 12842 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12843 op &= UINT64_C(31); 12844 Value |= op; 12845 // op: imm4 12846 op = getSVEIncDecImm(MI, 2, Fixups, STI); 12847 op &= UINT64_C(15); 12848 op <<= 16; 12849 Value |= op; 12850 // op: pattern 12851 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12852 op &= UINT64_C(31); 12853 op <<= 5; 12854 Value |= op; 12855 break; 12856 } 12857 case AArch64::RDSVLI_XI: 12858 case AArch64::RDVLI_XI: { 12859 // op: Rd 12860 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12861 op &= UINT64_C(31); 12862 Value |= op; 12863 // op: imm6 12864 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12865 op &= UINT64_C(63); 12866 op <<= 5; 12867 Value |= op; 12868 break; 12869 } 12870 case AArch64::FMOVv2f32_ns: 12871 case AArch64::FMOVv2f64_ns: 12872 case AArch64::FMOVv4f16_ns: 12873 case AArch64::FMOVv4f32_ns: 12874 case AArch64::FMOVv8f16_ns: 12875 case AArch64::MOVID: 12876 case AArch64::MOVIv16b_ns: 12877 case AArch64::MOVIv2d_ns: 12878 case AArch64::MOVIv8b_ns: { 12879 // op: Rd 12880 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12881 op &= UINT64_C(31); 12882 Value |= op; 12883 // op: imm8 12884 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12885 Value |= (op & UINT64_C(224)) << 11; 12886 Value |= (op & UINT64_C(31)) << 5; 12887 break; 12888 } 12889 case AArch64::MOVIv2s_msl: 12890 case AArch64::MOVIv4s_msl: 12891 case AArch64::MVNIv2s_msl: 12892 case AArch64::MVNIv4s_msl: { 12893 // op: Rd 12894 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12895 op &= UINT64_C(31); 12896 Value |= op; 12897 // op: imm8 12898 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12899 Value |= (op & UINT64_C(224)) << 11; 12900 Value |= (op & UINT64_C(31)) << 5; 12901 // op: shift 12902 op = getMoveVecShifterOpValue(MI, 2, Fixups, STI); 12903 op &= UINT64_C(1); 12904 op <<= 12; 12905 Value |= op; 12906 break; 12907 } 12908 case AArch64::MOVIv4i16: 12909 case AArch64::MOVIv8i16: 12910 case AArch64::MVNIv4i16: 12911 case AArch64::MVNIv8i16: { 12912 // op: Rd 12913 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12914 op &= UINT64_C(31); 12915 Value |= op; 12916 // op: imm8 12917 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12918 Value |= (op & UINT64_C(224)) << 11; 12919 Value |= (op & UINT64_C(31)) << 5; 12920 // op: shift 12921 op = getVecShifterOpValue(MI, 2, Fixups, STI); 12922 op &= UINT64_C(1); 12923 op <<= 13; 12924 Value |= op; 12925 break; 12926 } 12927 case AArch64::MOVIv2i32: 12928 case AArch64::MOVIv4i32: 12929 case AArch64::MVNIv2i32: 12930 case AArch64::MVNIv4i32: { 12931 // op: Rd 12932 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 12933 op &= UINT64_C(31); 12934 Value |= op; 12935 // op: imm8 12936 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12937 Value |= (op & UINT64_C(224)) << 11; 12938 Value |= (op & UINT64_C(31)) << 5; 12939 // op: shift 12940 op = getVecShifterOpValue(MI, 2, Fixups, STI); 12941 op &= UINT64_C(3); 12942 op <<= 13; 12943 Value |= op; 12944 break; 12945 } 12946 case AArch64::AUTDZA: 12947 case AArch64::AUTDZB: 12948 case AArch64::AUTIZA: 12949 case AArch64::AUTIZB: 12950 case AArch64::PACDZA: 12951 case AArch64::PACDZB: 12952 case AArch64::PACIZA: 12953 case AArch64::PACIZB: { 12954 // op: Rd 12955 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 12956 op &= UINT64_C(31); 12957 Value |= op; 12958 break; 12959 } 12960 case AArch64::AESDrr: 12961 case AArch64::AESErr: 12962 case AArch64::AUTDA: 12963 case AArch64::AUTDB: 12964 case AArch64::AUTIA: 12965 case AArch64::AUTIB: 12966 case AArch64::BFCVTN2: 12967 case AArch64::FCVTNv4i32: 12968 case AArch64::FCVTNv8i16: 12969 case AArch64::FCVTXNv4f32: 12970 case AArch64::PACDA: 12971 case AArch64::PACDB: 12972 case AArch64::PACIA: 12973 case AArch64::PACIB: 12974 case AArch64::SADALPv16i8_v8i16: 12975 case AArch64::SADALPv2i32_v1i64: 12976 case AArch64::SADALPv4i16_v2i32: 12977 case AArch64::SADALPv4i32_v2i64: 12978 case AArch64::SADALPv8i16_v4i32: 12979 case AArch64::SADALPv8i8_v4i16: 12980 case AArch64::SHA1SU1rr: 12981 case AArch64::SHA256SU0rr: 12982 case AArch64::SQXTNv16i8: 12983 case AArch64::SQXTNv4i32: 12984 case AArch64::SQXTNv8i16: 12985 case AArch64::SQXTUNv16i8: 12986 case AArch64::SQXTUNv4i32: 12987 case AArch64::SQXTUNv8i16: 12988 case AArch64::SUQADDv16i8: 12989 case AArch64::SUQADDv1i16: 12990 case AArch64::SUQADDv1i32: 12991 case AArch64::SUQADDv1i64: 12992 case AArch64::SUQADDv1i8: 12993 case AArch64::SUQADDv2i32: 12994 case AArch64::SUQADDv2i64: 12995 case AArch64::SUQADDv4i16: 12996 case AArch64::SUQADDv4i32: 12997 case AArch64::SUQADDv8i16: 12998 case AArch64::SUQADDv8i8: 12999 case AArch64::UADALPv16i8_v8i16: 13000 case AArch64::UADALPv2i32_v1i64: 13001 case AArch64::UADALPv4i16_v2i32: 13002 case AArch64::UADALPv4i32_v2i64: 13003 case AArch64::UADALPv8i16_v4i32: 13004 case AArch64::UADALPv8i8_v4i16: 13005 case AArch64::UQXTNv16i8: 13006 case AArch64::UQXTNv4i32: 13007 case AArch64::UQXTNv8i16: 13008 case AArch64::USQADDv16i8: 13009 case AArch64::USQADDv1i16: 13010 case AArch64::USQADDv1i32: 13011 case AArch64::USQADDv1i64: 13012 case AArch64::USQADDv1i8: 13013 case AArch64::USQADDv2i32: 13014 case AArch64::USQADDv2i64: 13015 case AArch64::USQADDv4i16: 13016 case AArch64::USQADDv4i32: 13017 case AArch64::USQADDv8i16: 13018 case AArch64::USQADDv8i8: 13019 case AArch64::XTNv16i8: 13020 case AArch64::XTNv4i32: 13021 case AArch64::XTNv8i16: { 13022 // op: Rd 13023 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13024 op &= UINT64_C(31); 13025 Value |= op; 13026 // op: Rn 13027 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13028 op &= UINT64_C(31); 13029 op <<= 5; 13030 Value |= op; 13031 break; 13032 } 13033 case AArch64::BFMLALBIdx: 13034 case AArch64::BFMLALTIdx: 13035 case AArch64::FMLAL2lanev4f16: 13036 case AArch64::FMLAL2lanev8f16: 13037 case AArch64::FMLALlanev4f16: 13038 case AArch64::FMLALlanev8f16: 13039 case AArch64::FMLAv1i16_indexed: 13040 case AArch64::FMLAv4i16_indexed: 13041 case AArch64::FMLAv8i16_indexed: 13042 case AArch64::FMLSL2lanev4f16: 13043 case AArch64::FMLSL2lanev8f16: 13044 case AArch64::FMLSLlanev4f16: 13045 case AArch64::FMLSLlanev8f16: 13046 case AArch64::FMLSv1i16_indexed: 13047 case AArch64::FMLSv4i16_indexed: 13048 case AArch64::FMLSv8i16_indexed: 13049 case AArch64::MLAv4i16_indexed: 13050 case AArch64::MLAv8i16_indexed: 13051 case AArch64::MLSv4i16_indexed: 13052 case AArch64::MLSv8i16_indexed: 13053 case AArch64::SMLALv4i16_indexed: 13054 case AArch64::SMLALv8i16_indexed: 13055 case AArch64::SMLSLv4i16_indexed: 13056 case AArch64::SMLSLv8i16_indexed: 13057 case AArch64::SQDMLALv1i32_indexed: 13058 case AArch64::SQDMLALv4i16_indexed: 13059 case AArch64::SQDMLALv8i16_indexed: 13060 case AArch64::SQDMLSLv1i32_indexed: 13061 case AArch64::SQDMLSLv4i16_indexed: 13062 case AArch64::SQDMLSLv8i16_indexed: 13063 case AArch64::SQRDMLAHi16_indexed: 13064 case AArch64::SQRDMLAHv4i16_indexed: 13065 case AArch64::SQRDMLAHv8i16_indexed: 13066 case AArch64::SQRDMLSHi16_indexed: 13067 case AArch64::SQRDMLSHv4i16_indexed: 13068 case AArch64::SQRDMLSHv8i16_indexed: 13069 case AArch64::UMLALv4i16_indexed: 13070 case AArch64::UMLALv8i16_indexed: 13071 case AArch64::UMLSLv4i16_indexed: 13072 case AArch64::UMLSLv8i16_indexed: { 13073 // op: Rd 13074 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13075 op &= UINT64_C(31); 13076 Value |= op; 13077 // op: Rn 13078 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13079 op &= UINT64_C(31); 13080 op <<= 5; 13081 Value |= op; 13082 // op: Rm 13083 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13084 op &= UINT64_C(15); 13085 op <<= 16; 13086 Value |= op; 13087 // op: idx 13088 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13089 Value |= (op & UINT64_C(3)) << 20; 13090 Value |= (op & UINT64_C(4)) << 9; 13091 break; 13092 } 13093 case AArch64::ADDHNv2i64_v4i32: 13094 case AArch64::ADDHNv4i32_v8i16: 13095 case AArch64::ADDHNv8i16_v16i8: 13096 case AArch64::BFDOTv4bf16: 13097 case AArch64::BFDOTv8bf16: 13098 case AArch64::BFMLALB: 13099 case AArch64::BFMLALT: 13100 case AArch64::BFMMLA: 13101 case AArch64::BIFv16i8: 13102 case AArch64::BIFv8i8: 13103 case AArch64::BITv16i8: 13104 case AArch64::BITv8i8: 13105 case AArch64::BSLv16i8: 13106 case AArch64::BSLv8i8: 13107 case AArch64::FMLAL2v4f16: 13108 case AArch64::FMLAL2v8f16: 13109 case AArch64::FMLALv4f16: 13110 case AArch64::FMLALv8f16: 13111 case AArch64::FMLAv2f32: 13112 case AArch64::FMLAv2f64: 13113 case AArch64::FMLAv4f16: 13114 case AArch64::FMLAv4f32: 13115 case AArch64::FMLAv8f16: 13116 case AArch64::FMLSL2v4f16: 13117 case AArch64::FMLSL2v8f16: 13118 case AArch64::FMLSLv4f16: 13119 case AArch64::FMLSLv8f16: 13120 case AArch64::FMLSv2f32: 13121 case AArch64::FMLSv2f64: 13122 case AArch64::FMLSv4f16: 13123 case AArch64::FMLSv4f32: 13124 case AArch64::FMLSv8f16: 13125 case AArch64::MLAv16i8: 13126 case AArch64::MLAv2i32: 13127 case AArch64::MLAv4i16: 13128 case AArch64::MLAv4i32: 13129 case AArch64::MLAv8i16: 13130 case AArch64::MLAv8i8: 13131 case AArch64::MLSv16i8: 13132 case AArch64::MLSv2i32: 13133 case AArch64::MLSv4i16: 13134 case AArch64::MLSv4i32: 13135 case AArch64::MLSv8i16: 13136 case AArch64::MLSv8i8: 13137 case AArch64::RADDHNv2i64_v4i32: 13138 case AArch64::RADDHNv4i32_v8i16: 13139 case AArch64::RADDHNv8i16_v16i8: 13140 case AArch64::RSUBHNv2i64_v4i32: 13141 case AArch64::RSUBHNv4i32_v8i16: 13142 case AArch64::RSUBHNv8i16_v16i8: 13143 case AArch64::SABALv16i8_v8i16: 13144 case AArch64::SABALv2i32_v2i64: 13145 case AArch64::SABALv4i16_v4i32: 13146 case AArch64::SABALv4i32_v2i64: 13147 case AArch64::SABALv8i16_v4i32: 13148 case AArch64::SABALv8i8_v8i16: 13149 case AArch64::SABAv16i8: 13150 case AArch64::SABAv2i32: 13151 case AArch64::SABAv4i16: 13152 case AArch64::SABAv4i32: 13153 case AArch64::SABAv8i16: 13154 case AArch64::SABAv8i8: 13155 case AArch64::SDOTv16i8: 13156 case AArch64::SDOTv8i8: 13157 case AArch64::SHA1Crrr: 13158 case AArch64::SHA1Mrrr: 13159 case AArch64::SHA1Prrr: 13160 case AArch64::SHA1SU0rrr: 13161 case AArch64::SHA256H2rrr: 13162 case AArch64::SHA256Hrrr: 13163 case AArch64::SHA256SU1rrr: 13164 case AArch64::SMLALv16i8_v8i16: 13165 case AArch64::SMLALv2i32_v2i64: 13166 case AArch64::SMLALv4i16_v4i32: 13167 case AArch64::SMLALv4i32_v2i64: 13168 case AArch64::SMLALv8i16_v4i32: 13169 case AArch64::SMLALv8i8_v8i16: 13170 case AArch64::SMLSLv16i8_v8i16: 13171 case AArch64::SMLSLv2i32_v2i64: 13172 case AArch64::SMLSLv4i16_v4i32: 13173 case AArch64::SMLSLv4i32_v2i64: 13174 case AArch64::SMLSLv8i16_v4i32: 13175 case AArch64::SMLSLv8i8_v8i16: 13176 case AArch64::SMMLA: 13177 case AArch64::SQDMLALi16: 13178 case AArch64::SQDMLALi32: 13179 case AArch64::SQDMLALv2i32_v2i64: 13180 case AArch64::SQDMLALv4i16_v4i32: 13181 case AArch64::SQDMLALv4i32_v2i64: 13182 case AArch64::SQDMLALv8i16_v4i32: 13183 case AArch64::SQDMLSLi16: 13184 case AArch64::SQDMLSLi32: 13185 case AArch64::SQDMLSLv2i32_v2i64: 13186 case AArch64::SQDMLSLv4i16_v4i32: 13187 case AArch64::SQDMLSLv4i32_v2i64: 13188 case AArch64::SQDMLSLv8i16_v4i32: 13189 case AArch64::SQRDMLAHv1i16: 13190 case AArch64::SQRDMLAHv1i32: 13191 case AArch64::SQRDMLAHv2i32: 13192 case AArch64::SQRDMLAHv4i16: 13193 case AArch64::SQRDMLAHv4i32: 13194 case AArch64::SQRDMLAHv8i16: 13195 case AArch64::SQRDMLSHv1i16: 13196 case AArch64::SQRDMLSHv1i32: 13197 case AArch64::SQRDMLSHv2i32: 13198 case AArch64::SQRDMLSHv4i16: 13199 case AArch64::SQRDMLSHv4i32: 13200 case AArch64::SQRDMLSHv8i16: 13201 case AArch64::SUBHNv2i64_v4i32: 13202 case AArch64::SUBHNv4i32_v8i16: 13203 case AArch64::SUBHNv8i16_v16i8: 13204 case AArch64::UABALv16i8_v8i16: 13205 case AArch64::UABALv2i32_v2i64: 13206 case AArch64::UABALv4i16_v4i32: 13207 case AArch64::UABALv4i32_v2i64: 13208 case AArch64::UABALv8i16_v4i32: 13209 case AArch64::UABALv8i8_v8i16: 13210 case AArch64::UABAv16i8: 13211 case AArch64::UABAv2i32: 13212 case AArch64::UABAv4i16: 13213 case AArch64::UABAv4i32: 13214 case AArch64::UABAv8i16: 13215 case AArch64::UABAv8i8: 13216 case AArch64::UDOTv16i8: 13217 case AArch64::UDOTv8i8: 13218 case AArch64::UMLALv16i8_v8i16: 13219 case AArch64::UMLALv2i32_v2i64: 13220 case AArch64::UMLALv4i16_v4i32: 13221 case AArch64::UMLALv4i32_v2i64: 13222 case AArch64::UMLALv8i16_v4i32: 13223 case AArch64::UMLALv8i8_v8i16: 13224 case AArch64::UMLSLv16i8_v8i16: 13225 case AArch64::UMLSLv2i32_v2i64: 13226 case AArch64::UMLSLv4i16_v4i32: 13227 case AArch64::UMLSLv4i32_v2i64: 13228 case AArch64::UMLSLv8i16_v4i32: 13229 case AArch64::UMLSLv8i8_v8i16: 13230 case AArch64::UMMLA: 13231 case AArch64::USDOTv16i8: 13232 case AArch64::USDOTv8i8: 13233 case AArch64::USMMLA: { 13234 // op: Rd 13235 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13236 op &= UINT64_C(31); 13237 Value |= op; 13238 // op: Rn 13239 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13240 op &= UINT64_C(31); 13241 op <<= 5; 13242 Value |= op; 13243 // op: Rm 13244 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13245 op &= UINT64_C(31); 13246 op <<= 16; 13247 Value |= op; 13248 break; 13249 } 13250 case AArch64::BF16DOTlanev4bf16: 13251 case AArch64::BF16DOTlanev8bf16: 13252 case AArch64::FMLAv1i32_indexed: 13253 case AArch64::FMLAv2i32_indexed: 13254 case AArch64::FMLAv4i32_indexed: 13255 case AArch64::FMLSv1i32_indexed: 13256 case AArch64::FMLSv2i32_indexed: 13257 case AArch64::FMLSv4i32_indexed: 13258 case AArch64::MLAv2i32_indexed: 13259 case AArch64::MLAv4i32_indexed: 13260 case AArch64::MLSv2i32_indexed: 13261 case AArch64::MLSv4i32_indexed: 13262 case AArch64::SDOTlanev16i8: 13263 case AArch64::SDOTlanev8i8: 13264 case AArch64::SMLALv2i32_indexed: 13265 case AArch64::SMLALv4i32_indexed: 13266 case AArch64::SMLSLv2i32_indexed: 13267 case AArch64::SMLSLv4i32_indexed: 13268 case AArch64::SQDMLALv1i64_indexed: 13269 case AArch64::SQDMLALv2i32_indexed: 13270 case AArch64::SQDMLALv4i32_indexed: 13271 case AArch64::SQDMLSLv1i64_indexed: 13272 case AArch64::SQDMLSLv2i32_indexed: 13273 case AArch64::SQDMLSLv4i32_indexed: 13274 case AArch64::SQRDMLAHi32_indexed: 13275 case AArch64::SQRDMLAHv2i32_indexed: 13276 case AArch64::SQRDMLAHv4i32_indexed: 13277 case AArch64::SQRDMLSHi32_indexed: 13278 case AArch64::SQRDMLSHv2i32_indexed: 13279 case AArch64::SQRDMLSHv4i32_indexed: 13280 case AArch64::SUDOTlanev16i8: 13281 case AArch64::SUDOTlanev8i8: 13282 case AArch64::UDOTlanev16i8: 13283 case AArch64::UDOTlanev8i8: 13284 case AArch64::UMLALv2i32_indexed: 13285 case AArch64::UMLALv4i32_indexed: 13286 case AArch64::UMLSLv2i32_indexed: 13287 case AArch64::UMLSLv4i32_indexed: 13288 case AArch64::USDOTlanev16i8: 13289 case AArch64::USDOTlanev8i8: { 13290 // op: Rd 13291 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13292 op &= UINT64_C(31); 13293 Value |= op; 13294 // op: Rn 13295 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13296 op &= UINT64_C(31); 13297 op <<= 5; 13298 Value |= op; 13299 // op: Rm 13300 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13301 op &= UINT64_C(31); 13302 op <<= 16; 13303 Value |= op; 13304 // op: idx 13305 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13306 Value |= (op & UINT64_C(1)) << 21; 13307 Value |= (op & UINT64_C(2)) << 10; 13308 break; 13309 } 13310 case AArch64::FMLAv1i64_indexed: 13311 case AArch64::FMLAv2i64_indexed: 13312 case AArch64::FMLSv1i64_indexed: 13313 case AArch64::FMLSv2i64_indexed: { 13314 // op: Rd 13315 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13316 op &= UINT64_C(31); 13317 Value |= op; 13318 // op: Rn 13319 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13320 op &= UINT64_C(31); 13321 op <<= 5; 13322 Value |= op; 13323 // op: Rm 13324 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13325 op &= UINT64_C(31); 13326 op <<= 16; 13327 Value |= op; 13328 // op: idx 13329 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13330 op &= UINT64_C(1); 13331 op <<= 11; 13332 Value |= op; 13333 break; 13334 } 13335 case AArch64::FCMLAv2f32: 13336 case AArch64::FCMLAv2f64: 13337 case AArch64::FCMLAv4f16: 13338 case AArch64::FCMLAv4f32: 13339 case AArch64::FCMLAv8f16: { 13340 // op: Rd 13341 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13342 op &= UINT64_C(31); 13343 Value |= op; 13344 // op: Rn 13345 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13346 op &= UINT64_C(31); 13347 op <<= 5; 13348 Value |= op; 13349 // op: Rm 13350 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13351 op &= UINT64_C(31); 13352 op <<= 16; 13353 Value |= op; 13354 // op: rot 13355 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13356 op &= UINT64_C(3); 13357 op <<= 11; 13358 Value |= op; 13359 break; 13360 } 13361 case AArch64::FCMLAv8f16_indexed: { 13362 // op: Rd 13363 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13364 op &= UINT64_C(31); 13365 Value |= op; 13366 // op: Rn 13367 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13368 op &= UINT64_C(31); 13369 op <<= 5; 13370 Value |= op; 13371 // op: Rm 13372 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13373 op &= UINT64_C(31); 13374 op <<= 16; 13375 Value |= op; 13376 // op: rot 13377 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 13378 op &= UINT64_C(3); 13379 op <<= 13; 13380 Value |= op; 13381 // op: idx 13382 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13383 Value |= (op & UINT64_C(1)) << 21; 13384 Value |= (op & UINT64_C(2)) << 10; 13385 break; 13386 } 13387 case AArch64::FCMLAv4f32_indexed: { 13388 // op: Rd 13389 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13390 op &= UINT64_C(31); 13391 Value |= op; 13392 // op: Rn 13393 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13394 op &= UINT64_C(31); 13395 op <<= 5; 13396 Value |= op; 13397 // op: Rm 13398 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13399 op &= UINT64_C(31); 13400 op <<= 16; 13401 Value |= op; 13402 // op: rot 13403 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 13404 op &= UINT64_C(3); 13405 op <<= 13; 13406 Value |= op; 13407 // op: idx 13408 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13409 op &= UINT64_C(1); 13410 op <<= 11; 13411 Value |= op; 13412 break; 13413 } 13414 case AArch64::FCMLAv4f16_indexed: { 13415 // op: Rd 13416 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13417 op &= UINT64_C(31); 13418 Value |= op; 13419 // op: Rn 13420 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13421 op &= UINT64_C(31); 13422 op <<= 5; 13423 Value |= op; 13424 // op: Rm 13425 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13426 op &= UINT64_C(31); 13427 op <<= 16; 13428 Value |= op; 13429 // op: rot 13430 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 13431 op &= UINT64_C(3); 13432 op <<= 13; 13433 Value |= op; 13434 // op: idx 13435 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13436 op &= UINT64_C(1); 13437 op <<= 21; 13438 Value |= op; 13439 break; 13440 } 13441 case AArch64::SLIv4i16_shift: 13442 case AArch64::SLIv8i16_shift: { 13443 // op: Rd 13444 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13445 op &= UINT64_C(31); 13446 Value |= op; 13447 // op: Rn 13448 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13449 op &= UINT64_C(31); 13450 op <<= 5; 13451 Value |= op; 13452 // op: imm 13453 op = getVecShiftL16OpValue(MI, 3, Fixups, STI); 13454 op &= UINT64_C(15); 13455 op <<= 16; 13456 Value |= op; 13457 break; 13458 } 13459 case AArch64::SLIv2i32_shift: 13460 case AArch64::SLIv4i32_shift: { 13461 // op: Rd 13462 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13463 op &= UINT64_C(31); 13464 Value |= op; 13465 // op: Rn 13466 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13467 op &= UINT64_C(31); 13468 op <<= 5; 13469 Value |= op; 13470 // op: imm 13471 op = getVecShiftL32OpValue(MI, 3, Fixups, STI); 13472 op &= UINT64_C(31); 13473 op <<= 16; 13474 Value |= op; 13475 break; 13476 } 13477 case AArch64::SLId: 13478 case AArch64::SLIv2i64_shift: { 13479 // op: Rd 13480 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13481 op &= UINT64_C(31); 13482 Value |= op; 13483 // op: Rn 13484 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13485 op &= UINT64_C(31); 13486 op <<= 5; 13487 Value |= op; 13488 // op: imm 13489 op = getVecShiftL64OpValue(MI, 3, Fixups, STI); 13490 op &= UINT64_C(63); 13491 op <<= 16; 13492 Value |= op; 13493 break; 13494 } 13495 case AArch64::SLIv16i8_shift: 13496 case AArch64::SLIv8i8_shift: { 13497 // op: Rd 13498 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13499 op &= UINT64_C(31); 13500 Value |= op; 13501 // op: Rn 13502 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13503 op &= UINT64_C(31); 13504 op <<= 5; 13505 Value |= op; 13506 // op: imm 13507 op = getVecShiftL8OpValue(MI, 3, Fixups, STI); 13508 op &= UINT64_C(7); 13509 op <<= 16; 13510 Value |= op; 13511 break; 13512 } 13513 case AArch64::SRIv4i16_shift: 13514 case AArch64::SRIv8i16_shift: 13515 case AArch64::SRSRAv4i16_shift: 13516 case AArch64::SRSRAv8i16_shift: 13517 case AArch64::SSRAv4i16_shift: 13518 case AArch64::SSRAv8i16_shift: 13519 case AArch64::URSRAv4i16_shift: 13520 case AArch64::URSRAv8i16_shift: 13521 case AArch64::USRAv4i16_shift: 13522 case AArch64::USRAv8i16_shift: { 13523 // op: Rd 13524 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13525 op &= UINT64_C(31); 13526 Value |= op; 13527 // op: Rn 13528 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13529 op &= UINT64_C(31); 13530 op <<= 5; 13531 Value |= op; 13532 // op: imm 13533 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 13534 op &= UINT64_C(15); 13535 op <<= 16; 13536 Value |= op; 13537 break; 13538 } 13539 case AArch64::RSHRNv16i8_shift: 13540 case AArch64::SHRNv16i8_shift: 13541 case AArch64::SQRSHRNv16i8_shift: 13542 case AArch64::SQRSHRUNv16i8_shift: 13543 case AArch64::SQSHRNv16i8_shift: 13544 case AArch64::SQSHRUNv16i8_shift: 13545 case AArch64::UQRSHRNv16i8_shift: 13546 case AArch64::UQSHRNv16i8_shift: { 13547 // op: Rd 13548 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13549 op &= UINT64_C(31); 13550 Value |= op; 13551 // op: Rn 13552 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13553 op &= UINT64_C(31); 13554 op <<= 5; 13555 Value |= op; 13556 // op: imm 13557 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 13558 op &= UINT64_C(7); 13559 op <<= 16; 13560 Value |= op; 13561 break; 13562 } 13563 case AArch64::RSHRNv8i16_shift: 13564 case AArch64::SHRNv8i16_shift: 13565 case AArch64::SQRSHRNv8i16_shift: 13566 case AArch64::SQRSHRUNv8i16_shift: 13567 case AArch64::SQSHRNv8i16_shift: 13568 case AArch64::SQSHRUNv8i16_shift: 13569 case AArch64::UQRSHRNv8i16_shift: 13570 case AArch64::UQSHRNv8i16_shift: { 13571 // op: Rd 13572 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13573 op &= UINT64_C(31); 13574 Value |= op; 13575 // op: Rn 13576 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13577 op &= UINT64_C(31); 13578 op <<= 5; 13579 Value |= op; 13580 // op: imm 13581 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 13582 op &= UINT64_C(15); 13583 op <<= 16; 13584 Value |= op; 13585 break; 13586 } 13587 case AArch64::SRIv2i32_shift: 13588 case AArch64::SRIv4i32_shift: 13589 case AArch64::SRSRAv2i32_shift: 13590 case AArch64::SRSRAv4i32_shift: 13591 case AArch64::SSRAv2i32_shift: 13592 case AArch64::SSRAv4i32_shift: 13593 case AArch64::URSRAv2i32_shift: 13594 case AArch64::URSRAv4i32_shift: 13595 case AArch64::USRAv2i32_shift: 13596 case AArch64::USRAv4i32_shift: { 13597 // op: Rd 13598 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13599 op &= UINT64_C(31); 13600 Value |= op; 13601 // op: Rn 13602 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13603 op &= UINT64_C(31); 13604 op <<= 5; 13605 Value |= op; 13606 // op: imm 13607 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 13608 op &= UINT64_C(31); 13609 op <<= 16; 13610 Value |= op; 13611 break; 13612 } 13613 case AArch64::RSHRNv4i32_shift: 13614 case AArch64::SHRNv4i32_shift: 13615 case AArch64::SQRSHRNv4i32_shift: 13616 case AArch64::SQRSHRUNv4i32_shift: 13617 case AArch64::SQSHRNv4i32_shift: 13618 case AArch64::SQSHRUNv4i32_shift: 13619 case AArch64::UQRSHRNv4i32_shift: 13620 case AArch64::UQSHRNv4i32_shift: { 13621 // op: Rd 13622 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13623 op &= UINT64_C(31); 13624 Value |= op; 13625 // op: Rn 13626 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13627 op &= UINT64_C(31); 13628 op <<= 5; 13629 Value |= op; 13630 // op: imm 13631 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 13632 op &= UINT64_C(31); 13633 op <<= 16; 13634 Value |= op; 13635 break; 13636 } 13637 case AArch64::SRId: 13638 case AArch64::SRIv2i64_shift: 13639 case AArch64::SRSRAd: 13640 case AArch64::SRSRAv2i64_shift: 13641 case AArch64::SSRAd: 13642 case AArch64::SSRAv2i64_shift: 13643 case AArch64::URSRAd: 13644 case AArch64::URSRAv2i64_shift: 13645 case AArch64::USRAd: 13646 case AArch64::USRAv2i64_shift: { 13647 // op: Rd 13648 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13649 op &= UINT64_C(31); 13650 Value |= op; 13651 // op: Rn 13652 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13653 op &= UINT64_C(31); 13654 op <<= 5; 13655 Value |= op; 13656 // op: imm 13657 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 13658 op &= UINT64_C(63); 13659 op <<= 16; 13660 Value |= op; 13661 break; 13662 } 13663 case AArch64::SRIv16i8_shift: 13664 case AArch64::SRIv8i8_shift: 13665 case AArch64::SRSRAv16i8_shift: 13666 case AArch64::SRSRAv8i8_shift: 13667 case AArch64::SSRAv16i8_shift: 13668 case AArch64::SSRAv8i8_shift: 13669 case AArch64::URSRAv16i8_shift: 13670 case AArch64::URSRAv8i8_shift: 13671 case AArch64::USRAv16i8_shift: 13672 case AArch64::USRAv8i8_shift: { 13673 // op: Rd 13674 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13675 op &= UINT64_C(31); 13676 Value |= op; 13677 // op: Rn 13678 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13679 op &= UINT64_C(31); 13680 op <<= 5; 13681 Value |= op; 13682 // op: imm 13683 op = getVecShiftR8OpValue(MI, 3, Fixups, STI); 13684 op &= UINT64_C(7); 13685 op <<= 16; 13686 Value |= op; 13687 break; 13688 } 13689 case AArch64::INSvi64gpr: { 13690 // op: Rd 13691 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13692 op &= UINT64_C(31); 13693 Value |= op; 13694 // op: Rn 13695 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13696 op &= UINT64_C(31); 13697 op <<= 5; 13698 Value |= op; 13699 // op: idx 13700 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13701 op &= UINT64_C(1); 13702 op <<= 20; 13703 Value |= op; 13704 break; 13705 } 13706 case AArch64::INSvi64lane: { 13707 // op: Rd 13708 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13709 op &= UINT64_C(31); 13710 Value |= op; 13711 // op: Rn 13712 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13713 op &= UINT64_C(31); 13714 op <<= 5; 13715 Value |= op; 13716 // op: idx 13717 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13718 op &= UINT64_C(1); 13719 op <<= 20; 13720 Value |= op; 13721 // op: idx2 13722 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13723 op &= UINT64_C(1); 13724 op <<= 14; 13725 Value |= op; 13726 break; 13727 } 13728 case AArch64::INSvi8gpr: { 13729 // op: Rd 13730 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13731 op &= UINT64_C(31); 13732 Value |= op; 13733 // op: Rn 13734 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13735 op &= UINT64_C(31); 13736 op <<= 5; 13737 Value |= op; 13738 // op: idx 13739 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13740 op &= UINT64_C(15); 13741 op <<= 17; 13742 Value |= op; 13743 break; 13744 } 13745 case AArch64::INSvi8lane: { 13746 // op: Rd 13747 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13748 op &= UINT64_C(31); 13749 Value |= op; 13750 // op: Rn 13751 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13752 op &= UINT64_C(31); 13753 op <<= 5; 13754 Value |= op; 13755 // op: idx 13756 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13757 op &= UINT64_C(15); 13758 op <<= 17; 13759 Value |= op; 13760 // op: idx2 13761 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13762 op &= UINT64_C(15); 13763 op <<= 11; 13764 Value |= op; 13765 break; 13766 } 13767 case AArch64::INSvi32gpr: { 13768 // op: Rd 13769 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13770 op &= UINT64_C(31); 13771 Value |= op; 13772 // op: Rn 13773 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13774 op &= UINT64_C(31); 13775 op <<= 5; 13776 Value |= op; 13777 // op: idx 13778 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13779 op &= UINT64_C(3); 13780 op <<= 19; 13781 Value |= op; 13782 break; 13783 } 13784 case AArch64::INSvi32lane: { 13785 // op: Rd 13786 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13787 op &= UINT64_C(31); 13788 Value |= op; 13789 // op: Rn 13790 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13791 op &= UINT64_C(31); 13792 op <<= 5; 13793 Value |= op; 13794 // op: idx 13795 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13796 op &= UINT64_C(3); 13797 op <<= 19; 13798 Value |= op; 13799 // op: idx2 13800 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13801 op &= UINT64_C(3); 13802 op <<= 13; 13803 Value |= op; 13804 break; 13805 } 13806 case AArch64::INSvi16gpr: { 13807 // op: Rd 13808 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13809 op &= UINT64_C(31); 13810 Value |= op; 13811 // op: Rn 13812 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13813 op &= UINT64_C(31); 13814 op <<= 5; 13815 Value |= op; 13816 // op: idx 13817 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13818 op &= UINT64_C(7); 13819 op <<= 18; 13820 Value |= op; 13821 break; 13822 } 13823 case AArch64::INSvi16lane: { 13824 // op: Rd 13825 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13826 op &= UINT64_C(31); 13827 Value |= op; 13828 // op: Rn 13829 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13830 op &= UINT64_C(31); 13831 op <<= 5; 13832 Value |= op; 13833 // op: idx 13834 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13835 op &= UINT64_C(7); 13836 op <<= 18; 13837 Value |= op; 13838 // op: idx2 13839 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13840 op &= UINT64_C(7); 13841 op <<= 12; 13842 Value |= op; 13843 break; 13844 } 13845 case AArch64::BICv4i16: 13846 case AArch64::BICv8i16: 13847 case AArch64::ORRv4i16: 13848 case AArch64::ORRv8i16: { 13849 // op: Rd 13850 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13851 op &= UINT64_C(31); 13852 Value |= op; 13853 // op: imm8 13854 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13855 Value |= (op & UINT64_C(224)) << 11; 13856 Value |= (op & UINT64_C(31)) << 5; 13857 // op: shift 13858 op = getVecShifterOpValue(MI, 3, Fixups, STI); 13859 op &= UINT64_C(1); 13860 op <<= 13; 13861 Value |= op; 13862 break; 13863 } 13864 case AArch64::BICv2i32: 13865 case AArch64::BICv4i32: 13866 case AArch64::ORRv2i32: 13867 case AArch64::ORRv4i32: { 13868 // op: Rd 13869 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 13870 op &= UINT64_C(31); 13871 Value |= op; 13872 // op: imm8 13873 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13874 Value |= (op & UINT64_C(224)) << 11; 13875 Value |= (op & UINT64_C(31)) << 5; 13876 // op: shift 13877 op = getVecShifterOpValue(MI, 3, Fixups, STI); 13878 op &= UINT64_C(3); 13879 op <<= 13; 13880 Value |= op; 13881 break; 13882 } 13883 case AArch64::MOPSSETGE: 13884 case AArch64::MOPSSETGEN: 13885 case AArch64::MOPSSETGET: 13886 case AArch64::MOPSSETGETN: 13887 case AArch64::SETE: 13888 case AArch64::SETEN: 13889 case AArch64::SETET: 13890 case AArch64::SETETN: 13891 case AArch64::SETGM: 13892 case AArch64::SETGMN: 13893 case AArch64::SETGMT: 13894 case AArch64::SETGMTN: 13895 case AArch64::SETGP: 13896 case AArch64::SETGPN: 13897 case AArch64::SETGPT: 13898 case AArch64::SETGPTN: 13899 case AArch64::SETM: 13900 case AArch64::SETMN: 13901 case AArch64::SETMT: 13902 case AArch64::SETMTN: 13903 case AArch64::SETP: 13904 case AArch64::SETPN: 13905 case AArch64::SETPT: 13906 case AArch64::SETPTN: { 13907 // op: Rd 13908 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 13909 op &= UINT64_C(31); 13910 Value |= op; 13911 // op: Rn 13912 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 13913 op &= UINT64_C(31); 13914 op <<= 5; 13915 Value |= op; 13916 // op: Rm 13917 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 13918 op &= UINT64_C(31); 13919 op <<= 16; 13920 Value |= op; 13921 break; 13922 } 13923 case AArch64::CPYE: 13924 case AArch64::CPYEN: 13925 case AArch64::CPYERN: 13926 case AArch64::CPYERT: 13927 case AArch64::CPYERTN: 13928 case AArch64::CPYERTRN: 13929 case AArch64::CPYERTWN: 13930 case AArch64::CPYET: 13931 case AArch64::CPYETN: 13932 case AArch64::CPYETRN: 13933 case AArch64::CPYETWN: 13934 case AArch64::CPYEWN: 13935 case AArch64::CPYEWT: 13936 case AArch64::CPYEWTN: 13937 case AArch64::CPYEWTRN: 13938 case AArch64::CPYEWTWN: 13939 case AArch64::CPYFE: 13940 case AArch64::CPYFEN: 13941 case AArch64::CPYFERN: 13942 case AArch64::CPYFERT: 13943 case AArch64::CPYFERTN: 13944 case AArch64::CPYFERTRN: 13945 case AArch64::CPYFERTWN: 13946 case AArch64::CPYFET: 13947 case AArch64::CPYFETN: 13948 case AArch64::CPYFETRN: 13949 case AArch64::CPYFETWN: 13950 case AArch64::CPYFEWN: 13951 case AArch64::CPYFEWT: 13952 case AArch64::CPYFEWTN: 13953 case AArch64::CPYFEWTRN: 13954 case AArch64::CPYFEWTWN: 13955 case AArch64::CPYFM: 13956 case AArch64::CPYFMN: 13957 case AArch64::CPYFMRN: 13958 case AArch64::CPYFMRT: 13959 case AArch64::CPYFMRTN: 13960 case AArch64::CPYFMRTRN: 13961 case AArch64::CPYFMRTWN: 13962 case AArch64::CPYFMT: 13963 case AArch64::CPYFMTN: 13964 case AArch64::CPYFMTRN: 13965 case AArch64::CPYFMTWN: 13966 case AArch64::CPYFMWN: 13967 case AArch64::CPYFMWT: 13968 case AArch64::CPYFMWTN: 13969 case AArch64::CPYFMWTRN: 13970 case AArch64::CPYFMWTWN: 13971 case AArch64::CPYFP: 13972 case AArch64::CPYFPN: 13973 case AArch64::CPYFPRN: 13974 case AArch64::CPYFPRT: 13975 case AArch64::CPYFPRTN: 13976 case AArch64::CPYFPRTRN: 13977 case AArch64::CPYFPRTWN: 13978 case AArch64::CPYFPT: 13979 case AArch64::CPYFPTN: 13980 case AArch64::CPYFPTRN: 13981 case AArch64::CPYFPTWN: 13982 case AArch64::CPYFPWN: 13983 case AArch64::CPYFPWT: 13984 case AArch64::CPYFPWTN: 13985 case AArch64::CPYFPWTRN: 13986 case AArch64::CPYFPWTWN: 13987 case AArch64::CPYM: 13988 case AArch64::CPYMN: 13989 case AArch64::CPYMRN: 13990 case AArch64::CPYMRT: 13991 case AArch64::CPYMRTN: 13992 case AArch64::CPYMRTRN: 13993 case AArch64::CPYMRTWN: 13994 case AArch64::CPYMT: 13995 case AArch64::CPYMTN: 13996 case AArch64::CPYMTRN: 13997 case AArch64::CPYMTWN: 13998 case AArch64::CPYMWN: 13999 case AArch64::CPYMWT: 14000 case AArch64::CPYMWTN: 14001 case AArch64::CPYMWTRN: 14002 case AArch64::CPYMWTWN: 14003 case AArch64::CPYP: 14004 case AArch64::CPYPN: 14005 case AArch64::CPYPRN: 14006 case AArch64::CPYPRT: 14007 case AArch64::CPYPRTN: 14008 case AArch64::CPYPRTRN: 14009 case AArch64::CPYPRTWN: 14010 case AArch64::CPYPT: 14011 case AArch64::CPYPTN: 14012 case AArch64::CPYPTRN: 14013 case AArch64::CPYPTWN: 14014 case AArch64::CPYPWN: 14015 case AArch64::CPYPWT: 14016 case AArch64::CPYPWTN: 14017 case AArch64::CPYPWTRN: 14018 case AArch64::CPYPWTWN: { 14019 // op: Rd 14020 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14021 op &= UINT64_C(31); 14022 Value |= op; 14023 // op: Rs 14024 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14025 op &= UINT64_C(31); 14026 op <<= 16; 14027 Value |= op; 14028 // op: Rn 14029 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14030 op &= UINT64_C(31); 14031 op <<= 5; 14032 Value |= op; 14033 break; 14034 } 14035 case AArch64::DECP_XP_B: 14036 case AArch64::DECP_XP_D: 14037 case AArch64::DECP_XP_H: 14038 case AArch64::DECP_XP_S: 14039 case AArch64::INCP_XP_B: 14040 case AArch64::INCP_XP_D: 14041 case AArch64::INCP_XP_H: 14042 case AArch64::INCP_XP_S: 14043 case AArch64::SQDECP_XPWd_B: 14044 case AArch64::SQDECP_XPWd_D: 14045 case AArch64::SQDECP_XPWd_H: 14046 case AArch64::SQDECP_XPWd_S: 14047 case AArch64::SQDECP_XP_B: 14048 case AArch64::SQDECP_XP_D: 14049 case AArch64::SQDECP_XP_H: 14050 case AArch64::SQDECP_XP_S: 14051 case AArch64::SQINCP_XPWd_B: 14052 case AArch64::SQINCP_XPWd_D: 14053 case AArch64::SQINCP_XPWd_H: 14054 case AArch64::SQINCP_XPWd_S: 14055 case AArch64::SQINCP_XP_B: 14056 case AArch64::SQINCP_XP_D: 14057 case AArch64::SQINCP_XP_H: 14058 case AArch64::SQINCP_XP_S: 14059 case AArch64::UQDECP_WP_B: 14060 case AArch64::UQDECP_WP_D: 14061 case AArch64::UQDECP_WP_H: 14062 case AArch64::UQDECP_WP_S: 14063 case AArch64::UQDECP_XP_B: 14064 case AArch64::UQDECP_XP_D: 14065 case AArch64::UQDECP_XP_H: 14066 case AArch64::UQDECP_XP_S: 14067 case AArch64::UQINCP_WP_B: 14068 case AArch64::UQINCP_WP_D: 14069 case AArch64::UQINCP_WP_H: 14070 case AArch64::UQINCP_WP_S: 14071 case AArch64::UQINCP_XP_B: 14072 case AArch64::UQINCP_XP_D: 14073 case AArch64::UQINCP_XP_H: 14074 case AArch64::UQINCP_XP_S: { 14075 // op: Rdn 14076 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14077 op &= UINT64_C(31); 14078 Value |= op; 14079 // op: Pg 14080 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14081 op &= UINT64_C(15); 14082 op <<= 5; 14083 Value |= op; 14084 break; 14085 } 14086 case AArch64::DECB_XPiI: 14087 case AArch64::DECD_XPiI: 14088 case AArch64::DECH_XPiI: 14089 case AArch64::DECW_XPiI: 14090 case AArch64::INCB_XPiI: 14091 case AArch64::INCD_XPiI: 14092 case AArch64::INCH_XPiI: 14093 case AArch64::INCW_XPiI: 14094 case AArch64::SQDECB_XPiI: 14095 case AArch64::SQDECB_XPiWdI: 14096 case AArch64::SQDECD_XPiI: 14097 case AArch64::SQDECD_XPiWdI: 14098 case AArch64::SQDECH_XPiI: 14099 case AArch64::SQDECH_XPiWdI: 14100 case AArch64::SQDECW_XPiI: 14101 case AArch64::SQDECW_XPiWdI: 14102 case AArch64::SQINCB_XPiI: 14103 case AArch64::SQINCB_XPiWdI: 14104 case AArch64::SQINCD_XPiI: 14105 case AArch64::SQINCD_XPiWdI: 14106 case AArch64::SQINCH_XPiI: 14107 case AArch64::SQINCH_XPiWdI: 14108 case AArch64::SQINCW_XPiI: 14109 case AArch64::SQINCW_XPiWdI: 14110 case AArch64::UQDECB_WPiI: 14111 case AArch64::UQDECB_XPiI: 14112 case AArch64::UQDECD_WPiI: 14113 case AArch64::UQDECD_XPiI: 14114 case AArch64::UQDECH_WPiI: 14115 case AArch64::UQDECH_XPiI: 14116 case AArch64::UQDECW_WPiI: 14117 case AArch64::UQDECW_XPiI: 14118 case AArch64::UQINCB_WPiI: 14119 case AArch64::UQINCB_XPiI: 14120 case AArch64::UQINCD_WPiI: 14121 case AArch64::UQINCD_XPiI: 14122 case AArch64::UQINCH_WPiI: 14123 case AArch64::UQINCH_XPiI: 14124 case AArch64::UQINCW_WPiI: 14125 case AArch64::UQINCW_XPiI: { 14126 // op: Rdn 14127 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14128 op &= UINT64_C(31); 14129 Value |= op; 14130 // op: pattern 14131 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14132 op &= UINT64_C(31); 14133 op <<= 5; 14134 Value |= op; 14135 // op: imm4 14136 op = getSVEIncDecImm(MI, 3, Fixups, STI); 14137 op &= UINT64_C(15); 14138 op <<= 16; 14139 Value |= op; 14140 break; 14141 } 14142 case AArch64::CTERMEQ_WW: 14143 case AArch64::CTERMEQ_XX: 14144 case AArch64::CTERMNE_WW: 14145 case AArch64::CTERMNE_XX: 14146 case AArch64::FCMPDrr: 14147 case AArch64::FCMPEDrr: 14148 case AArch64::FCMPEHrr: 14149 case AArch64::FCMPESrr: 14150 case AArch64::FCMPHrr: 14151 case AArch64::FCMPSrr: { 14152 // op: Rm 14153 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14154 op &= UINT64_C(31); 14155 op <<= 16; 14156 Value |= op; 14157 // op: Rn 14158 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14159 op &= UINT64_C(31); 14160 op <<= 5; 14161 Value |= op; 14162 break; 14163 } 14164 case AArch64::INDEX_IR_B: 14165 case AArch64::INDEX_IR_D: 14166 case AArch64::INDEX_IR_H: 14167 case AArch64::INDEX_IR_S: { 14168 // op: Rm 14169 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14170 op &= UINT64_C(31); 14171 op <<= 16; 14172 Value |= op; 14173 // op: Zd 14174 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14175 op &= UINT64_C(31); 14176 Value |= op; 14177 // op: imm5 14178 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14179 op &= UINT64_C(31); 14180 op <<= 5; 14181 Value |= op; 14182 break; 14183 } 14184 case AArch64::INSR_ZR_B: 14185 case AArch64::INSR_ZR_D: 14186 case AArch64::INSR_ZR_H: 14187 case AArch64::INSR_ZR_S: { 14188 // op: Rm 14189 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14190 op &= UINT64_C(31); 14191 op <<= 5; 14192 Value |= op; 14193 // op: Zdn 14194 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14195 op &= UINT64_C(31); 14196 Value |= op; 14197 break; 14198 } 14199 case AArch64::LD1B_VG2_M2ZPXX: 14200 case AArch64::LD1D_VG2_M2ZPXX: 14201 case AArch64::LD1H_VG2_M2ZPXX: 14202 case AArch64::LD1W_VG2_M2ZPXX: 14203 case AArch64::LDNT1B_VG2_M2ZPXX: 14204 case AArch64::LDNT1D_VG2_M2ZPXX: 14205 case AArch64::LDNT1H_VG2_M2ZPXX: 14206 case AArch64::LDNT1W_VG2_M2ZPXX: 14207 case AArch64::ST1B_VG2_M2ZPXX: 14208 case AArch64::ST1D_VG2_M2ZPXX: 14209 case AArch64::ST1H_VG2_M2ZPXX: 14210 case AArch64::ST1W_VG2_M2ZPXX: 14211 case AArch64::STNT1B_VG2_M2ZPXX: 14212 case AArch64::STNT1D_VG2_M2ZPXX: 14213 case AArch64::STNT1H_VG2_M2ZPXX: 14214 case AArch64::STNT1W_VG2_M2ZPXX: { 14215 // op: Rm 14216 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14217 op &= UINT64_C(31); 14218 op <<= 16; 14219 Value |= op; 14220 // op: PNg 14221 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 14222 op &= UINT64_C(7); 14223 op <<= 10; 14224 Value |= op; 14225 // op: Rn 14226 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14227 op &= UINT64_C(31); 14228 op <<= 5; 14229 Value |= op; 14230 // op: Zt 14231 op = EncodeZPR2StridedRegisterClass(MI, 0, Fixups, STI); 14232 Value |= (op & UINT64_C(8)) << 1; 14233 Value |= (op & UINT64_C(7)); 14234 break; 14235 } 14236 case AArch64::LD1B_VG4_M4ZPXX: 14237 case AArch64::LD1D_VG4_M4ZPXX: 14238 case AArch64::LD1H_VG4_M4ZPXX: 14239 case AArch64::LD1W_VG4_M4ZPXX: 14240 case AArch64::LDNT1B_VG4_M4ZPXX: 14241 case AArch64::LDNT1D_VG4_M4ZPXX: 14242 case AArch64::LDNT1H_VG4_M4ZPXX: 14243 case AArch64::LDNT1W_VG4_M4ZPXX: 14244 case AArch64::ST1B_VG4_M4ZPXX: 14245 case AArch64::ST1D_VG4_M4ZPXX: 14246 case AArch64::ST1H_VG4_M4ZPXX: 14247 case AArch64::ST1W_VG4_M4ZPXX: 14248 case AArch64::STNT1B_VG4_M4ZPXX: 14249 case AArch64::STNT1D_VG4_M4ZPXX: 14250 case AArch64::STNT1H_VG4_M4ZPXX: 14251 case AArch64::STNT1W_VG4_M4ZPXX: { 14252 // op: Rm 14253 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14254 op &= UINT64_C(31); 14255 op <<= 16; 14256 Value |= op; 14257 // op: PNg 14258 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 14259 op &= UINT64_C(7); 14260 op <<= 10; 14261 Value |= op; 14262 // op: Rn 14263 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14264 op &= UINT64_C(31); 14265 op <<= 5; 14266 Value |= op; 14267 // op: Zt 14268 op = EncodeZPR4StridedRegisterClass(MI, 0, Fixups, STI); 14269 Value |= (op & UINT64_C(4)) << 2; 14270 Value |= (op & UINT64_C(3)); 14271 break; 14272 } 14273 case AArch64::PRFB_PRR: 14274 case AArch64::PRFD_PRR: 14275 case AArch64::PRFH_PRR: 14276 case AArch64::PRFW_PRR: { 14277 // op: Rm 14278 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14279 op &= UINT64_C(31); 14280 op <<= 16; 14281 Value |= op; 14282 // op: Rn 14283 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14284 op &= UINT64_C(31); 14285 op <<= 5; 14286 Value |= op; 14287 // op: Pg 14288 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14289 op &= UINT64_C(7); 14290 op <<= 10; 14291 Value |= op; 14292 // op: prfop 14293 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14294 op &= UINT64_C(15); 14295 Value |= op; 14296 break; 14297 } 14298 case AArch64::LD1_MXIPXX_H_H: 14299 case AArch64::LD1_MXIPXX_V_H: 14300 case AArch64::ST1_MXIPXX_H_H: 14301 case AArch64::ST1_MXIPXX_V_H: { 14302 // op: Rm 14303 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14304 op &= UINT64_C(31); 14305 op <<= 16; 14306 Value |= op; 14307 // op: Rv 14308 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 14309 op &= UINT64_C(3); 14310 op <<= 13; 14311 Value |= op; 14312 // op: Pg 14313 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14314 op &= UINT64_C(7); 14315 op <<= 10; 14316 Value |= op; 14317 // op: Rn 14318 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14319 op &= UINT64_C(31); 14320 op <<= 5; 14321 Value |= op; 14322 // op: ZAt 14323 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14324 op &= UINT64_C(1); 14325 op <<= 3; 14326 Value |= op; 14327 // op: imm 14328 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14329 op &= UINT64_C(7); 14330 Value |= op; 14331 break; 14332 } 14333 case AArch64::LD1_MXIPXX_H_Q: 14334 case AArch64::LD1_MXIPXX_V_Q: 14335 case AArch64::ST1_MXIPXX_H_Q: 14336 case AArch64::ST1_MXIPXX_V_Q: { 14337 // op: Rm 14338 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14339 op &= UINT64_C(31); 14340 op <<= 16; 14341 Value |= op; 14342 // op: Rv 14343 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 14344 op &= UINT64_C(3); 14345 op <<= 13; 14346 Value |= op; 14347 // op: Pg 14348 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14349 op &= UINT64_C(7); 14350 op <<= 10; 14351 Value |= op; 14352 // op: Rn 14353 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14354 op &= UINT64_C(31); 14355 op <<= 5; 14356 Value |= op; 14357 // op: ZAt 14358 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14359 op &= UINT64_C(15); 14360 Value |= op; 14361 break; 14362 } 14363 case AArch64::LD1_MXIPXX_H_S: 14364 case AArch64::LD1_MXIPXX_V_S: 14365 case AArch64::ST1_MXIPXX_H_S: 14366 case AArch64::ST1_MXIPXX_V_S: { 14367 // op: Rm 14368 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14369 op &= UINT64_C(31); 14370 op <<= 16; 14371 Value |= op; 14372 // op: Rv 14373 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 14374 op &= UINT64_C(3); 14375 op <<= 13; 14376 Value |= op; 14377 // op: Pg 14378 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14379 op &= UINT64_C(7); 14380 op <<= 10; 14381 Value |= op; 14382 // op: Rn 14383 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14384 op &= UINT64_C(31); 14385 op <<= 5; 14386 Value |= op; 14387 // op: ZAt 14388 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14389 op &= UINT64_C(3); 14390 op <<= 2; 14391 Value |= op; 14392 // op: imm 14393 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14394 op &= UINT64_C(3); 14395 Value |= op; 14396 break; 14397 } 14398 case AArch64::LD1_MXIPXX_H_D: 14399 case AArch64::LD1_MXIPXX_V_D: 14400 case AArch64::ST1_MXIPXX_H_D: 14401 case AArch64::ST1_MXIPXX_V_D: { 14402 // op: Rm 14403 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14404 op &= UINT64_C(31); 14405 op <<= 16; 14406 Value |= op; 14407 // op: Rv 14408 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 14409 op &= UINT64_C(3); 14410 op <<= 13; 14411 Value |= op; 14412 // op: Pg 14413 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14414 op &= UINT64_C(7); 14415 op <<= 10; 14416 Value |= op; 14417 // op: Rn 14418 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14419 op &= UINT64_C(31); 14420 op <<= 5; 14421 Value |= op; 14422 // op: ZAt 14423 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14424 op &= UINT64_C(7); 14425 op <<= 1; 14426 Value |= op; 14427 // op: imm 14428 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14429 op &= UINT64_C(1); 14430 Value |= op; 14431 break; 14432 } 14433 case AArch64::LD1_MXIPXX_H_B: 14434 case AArch64::LD1_MXIPXX_V_B: 14435 case AArch64::ST1_MXIPXX_H_B: 14436 case AArch64::ST1_MXIPXX_V_B: { 14437 // op: Rm 14438 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 14439 op &= UINT64_C(31); 14440 op <<= 16; 14441 Value |= op; 14442 // op: Rv 14443 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 14444 op &= UINT64_C(3); 14445 op <<= 13; 14446 Value |= op; 14447 // op: Pg 14448 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14449 op &= UINT64_C(7); 14450 op <<= 10; 14451 Value |= op; 14452 // op: Rn 14453 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14454 op &= UINT64_C(31); 14455 op <<= 5; 14456 Value |= op; 14457 // op: imm 14458 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14459 op &= UINT64_C(15); 14460 Value |= op; 14461 break; 14462 } 14463 case AArch64::BLR: 14464 case AArch64::BLRAAZ: 14465 case AArch64::BLRABZ: 14466 case AArch64::BR: 14467 case AArch64::BRAAZ: 14468 case AArch64::BRABZ: 14469 case AArch64::RET: 14470 case AArch64::SETF16: 14471 case AArch64::SETF8: { 14472 // op: Rn 14473 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14474 op &= UINT64_C(31); 14475 op <<= 5; 14476 Value |= op; 14477 break; 14478 } 14479 case AArch64::BLRAA: 14480 case AArch64::BLRAB: 14481 case AArch64::BRAA: 14482 case AArch64::BRAB: { 14483 // op: Rn 14484 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14485 op &= UINT64_C(31); 14486 op <<= 5; 14487 Value |= op; 14488 // op: Rm 14489 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14490 op &= UINT64_C(31); 14491 Value |= op; 14492 break; 14493 } 14494 case AArch64::CCMNWr: 14495 case AArch64::CCMNXr: 14496 case AArch64::CCMPWr: 14497 case AArch64::CCMPXr: 14498 case AArch64::FCCMPDrr: 14499 case AArch64::FCCMPEDrr: 14500 case AArch64::FCCMPEHrr: 14501 case AArch64::FCCMPESrr: 14502 case AArch64::FCCMPHrr: 14503 case AArch64::FCCMPSrr: { 14504 // op: Rn 14505 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14506 op &= UINT64_C(31); 14507 op <<= 5; 14508 Value |= op; 14509 // op: Rm 14510 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14511 op &= UINT64_C(31); 14512 op <<= 16; 14513 Value |= op; 14514 // op: nzcv 14515 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14516 op &= UINT64_C(15); 14517 Value |= op; 14518 // op: cond 14519 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14520 op &= UINT64_C(15); 14521 op <<= 12; 14522 Value |= op; 14523 break; 14524 } 14525 case AArch64::CCMNWi: 14526 case AArch64::CCMNXi: 14527 case AArch64::CCMPWi: 14528 case AArch64::CCMPXi: { 14529 // op: Rn 14530 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14531 op &= UINT64_C(31); 14532 op <<= 5; 14533 Value |= op; 14534 // op: imm 14535 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14536 op &= UINT64_C(31); 14537 op <<= 16; 14538 Value |= op; 14539 // op: nzcv 14540 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14541 op &= UINT64_C(15); 14542 Value |= op; 14543 // op: cond 14544 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14545 op &= UINT64_C(15); 14546 op <<= 12; 14547 Value |= op; 14548 break; 14549 } 14550 case AArch64::RMIF: { 14551 // op: Rn 14552 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14553 op &= UINT64_C(31); 14554 op <<= 5; 14555 Value |= op; 14556 // op: imm 14557 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14558 op &= UINT64_C(63); 14559 op <<= 15; 14560 Value |= op; 14561 // op: mask 14562 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14563 op &= UINT64_C(15); 14564 Value |= op; 14565 break; 14566 } 14567 case AArch64::FCMPDri: 14568 case AArch64::FCMPEDri: 14569 case AArch64::FCMPEHri: 14570 case AArch64::FCMPESri: 14571 case AArch64::FCMPHri: 14572 case AArch64::FCMPSri: { 14573 // op: Rn 14574 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14575 op &= UINT64_C(31); 14576 op <<= 5; 14577 Value |= op; 14578 Value = fixOneOperandFPComparison(MI, Value, STI); 14579 break; 14580 } 14581 case AArch64::LDR_TX: 14582 case AArch64::STR_TX: { 14583 // op: Rn 14584 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14585 op &= UINT64_C(31); 14586 op <<= 5; 14587 Value |= op; 14588 break; 14589 } 14590 case AArch64::LDAPRB: 14591 case AArch64::LDAPRH: 14592 case AArch64::LDAPRW: 14593 case AArch64::LDAPRX: 14594 case AArch64::LDGM: 14595 case AArch64::STGM: 14596 case AArch64::STZGM: { 14597 // op: Rn 14598 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14599 op &= UINT64_C(31); 14600 op <<= 5; 14601 Value |= op; 14602 // op: Rt 14603 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14604 op &= UINT64_C(31); 14605 Value |= op; 14606 break; 14607 } 14608 case AArch64::ST2GOffset: 14609 case AArch64::STGOffset: 14610 case AArch64::STZ2GOffset: 14611 case AArch64::STZGOffset: { 14612 // op: Rn 14613 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14614 op &= UINT64_C(31); 14615 op <<= 5; 14616 Value |= op; 14617 // op: Rt 14618 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14619 op &= UINT64_C(31); 14620 Value |= op; 14621 // op: offset 14622 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14623 op &= UINT64_C(511); 14624 op <<= 12; 14625 Value |= op; 14626 break; 14627 } 14628 case AArch64::DUP_ZR_B: 14629 case AArch64::DUP_ZR_D: 14630 case AArch64::DUP_ZR_H: 14631 case AArch64::DUP_ZR_S: { 14632 // op: Rn 14633 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14634 op &= UINT64_C(31); 14635 op <<= 5; 14636 Value |= op; 14637 // op: Zd 14638 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14639 op &= UINT64_C(31); 14640 Value |= op; 14641 break; 14642 } 14643 case AArch64::INDEX_RI_B: 14644 case AArch64::INDEX_RI_D: 14645 case AArch64::INDEX_RI_H: 14646 case AArch64::INDEX_RI_S: { 14647 // op: Rn 14648 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14649 op &= UINT64_C(31); 14650 op <<= 5; 14651 Value |= op; 14652 // op: Zd 14653 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14654 op &= UINT64_C(31); 14655 Value |= op; 14656 // op: imm5 14657 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14658 op &= UINT64_C(31); 14659 op <<= 16; 14660 Value |= op; 14661 break; 14662 } 14663 case AArch64::LDR_ZXI: 14664 case AArch64::STR_ZXI: { 14665 // op: Rn 14666 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14667 op &= UINT64_C(31); 14668 op <<= 5; 14669 Value |= op; 14670 // op: Zt 14671 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14672 op &= UINT64_C(31); 14673 Value |= op; 14674 // op: imm9 14675 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14676 Value |= (op & UINT64_C(504)) << 13; 14677 Value |= (op & UINT64_C(7)) << 10; 14678 break; 14679 } 14680 case AArch64::PRFB_PRI: 14681 case AArch64::PRFD_PRI: 14682 case AArch64::PRFH_PRI: 14683 case AArch64::PRFW_PRI: { 14684 // op: Rn 14685 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14686 op &= UINT64_C(31); 14687 op <<= 5; 14688 Value |= op; 14689 // op: Pg 14690 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14691 op &= UINT64_C(7); 14692 op <<= 10; 14693 Value |= op; 14694 // op: imm6 14695 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14696 op &= UINT64_C(63); 14697 op <<= 16; 14698 Value |= op; 14699 // op: prfop 14700 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14701 op &= UINT64_C(15); 14702 Value |= op; 14703 break; 14704 } 14705 case AArch64::LDG: 14706 case AArch64::ST2GPostIndex: 14707 case AArch64::ST2GPreIndex: 14708 case AArch64::STGPostIndex: 14709 case AArch64::STGPreIndex: 14710 case AArch64::STZ2GPostIndex: 14711 case AArch64::STZ2GPreIndex: 14712 case AArch64::STZGPostIndex: 14713 case AArch64::STZGPreIndex: { 14714 // op: Rn 14715 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 14716 op &= UINT64_C(31); 14717 op <<= 5; 14718 Value |= op; 14719 // op: Rt 14720 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14721 op &= UINT64_C(31); 14722 Value |= op; 14723 // op: offset 14724 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14725 op &= UINT64_C(511); 14726 op <<= 12; 14727 Value |= op; 14728 break; 14729 } 14730 case AArch64::MOVA_MXI2Z_H_H: 14731 case AArch64::MOVA_MXI2Z_V_H: { 14732 // op: Rs 14733 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14734 op &= UINT64_C(3); 14735 op <<= 13; 14736 Value |= op; 14737 // op: Zn 14738 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 14739 op &= UINT64_C(15); 14740 op <<= 6; 14741 Value |= op; 14742 // op: ZAd 14743 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14744 op &= UINT64_C(1); 14745 op <<= 2; 14746 Value |= op; 14747 // op: imm 14748 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14749 op &= UINT64_C(3); 14750 Value |= op; 14751 break; 14752 } 14753 case AArch64::MOVA_MXI2Z_H_S: 14754 case AArch64::MOVA_MXI2Z_V_S: { 14755 // op: Rs 14756 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14757 op &= UINT64_C(3); 14758 op <<= 13; 14759 Value |= op; 14760 // op: Zn 14761 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 14762 op &= UINT64_C(15); 14763 op <<= 6; 14764 Value |= op; 14765 // op: ZAd 14766 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14767 op &= UINT64_C(3); 14768 op <<= 1; 14769 Value |= op; 14770 // op: imm 14771 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14772 op &= UINT64_C(1); 14773 Value |= op; 14774 break; 14775 } 14776 case AArch64::MOVA_MXI2Z_H_D: 14777 case AArch64::MOVA_MXI2Z_V_D: { 14778 // op: Rs 14779 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14780 op &= UINT64_C(3); 14781 op <<= 13; 14782 Value |= op; 14783 // op: Zn 14784 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 14785 op &= UINT64_C(15); 14786 op <<= 6; 14787 Value |= op; 14788 // op: ZAd 14789 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14790 op &= UINT64_C(7); 14791 Value |= op; 14792 break; 14793 } 14794 case AArch64::MOVA_MXI2Z_H_B: 14795 case AArch64::MOVA_MXI2Z_V_B: { 14796 // op: Rs 14797 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14798 op &= UINT64_C(3); 14799 op <<= 13; 14800 Value |= op; 14801 // op: Zn 14802 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 14803 op &= UINT64_C(15); 14804 op <<= 6; 14805 Value |= op; 14806 // op: imm 14807 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14808 op &= UINT64_C(7); 14809 Value |= op; 14810 break; 14811 } 14812 case AArch64::MOVA_MXI4Z_H_H: 14813 case AArch64::MOVA_MXI4Z_V_H: { 14814 // op: Rs 14815 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14816 op &= UINT64_C(3); 14817 op <<= 13; 14818 Value |= op; 14819 // op: Zn 14820 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 14821 op &= UINT64_C(7); 14822 op <<= 7; 14823 Value |= op; 14824 // op: ZAd 14825 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14826 op &= UINT64_C(1); 14827 op <<= 1; 14828 Value |= op; 14829 // op: imm 14830 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14831 op &= UINT64_C(1); 14832 Value |= op; 14833 break; 14834 } 14835 case AArch64::MOVA_MXI4Z_H_S: 14836 case AArch64::MOVA_MXI4Z_V_S: { 14837 // op: Rs 14838 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14839 op &= UINT64_C(3); 14840 op <<= 13; 14841 Value |= op; 14842 // op: Zn 14843 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 14844 op &= UINT64_C(7); 14845 op <<= 7; 14846 Value |= op; 14847 // op: ZAd 14848 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14849 op &= UINT64_C(3); 14850 Value |= op; 14851 break; 14852 } 14853 case AArch64::MOVA_MXI4Z_H_D: 14854 case AArch64::MOVA_MXI4Z_V_D: { 14855 // op: Rs 14856 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14857 op &= UINT64_C(3); 14858 op <<= 13; 14859 Value |= op; 14860 // op: Zn 14861 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 14862 op &= UINT64_C(7); 14863 op <<= 7; 14864 Value |= op; 14865 // op: ZAd 14866 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14867 op &= UINT64_C(7); 14868 Value |= op; 14869 break; 14870 } 14871 case AArch64::MOVA_MXI4Z_H_B: 14872 case AArch64::MOVA_MXI4Z_V_B: { 14873 // op: Rs 14874 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 14875 op &= UINT64_C(3); 14876 op <<= 13; 14877 Value |= op; 14878 // op: Zn 14879 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 14880 op &= UINT64_C(7); 14881 op <<= 7; 14882 Value |= op; 14883 // op: imm 14884 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 14885 op &= UINT64_C(3); 14886 Value |= op; 14887 break; 14888 } 14889 case AArch64::MOVAZ_ZMI_H_H: 14890 case AArch64::MOVAZ_ZMI_V_H: { 14891 // op: Rs 14892 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 14893 op &= UINT64_C(3); 14894 op <<= 13; 14895 Value |= op; 14896 // op: Zd 14897 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14898 op &= UINT64_C(31); 14899 Value |= op; 14900 // op: ZAn 14901 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14902 op &= UINT64_C(1); 14903 op <<= 8; 14904 Value |= op; 14905 // op: imm 14906 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14907 op &= UINT64_C(7); 14908 op <<= 5; 14909 Value |= op; 14910 break; 14911 } 14912 case AArch64::MOVAZ_ZMI_H_Q: 14913 case AArch64::MOVAZ_ZMI_V_Q: { 14914 // op: Rs 14915 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 14916 op &= UINT64_C(3); 14917 op <<= 13; 14918 Value |= op; 14919 // op: Zd 14920 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14921 op &= UINT64_C(31); 14922 Value |= op; 14923 // op: ZAn 14924 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14925 op &= UINT64_C(15); 14926 op <<= 5; 14927 Value |= op; 14928 break; 14929 } 14930 case AArch64::MOVAZ_ZMI_H_S: 14931 case AArch64::MOVAZ_ZMI_V_S: { 14932 // op: Rs 14933 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 14934 op &= UINT64_C(3); 14935 op <<= 13; 14936 Value |= op; 14937 // op: Zd 14938 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14939 op &= UINT64_C(31); 14940 Value |= op; 14941 // op: ZAn 14942 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14943 op &= UINT64_C(3); 14944 op <<= 7; 14945 Value |= op; 14946 // op: imm 14947 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14948 op &= UINT64_C(3); 14949 op <<= 5; 14950 Value |= op; 14951 break; 14952 } 14953 case AArch64::MOVAZ_ZMI_H_D: 14954 case AArch64::MOVAZ_ZMI_V_D: { 14955 // op: Rs 14956 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 14957 op &= UINT64_C(3); 14958 op <<= 13; 14959 Value |= op; 14960 // op: Zd 14961 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14962 op &= UINT64_C(31); 14963 Value |= op; 14964 // op: ZAn 14965 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 14966 op &= UINT64_C(7); 14967 op <<= 6; 14968 Value |= op; 14969 // op: imm 14970 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14971 op &= UINT64_C(1); 14972 op <<= 5; 14973 Value |= op; 14974 break; 14975 } 14976 case AArch64::MOVAZ_ZMI_H_B: 14977 case AArch64::MOVAZ_ZMI_V_B: { 14978 // op: Rs 14979 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 14980 op &= UINT64_C(3); 14981 op <<= 13; 14982 Value |= op; 14983 // op: Zd 14984 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 14985 op &= UINT64_C(31); 14986 Value |= op; 14987 // op: imm 14988 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 14989 op &= UINT64_C(15); 14990 op <<= 5; 14991 Value |= op; 14992 break; 14993 } 14994 case AArch64::MOVA_VG2_MXI2Z: { 14995 // op: Rs 14996 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 14997 op &= UINT64_C(3); 14998 op <<= 13; 14999 Value |= op; 15000 // op: imm 15001 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15002 op &= UINT64_C(7); 15003 Value |= op; 15004 // op: Zn 15005 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 15006 op &= UINT64_C(15); 15007 op <<= 6; 15008 Value |= op; 15009 break; 15010 } 15011 case AArch64::MOVA_VG4_MXI4Z: { 15012 // op: Rs 15013 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 15014 op &= UINT64_C(3); 15015 op <<= 13; 15016 Value |= op; 15017 // op: imm 15018 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15019 op &= UINT64_C(7); 15020 Value |= op; 15021 // op: Zn 15022 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 15023 op &= UINT64_C(7); 15024 op <<= 7; 15025 Value |= op; 15026 break; 15027 } 15028 case AArch64::MOVA_VG2_2ZMXI: { 15029 // op: Rs 15030 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 15031 op &= UINT64_C(3); 15032 op <<= 13; 15033 Value |= op; 15034 // op: imm 15035 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15036 op &= UINT64_C(7); 15037 op <<= 5; 15038 Value |= op; 15039 // op: Zd 15040 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 15041 op &= UINT64_C(15); 15042 op <<= 1; 15043 Value |= op; 15044 break; 15045 } 15046 case AArch64::MOVA_VG4_4ZMXI: { 15047 // op: Rs 15048 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 15049 op &= UINT64_C(3); 15050 op <<= 13; 15051 Value |= op; 15052 // op: imm 15053 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15054 op &= UINT64_C(7); 15055 op <<= 5; 15056 Value |= op; 15057 // op: Zd 15058 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 15059 op &= UINT64_C(7); 15060 op <<= 2; 15061 Value |= op; 15062 break; 15063 } 15064 case AArch64::MOVAZ_VG2_2ZM: { 15065 // op: Rs 15066 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 3, Fixups, STI); 15067 op &= UINT64_C(3); 15068 op <<= 13; 15069 Value |= op; 15070 // op: imm 15071 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 15072 op &= UINT64_C(7); 15073 op <<= 5; 15074 Value |= op; 15075 // op: Zd 15076 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 15077 op &= UINT64_C(15); 15078 op <<= 1; 15079 Value |= op; 15080 break; 15081 } 15082 case AArch64::MOVAZ_VG4_4ZM: { 15083 // op: Rs 15084 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 3, Fixups, STI); 15085 op &= UINT64_C(3); 15086 op <<= 13; 15087 Value |= op; 15088 // op: imm 15089 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 15090 op &= UINT64_C(7); 15091 op <<= 5; 15092 Value |= op; 15093 // op: Zd 15094 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 15095 op &= UINT64_C(7); 15096 op <<= 2; 15097 Value |= op; 15098 break; 15099 } 15100 case AArch64::LDADDAB: 15101 case AArch64::LDADDAH: 15102 case AArch64::LDADDALB: 15103 case AArch64::LDADDALH: 15104 case AArch64::LDADDALW: 15105 case AArch64::LDADDALX: 15106 case AArch64::LDADDAW: 15107 case AArch64::LDADDAX: 15108 case AArch64::LDADDB: 15109 case AArch64::LDADDH: 15110 case AArch64::LDADDLB: 15111 case AArch64::LDADDLH: 15112 case AArch64::LDADDLW: 15113 case AArch64::LDADDLX: 15114 case AArch64::LDADDW: 15115 case AArch64::LDADDX: 15116 case AArch64::LDCLRAB: 15117 case AArch64::LDCLRAH: 15118 case AArch64::LDCLRALB: 15119 case AArch64::LDCLRALH: 15120 case AArch64::LDCLRALW: 15121 case AArch64::LDCLRALX: 15122 case AArch64::LDCLRAW: 15123 case AArch64::LDCLRAX: 15124 case AArch64::LDCLRB: 15125 case AArch64::LDCLRH: 15126 case AArch64::LDCLRLB: 15127 case AArch64::LDCLRLH: 15128 case AArch64::LDCLRLW: 15129 case AArch64::LDCLRLX: 15130 case AArch64::LDCLRW: 15131 case AArch64::LDCLRX: 15132 case AArch64::LDEORAB: 15133 case AArch64::LDEORAH: 15134 case AArch64::LDEORALB: 15135 case AArch64::LDEORALH: 15136 case AArch64::LDEORALW: 15137 case AArch64::LDEORALX: 15138 case AArch64::LDEORAW: 15139 case AArch64::LDEORAX: 15140 case AArch64::LDEORB: 15141 case AArch64::LDEORH: 15142 case AArch64::LDEORLB: 15143 case AArch64::LDEORLH: 15144 case AArch64::LDEORLW: 15145 case AArch64::LDEORLX: 15146 case AArch64::LDEORW: 15147 case AArch64::LDEORX: 15148 case AArch64::LDSETAB: 15149 case AArch64::LDSETAH: 15150 case AArch64::LDSETALB: 15151 case AArch64::LDSETALH: 15152 case AArch64::LDSETALW: 15153 case AArch64::LDSETALX: 15154 case AArch64::LDSETAW: 15155 case AArch64::LDSETAX: 15156 case AArch64::LDSETB: 15157 case AArch64::LDSETH: 15158 case AArch64::LDSETLB: 15159 case AArch64::LDSETLH: 15160 case AArch64::LDSETLW: 15161 case AArch64::LDSETLX: 15162 case AArch64::LDSETW: 15163 case AArch64::LDSETX: 15164 case AArch64::LDSMAXAB: 15165 case AArch64::LDSMAXAH: 15166 case AArch64::LDSMAXALB: 15167 case AArch64::LDSMAXALH: 15168 case AArch64::LDSMAXALW: 15169 case AArch64::LDSMAXALX: 15170 case AArch64::LDSMAXAW: 15171 case AArch64::LDSMAXAX: 15172 case AArch64::LDSMAXB: 15173 case AArch64::LDSMAXH: 15174 case AArch64::LDSMAXLB: 15175 case AArch64::LDSMAXLH: 15176 case AArch64::LDSMAXLW: 15177 case AArch64::LDSMAXLX: 15178 case AArch64::LDSMAXW: 15179 case AArch64::LDSMAXX: 15180 case AArch64::LDSMINAB: 15181 case AArch64::LDSMINAH: 15182 case AArch64::LDSMINALB: 15183 case AArch64::LDSMINALH: 15184 case AArch64::LDSMINALW: 15185 case AArch64::LDSMINALX: 15186 case AArch64::LDSMINAW: 15187 case AArch64::LDSMINAX: 15188 case AArch64::LDSMINB: 15189 case AArch64::LDSMINH: 15190 case AArch64::LDSMINLB: 15191 case AArch64::LDSMINLH: 15192 case AArch64::LDSMINLW: 15193 case AArch64::LDSMINLX: 15194 case AArch64::LDSMINW: 15195 case AArch64::LDSMINX: 15196 case AArch64::LDUMAXAB: 15197 case AArch64::LDUMAXAH: 15198 case AArch64::LDUMAXALB: 15199 case AArch64::LDUMAXALH: 15200 case AArch64::LDUMAXALW: 15201 case AArch64::LDUMAXALX: 15202 case AArch64::LDUMAXAW: 15203 case AArch64::LDUMAXAX: 15204 case AArch64::LDUMAXB: 15205 case AArch64::LDUMAXH: 15206 case AArch64::LDUMAXLB: 15207 case AArch64::LDUMAXLH: 15208 case AArch64::LDUMAXLW: 15209 case AArch64::LDUMAXLX: 15210 case AArch64::LDUMAXW: 15211 case AArch64::LDUMAXX: 15212 case AArch64::LDUMINAB: 15213 case AArch64::LDUMINAH: 15214 case AArch64::LDUMINALB: 15215 case AArch64::LDUMINALH: 15216 case AArch64::LDUMINALW: 15217 case AArch64::LDUMINALX: 15218 case AArch64::LDUMINAW: 15219 case AArch64::LDUMINAX: 15220 case AArch64::LDUMINB: 15221 case AArch64::LDUMINH: 15222 case AArch64::LDUMINLB: 15223 case AArch64::LDUMINLH: 15224 case AArch64::LDUMINLW: 15225 case AArch64::LDUMINLX: 15226 case AArch64::LDUMINW: 15227 case AArch64::LDUMINX: 15228 case AArch64::RCWCLR: 15229 case AArch64::RCWCLRA: 15230 case AArch64::RCWCLRAL: 15231 case AArch64::RCWCLRL: 15232 case AArch64::RCWCLRS: 15233 case AArch64::RCWCLRSA: 15234 case AArch64::RCWCLRSAL: 15235 case AArch64::RCWCLRSL: 15236 case AArch64::RCWSET: 15237 case AArch64::RCWSETA: 15238 case AArch64::RCWSETAL: 15239 case AArch64::RCWSETL: 15240 case AArch64::RCWSETS: 15241 case AArch64::RCWSETSA: 15242 case AArch64::RCWSETSAL: 15243 case AArch64::RCWSETSL: 15244 case AArch64::RCWSWP: 15245 case AArch64::RCWSWPA: 15246 case AArch64::RCWSWPAL: 15247 case AArch64::RCWSWPL: 15248 case AArch64::RCWSWPS: 15249 case AArch64::RCWSWPSA: 15250 case AArch64::RCWSWPSAL: 15251 case AArch64::RCWSWPSL: 15252 case AArch64::SWPAB: 15253 case AArch64::SWPAH: 15254 case AArch64::SWPALB: 15255 case AArch64::SWPALH: 15256 case AArch64::SWPALW: 15257 case AArch64::SWPALX: 15258 case AArch64::SWPAW: 15259 case AArch64::SWPAX: 15260 case AArch64::SWPB: 15261 case AArch64::SWPH: 15262 case AArch64::SWPLB: 15263 case AArch64::SWPLH: 15264 case AArch64::SWPLW: 15265 case AArch64::SWPLX: 15266 case AArch64::SWPW: 15267 case AArch64::SWPX: { 15268 // op: Rs 15269 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15270 op &= UINT64_C(31); 15271 op <<= 16; 15272 Value |= op; 15273 // op: Rn 15274 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15275 op &= UINT64_C(31); 15276 op <<= 5; 15277 Value |= op; 15278 // op: Rt 15279 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15280 op &= UINT64_C(31); 15281 Value |= op; 15282 break; 15283 } 15284 case AArch64::CASAB: 15285 case AArch64::CASAH: 15286 case AArch64::CASALB: 15287 case AArch64::CASALH: 15288 case AArch64::CASALW: 15289 case AArch64::CASALX: 15290 case AArch64::CASAW: 15291 case AArch64::CASAX: 15292 case AArch64::CASB: 15293 case AArch64::CASH: 15294 case AArch64::CASLB: 15295 case AArch64::CASLH: 15296 case AArch64::CASLW: 15297 case AArch64::CASLX: 15298 case AArch64::CASPALW: 15299 case AArch64::CASPALX: 15300 case AArch64::CASPAW: 15301 case AArch64::CASPAX: 15302 case AArch64::CASPLW: 15303 case AArch64::CASPLX: 15304 case AArch64::CASPW: 15305 case AArch64::CASPX: 15306 case AArch64::CASW: 15307 case AArch64::CASX: 15308 case AArch64::RCWCAS: 15309 case AArch64::RCWCASA: 15310 case AArch64::RCWCASAL: 15311 case AArch64::RCWCASL: 15312 case AArch64::RCWCASP: 15313 case AArch64::RCWCASPA: 15314 case AArch64::RCWCASPAL: 15315 case AArch64::RCWCASPL: 15316 case AArch64::RCWSCAS: 15317 case AArch64::RCWSCASA: 15318 case AArch64::RCWSCASAL: 15319 case AArch64::RCWSCASL: 15320 case AArch64::RCWSCASP: 15321 case AArch64::RCWSCASPA: 15322 case AArch64::RCWSCASPAL: 15323 case AArch64::RCWSCASPL: { 15324 // op: Rs 15325 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15326 op &= UINT64_C(31); 15327 op <<= 16; 15328 Value |= op; 15329 // op: Rn 15330 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15331 op &= UINT64_C(31); 15332 op <<= 5; 15333 Value |= op; 15334 // op: Rt 15335 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15336 op &= UINT64_C(31); 15337 Value |= op; 15338 break; 15339 } 15340 case AArch64::RPRFM: { 15341 // op: Rt 15342 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15343 Value |= (op & UINT64_C(32)) << 10; 15344 Value |= (op & UINT64_C(24)) << 9; 15345 Value |= (op & UINT64_C(7)); 15346 // op: Rn 15347 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15348 op &= UINT64_C(31); 15349 op <<= 5; 15350 Value |= op; 15351 // op: Rm 15352 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15353 op &= UINT64_C(31); 15354 op <<= 16; 15355 Value |= op; 15356 break; 15357 } 15358 case AArch64::TRCIT: 15359 case AArch64::TSTART: 15360 case AArch64::TTEST: 15361 case AArch64::WFET: 15362 case AArch64::WFIT: { 15363 // op: Rt 15364 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15365 op &= UINT64_C(31); 15366 Value |= op; 15367 break; 15368 } 15369 case AArch64::LD64B: 15370 case AArch64::ST64B: { 15371 // op: Rt 15372 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15373 op &= UINT64_C(31); 15374 Value |= op; 15375 // op: Rn 15376 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15377 op &= UINT64_C(31); 15378 op <<= 5; 15379 Value |= op; 15380 break; 15381 } 15382 case AArch64::LDRBBroW: 15383 case AArch64::LDRBBroX: 15384 case AArch64::LDRBroW: 15385 case AArch64::LDRBroX: 15386 case AArch64::LDRDroW: 15387 case AArch64::LDRDroX: 15388 case AArch64::LDRHHroW: 15389 case AArch64::LDRHHroX: 15390 case AArch64::LDRHroW: 15391 case AArch64::LDRHroX: 15392 case AArch64::LDRQroW: 15393 case AArch64::LDRQroX: 15394 case AArch64::LDRSBWroW: 15395 case AArch64::LDRSBWroX: 15396 case AArch64::LDRSBXroW: 15397 case AArch64::LDRSBXroX: 15398 case AArch64::LDRSHWroW: 15399 case AArch64::LDRSHWroX: 15400 case AArch64::LDRSHXroW: 15401 case AArch64::LDRSHXroX: 15402 case AArch64::LDRSWroW: 15403 case AArch64::LDRSWroX: 15404 case AArch64::LDRSroW: 15405 case AArch64::LDRSroX: 15406 case AArch64::LDRWroW: 15407 case AArch64::LDRWroX: 15408 case AArch64::LDRXroW: 15409 case AArch64::LDRXroX: 15410 case AArch64::PRFMroW: 15411 case AArch64::PRFMroX: 15412 case AArch64::STRBBroW: 15413 case AArch64::STRBBroX: 15414 case AArch64::STRBroW: 15415 case AArch64::STRBroX: 15416 case AArch64::STRDroW: 15417 case AArch64::STRDroX: 15418 case AArch64::STRHHroW: 15419 case AArch64::STRHHroX: 15420 case AArch64::STRHroW: 15421 case AArch64::STRHroX: 15422 case AArch64::STRQroW: 15423 case AArch64::STRQroX: 15424 case AArch64::STRSroW: 15425 case AArch64::STRSroX: 15426 case AArch64::STRWroW: 15427 case AArch64::STRWroX: 15428 case AArch64::STRXroW: 15429 case AArch64::STRXroX: { 15430 // op: Rt 15431 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15432 op &= UINT64_C(31); 15433 Value |= op; 15434 // op: Rn 15435 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15436 op &= UINT64_C(31); 15437 op <<= 5; 15438 Value |= op; 15439 // op: Rm 15440 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15441 op &= UINT64_C(31); 15442 op <<= 16; 15443 Value |= op; 15444 // op: extend 15445 op = getMemExtendOpValue(MI, 3, Fixups, STI); 15446 Value |= (op & UINT64_C(2)) << 14; 15447 Value |= (op & UINT64_C(1)) << 12; 15448 break; 15449 } 15450 case AArch64::LDRQui: 15451 case AArch64::STRQui: { 15452 // op: Rt 15453 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15454 op &= UINT64_C(31); 15455 Value |= op; 15456 // op: Rn 15457 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15458 op &= UINT64_C(31); 15459 op <<= 5; 15460 Value |= op; 15461 // op: offset 15462 op = getLdStUImm12OpValue<AArch64::fixup_aarch64_ldst_imm12_scale16>(MI, 2, Fixups, STI); 15463 op &= UINT64_C(4095); 15464 op <<= 10; 15465 Value |= op; 15466 break; 15467 } 15468 case AArch64::LDRBBui: 15469 case AArch64::LDRBui: 15470 case AArch64::LDRSBWui: 15471 case AArch64::LDRSBXui: 15472 case AArch64::STRBBui: 15473 case AArch64::STRBui: { 15474 // op: Rt 15475 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15476 op &= UINT64_C(31); 15477 Value |= op; 15478 // op: Rn 15479 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15480 op &= UINT64_C(31); 15481 op <<= 5; 15482 Value |= op; 15483 // op: offset 15484 op = getLdStUImm12OpValue<AArch64::fixup_aarch64_ldst_imm12_scale1>(MI, 2, Fixups, STI); 15485 op &= UINT64_C(4095); 15486 op <<= 10; 15487 Value |= op; 15488 break; 15489 } 15490 case AArch64::LDRHHui: 15491 case AArch64::LDRHui: 15492 case AArch64::LDRSHWui: 15493 case AArch64::LDRSHXui: 15494 case AArch64::STRHHui: 15495 case AArch64::STRHui: { 15496 // op: Rt 15497 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15498 op &= UINT64_C(31); 15499 Value |= op; 15500 // op: Rn 15501 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15502 op &= UINT64_C(31); 15503 op <<= 5; 15504 Value |= op; 15505 // op: offset 15506 op = getLdStUImm12OpValue<AArch64::fixup_aarch64_ldst_imm12_scale2>(MI, 2, Fixups, STI); 15507 op &= UINT64_C(4095); 15508 op <<= 10; 15509 Value |= op; 15510 break; 15511 } 15512 case AArch64::LDRSWui: 15513 case AArch64::LDRSui: 15514 case AArch64::LDRWui: 15515 case AArch64::STRSui: 15516 case AArch64::STRWui: { 15517 // op: Rt 15518 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15519 op &= UINT64_C(31); 15520 Value |= op; 15521 // op: Rn 15522 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15523 op &= UINT64_C(31); 15524 op <<= 5; 15525 Value |= op; 15526 // op: offset 15527 op = getLdStUImm12OpValue<AArch64::fixup_aarch64_ldst_imm12_scale4>(MI, 2, Fixups, STI); 15528 op &= UINT64_C(4095); 15529 op <<= 10; 15530 Value |= op; 15531 break; 15532 } 15533 case AArch64::LDRDui: 15534 case AArch64::LDRXui: 15535 case AArch64::PRFMui: 15536 case AArch64::STRDui: 15537 case AArch64::STRXui: { 15538 // op: Rt 15539 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15540 op &= UINT64_C(31); 15541 Value |= op; 15542 // op: Rn 15543 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15544 op &= UINT64_C(31); 15545 op <<= 5; 15546 Value |= op; 15547 // op: offset 15548 op = getLdStUImm12OpValue<AArch64::fixup_aarch64_ldst_imm12_scale8>(MI, 2, Fixups, STI); 15549 op &= UINT64_C(4095); 15550 op <<= 10; 15551 Value |= op; 15552 break; 15553 } 15554 case AArch64::LDAPURBi: 15555 case AArch64::LDAPURHi: 15556 case AArch64::LDAPURSBWi: 15557 case AArch64::LDAPURSBXi: 15558 case AArch64::LDAPURSHWi: 15559 case AArch64::LDAPURSHXi: 15560 case AArch64::LDAPURSWi: 15561 case AArch64::LDAPURXi: 15562 case AArch64::LDAPURi: 15563 case AArch64::LDTRBi: 15564 case AArch64::LDTRHi: 15565 case AArch64::LDTRSBWi: 15566 case AArch64::LDTRSBXi: 15567 case AArch64::LDTRSHWi: 15568 case AArch64::LDTRSHXi: 15569 case AArch64::LDTRSWi: 15570 case AArch64::LDTRWi: 15571 case AArch64::LDTRXi: 15572 case AArch64::LDURBBi: 15573 case AArch64::LDURBi: 15574 case AArch64::LDURDi: 15575 case AArch64::LDURHHi: 15576 case AArch64::LDURHi: 15577 case AArch64::LDURQi: 15578 case AArch64::LDURSBWi: 15579 case AArch64::LDURSBXi: 15580 case AArch64::LDURSHWi: 15581 case AArch64::LDURSHXi: 15582 case AArch64::LDURSWi: 15583 case AArch64::LDURSi: 15584 case AArch64::LDURWi: 15585 case AArch64::LDURXi: 15586 case AArch64::PRFUMi: 15587 case AArch64::STLURBi: 15588 case AArch64::STLURHi: 15589 case AArch64::STLURWi: 15590 case AArch64::STLURXi: 15591 case AArch64::STTRBi: 15592 case AArch64::STTRHi: 15593 case AArch64::STTRWi: 15594 case AArch64::STTRXi: 15595 case AArch64::STURBBi: 15596 case AArch64::STURBi: 15597 case AArch64::STURDi: 15598 case AArch64::STURHHi: 15599 case AArch64::STURHi: 15600 case AArch64::STURQi: 15601 case AArch64::STURSi: 15602 case AArch64::STURWi: 15603 case AArch64::STURXi: { 15604 // op: Rt 15605 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15606 op &= UINT64_C(31); 15607 Value |= op; 15608 // op: Rn 15609 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15610 op &= UINT64_C(31); 15611 op <<= 5; 15612 Value |= op; 15613 // op: offset 15614 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15615 op &= UINT64_C(511); 15616 op <<= 12; 15617 Value |= op; 15618 break; 15619 } 15620 case AArch64::LDAPURbi: 15621 case AArch64::LDAPURdi: 15622 case AArch64::LDAPURhi: 15623 case AArch64::LDAPURqi: 15624 case AArch64::LDAPURsi: 15625 case AArch64::STLURbi: 15626 case AArch64::STLURdi: 15627 case AArch64::STLURhi: 15628 case AArch64::STLURqi: 15629 case AArch64::STLURsi: { 15630 // op: Rt 15631 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15632 op &= UINT64_C(31); 15633 Value |= op; 15634 // op: Rn 15635 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15636 op &= UINT64_C(31); 15637 op <<= 5; 15638 Value |= op; 15639 // op: simm 15640 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15641 op &= UINT64_C(511); 15642 op <<= 12; 15643 Value |= op; 15644 break; 15645 } 15646 case AArch64::LDARB: 15647 case AArch64::LDARH: 15648 case AArch64::LDARW: 15649 case AArch64::LDARX: 15650 case AArch64::LDAXRB: 15651 case AArch64::LDAXRH: 15652 case AArch64::LDAXRW: 15653 case AArch64::LDAXRX: 15654 case AArch64::LDLARB: 15655 case AArch64::LDLARH: 15656 case AArch64::LDLARW: 15657 case AArch64::LDLARX: 15658 case AArch64::LDXRB: 15659 case AArch64::LDXRH: 15660 case AArch64::LDXRW: 15661 case AArch64::LDXRX: 15662 case AArch64::STLLRB: 15663 case AArch64::STLLRH: 15664 case AArch64::STLLRW: 15665 case AArch64::STLLRX: 15666 case AArch64::STLRB: 15667 case AArch64::STLRH: 15668 case AArch64::STLRW: 15669 case AArch64::STLRX: { 15670 // op: Rt 15671 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15672 op &= UINT64_C(31); 15673 Value |= op; 15674 // op: Rn 15675 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15676 op &= UINT64_C(31); 15677 op <<= 5; 15678 Value |= op; 15679 Value = fixLoadStoreExclusive<0,0>(MI, Value, STI); 15680 break; 15681 } 15682 case AArch64::LDIAPPW: 15683 case AArch64::LDIAPPX: 15684 case AArch64::STILPW: 15685 case AArch64::STILPX: { 15686 // op: Rt 15687 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15688 op &= UINT64_C(31); 15689 Value |= op; 15690 // op: Rn 15691 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15692 op &= UINT64_C(31); 15693 op <<= 5; 15694 Value |= op; 15695 // op: Rt2 15696 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15697 op &= UINT64_C(31); 15698 op <<= 16; 15699 Value |= op; 15700 break; 15701 } 15702 case AArch64::LDNPDi: 15703 case AArch64::LDNPQi: 15704 case AArch64::LDNPSi: 15705 case AArch64::LDNPWi: 15706 case AArch64::LDNPXi: 15707 case AArch64::LDPDi: 15708 case AArch64::LDPQi: 15709 case AArch64::LDPSWi: 15710 case AArch64::LDPSi: 15711 case AArch64::LDPWi: 15712 case AArch64::LDPXi: 15713 case AArch64::STGPi: 15714 case AArch64::STNPDi: 15715 case AArch64::STNPQi: 15716 case AArch64::STNPSi: 15717 case AArch64::STNPWi: 15718 case AArch64::STNPXi: 15719 case AArch64::STPDi: 15720 case AArch64::STPQi: 15721 case AArch64::STPSi: 15722 case AArch64::STPWi: 15723 case AArch64::STPXi: { 15724 // op: Rt 15725 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15726 op &= UINT64_C(31); 15727 Value |= op; 15728 // op: Rt2 15729 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15730 op &= UINT64_C(31); 15731 op <<= 10; 15732 Value |= op; 15733 // op: Rn 15734 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15735 op &= UINT64_C(31); 15736 op <<= 5; 15737 Value |= op; 15738 // op: offset 15739 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15740 op &= UINT64_C(127); 15741 op <<= 15; 15742 Value |= op; 15743 break; 15744 } 15745 case AArch64::LDAXPW: 15746 case AArch64::LDAXPX: 15747 case AArch64::LDXPW: 15748 case AArch64::LDXPX: { 15749 // op: Rt 15750 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15751 op &= UINT64_C(31); 15752 Value |= op; 15753 // op: Rt2 15754 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15755 op &= UINT64_C(31); 15756 op <<= 10; 15757 Value |= op; 15758 // op: Rn 15759 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15760 op &= UINT64_C(31); 15761 op <<= 5; 15762 Value |= op; 15763 Value = fixLoadStoreExclusive<0,1>(MI, Value, STI); 15764 break; 15765 } 15766 case AArch64::TBNZW: 15767 case AArch64::TBNZX: 15768 case AArch64::TBZW: 15769 case AArch64::TBZX: { 15770 // op: Rt 15771 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15772 op &= UINT64_C(31); 15773 Value |= op; 15774 // op: bit_off 15775 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15776 op &= UINT64_C(31); 15777 op <<= 19; 15778 Value |= op; 15779 // op: target 15780 op = getTestBranchTargetOpValue(MI, 2, Fixups, STI); 15781 op &= UINT64_C(16383); 15782 op <<= 5; 15783 Value |= op; 15784 break; 15785 } 15786 case AArch64::LDRDl: 15787 case AArch64::LDRQl: 15788 case AArch64::LDRSWl: 15789 case AArch64::LDRSl: 15790 case AArch64::LDRWl: 15791 case AArch64::LDRXl: 15792 case AArch64::PRFMl: { 15793 // op: Rt 15794 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15795 op &= UINT64_C(31); 15796 Value |= op; 15797 // op: label 15798 op = getLoadLiteralOpValue(MI, 1, Fixups, STI); 15799 op &= UINT64_C(524287); 15800 op <<= 5; 15801 Value |= op; 15802 break; 15803 } 15804 case AArch64::SYSLxt: { 15805 // op: Rt 15806 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15807 op &= UINT64_C(31); 15808 Value |= op; 15809 // op: op1 15810 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15811 op &= UINT64_C(7); 15812 op <<= 16; 15813 Value |= op; 15814 // op: Cn 15815 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15816 op &= UINT64_C(15); 15817 op <<= 12; 15818 Value |= op; 15819 // op: Cm 15820 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15821 op &= UINT64_C(15); 15822 op <<= 8; 15823 Value |= op; 15824 // op: op2 15825 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 15826 op &= UINT64_C(7); 15827 op <<= 5; 15828 Value |= op; 15829 break; 15830 } 15831 case AArch64::MRRS: 15832 case AArch64::MRS: { 15833 // op: Rt 15834 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15835 op &= UINT64_C(31); 15836 Value |= op; 15837 // op: systemreg 15838 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15839 op &= UINT64_C(65535); 15840 op <<= 5; 15841 Value |= op; 15842 break; 15843 } 15844 case AArch64::CBNZW: 15845 case AArch64::CBNZX: 15846 case AArch64::CBZW: 15847 case AArch64::CBZX: { 15848 // op: Rt 15849 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15850 op &= UINT64_C(31); 15851 Value |= op; 15852 // op: target 15853 op = getCondBranchTargetOpValue(MI, 1, Fixups, STI); 15854 op &= UINT64_C(524287); 15855 op <<= 5; 15856 Value |= op; 15857 break; 15858 } 15859 case AArch64::LDAPRWpre: 15860 case AArch64::LDAPRXpre: 15861 case AArch64::STLRWpre: 15862 case AArch64::STLRXpre: { 15863 // op: Rt 15864 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15865 op &= UINT64_C(31); 15866 Value |= op; 15867 // op: Rn 15868 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15869 op &= UINT64_C(31); 15870 op <<= 5; 15871 Value |= op; 15872 break; 15873 } 15874 case AArch64::ST64BV: 15875 case AArch64::ST64BV0: { 15876 // op: Rt 15877 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15878 op &= UINT64_C(31); 15879 Value |= op; 15880 // op: Rn 15881 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15882 op &= UINT64_C(31); 15883 op <<= 5; 15884 Value |= op; 15885 // op: Rs 15886 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 15887 op &= UINT64_C(31); 15888 op <<= 16; 15889 Value |= op; 15890 break; 15891 } 15892 case AArch64::LDRBBpost: 15893 case AArch64::LDRBBpre: 15894 case AArch64::LDRBpost: 15895 case AArch64::LDRBpre: 15896 case AArch64::LDRDpost: 15897 case AArch64::LDRDpre: 15898 case AArch64::LDRHHpost: 15899 case AArch64::LDRHHpre: 15900 case AArch64::LDRHpost: 15901 case AArch64::LDRHpre: 15902 case AArch64::LDRQpost: 15903 case AArch64::LDRQpre: 15904 case AArch64::LDRSBWpost: 15905 case AArch64::LDRSBWpre: 15906 case AArch64::LDRSBXpost: 15907 case AArch64::LDRSBXpre: 15908 case AArch64::LDRSHWpost: 15909 case AArch64::LDRSHWpre: 15910 case AArch64::LDRSHXpost: 15911 case AArch64::LDRSHXpre: 15912 case AArch64::LDRSWpost: 15913 case AArch64::LDRSWpre: 15914 case AArch64::LDRSpost: 15915 case AArch64::LDRSpre: 15916 case AArch64::LDRWpost: 15917 case AArch64::LDRWpre: 15918 case AArch64::LDRXpost: 15919 case AArch64::LDRXpre: 15920 case AArch64::STRBBpost: 15921 case AArch64::STRBBpre: 15922 case AArch64::STRBpost: 15923 case AArch64::STRBpre: 15924 case AArch64::STRDpost: 15925 case AArch64::STRDpre: 15926 case AArch64::STRHHpost: 15927 case AArch64::STRHHpre: 15928 case AArch64::STRHpost: 15929 case AArch64::STRHpre: 15930 case AArch64::STRQpost: 15931 case AArch64::STRQpre: 15932 case AArch64::STRSpost: 15933 case AArch64::STRSpre: 15934 case AArch64::STRWpost: 15935 case AArch64::STRWpre: 15936 case AArch64::STRXpost: 15937 case AArch64::STRXpre: { 15938 // op: Rt 15939 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15940 op &= UINT64_C(31); 15941 Value |= op; 15942 // op: Rn 15943 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15944 op &= UINT64_C(31); 15945 op <<= 5; 15946 Value |= op; 15947 // op: offset 15948 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15949 op &= UINT64_C(511); 15950 op <<= 12; 15951 Value |= op; 15952 break; 15953 } 15954 case AArch64::LDIAPPWpre: 15955 case AArch64::LDIAPPXpre: 15956 case AArch64::STILPWpre: 15957 case AArch64::STILPXpre: { 15958 // op: Rt 15959 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 15960 op &= UINT64_C(31); 15961 Value |= op; 15962 // op: Rn 15963 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 15964 op &= UINT64_C(31); 15965 op <<= 5; 15966 Value |= op; 15967 // op: Rt2 15968 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 15969 op &= UINT64_C(31); 15970 op <<= 16; 15971 Value |= op; 15972 break; 15973 } 15974 case AArch64::LDPDpost: 15975 case AArch64::LDPDpre: 15976 case AArch64::LDPQpost: 15977 case AArch64::LDPQpre: 15978 case AArch64::LDPSWpost: 15979 case AArch64::LDPSWpre: 15980 case AArch64::LDPSpost: 15981 case AArch64::LDPSpre: 15982 case AArch64::LDPWpost: 15983 case AArch64::LDPWpre: 15984 case AArch64::LDPXpost: 15985 case AArch64::LDPXpre: 15986 case AArch64::STGPpost: 15987 case AArch64::STGPpre: 15988 case AArch64::STPDpost: 15989 case AArch64::STPDpre: 15990 case AArch64::STPQpost: 15991 case AArch64::STPQpre: 15992 case AArch64::STPSpost: 15993 case AArch64::STPSpre: 15994 case AArch64::STPWpost: 15995 case AArch64::STPWpre: 15996 case AArch64::STPXpost: 15997 case AArch64::STPXpre: { 15998 // op: Rt 15999 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16000 op &= UINT64_C(31); 16001 Value |= op; 16002 // op: Rt2 16003 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16004 op &= UINT64_C(31); 16005 op <<= 10; 16006 Value |= op; 16007 // op: Rn 16008 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16009 op &= UINT64_C(31); 16010 op <<= 5; 16011 Value |= op; 16012 // op: offset 16013 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16014 op &= UINT64_C(127); 16015 op <<= 15; 16016 Value |= op; 16017 break; 16018 } 16019 case AArch64::MSR: 16020 case AArch64::MSRR: { 16021 // op: Rt 16022 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16023 op &= UINT64_C(31); 16024 Value |= op; 16025 // op: systemreg 16026 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16027 op &= UINT64_C(65535); 16028 op <<= 5; 16029 Value |= op; 16030 break; 16031 } 16032 case AArch64::LDCLRP: 16033 case AArch64::LDCLRPA: 16034 case AArch64::LDCLRPAL: 16035 case AArch64::LDCLRPL: 16036 case AArch64::LDSETP: 16037 case AArch64::LDSETPA: 16038 case AArch64::LDSETPAL: 16039 case AArch64::LDSETPL: 16040 case AArch64::SWPP: 16041 case AArch64::SWPPA: 16042 case AArch64::SWPPAL: 16043 case AArch64::SWPPL: { 16044 // op: Rt 16045 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16046 op &= UINT64_C(31); 16047 Value |= op; 16048 // op: Rt2 16049 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16050 op &= UINT64_C(31); 16051 op <<= 16; 16052 Value |= op; 16053 // op: Rn 16054 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16055 op &= UINT64_C(31); 16056 op <<= 5; 16057 Value |= op; 16058 break; 16059 } 16060 case AArch64::SYSPxt: 16061 case AArch64::SYSxt: { 16062 // op: Rt 16063 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16064 op &= UINT64_C(31); 16065 Value |= op; 16066 // op: op1 16067 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16068 op &= UINT64_C(7); 16069 op <<= 16; 16070 Value |= op; 16071 // op: Cn 16072 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16073 op &= UINT64_C(15); 16074 op <<= 12; 16075 Value |= op; 16076 // op: Cm 16077 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16078 op &= UINT64_C(15); 16079 op <<= 8; 16080 Value |= op; 16081 // op: op2 16082 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16083 op &= UINT64_C(7); 16084 op <<= 5; 16085 Value |= op; 16086 break; 16087 } 16088 case AArch64::RCWCLRP: 16089 case AArch64::RCWCLRPA: 16090 case AArch64::RCWCLRPAL: 16091 case AArch64::RCWCLRPL: 16092 case AArch64::RCWCLRSP: 16093 case AArch64::RCWCLRSPA: 16094 case AArch64::RCWCLRSPAL: 16095 case AArch64::RCWCLRSPL: 16096 case AArch64::RCWSETP: 16097 case AArch64::RCWSETPA: 16098 case AArch64::RCWSETPAL: 16099 case AArch64::RCWSETPL: 16100 case AArch64::RCWSETSP: 16101 case AArch64::RCWSETSPA: 16102 case AArch64::RCWSETSPAL: 16103 case AArch64::RCWSETSPL: 16104 case AArch64::RCWSWPP: 16105 case AArch64::RCWSWPPA: 16106 case AArch64::RCWSWPPAL: 16107 case AArch64::RCWSWPPL: 16108 case AArch64::RCWSWPSP: 16109 case AArch64::RCWSWPSPA: 16110 case AArch64::RCWSWPSPAL: 16111 case AArch64::RCWSWPSPL: { 16112 // op: Rt2 16113 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16114 op &= UINT64_C(31); 16115 op <<= 16; 16116 Value |= op; 16117 // op: Rn 16118 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16119 op &= UINT64_C(31); 16120 op <<= 5; 16121 Value |= op; 16122 // op: Rt 16123 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16124 op &= UINT64_C(31); 16125 Value |= op; 16126 break; 16127 } 16128 case AArch64::LDR_ZA: 16129 case AArch64::STR_ZA: { 16130 // op: Rv 16131 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 1, Fixups, STI); 16132 op &= UINT64_C(3); 16133 op <<= 13; 16134 Value |= op; 16135 // op: Rn 16136 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16137 op &= UINT64_C(31); 16138 op <<= 5; 16139 Value |= op; 16140 // op: imm4 16141 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16142 op &= UINT64_C(15); 16143 Value |= op; 16144 break; 16145 } 16146 case AArch64::INSERT_MXIPZ_H_H: 16147 case AArch64::INSERT_MXIPZ_V_H: { 16148 // op: Rv 16149 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 16150 op &= UINT64_C(3); 16151 op <<= 13; 16152 Value |= op; 16153 // op: Pg 16154 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16155 op &= UINT64_C(7); 16156 op <<= 10; 16157 Value |= op; 16158 // op: Zn 16159 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16160 op &= UINT64_C(31); 16161 op <<= 5; 16162 Value |= op; 16163 // op: ZAd 16164 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16165 op &= UINT64_C(1); 16166 op <<= 3; 16167 Value |= op; 16168 // op: imm 16169 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16170 op &= UINT64_C(7); 16171 Value |= op; 16172 break; 16173 } 16174 case AArch64::INSERT_MXIPZ_H_Q: 16175 case AArch64::INSERT_MXIPZ_V_Q: { 16176 // op: Rv 16177 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 16178 op &= UINT64_C(3); 16179 op <<= 13; 16180 Value |= op; 16181 // op: Pg 16182 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16183 op &= UINT64_C(7); 16184 op <<= 10; 16185 Value |= op; 16186 // op: Zn 16187 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16188 op &= UINT64_C(31); 16189 op <<= 5; 16190 Value |= op; 16191 // op: ZAd 16192 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16193 op &= UINT64_C(15); 16194 Value |= op; 16195 break; 16196 } 16197 case AArch64::INSERT_MXIPZ_H_S: 16198 case AArch64::INSERT_MXIPZ_V_S: { 16199 // op: Rv 16200 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 16201 op &= UINT64_C(3); 16202 op <<= 13; 16203 Value |= op; 16204 // op: Pg 16205 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16206 op &= UINT64_C(7); 16207 op <<= 10; 16208 Value |= op; 16209 // op: Zn 16210 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16211 op &= UINT64_C(31); 16212 op <<= 5; 16213 Value |= op; 16214 // op: ZAd 16215 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16216 op &= UINT64_C(3); 16217 op <<= 2; 16218 Value |= op; 16219 // op: imm 16220 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16221 op &= UINT64_C(3); 16222 Value |= op; 16223 break; 16224 } 16225 case AArch64::INSERT_MXIPZ_H_D: 16226 case AArch64::INSERT_MXIPZ_V_D: { 16227 // op: Rv 16228 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 16229 op &= UINT64_C(3); 16230 op <<= 13; 16231 Value |= op; 16232 // op: Pg 16233 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16234 op &= UINT64_C(7); 16235 op <<= 10; 16236 Value |= op; 16237 // op: Zn 16238 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16239 op &= UINT64_C(31); 16240 op <<= 5; 16241 Value |= op; 16242 // op: ZAd 16243 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16244 op &= UINT64_C(7); 16245 op <<= 1; 16246 Value |= op; 16247 // op: imm 16248 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16249 op &= UINT64_C(1); 16250 Value |= op; 16251 break; 16252 } 16253 case AArch64::INSERT_MXIPZ_H_B: 16254 case AArch64::INSERT_MXIPZ_V_B: { 16255 // op: Rv 16256 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 16257 op &= UINT64_C(3); 16258 op <<= 13; 16259 Value |= op; 16260 // op: Pg 16261 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16262 op &= UINT64_C(7); 16263 op <<= 10; 16264 Value |= op; 16265 // op: Zn 16266 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16267 op &= UINT64_C(31); 16268 op <<= 5; 16269 Value |= op; 16270 // op: imm 16271 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16272 op &= UINT64_C(15); 16273 Value |= op; 16274 break; 16275 } 16276 case AArch64::PSEL_PPPRI_B: { 16277 // op: Rv 16278 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 16279 op &= UINT64_C(3); 16280 op <<= 16; 16281 Value |= op; 16282 // op: Pn 16283 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16284 op &= UINT64_C(15); 16285 op <<= 10; 16286 Value |= op; 16287 // op: Pm 16288 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16289 op &= UINT64_C(15); 16290 op <<= 5; 16291 Value |= op; 16292 // op: Pd 16293 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16294 op &= UINT64_C(15); 16295 Value |= op; 16296 // op: imm 16297 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16298 Value |= (op & UINT64_C(12)) << 20; 16299 Value |= (op & UINT64_C(3)) << 19; 16300 break; 16301 } 16302 case AArch64::PSEL_PPPRI_H: { 16303 // op: Rv 16304 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 16305 op &= UINT64_C(3); 16306 op <<= 16; 16307 Value |= op; 16308 // op: Pn 16309 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16310 op &= UINT64_C(15); 16311 op <<= 10; 16312 Value |= op; 16313 // op: Pm 16314 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16315 op &= UINT64_C(15); 16316 op <<= 5; 16317 Value |= op; 16318 // op: Pd 16319 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16320 op &= UINT64_C(15); 16321 Value |= op; 16322 // op: imm 16323 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16324 Value |= (op & UINT64_C(6)) << 21; 16325 Value |= (op & UINT64_C(1)) << 20; 16326 break; 16327 } 16328 case AArch64::PSEL_PPPRI_D: { 16329 // op: Rv 16330 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 16331 op &= UINT64_C(3); 16332 op <<= 16; 16333 Value |= op; 16334 // op: Pn 16335 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16336 op &= UINT64_C(15); 16337 op <<= 10; 16338 Value |= op; 16339 // op: Pm 16340 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16341 op &= UINT64_C(15); 16342 op <<= 5; 16343 Value |= op; 16344 // op: Pd 16345 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16346 op &= UINT64_C(15); 16347 Value |= op; 16348 // op: imm 16349 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16350 op &= UINT64_C(1); 16351 op <<= 23; 16352 Value |= op; 16353 break; 16354 } 16355 case AArch64::PSEL_PPPRI_S: { 16356 // op: Rv 16357 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 16358 op &= UINT64_C(3); 16359 op <<= 16; 16360 Value |= op; 16361 // op: Pn 16362 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16363 op &= UINT64_C(15); 16364 op <<= 10; 16365 Value |= op; 16366 // op: Pm 16367 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16368 op &= UINT64_C(15); 16369 op <<= 5; 16370 Value |= op; 16371 // op: Pd 16372 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16373 op &= UINT64_C(15); 16374 Value |= op; 16375 // op: imm 16376 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16377 op &= UINT64_C(3); 16378 op <<= 22; 16379 Value |= op; 16380 break; 16381 } 16382 case AArch64::EXTRACT_ZPMXI_H_H: 16383 case AArch64::EXTRACT_ZPMXI_V_H: { 16384 // op: Rv 16385 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 4, Fixups, STI); 16386 op &= UINT64_C(3); 16387 op <<= 13; 16388 Value |= op; 16389 // op: Pg 16390 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16391 op &= UINT64_C(7); 16392 op <<= 10; 16393 Value |= op; 16394 // op: Zd 16395 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16396 op &= UINT64_C(31); 16397 Value |= op; 16398 // op: ZAn 16399 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16400 op &= UINT64_C(1); 16401 op <<= 8; 16402 Value |= op; 16403 // op: imm 16404 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16405 op &= UINT64_C(7); 16406 op <<= 5; 16407 Value |= op; 16408 break; 16409 } 16410 case AArch64::EXTRACT_ZPMXI_H_Q: 16411 case AArch64::EXTRACT_ZPMXI_V_Q: { 16412 // op: Rv 16413 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 4, Fixups, STI); 16414 op &= UINT64_C(3); 16415 op <<= 13; 16416 Value |= op; 16417 // op: Pg 16418 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16419 op &= UINT64_C(7); 16420 op <<= 10; 16421 Value |= op; 16422 // op: Zd 16423 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16424 op &= UINT64_C(31); 16425 Value |= op; 16426 // op: ZAn 16427 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16428 op &= UINT64_C(15); 16429 op <<= 5; 16430 Value |= op; 16431 break; 16432 } 16433 case AArch64::EXTRACT_ZPMXI_H_S: 16434 case AArch64::EXTRACT_ZPMXI_V_S: { 16435 // op: Rv 16436 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 4, Fixups, STI); 16437 op &= UINT64_C(3); 16438 op <<= 13; 16439 Value |= op; 16440 // op: Pg 16441 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16442 op &= UINT64_C(7); 16443 op <<= 10; 16444 Value |= op; 16445 // op: Zd 16446 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16447 op &= UINT64_C(31); 16448 Value |= op; 16449 // op: ZAn 16450 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16451 op &= UINT64_C(3); 16452 op <<= 7; 16453 Value |= op; 16454 // op: imm 16455 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16456 op &= UINT64_C(3); 16457 op <<= 5; 16458 Value |= op; 16459 break; 16460 } 16461 case AArch64::EXTRACT_ZPMXI_H_D: 16462 case AArch64::EXTRACT_ZPMXI_V_D: { 16463 // op: Rv 16464 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 4, Fixups, STI); 16465 op &= UINT64_C(3); 16466 op <<= 13; 16467 Value |= op; 16468 // op: Pg 16469 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16470 op &= UINT64_C(7); 16471 op <<= 10; 16472 Value |= op; 16473 // op: Zd 16474 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16475 op &= UINT64_C(31); 16476 Value |= op; 16477 // op: ZAn 16478 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16479 op &= UINT64_C(7); 16480 op <<= 6; 16481 Value |= op; 16482 // op: imm 16483 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16484 op &= UINT64_C(1); 16485 op <<= 5; 16486 Value |= op; 16487 break; 16488 } 16489 case AArch64::EXTRACT_ZPMXI_H_B: 16490 case AArch64::EXTRACT_ZPMXI_V_B: { 16491 // op: Rv 16492 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 4, Fixups, STI); 16493 op &= UINT64_C(3); 16494 op <<= 13; 16495 Value |= op; 16496 // op: Pg 16497 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16498 op &= UINT64_C(7); 16499 op <<= 10; 16500 Value |= op; 16501 // op: Zd 16502 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16503 op &= UINT64_C(31); 16504 Value |= op; 16505 // op: imm 16506 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16507 op &= UINT64_C(15); 16508 op <<= 5; 16509 Value |= op; 16510 break; 16511 } 16512 case AArch64::BFMLAL_VG2_M2Z2Z_S: 16513 case AArch64::BFMLSL_VG2_M2Z2Z_S: 16514 case AArch64::FMLAL_VG2_M2Z2Z_S: 16515 case AArch64::FMLSL_VG2_M2Z2Z_S: 16516 case AArch64::SMLAL_VG2_M2Z2Z_S: 16517 case AArch64::SMLSL_VG2_M2Z2Z_S: 16518 case AArch64::UMLAL_VG2_M2Z2Z_S: 16519 case AArch64::UMLSL_VG2_M2Z2Z_S: { 16520 // op: Rv 16521 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16522 op &= UINT64_C(3); 16523 op <<= 13; 16524 Value |= op; 16525 // op: Zm 16526 op = EncodeRegAsMultipleOf<2>(MI, 5, Fixups, STI); 16527 op &= UINT64_C(15); 16528 op <<= 17; 16529 Value |= op; 16530 // op: Zn 16531 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 16532 op &= UINT64_C(15); 16533 op <<= 6; 16534 Value |= op; 16535 // op: imm 16536 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16537 op &= UINT64_C(3); 16538 Value |= op; 16539 break; 16540 } 16541 case AArch64::BFMLAL_VG4_M4Z4Z_S: 16542 case AArch64::BFMLSL_VG4_M4Z4Z_S: 16543 case AArch64::FMLAL_VG4_M4Z4Z_S: 16544 case AArch64::FMLSL_VG4_M4Z4Z_S: 16545 case AArch64::SMLAL_VG4_M4Z4Z_S: 16546 case AArch64::SMLSL_VG4_M4Z4Z_S: 16547 case AArch64::UMLAL_VG4_M4Z4Z_S: 16548 case AArch64::UMLSL_VG4_M4Z4Z_S: { 16549 // op: Rv 16550 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16551 op &= UINT64_C(3); 16552 op <<= 13; 16553 Value |= op; 16554 // op: Zm 16555 op = EncodeRegAsMultipleOf<4>(MI, 5, Fixups, STI); 16556 op &= UINT64_C(7); 16557 op <<= 18; 16558 Value |= op; 16559 // op: Zn 16560 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 16561 op &= UINT64_C(7); 16562 op <<= 7; 16563 Value |= op; 16564 // op: imm 16565 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16566 op &= UINT64_C(3); 16567 Value |= op; 16568 break; 16569 } 16570 case AArch64::BFMLAL_VG2_M2ZZ_S: 16571 case AArch64::BFMLAL_VG4_M4ZZ_S: 16572 case AArch64::BFMLSL_VG2_M2ZZ_S: 16573 case AArch64::BFMLSL_VG4_M4ZZ_S: 16574 case AArch64::FMLAL_VG2_M2ZZ_S: 16575 case AArch64::FMLAL_VG4_M4ZZ_S: 16576 case AArch64::FMLSL_VG2_M2ZZ_S: 16577 case AArch64::FMLSL_VG4_M4ZZ_S: 16578 case AArch64::SMLAL_VG2_M2ZZ_S: 16579 case AArch64::SMLAL_VG4_M4ZZ_S: 16580 case AArch64::SMLSL_VG2_M2ZZ_S: 16581 case AArch64::SMLSL_VG4_M4ZZ_S: 16582 case AArch64::UMLAL_VG2_M2ZZ_S: 16583 case AArch64::UMLAL_VG4_M4ZZ_S: 16584 case AArch64::UMLSL_VG2_M2ZZ_S: 16585 case AArch64::UMLSL_VG4_M4ZZ_S: { 16586 // op: Rv 16587 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16588 op &= UINT64_C(3); 16589 op <<= 13; 16590 Value |= op; 16591 // op: Zm 16592 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16593 op &= UINT64_C(15); 16594 op <<= 16; 16595 Value |= op; 16596 // op: Zn 16597 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16598 op &= UINT64_C(31); 16599 op <<= 5; 16600 Value |= op; 16601 // op: imm 16602 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16603 op &= UINT64_C(3); 16604 Value |= op; 16605 break; 16606 } 16607 case AArch64::BFMLAL_MZZ_S: 16608 case AArch64::BFMLSL_MZZ_S: 16609 case AArch64::FMLAL_MZZ_S: 16610 case AArch64::FMLSL_MZZ_S: 16611 case AArch64::SMLAL_MZZ_S: 16612 case AArch64::SMLSL_MZZ_S: 16613 case AArch64::UMLAL_MZZ_S: 16614 case AArch64::UMLSL_MZZ_S: { 16615 // op: Rv 16616 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16617 op &= UINT64_C(3); 16618 op <<= 13; 16619 Value |= op; 16620 // op: Zm 16621 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 16622 op &= UINT64_C(15); 16623 op <<= 16; 16624 Value |= op; 16625 // op: Zn 16626 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16627 op &= UINT64_C(31); 16628 op <<= 5; 16629 Value |= op; 16630 // op: imm 16631 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16632 op &= UINT64_C(7); 16633 Value |= op; 16634 break; 16635 } 16636 case AArch64::ZERO_MXI_VG2_4Z: 16637 case AArch64::ZERO_MXI_VG4_4Z: { 16638 // op: Rv 16639 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16640 op &= UINT64_C(3); 16641 op <<= 13; 16642 Value |= op; 16643 // op: imm 16644 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16645 op &= UINT64_C(1); 16646 Value |= op; 16647 break; 16648 } 16649 case AArch64::ZERO_MXI_4Z: 16650 case AArch64::ZERO_MXI_VG2_2Z: 16651 case AArch64::ZERO_MXI_VG4_2Z: { 16652 // op: Rv 16653 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16654 op &= UINT64_C(3); 16655 op <<= 13; 16656 Value |= op; 16657 // op: imm 16658 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16659 op &= UINT64_C(3); 16660 Value |= op; 16661 break; 16662 } 16663 case AArch64::ZERO_MXI_2Z: 16664 case AArch64::ZERO_MXI_VG2_Z: 16665 case AArch64::ZERO_MXI_VG4_Z: { 16666 // op: Rv 16667 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16668 op &= UINT64_C(3); 16669 op <<= 13; 16670 Value |= op; 16671 // op: imm 16672 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16673 op &= UINT64_C(7); 16674 Value |= op; 16675 break; 16676 } 16677 case AArch64::ADD_VG2_M2Z_D: 16678 case AArch64::ADD_VG2_M2Z_S: 16679 case AArch64::BFADD_VG2_M2Z_H: 16680 case AArch64::BFSUB_VG2_M2Z_H: 16681 case AArch64::FADD_VG2_M2Z_D: 16682 case AArch64::FADD_VG2_M2Z_H: 16683 case AArch64::FADD_VG2_M2Z_S: 16684 case AArch64::FSUB_VG2_M2Z_D: 16685 case AArch64::FSUB_VG2_M2Z_H: 16686 case AArch64::FSUB_VG2_M2Z_S: 16687 case AArch64::SUB_VG2_M2Z_D: 16688 case AArch64::SUB_VG2_M2Z_S: { 16689 // op: Rv 16690 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16691 op &= UINT64_C(3); 16692 op <<= 13; 16693 Value |= op; 16694 // op: imm3 16695 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16696 op &= UINT64_C(7); 16697 Value |= op; 16698 // op: Zm 16699 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 16700 op &= UINT64_C(15); 16701 op <<= 6; 16702 Value |= op; 16703 break; 16704 } 16705 case AArch64::ADD_VG4_M4Z_D: 16706 case AArch64::ADD_VG4_M4Z_S: 16707 case AArch64::BFADD_VG4_M4Z_H: 16708 case AArch64::BFSUB_VG4_M4Z_H: 16709 case AArch64::FADD_VG4_M4Z_D: 16710 case AArch64::FADD_VG4_M4Z_H: 16711 case AArch64::FADD_VG4_M4Z_S: 16712 case AArch64::FSUB_VG4_M4Z_D: 16713 case AArch64::FSUB_VG4_M4Z_H: 16714 case AArch64::FSUB_VG4_M4Z_S: 16715 case AArch64::SUB_VG4_M4Z_D: 16716 case AArch64::SUB_VG4_M4Z_S: { 16717 // op: Rv 16718 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 16719 op &= UINT64_C(3); 16720 op <<= 13; 16721 Value |= op; 16722 // op: imm3 16723 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16724 op &= UINT64_C(7); 16725 Value |= op; 16726 // op: Zm 16727 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 16728 op &= UINT64_C(7); 16729 op <<= 7; 16730 Value |= op; 16731 break; 16732 } 16733 case AArch64::RAX1: 16734 case AArch64::SM4ENCKEY: 16735 case AArch64::TBLv16i8Four: 16736 case AArch64::TBLv16i8One: 16737 case AArch64::TBLv16i8Three: 16738 case AArch64::TBLv16i8Two: 16739 case AArch64::TBLv8i8Four: 16740 case AArch64::TBLv8i8One: 16741 case AArch64::TBLv8i8Three: 16742 case AArch64::TBLv8i8Two: { 16743 // op: Vd 16744 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16745 op &= UINT64_C(31); 16746 Value |= op; 16747 // op: Vn 16748 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16749 op &= UINT64_C(31); 16750 op <<= 5; 16751 Value |= op; 16752 // op: Vm 16753 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16754 op &= UINT64_C(31); 16755 op <<= 16; 16756 Value |= op; 16757 break; 16758 } 16759 case AArch64::BCAX: 16760 case AArch64::EOR3: 16761 case AArch64::SM3SS1: { 16762 // op: Vd 16763 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16764 op &= UINT64_C(31); 16765 Value |= op; 16766 // op: Vn 16767 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16768 op &= UINT64_C(31); 16769 op <<= 5; 16770 Value |= op; 16771 // op: Vm 16772 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16773 op &= UINT64_C(31); 16774 op <<= 16; 16775 Value |= op; 16776 // op: Va 16777 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16778 op &= UINT64_C(31); 16779 op <<= 10; 16780 Value |= op; 16781 break; 16782 } 16783 case AArch64::XAR: { 16784 // op: Vd 16785 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16786 op &= UINT64_C(31); 16787 Value |= op; 16788 // op: Vn 16789 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16790 op &= UINT64_C(31); 16791 op <<= 5; 16792 Value |= op; 16793 // op: imm 16794 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16795 op &= UINT64_C(63); 16796 op <<= 10; 16797 Value |= op; 16798 // op: Vm 16799 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16800 op &= UINT64_C(31); 16801 op <<= 16; 16802 Value |= op; 16803 break; 16804 } 16805 case AArch64::ADDQV_VPZ_B: 16806 case AArch64::ADDQV_VPZ_D: 16807 case AArch64::ADDQV_VPZ_H: 16808 case AArch64::ADDQV_VPZ_S: 16809 case AArch64::ANDQV_VPZ_B: 16810 case AArch64::ANDQV_VPZ_D: 16811 case AArch64::ANDQV_VPZ_H: 16812 case AArch64::ANDQV_VPZ_S: 16813 case AArch64::EORQV_VPZ_B: 16814 case AArch64::EORQV_VPZ_D: 16815 case AArch64::EORQV_VPZ_H: 16816 case AArch64::EORQV_VPZ_S: 16817 case AArch64::FADDQV_D: 16818 case AArch64::FADDQV_H: 16819 case AArch64::FADDQV_S: 16820 case AArch64::FMAXNMQV_D: 16821 case AArch64::FMAXNMQV_H: 16822 case AArch64::FMAXNMQV_S: 16823 case AArch64::FMAXQV_D: 16824 case AArch64::FMAXQV_H: 16825 case AArch64::FMAXQV_S: 16826 case AArch64::FMINNMQV_D: 16827 case AArch64::FMINNMQV_H: 16828 case AArch64::FMINNMQV_S: 16829 case AArch64::FMINQV_D: 16830 case AArch64::FMINQV_H: 16831 case AArch64::FMINQV_S: 16832 case AArch64::ORQV_VPZ_B: 16833 case AArch64::ORQV_VPZ_D: 16834 case AArch64::ORQV_VPZ_H: 16835 case AArch64::ORQV_VPZ_S: 16836 case AArch64::SMAXQV_VPZ_B: 16837 case AArch64::SMAXQV_VPZ_D: 16838 case AArch64::SMAXQV_VPZ_H: 16839 case AArch64::SMAXQV_VPZ_S: 16840 case AArch64::SMINQV_VPZ_B: 16841 case AArch64::SMINQV_VPZ_D: 16842 case AArch64::SMINQV_VPZ_H: 16843 case AArch64::SMINQV_VPZ_S: 16844 case AArch64::UMAXQV_VPZ_B: 16845 case AArch64::UMAXQV_VPZ_D: 16846 case AArch64::UMAXQV_VPZ_H: 16847 case AArch64::UMAXQV_VPZ_S: 16848 case AArch64::UMINQV_VPZ_B: 16849 case AArch64::UMINQV_VPZ_D: 16850 case AArch64::UMINQV_VPZ_H: 16851 case AArch64::UMINQV_VPZ_S: { 16852 // op: Vd 16853 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16854 op &= UINT64_C(31); 16855 Value |= op; 16856 // op: Zn 16857 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16858 op &= UINT64_C(31); 16859 op <<= 5; 16860 Value |= op; 16861 // op: Pg 16862 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16863 op &= UINT64_C(7); 16864 op <<= 10; 16865 Value |= op; 16866 break; 16867 } 16868 case AArch64::SHA512SU0: 16869 case AArch64::SM4E: { 16870 // op: Vd 16871 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16872 op &= UINT64_C(31); 16873 Value |= op; 16874 // op: Vn 16875 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16876 op &= UINT64_C(31); 16877 op <<= 5; 16878 Value |= op; 16879 break; 16880 } 16881 case AArch64::SHA512H: 16882 case AArch64::SHA512H2: 16883 case AArch64::SHA512SU1: 16884 case AArch64::SM3PARTW1: 16885 case AArch64::SM3PARTW2: 16886 case AArch64::TBXv16i8Four: 16887 case AArch64::TBXv16i8One: 16888 case AArch64::TBXv16i8Three: 16889 case AArch64::TBXv16i8Two: 16890 case AArch64::TBXv8i8Four: 16891 case AArch64::TBXv8i8One: 16892 case AArch64::TBXv8i8Three: 16893 case AArch64::TBXv8i8Two: { 16894 // op: Vd 16895 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16896 op &= UINT64_C(31); 16897 Value |= op; 16898 // op: Vn 16899 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16900 op &= UINT64_C(31); 16901 op <<= 5; 16902 Value |= op; 16903 // op: Vm 16904 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16905 op &= UINT64_C(31); 16906 op <<= 16; 16907 Value |= op; 16908 break; 16909 } 16910 case AArch64::SM3TT1A: 16911 case AArch64::SM3TT1B: 16912 case AArch64::SM3TT2A: 16913 case AArch64::SM3TT2B: { 16914 // op: Vd 16915 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 16916 op &= UINT64_C(31); 16917 Value |= op; 16918 // op: Vn 16919 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16920 op &= UINT64_C(31); 16921 op <<= 5; 16922 Value |= op; 16923 // op: imm 16924 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 16925 op &= UINT64_C(3); 16926 op <<= 12; 16927 Value |= op; 16928 // op: Vm 16929 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 16930 op &= UINT64_C(31); 16931 op <<= 16; 16932 Value |= op; 16933 break; 16934 } 16935 case AArch64::INSR_ZV_B: 16936 case AArch64::INSR_ZV_D: 16937 case AArch64::INSR_ZV_H: 16938 case AArch64::INSR_ZV_S: { 16939 // op: Vm 16940 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 16941 op &= UINT64_C(31); 16942 op <<= 5; 16943 Value |= op; 16944 // op: Zdn 16945 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 16946 op &= UINT64_C(31); 16947 Value |= op; 16948 break; 16949 } 16950 case AArch64::LD1Fourv16b: 16951 case AArch64::LD1Fourv1d: 16952 case AArch64::LD1Fourv2d: 16953 case AArch64::LD1Fourv2s: 16954 case AArch64::LD1Fourv4h: 16955 case AArch64::LD1Fourv4s: 16956 case AArch64::LD1Fourv8b: 16957 case AArch64::LD1Fourv8h: 16958 case AArch64::LD1Onev16b: 16959 case AArch64::LD1Onev1d: 16960 case AArch64::LD1Onev2d: 16961 case AArch64::LD1Onev2s: 16962 case AArch64::LD1Onev4h: 16963 case AArch64::LD1Onev4s: 16964 case AArch64::LD1Onev8b: 16965 case AArch64::LD1Onev8h: 16966 case AArch64::LD1Rv16b: 16967 case AArch64::LD1Rv1d: 16968 case AArch64::LD1Rv2d: 16969 case AArch64::LD1Rv2s: 16970 case AArch64::LD1Rv4h: 16971 case AArch64::LD1Rv4s: 16972 case AArch64::LD1Rv8b: 16973 case AArch64::LD1Rv8h: 16974 case AArch64::LD1Threev16b: 16975 case AArch64::LD1Threev1d: 16976 case AArch64::LD1Threev2d: 16977 case AArch64::LD1Threev2s: 16978 case AArch64::LD1Threev4h: 16979 case AArch64::LD1Threev4s: 16980 case AArch64::LD1Threev8b: 16981 case AArch64::LD1Threev8h: 16982 case AArch64::LD1Twov16b: 16983 case AArch64::LD1Twov1d: 16984 case AArch64::LD1Twov2d: 16985 case AArch64::LD1Twov2s: 16986 case AArch64::LD1Twov4h: 16987 case AArch64::LD1Twov4s: 16988 case AArch64::LD1Twov8b: 16989 case AArch64::LD1Twov8h: 16990 case AArch64::LD2Rv16b: 16991 case AArch64::LD2Rv1d: 16992 case AArch64::LD2Rv2d: 16993 case AArch64::LD2Rv2s: 16994 case AArch64::LD2Rv4h: 16995 case AArch64::LD2Rv4s: 16996 case AArch64::LD2Rv8b: 16997 case AArch64::LD2Rv8h: 16998 case AArch64::LD2Twov16b: 16999 case AArch64::LD2Twov2d: 17000 case AArch64::LD2Twov2s: 17001 case AArch64::LD2Twov4h: 17002 case AArch64::LD2Twov4s: 17003 case AArch64::LD2Twov8b: 17004 case AArch64::LD2Twov8h: 17005 case AArch64::LD3Rv16b: 17006 case AArch64::LD3Rv1d: 17007 case AArch64::LD3Rv2d: 17008 case AArch64::LD3Rv2s: 17009 case AArch64::LD3Rv4h: 17010 case AArch64::LD3Rv4s: 17011 case AArch64::LD3Rv8b: 17012 case AArch64::LD3Rv8h: 17013 case AArch64::LD3Threev16b: 17014 case AArch64::LD3Threev2d: 17015 case AArch64::LD3Threev2s: 17016 case AArch64::LD3Threev4h: 17017 case AArch64::LD3Threev4s: 17018 case AArch64::LD3Threev8b: 17019 case AArch64::LD3Threev8h: 17020 case AArch64::LD4Fourv16b: 17021 case AArch64::LD4Fourv2d: 17022 case AArch64::LD4Fourv2s: 17023 case AArch64::LD4Fourv4h: 17024 case AArch64::LD4Fourv4s: 17025 case AArch64::LD4Fourv8b: 17026 case AArch64::LD4Fourv8h: 17027 case AArch64::LD4Rv16b: 17028 case AArch64::LD4Rv1d: 17029 case AArch64::LD4Rv2d: 17030 case AArch64::LD4Rv2s: 17031 case AArch64::LD4Rv4h: 17032 case AArch64::LD4Rv4s: 17033 case AArch64::LD4Rv8b: 17034 case AArch64::LD4Rv8h: 17035 case AArch64::ST1Fourv16b: 17036 case AArch64::ST1Fourv1d: 17037 case AArch64::ST1Fourv2d: 17038 case AArch64::ST1Fourv2s: 17039 case AArch64::ST1Fourv4h: 17040 case AArch64::ST1Fourv4s: 17041 case AArch64::ST1Fourv8b: 17042 case AArch64::ST1Fourv8h: 17043 case AArch64::ST1Onev16b: 17044 case AArch64::ST1Onev1d: 17045 case AArch64::ST1Onev2d: 17046 case AArch64::ST1Onev2s: 17047 case AArch64::ST1Onev4h: 17048 case AArch64::ST1Onev4s: 17049 case AArch64::ST1Onev8b: 17050 case AArch64::ST1Onev8h: 17051 case AArch64::ST1Threev16b: 17052 case AArch64::ST1Threev1d: 17053 case AArch64::ST1Threev2d: 17054 case AArch64::ST1Threev2s: 17055 case AArch64::ST1Threev4h: 17056 case AArch64::ST1Threev4s: 17057 case AArch64::ST1Threev8b: 17058 case AArch64::ST1Threev8h: 17059 case AArch64::ST1Twov16b: 17060 case AArch64::ST1Twov1d: 17061 case AArch64::ST1Twov2d: 17062 case AArch64::ST1Twov2s: 17063 case AArch64::ST1Twov4h: 17064 case AArch64::ST1Twov4s: 17065 case AArch64::ST1Twov8b: 17066 case AArch64::ST1Twov8h: 17067 case AArch64::ST2Twov16b: 17068 case AArch64::ST2Twov2d: 17069 case AArch64::ST2Twov2s: 17070 case AArch64::ST2Twov4h: 17071 case AArch64::ST2Twov4s: 17072 case AArch64::ST2Twov8b: 17073 case AArch64::ST2Twov8h: 17074 case AArch64::ST3Threev16b: 17075 case AArch64::ST3Threev2d: 17076 case AArch64::ST3Threev2s: 17077 case AArch64::ST3Threev4h: 17078 case AArch64::ST3Threev4s: 17079 case AArch64::ST3Threev8b: 17080 case AArch64::ST3Threev8h: 17081 case AArch64::ST4Fourv16b: 17082 case AArch64::ST4Fourv2d: 17083 case AArch64::ST4Fourv2s: 17084 case AArch64::ST4Fourv4h: 17085 case AArch64::ST4Fourv4s: 17086 case AArch64::ST4Fourv8b: 17087 case AArch64::ST4Fourv8h: { 17088 // op: Vt 17089 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17090 op &= UINT64_C(31); 17091 Value |= op; 17092 // op: Rn 17093 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17094 op &= UINT64_C(31); 17095 op <<= 5; 17096 Value |= op; 17097 break; 17098 } 17099 case AArch64::STL1: { 17100 // op: Vt 17101 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17102 op &= UINT64_C(31); 17103 Value |= op; 17104 // op: Rn 17105 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17106 op &= UINT64_C(31); 17107 op <<= 5; 17108 Value |= op; 17109 // op: Q 17110 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17111 op &= UINT64_C(1); 17112 op <<= 30; 17113 Value |= op; 17114 break; 17115 } 17116 case AArch64::ST1i32: 17117 case AArch64::ST2i32: 17118 case AArch64::ST3i32: 17119 case AArch64::ST4i32: { 17120 // op: Vt 17121 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17122 op &= UINT64_C(31); 17123 Value |= op; 17124 // op: Rn 17125 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17126 op &= UINT64_C(31); 17127 op <<= 5; 17128 Value |= op; 17129 // op: idx 17130 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17131 Value |= (op & UINT64_C(2)) << 29; 17132 Value |= (op & UINT64_C(1)) << 12; 17133 break; 17134 } 17135 case AArch64::ST1i16: 17136 case AArch64::ST2i16: 17137 case AArch64::ST3i16: 17138 case AArch64::ST4i16: { 17139 // op: Vt 17140 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17141 op &= UINT64_C(31); 17142 Value |= op; 17143 // op: Rn 17144 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17145 op &= UINT64_C(31); 17146 op <<= 5; 17147 Value |= op; 17148 // op: idx 17149 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17150 Value |= (op & UINT64_C(4)) << 28; 17151 Value |= (op & UINT64_C(3)) << 11; 17152 break; 17153 } 17154 case AArch64::ST1i8: 17155 case AArch64::ST2i8: 17156 case AArch64::ST3i8: 17157 case AArch64::ST4i8: { 17158 // op: Vt 17159 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17160 op &= UINT64_C(31); 17161 Value |= op; 17162 // op: Rn 17163 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17164 op &= UINT64_C(31); 17165 op <<= 5; 17166 Value |= op; 17167 // op: idx 17168 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17169 Value |= (op & UINT64_C(8)) << 27; 17170 Value |= (op & UINT64_C(7)) << 10; 17171 break; 17172 } 17173 case AArch64::ST1i64: 17174 case AArch64::ST2i64: 17175 case AArch64::ST3i64: 17176 case AArch64::ST4i64: { 17177 // op: Vt 17178 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17179 op &= UINT64_C(31); 17180 Value |= op; 17181 // op: Rn 17182 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17183 op &= UINT64_C(31); 17184 op <<= 5; 17185 Value |= op; 17186 // op: idx 17187 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17188 op &= UINT64_C(1); 17189 op <<= 30; 17190 Value |= op; 17191 break; 17192 } 17193 case AArch64::LD1Fourv16b_POST: 17194 case AArch64::LD1Fourv1d_POST: 17195 case AArch64::LD1Fourv2d_POST: 17196 case AArch64::LD1Fourv2s_POST: 17197 case AArch64::LD1Fourv4h_POST: 17198 case AArch64::LD1Fourv4s_POST: 17199 case AArch64::LD1Fourv8b_POST: 17200 case AArch64::LD1Fourv8h_POST: 17201 case AArch64::LD1Onev16b_POST: 17202 case AArch64::LD1Onev1d_POST: 17203 case AArch64::LD1Onev2d_POST: 17204 case AArch64::LD1Onev2s_POST: 17205 case AArch64::LD1Onev4h_POST: 17206 case AArch64::LD1Onev4s_POST: 17207 case AArch64::LD1Onev8b_POST: 17208 case AArch64::LD1Onev8h_POST: 17209 case AArch64::LD1Rv16b_POST: 17210 case AArch64::LD1Rv1d_POST: 17211 case AArch64::LD1Rv2d_POST: 17212 case AArch64::LD1Rv2s_POST: 17213 case AArch64::LD1Rv4h_POST: 17214 case AArch64::LD1Rv4s_POST: 17215 case AArch64::LD1Rv8b_POST: 17216 case AArch64::LD1Rv8h_POST: 17217 case AArch64::LD1Threev16b_POST: 17218 case AArch64::LD1Threev1d_POST: 17219 case AArch64::LD1Threev2d_POST: 17220 case AArch64::LD1Threev2s_POST: 17221 case AArch64::LD1Threev4h_POST: 17222 case AArch64::LD1Threev4s_POST: 17223 case AArch64::LD1Threev8b_POST: 17224 case AArch64::LD1Threev8h_POST: 17225 case AArch64::LD1Twov16b_POST: 17226 case AArch64::LD1Twov1d_POST: 17227 case AArch64::LD1Twov2d_POST: 17228 case AArch64::LD1Twov2s_POST: 17229 case AArch64::LD1Twov4h_POST: 17230 case AArch64::LD1Twov4s_POST: 17231 case AArch64::LD1Twov8b_POST: 17232 case AArch64::LD1Twov8h_POST: 17233 case AArch64::LD2Rv16b_POST: 17234 case AArch64::LD2Rv1d_POST: 17235 case AArch64::LD2Rv2d_POST: 17236 case AArch64::LD2Rv2s_POST: 17237 case AArch64::LD2Rv4h_POST: 17238 case AArch64::LD2Rv4s_POST: 17239 case AArch64::LD2Rv8b_POST: 17240 case AArch64::LD2Rv8h_POST: 17241 case AArch64::LD2Twov16b_POST: 17242 case AArch64::LD2Twov2d_POST: 17243 case AArch64::LD2Twov2s_POST: 17244 case AArch64::LD2Twov4h_POST: 17245 case AArch64::LD2Twov4s_POST: 17246 case AArch64::LD2Twov8b_POST: 17247 case AArch64::LD2Twov8h_POST: 17248 case AArch64::LD3Rv16b_POST: 17249 case AArch64::LD3Rv1d_POST: 17250 case AArch64::LD3Rv2d_POST: 17251 case AArch64::LD3Rv2s_POST: 17252 case AArch64::LD3Rv4h_POST: 17253 case AArch64::LD3Rv4s_POST: 17254 case AArch64::LD3Rv8b_POST: 17255 case AArch64::LD3Rv8h_POST: 17256 case AArch64::LD3Threev16b_POST: 17257 case AArch64::LD3Threev2d_POST: 17258 case AArch64::LD3Threev2s_POST: 17259 case AArch64::LD3Threev4h_POST: 17260 case AArch64::LD3Threev4s_POST: 17261 case AArch64::LD3Threev8b_POST: 17262 case AArch64::LD3Threev8h_POST: 17263 case AArch64::LD4Fourv16b_POST: 17264 case AArch64::LD4Fourv2d_POST: 17265 case AArch64::LD4Fourv2s_POST: 17266 case AArch64::LD4Fourv4h_POST: 17267 case AArch64::LD4Fourv4s_POST: 17268 case AArch64::LD4Fourv8b_POST: 17269 case AArch64::LD4Fourv8h_POST: 17270 case AArch64::LD4Rv16b_POST: 17271 case AArch64::LD4Rv1d_POST: 17272 case AArch64::LD4Rv2d_POST: 17273 case AArch64::LD4Rv2s_POST: 17274 case AArch64::LD4Rv4h_POST: 17275 case AArch64::LD4Rv4s_POST: 17276 case AArch64::LD4Rv8b_POST: 17277 case AArch64::LD4Rv8h_POST: 17278 case AArch64::ST1Fourv16b_POST: 17279 case AArch64::ST1Fourv1d_POST: 17280 case AArch64::ST1Fourv2d_POST: 17281 case AArch64::ST1Fourv2s_POST: 17282 case AArch64::ST1Fourv4h_POST: 17283 case AArch64::ST1Fourv4s_POST: 17284 case AArch64::ST1Fourv8b_POST: 17285 case AArch64::ST1Fourv8h_POST: 17286 case AArch64::ST1Onev16b_POST: 17287 case AArch64::ST1Onev1d_POST: 17288 case AArch64::ST1Onev2d_POST: 17289 case AArch64::ST1Onev2s_POST: 17290 case AArch64::ST1Onev4h_POST: 17291 case AArch64::ST1Onev4s_POST: 17292 case AArch64::ST1Onev8b_POST: 17293 case AArch64::ST1Onev8h_POST: 17294 case AArch64::ST1Threev16b_POST: 17295 case AArch64::ST1Threev1d_POST: 17296 case AArch64::ST1Threev2d_POST: 17297 case AArch64::ST1Threev2s_POST: 17298 case AArch64::ST1Threev4h_POST: 17299 case AArch64::ST1Threev4s_POST: 17300 case AArch64::ST1Threev8b_POST: 17301 case AArch64::ST1Threev8h_POST: 17302 case AArch64::ST1Twov16b_POST: 17303 case AArch64::ST1Twov1d_POST: 17304 case AArch64::ST1Twov2d_POST: 17305 case AArch64::ST1Twov2s_POST: 17306 case AArch64::ST1Twov4h_POST: 17307 case AArch64::ST1Twov4s_POST: 17308 case AArch64::ST1Twov8b_POST: 17309 case AArch64::ST1Twov8h_POST: 17310 case AArch64::ST2Twov16b_POST: 17311 case AArch64::ST2Twov2d_POST: 17312 case AArch64::ST2Twov2s_POST: 17313 case AArch64::ST2Twov4h_POST: 17314 case AArch64::ST2Twov4s_POST: 17315 case AArch64::ST2Twov8b_POST: 17316 case AArch64::ST2Twov8h_POST: 17317 case AArch64::ST3Threev16b_POST: 17318 case AArch64::ST3Threev2d_POST: 17319 case AArch64::ST3Threev2s_POST: 17320 case AArch64::ST3Threev4h_POST: 17321 case AArch64::ST3Threev4s_POST: 17322 case AArch64::ST3Threev8b_POST: 17323 case AArch64::ST3Threev8h_POST: 17324 case AArch64::ST4Fourv16b_POST: 17325 case AArch64::ST4Fourv2d_POST: 17326 case AArch64::ST4Fourv2s_POST: 17327 case AArch64::ST4Fourv4h_POST: 17328 case AArch64::ST4Fourv4s_POST: 17329 case AArch64::ST4Fourv8b_POST: 17330 case AArch64::ST4Fourv8h_POST: { 17331 // op: Vt 17332 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17333 op &= UINT64_C(31); 17334 Value |= op; 17335 // op: Rn 17336 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17337 op &= UINT64_C(31); 17338 op <<= 5; 17339 Value |= op; 17340 // op: Xm 17341 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17342 op &= UINT64_C(31); 17343 op <<= 16; 17344 Value |= op; 17345 break; 17346 } 17347 case AArch64::LDAP1: { 17348 // op: Vt 17349 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17350 op &= UINT64_C(31); 17351 Value |= op; 17352 // op: Rn 17353 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17354 op &= UINT64_C(31); 17355 op <<= 5; 17356 Value |= op; 17357 // op: Q 17358 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17359 op &= UINT64_C(1); 17360 op <<= 30; 17361 Value |= op; 17362 break; 17363 } 17364 case AArch64::LD1i32: 17365 case AArch64::LD2i32: 17366 case AArch64::LD3i32: 17367 case AArch64::LD4i32: { 17368 // op: Vt 17369 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17370 op &= UINT64_C(31); 17371 Value |= op; 17372 // op: Rn 17373 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17374 op &= UINT64_C(31); 17375 op <<= 5; 17376 Value |= op; 17377 // op: idx 17378 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17379 Value |= (op & UINT64_C(2)) << 29; 17380 Value |= (op & UINT64_C(1)) << 12; 17381 break; 17382 } 17383 case AArch64::ST1i32_POST: 17384 case AArch64::ST2i32_POST: 17385 case AArch64::ST3i32_POST: 17386 case AArch64::ST4i32_POST: { 17387 // op: Vt 17388 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17389 op &= UINT64_C(31); 17390 Value |= op; 17391 // op: Rn 17392 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17393 op &= UINT64_C(31); 17394 op <<= 5; 17395 Value |= op; 17396 // op: idx 17397 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17398 Value |= (op & UINT64_C(2)) << 29; 17399 Value |= (op & UINT64_C(1)) << 12; 17400 // op: Xm 17401 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17402 op &= UINT64_C(31); 17403 op <<= 16; 17404 Value |= op; 17405 break; 17406 } 17407 case AArch64::LD1i16: 17408 case AArch64::LD2i16: 17409 case AArch64::LD3i16: 17410 case AArch64::LD4i16: { 17411 // op: Vt 17412 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17413 op &= UINT64_C(31); 17414 Value |= op; 17415 // op: Rn 17416 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17417 op &= UINT64_C(31); 17418 op <<= 5; 17419 Value |= op; 17420 // op: idx 17421 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17422 Value |= (op & UINT64_C(4)) << 28; 17423 Value |= (op & UINT64_C(3)) << 11; 17424 break; 17425 } 17426 case AArch64::ST1i16_POST: 17427 case AArch64::ST2i16_POST: 17428 case AArch64::ST3i16_POST: 17429 case AArch64::ST4i16_POST: { 17430 // op: Vt 17431 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17432 op &= UINT64_C(31); 17433 Value |= op; 17434 // op: Rn 17435 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17436 op &= UINT64_C(31); 17437 op <<= 5; 17438 Value |= op; 17439 // op: idx 17440 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17441 Value |= (op & UINT64_C(4)) << 28; 17442 Value |= (op & UINT64_C(3)) << 11; 17443 // op: Xm 17444 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17445 op &= UINT64_C(31); 17446 op <<= 16; 17447 Value |= op; 17448 break; 17449 } 17450 case AArch64::LD1i8: 17451 case AArch64::LD2i8: 17452 case AArch64::LD3i8: 17453 case AArch64::LD4i8: { 17454 // op: Vt 17455 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17456 op &= UINT64_C(31); 17457 Value |= op; 17458 // op: Rn 17459 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17460 op &= UINT64_C(31); 17461 op <<= 5; 17462 Value |= op; 17463 // op: idx 17464 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17465 Value |= (op & UINT64_C(8)) << 27; 17466 Value |= (op & UINT64_C(7)) << 10; 17467 break; 17468 } 17469 case AArch64::ST1i8_POST: 17470 case AArch64::ST2i8_POST: 17471 case AArch64::ST3i8_POST: 17472 case AArch64::ST4i8_POST: { 17473 // op: Vt 17474 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17475 op &= UINT64_C(31); 17476 Value |= op; 17477 // op: Rn 17478 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17479 op &= UINT64_C(31); 17480 op <<= 5; 17481 Value |= op; 17482 // op: idx 17483 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17484 Value |= (op & UINT64_C(8)) << 27; 17485 Value |= (op & UINT64_C(7)) << 10; 17486 // op: Xm 17487 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17488 op &= UINT64_C(31); 17489 op <<= 16; 17490 Value |= op; 17491 break; 17492 } 17493 case AArch64::LD1i64: 17494 case AArch64::LD2i64: 17495 case AArch64::LD3i64: 17496 case AArch64::LD4i64: { 17497 // op: Vt 17498 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17499 op &= UINT64_C(31); 17500 Value |= op; 17501 // op: Rn 17502 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17503 op &= UINT64_C(31); 17504 op <<= 5; 17505 Value |= op; 17506 // op: idx 17507 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17508 op &= UINT64_C(1); 17509 op <<= 30; 17510 Value |= op; 17511 break; 17512 } 17513 case AArch64::ST1i64_POST: 17514 case AArch64::ST2i64_POST: 17515 case AArch64::ST3i64_POST: 17516 case AArch64::ST4i64_POST: { 17517 // op: Vt 17518 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17519 op &= UINT64_C(31); 17520 Value |= op; 17521 // op: Rn 17522 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17523 op &= UINT64_C(31); 17524 op <<= 5; 17525 Value |= op; 17526 // op: idx 17527 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17528 op &= UINT64_C(1); 17529 op <<= 30; 17530 Value |= op; 17531 // op: Xm 17532 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17533 op &= UINT64_C(31); 17534 op <<= 16; 17535 Value |= op; 17536 break; 17537 } 17538 case AArch64::LD1i32_POST: 17539 case AArch64::LD2i32_POST: 17540 case AArch64::LD3i32_POST: 17541 case AArch64::LD4i32_POST: { 17542 // op: Vt 17543 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17544 op &= UINT64_C(31); 17545 Value |= op; 17546 // op: Rn 17547 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17548 op &= UINT64_C(31); 17549 op <<= 5; 17550 Value |= op; 17551 // op: idx 17552 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17553 Value |= (op & UINT64_C(2)) << 29; 17554 Value |= (op & UINT64_C(1)) << 12; 17555 // op: Xm 17556 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 17557 op &= UINT64_C(31); 17558 op <<= 16; 17559 Value |= op; 17560 break; 17561 } 17562 case AArch64::LD1i16_POST: 17563 case AArch64::LD2i16_POST: 17564 case AArch64::LD3i16_POST: 17565 case AArch64::LD4i16_POST: { 17566 // op: Vt 17567 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17568 op &= UINT64_C(31); 17569 Value |= op; 17570 // op: Rn 17571 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17572 op &= UINT64_C(31); 17573 op <<= 5; 17574 Value |= op; 17575 // op: idx 17576 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17577 Value |= (op & UINT64_C(4)) << 28; 17578 Value |= (op & UINT64_C(3)) << 11; 17579 // op: Xm 17580 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 17581 op &= UINT64_C(31); 17582 op <<= 16; 17583 Value |= op; 17584 break; 17585 } 17586 case AArch64::LD1i8_POST: 17587 case AArch64::LD2i8_POST: 17588 case AArch64::LD3i8_POST: 17589 case AArch64::LD4i8_POST: { 17590 // op: Vt 17591 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17592 op &= UINT64_C(31); 17593 Value |= op; 17594 // op: Rn 17595 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17596 op &= UINT64_C(31); 17597 op <<= 5; 17598 Value |= op; 17599 // op: idx 17600 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17601 Value |= (op & UINT64_C(8)) << 27; 17602 Value |= (op & UINT64_C(7)) << 10; 17603 // op: Xm 17604 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 17605 op &= UINT64_C(31); 17606 op <<= 16; 17607 Value |= op; 17608 break; 17609 } 17610 case AArch64::LD1i64_POST: 17611 case AArch64::LD2i64_POST: 17612 case AArch64::LD3i64_POST: 17613 case AArch64::LD4i64_POST: { 17614 // op: Vt 17615 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17616 op &= UINT64_C(31); 17617 Value |= op; 17618 // op: Rn 17619 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17620 op &= UINT64_C(31); 17621 op <<= 5; 17622 Value |= op; 17623 // op: idx 17624 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17625 op &= UINT64_C(1); 17626 op <<= 30; 17627 Value |= op; 17628 // op: Xm 17629 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 17630 op &= UINT64_C(31); 17631 op <<= 16; 17632 Value |= op; 17633 break; 17634 } 17635 case AArch64::STLXRB: 17636 case AArch64::STLXRH: 17637 case AArch64::STLXRW: 17638 case AArch64::STLXRX: 17639 case AArch64::STXRB: 17640 case AArch64::STXRH: 17641 case AArch64::STXRW: 17642 case AArch64::STXRX: { 17643 // op: Ws 17644 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17645 op &= UINT64_C(31); 17646 op <<= 16; 17647 Value |= op; 17648 // op: Rt 17649 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17650 op &= UINT64_C(31); 17651 Value |= op; 17652 // op: Rn 17653 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17654 op &= UINT64_C(31); 17655 op <<= 5; 17656 Value |= op; 17657 Value = fixLoadStoreExclusive<1,0>(MI, Value, STI); 17658 break; 17659 } 17660 case AArch64::STLXPW: 17661 case AArch64::STLXPX: 17662 case AArch64::STXPW: 17663 case AArch64::STXPX: { 17664 // op: Ws 17665 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17666 op &= UINT64_C(31); 17667 op <<= 16; 17668 Value |= op; 17669 // op: Rt 17670 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17671 op &= UINT64_C(31); 17672 Value |= op; 17673 // op: Rt2 17674 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17675 op &= UINT64_C(31); 17676 op <<= 10; 17677 Value |= op; 17678 // op: Rn 17679 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17680 op &= UINT64_C(31); 17681 op <<= 5; 17682 Value |= op; 17683 break; 17684 } 17685 case AArch64::ADR: 17686 case AArch64::ADRP: { 17687 // op: Xd 17688 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 17689 op &= UINT64_C(31); 17690 Value |= op; 17691 // op: label 17692 op = getAdrLabelOpValue(MI, 1, Fixups, STI); 17693 Value |= (op & UINT64_C(3)) << 29; 17694 Value |= (op & UINT64_C(2097148)) << 3; 17695 break; 17696 } 17697 case AArch64::MOVA_2ZMXI_H_H: 17698 case AArch64::MOVA_2ZMXI_V_H: { 17699 // op: Zd 17700 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17701 op &= UINT64_C(15); 17702 op <<= 1; 17703 Value |= op; 17704 // op: Rs 17705 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17706 op &= UINT64_C(3); 17707 op <<= 13; 17708 Value |= op; 17709 // op: ZAn 17710 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17711 op &= UINT64_C(1); 17712 op <<= 7; 17713 Value |= op; 17714 // op: imm 17715 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17716 op &= UINT64_C(3); 17717 op <<= 5; 17718 Value |= op; 17719 break; 17720 } 17721 case AArch64::MOVA_2ZMXI_H_S: 17722 case AArch64::MOVA_2ZMXI_V_S: { 17723 // op: Zd 17724 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17725 op &= UINT64_C(15); 17726 op <<= 1; 17727 Value |= op; 17728 // op: Rs 17729 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17730 op &= UINT64_C(3); 17731 op <<= 13; 17732 Value |= op; 17733 // op: ZAn 17734 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17735 op &= UINT64_C(3); 17736 op <<= 6; 17737 Value |= op; 17738 // op: imm 17739 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17740 op &= UINT64_C(1); 17741 op <<= 5; 17742 Value |= op; 17743 break; 17744 } 17745 case AArch64::MOVA_2ZMXI_H_D: 17746 case AArch64::MOVA_2ZMXI_V_D: { 17747 // op: Zd 17748 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17749 op &= UINT64_C(15); 17750 op <<= 1; 17751 Value |= op; 17752 // op: Rs 17753 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17754 op &= UINT64_C(3); 17755 op <<= 13; 17756 Value |= op; 17757 // op: ZAn 17758 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17759 op &= UINT64_C(7); 17760 op <<= 5; 17761 Value |= op; 17762 break; 17763 } 17764 case AArch64::MOVA_2ZMXI_H_B: 17765 case AArch64::MOVA_2ZMXI_V_B: { 17766 // op: Zd 17767 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17768 op &= UINT64_C(15); 17769 op <<= 1; 17770 Value |= op; 17771 // op: Rs 17772 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17773 op &= UINT64_C(3); 17774 op <<= 13; 17775 Value |= op; 17776 // op: imm 17777 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17778 op &= UINT64_C(7); 17779 op <<= 5; 17780 Value |= op; 17781 break; 17782 } 17783 case AArch64::MOVAZ_2ZMI_H_H: 17784 case AArch64::MOVAZ_2ZMI_V_H: { 17785 // op: Zd 17786 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17787 op &= UINT64_C(15); 17788 op <<= 1; 17789 Value |= op; 17790 // op: Rs 17791 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 17792 op &= UINT64_C(3); 17793 op <<= 13; 17794 Value |= op; 17795 // op: ZAn 17796 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17797 op &= UINT64_C(1); 17798 op <<= 7; 17799 Value |= op; 17800 // op: imm 17801 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17802 op &= UINT64_C(3); 17803 op <<= 5; 17804 Value |= op; 17805 break; 17806 } 17807 case AArch64::MOVAZ_2ZMI_H_S: 17808 case AArch64::MOVAZ_2ZMI_V_S: { 17809 // op: Zd 17810 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17811 op &= UINT64_C(15); 17812 op <<= 1; 17813 Value |= op; 17814 // op: Rs 17815 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 17816 op &= UINT64_C(3); 17817 op <<= 13; 17818 Value |= op; 17819 // op: ZAn 17820 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17821 op &= UINT64_C(3); 17822 op <<= 6; 17823 Value |= op; 17824 // op: imm 17825 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17826 op &= UINT64_C(1); 17827 op <<= 5; 17828 Value |= op; 17829 break; 17830 } 17831 case AArch64::MOVAZ_2ZMI_H_D: 17832 case AArch64::MOVAZ_2ZMI_V_D: { 17833 // op: Zd 17834 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17835 op &= UINT64_C(15); 17836 op <<= 1; 17837 Value |= op; 17838 // op: Rs 17839 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 17840 op &= UINT64_C(3); 17841 op <<= 13; 17842 Value |= op; 17843 // op: ZAn 17844 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17845 op &= UINT64_C(7); 17846 op <<= 5; 17847 Value |= op; 17848 break; 17849 } 17850 case AArch64::MOVAZ_2ZMI_H_B: 17851 case AArch64::MOVAZ_2ZMI_V_B: { 17852 // op: Zd 17853 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17854 op &= UINT64_C(15); 17855 op <<= 1; 17856 Value |= op; 17857 // op: Rs 17858 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 17859 op &= UINT64_C(3); 17860 op <<= 13; 17861 Value |= op; 17862 // op: imm 17863 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17864 op &= UINT64_C(7); 17865 op <<= 5; 17866 Value |= op; 17867 break; 17868 } 17869 case AArch64::UZP_VG2_2ZZZ_B: 17870 case AArch64::UZP_VG2_2ZZZ_D: 17871 case AArch64::UZP_VG2_2ZZZ_H: 17872 case AArch64::UZP_VG2_2ZZZ_Q: 17873 case AArch64::UZP_VG2_2ZZZ_S: 17874 case AArch64::ZIP_VG2_2ZZZ_B: 17875 case AArch64::ZIP_VG2_2ZZZ_D: 17876 case AArch64::ZIP_VG2_2ZZZ_H: 17877 case AArch64::ZIP_VG2_2ZZZ_Q: 17878 case AArch64::ZIP_VG2_2ZZZ_S: { 17879 // op: Zd 17880 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 17881 op &= UINT64_C(15); 17882 op <<= 1; 17883 Value |= op; 17884 // op: Zm 17885 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17886 op &= UINT64_C(31); 17887 op <<= 16; 17888 Value |= op; 17889 // op: Zn 17890 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17891 op &= UINT64_C(31); 17892 op <<= 5; 17893 Value |= op; 17894 break; 17895 } 17896 case AArch64::MOVA_4ZMXI_H_H: 17897 case AArch64::MOVA_4ZMXI_V_H: { 17898 // op: Zd 17899 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 17900 op &= UINT64_C(7); 17901 op <<= 2; 17902 Value |= op; 17903 // op: Rs 17904 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17905 op &= UINT64_C(3); 17906 op <<= 13; 17907 Value |= op; 17908 // op: ZAn 17909 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17910 op &= UINT64_C(1); 17911 op <<= 6; 17912 Value |= op; 17913 // op: imm 17914 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17915 op &= UINT64_C(1); 17916 op <<= 5; 17917 Value |= op; 17918 break; 17919 } 17920 case AArch64::MOVA_4ZMXI_H_S: 17921 case AArch64::MOVA_4ZMXI_V_S: { 17922 // op: Zd 17923 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 17924 op &= UINT64_C(7); 17925 op <<= 2; 17926 Value |= op; 17927 // op: Rs 17928 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17929 op &= UINT64_C(3); 17930 op <<= 13; 17931 Value |= op; 17932 // op: ZAn 17933 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17934 op &= UINT64_C(3); 17935 op <<= 5; 17936 Value |= op; 17937 break; 17938 } 17939 case AArch64::MOVA_4ZMXI_H_D: 17940 case AArch64::MOVA_4ZMXI_V_D: { 17941 // op: Zd 17942 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 17943 op &= UINT64_C(7); 17944 op <<= 2; 17945 Value |= op; 17946 // op: Rs 17947 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17948 op &= UINT64_C(3); 17949 op <<= 13; 17950 Value |= op; 17951 // op: ZAn 17952 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 17953 op &= UINT64_C(7); 17954 op <<= 5; 17955 Value |= op; 17956 break; 17957 } 17958 case AArch64::MOVA_4ZMXI_H_B: 17959 case AArch64::MOVA_4ZMXI_V_B: { 17960 // op: Zd 17961 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 17962 op &= UINT64_C(7); 17963 op <<= 2; 17964 Value |= op; 17965 // op: Rs 17966 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 2, Fixups, STI); 17967 op &= UINT64_C(3); 17968 op <<= 13; 17969 Value |= op; 17970 // op: imm 17971 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 17972 op &= UINT64_C(3); 17973 op <<= 5; 17974 Value |= op; 17975 break; 17976 } 17977 case AArch64::MOVAZ_4ZMI_H_H: 17978 case AArch64::MOVAZ_4ZMI_V_H: { 17979 // op: Zd 17980 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 17981 op &= UINT64_C(7); 17982 op <<= 2; 17983 Value |= op; 17984 // op: Rs 17985 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 17986 op &= UINT64_C(3); 17987 op <<= 13; 17988 Value |= op; 17989 // op: ZAn 17990 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 17991 op &= UINT64_C(1); 17992 op <<= 6; 17993 Value |= op; 17994 // op: imm 17995 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 17996 op &= UINT64_C(1); 17997 op <<= 5; 17998 Value |= op; 17999 break; 18000 } 18001 case AArch64::MOVAZ_4ZMI_H_S: 18002 case AArch64::MOVAZ_4ZMI_V_S: { 18003 // op: Zd 18004 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 18005 op &= UINT64_C(7); 18006 op <<= 2; 18007 Value |= op; 18008 // op: Rs 18009 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 18010 op &= UINT64_C(3); 18011 op <<= 13; 18012 Value |= op; 18013 // op: ZAn 18014 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18015 op &= UINT64_C(3); 18016 op <<= 5; 18017 Value |= op; 18018 break; 18019 } 18020 case AArch64::MOVAZ_4ZMI_H_D: 18021 case AArch64::MOVAZ_4ZMI_V_D: { 18022 // op: Zd 18023 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 18024 op &= UINT64_C(7); 18025 op <<= 2; 18026 Value |= op; 18027 // op: Rs 18028 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 18029 op &= UINT64_C(3); 18030 op <<= 13; 18031 Value |= op; 18032 // op: ZAn 18033 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18034 op &= UINT64_C(7); 18035 op <<= 5; 18036 Value |= op; 18037 break; 18038 } 18039 case AArch64::MOVAZ_4ZMI_H_B: 18040 case AArch64::MOVAZ_4ZMI_V_B: { 18041 // op: Zd 18042 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 18043 op &= UINT64_C(7); 18044 op <<= 2; 18045 Value |= op; 18046 // op: Rs 18047 op = encodeMatrixIndexGPR32<AArch64::W12>(MI, 3, Fixups, STI); 18048 op &= UINT64_C(3); 18049 op <<= 13; 18050 Value |= op; 18051 // op: imm 18052 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 18053 op &= UINT64_C(3); 18054 op <<= 5; 18055 Value |= op; 18056 break; 18057 } 18058 case AArch64::CPY_ZPzI_B: 18059 case AArch64::CPY_ZPzI_D: 18060 case AArch64::CPY_ZPzI_H: 18061 case AArch64::CPY_ZPzI_S: { 18062 // op: Zd 18063 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18064 op &= UINT64_C(31); 18065 Value |= op; 18066 // op: Pg 18067 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18068 op &= UINT64_C(15); 18069 op <<= 16; 18070 Value |= op; 18071 // op: imm 18072 op = getImm8OptLsl(MI, 2, Fixups, STI); 18073 op &= UINT64_C(511); 18074 op <<= 5; 18075 Value |= op; 18076 break; 18077 } 18078 case AArch64::CPY_ZPmI_B: 18079 case AArch64::CPY_ZPmI_D: 18080 case AArch64::CPY_ZPmI_H: 18081 case AArch64::CPY_ZPmI_S: { 18082 // op: Zd 18083 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18084 op &= UINT64_C(31); 18085 Value |= op; 18086 // op: Pg 18087 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18088 op &= UINT64_C(15); 18089 op <<= 16; 18090 Value |= op; 18091 // op: imm 18092 op = getImm8OptLsl(MI, 3, Fixups, STI); 18093 op &= UINT64_C(511); 18094 op <<= 5; 18095 Value |= op; 18096 break; 18097 } 18098 case AArch64::BFCVTNT_ZPmZ: 18099 case AArch64::BFCVT_ZPmZ: 18100 case AArch64::RBIT_ZPmZ_B: 18101 case AArch64::RBIT_ZPmZ_D: 18102 case AArch64::RBIT_ZPmZ_H: 18103 case AArch64::RBIT_ZPmZ_S: 18104 case AArch64::REVB_ZPmZ_D: 18105 case AArch64::REVB_ZPmZ_H: 18106 case AArch64::REVB_ZPmZ_S: 18107 case AArch64::REVD_ZPmZ: 18108 case AArch64::REVH_ZPmZ_D: 18109 case AArch64::REVH_ZPmZ_S: 18110 case AArch64::REVW_ZPmZ_D: { 18111 // op: Zd 18112 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18113 op &= UINT64_C(31); 18114 Value |= op; 18115 // op: Pg 18116 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18117 op &= UINT64_C(7); 18118 op <<= 10; 18119 Value |= op; 18120 // op: Zn 18121 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18122 op &= UINT64_C(31); 18123 op <<= 5; 18124 Value |= op; 18125 break; 18126 } 18127 case AArch64::PMOV_ZIP_B: { 18128 // op: Zd 18129 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18130 op &= UINT64_C(31); 18131 Value |= op; 18132 // op: Pn 18133 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18134 op &= UINT64_C(15); 18135 op <<= 5; 18136 Value |= op; 18137 break; 18138 } 18139 case AArch64::PMOV_ZIP_D: { 18140 // op: Zd 18141 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18142 op &= UINT64_C(31); 18143 Value |= op; 18144 // op: Pn 18145 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18146 op &= UINT64_C(15); 18147 op <<= 5; 18148 Value |= op; 18149 // op: index 18150 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18151 Value |= (op & UINT64_C(4)) << 20; 18152 Value |= (op & UINT64_C(3)) << 17; 18153 break; 18154 } 18155 case AArch64::PMOV_ZIP_H: { 18156 // op: Zd 18157 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18158 op &= UINT64_C(31); 18159 Value |= op; 18160 // op: Pn 18161 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18162 op &= UINT64_C(15); 18163 op <<= 5; 18164 Value |= op; 18165 // op: index 18166 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18167 op &= UINT64_C(1); 18168 op <<= 17; 18169 Value |= op; 18170 break; 18171 } 18172 case AArch64::PMOV_ZIP_S: { 18173 // op: Zd 18174 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18175 op &= UINT64_C(31); 18176 Value |= op; 18177 // op: Pn 18178 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18179 op &= UINT64_C(15); 18180 op <<= 5; 18181 Value |= op; 18182 // op: index 18183 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18184 op &= UINT64_C(3); 18185 op <<= 17; 18186 Value |= op; 18187 break; 18188 } 18189 case AArch64::INDEX_RR_B: 18190 case AArch64::INDEX_RR_D: 18191 case AArch64::INDEX_RR_H: 18192 case AArch64::INDEX_RR_S: { 18193 // op: Zd 18194 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18195 op &= UINT64_C(31); 18196 Value |= op; 18197 // op: Rm 18198 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18199 op &= UINT64_C(31); 18200 op <<= 16; 18201 Value |= op; 18202 // op: Rn 18203 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18204 op &= UINT64_C(31); 18205 op <<= 5; 18206 Value |= op; 18207 break; 18208 } 18209 case AArch64::ADD_ZZZ_B: 18210 case AArch64::ADD_ZZZ_D: 18211 case AArch64::ADD_ZZZ_H: 18212 case AArch64::ADD_ZZZ_S: 18213 case AArch64::AND_ZZZ: 18214 case AArch64::ASR_WIDE_ZZZ_B: 18215 case AArch64::ASR_WIDE_ZZZ_H: 18216 case AArch64::ASR_WIDE_ZZZ_S: 18217 case AArch64::BFADD_ZZZ: 18218 case AArch64::BFMUL_ZZZ: 18219 case AArch64::BFSUB_ZZZ: 18220 case AArch64::BIC_ZZZ: 18221 case AArch64::EOR_ZZZ: 18222 case AArch64::FADD_ZZZ_D: 18223 case AArch64::FADD_ZZZ_H: 18224 case AArch64::FADD_ZZZ_S: 18225 case AArch64::FMUL_ZZZ_D: 18226 case AArch64::FMUL_ZZZ_H: 18227 case AArch64::FMUL_ZZZ_S: 18228 case AArch64::FRECPS_ZZZ_D: 18229 case AArch64::FRECPS_ZZZ_H: 18230 case AArch64::FRECPS_ZZZ_S: 18231 case AArch64::FRSQRTS_ZZZ_D: 18232 case AArch64::FRSQRTS_ZZZ_H: 18233 case AArch64::FRSQRTS_ZZZ_S: 18234 case AArch64::FSUB_ZZZ_D: 18235 case AArch64::FSUB_ZZZ_H: 18236 case AArch64::FSUB_ZZZ_S: 18237 case AArch64::FTSMUL_ZZZ_D: 18238 case AArch64::FTSMUL_ZZZ_H: 18239 case AArch64::FTSMUL_ZZZ_S: 18240 case AArch64::FTSSEL_ZZZ_D: 18241 case AArch64::FTSSEL_ZZZ_H: 18242 case AArch64::FTSSEL_ZZZ_S: 18243 case AArch64::LSL_WIDE_ZZZ_B: 18244 case AArch64::LSL_WIDE_ZZZ_H: 18245 case AArch64::LSL_WIDE_ZZZ_S: 18246 case AArch64::LSR_WIDE_ZZZ_B: 18247 case AArch64::LSR_WIDE_ZZZ_H: 18248 case AArch64::LSR_WIDE_ZZZ_S: 18249 case AArch64::MUL_ZZZ_B: 18250 case AArch64::MUL_ZZZ_D: 18251 case AArch64::MUL_ZZZ_H: 18252 case AArch64::MUL_ZZZ_S: 18253 case AArch64::ORR_ZZZ: 18254 case AArch64::PMUL_ZZZ_B: 18255 case AArch64::SMULH_ZZZ_B: 18256 case AArch64::SMULH_ZZZ_D: 18257 case AArch64::SMULH_ZZZ_H: 18258 case AArch64::SMULH_ZZZ_S: 18259 case AArch64::SQADD_ZZZ_B: 18260 case AArch64::SQADD_ZZZ_D: 18261 case AArch64::SQADD_ZZZ_H: 18262 case AArch64::SQADD_ZZZ_S: 18263 case AArch64::SQDMULH_ZZZ_B: 18264 case AArch64::SQDMULH_ZZZ_D: 18265 case AArch64::SQDMULH_ZZZ_H: 18266 case AArch64::SQDMULH_ZZZ_S: 18267 case AArch64::SQRDMULH_ZZZ_B: 18268 case AArch64::SQRDMULH_ZZZ_D: 18269 case AArch64::SQRDMULH_ZZZ_H: 18270 case AArch64::SQRDMULH_ZZZ_S: 18271 case AArch64::SQSUB_ZZZ_B: 18272 case AArch64::SQSUB_ZZZ_D: 18273 case AArch64::SQSUB_ZZZ_H: 18274 case AArch64::SQSUB_ZZZ_S: 18275 case AArch64::SUB_ZZZ_B: 18276 case AArch64::SUB_ZZZ_D: 18277 case AArch64::SUB_ZZZ_H: 18278 case AArch64::SUB_ZZZ_S: 18279 case AArch64::TBL_ZZZZ_B: 18280 case AArch64::TBL_ZZZZ_D: 18281 case AArch64::TBL_ZZZZ_H: 18282 case AArch64::TBL_ZZZZ_S: 18283 case AArch64::TBL_ZZZ_B: 18284 case AArch64::TBL_ZZZ_D: 18285 case AArch64::TBL_ZZZ_H: 18286 case AArch64::TBL_ZZZ_S: 18287 case AArch64::TRN1_ZZZ_B: 18288 case AArch64::TRN1_ZZZ_D: 18289 case AArch64::TRN1_ZZZ_H: 18290 case AArch64::TRN1_ZZZ_Q: 18291 case AArch64::TRN1_ZZZ_S: 18292 case AArch64::TRN2_ZZZ_B: 18293 case AArch64::TRN2_ZZZ_D: 18294 case AArch64::TRN2_ZZZ_H: 18295 case AArch64::TRN2_ZZZ_Q: 18296 case AArch64::TRN2_ZZZ_S: 18297 case AArch64::UMULH_ZZZ_B: 18298 case AArch64::UMULH_ZZZ_D: 18299 case AArch64::UMULH_ZZZ_H: 18300 case AArch64::UMULH_ZZZ_S: 18301 case AArch64::UQADD_ZZZ_B: 18302 case AArch64::UQADD_ZZZ_D: 18303 case AArch64::UQADD_ZZZ_H: 18304 case AArch64::UQADD_ZZZ_S: 18305 case AArch64::UQSUB_ZZZ_B: 18306 case AArch64::UQSUB_ZZZ_D: 18307 case AArch64::UQSUB_ZZZ_H: 18308 case AArch64::UQSUB_ZZZ_S: 18309 case AArch64::UZP1_ZZZ_B: 18310 case AArch64::UZP1_ZZZ_D: 18311 case AArch64::UZP1_ZZZ_H: 18312 case AArch64::UZP1_ZZZ_Q: 18313 case AArch64::UZP1_ZZZ_S: 18314 case AArch64::UZP2_ZZZ_B: 18315 case AArch64::UZP2_ZZZ_D: 18316 case AArch64::UZP2_ZZZ_H: 18317 case AArch64::UZP2_ZZZ_Q: 18318 case AArch64::UZP2_ZZZ_S: 18319 case AArch64::ZIP1_ZZZ_B: 18320 case AArch64::ZIP1_ZZZ_D: 18321 case AArch64::ZIP1_ZZZ_H: 18322 case AArch64::ZIP1_ZZZ_Q: 18323 case AArch64::ZIP1_ZZZ_S: 18324 case AArch64::ZIP2_ZZZ_B: 18325 case AArch64::ZIP2_ZZZ_D: 18326 case AArch64::ZIP2_ZZZ_H: 18327 case AArch64::ZIP2_ZZZ_Q: 18328 case AArch64::ZIP2_ZZZ_S: { 18329 // op: Zd 18330 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18331 op &= UINT64_C(31); 18332 Value |= op; 18333 // op: Zm 18334 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18335 op &= UINT64_C(31); 18336 op <<= 16; 18337 Value |= op; 18338 // op: Zn 18339 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18340 op &= UINT64_C(31); 18341 op <<= 5; 18342 Value |= op; 18343 break; 18344 } 18345 case AArch64::TBXQ_ZZZ_B: 18346 case AArch64::TBXQ_ZZZ_D: 18347 case AArch64::TBXQ_ZZZ_H: 18348 case AArch64::TBXQ_ZZZ_S: 18349 case AArch64::TBX_ZZZ_B: 18350 case AArch64::TBX_ZZZ_D: 18351 case AArch64::TBX_ZZZ_H: 18352 case AArch64::TBX_ZZZ_S: { 18353 // op: Zd 18354 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18355 op &= UINT64_C(31); 18356 Value |= op; 18357 // op: Zm 18358 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18359 op &= UINT64_C(31); 18360 op <<= 16; 18361 Value |= op; 18362 // op: Zn 18363 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18364 op &= UINT64_C(31); 18365 op <<= 5; 18366 Value |= op; 18367 break; 18368 } 18369 case AArch64::SQCVTN_Z2Z_StoH: 18370 case AArch64::SQCVTUN_Z2Z_StoH: 18371 case AArch64::UQCVTN_Z2Z_StoH: { 18372 // op: Zd 18373 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18374 op &= UINT64_C(31); 18375 Value |= op; 18376 // op: Zn 18377 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 18378 op &= UINT64_C(15); 18379 op <<= 6; 18380 Value |= op; 18381 break; 18382 } 18383 case AArch64::anonymous_15148: 18384 case AArch64::anonymous_15149: 18385 case AArch64::anonymous_5481: { 18386 // op: Zd 18387 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18388 op &= UINT64_C(31); 18389 Value |= op; 18390 // op: Zn 18391 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 18392 op &= UINT64_C(15); 18393 op <<= 6; 18394 Value |= op; 18395 // op: imm4 18396 op = getVecShiftR16OpValue(MI, 2, Fixups, STI); 18397 op &= UINT64_C(15); 18398 op <<= 16; 18399 Value |= op; 18400 break; 18401 } 18402 case AArch64::FEXPA_ZZ_D: 18403 case AArch64::FEXPA_ZZ_H: 18404 case AArch64::FEXPA_ZZ_S: 18405 case AArch64::FRECPE_ZZ_D: 18406 case AArch64::FRECPE_ZZ_H: 18407 case AArch64::FRECPE_ZZ_S: 18408 case AArch64::FRSQRTE_ZZ_D: 18409 case AArch64::FRSQRTE_ZZ_H: 18410 case AArch64::FRSQRTE_ZZ_S: 18411 case AArch64::MOVPRFX_ZZ: 18412 case AArch64::REV_ZZ_B: 18413 case AArch64::REV_ZZ_D: 18414 case AArch64::REV_ZZ_H: 18415 case AArch64::REV_ZZ_S: 18416 case AArch64::SQXTNB_ZZ_B: 18417 case AArch64::SQXTNB_ZZ_H: 18418 case AArch64::SQXTNB_ZZ_S: 18419 case AArch64::SQXTUNB_ZZ_B: 18420 case AArch64::SQXTUNB_ZZ_H: 18421 case AArch64::SQXTUNB_ZZ_S: 18422 case AArch64::SUNPKHI_ZZ_D: 18423 case AArch64::SUNPKHI_ZZ_H: 18424 case AArch64::SUNPKHI_ZZ_S: 18425 case AArch64::SUNPKLO_ZZ_D: 18426 case AArch64::SUNPKLO_ZZ_H: 18427 case AArch64::SUNPKLO_ZZ_S: 18428 case AArch64::UQXTNB_ZZ_B: 18429 case AArch64::UQXTNB_ZZ_H: 18430 case AArch64::UQXTNB_ZZ_S: 18431 case AArch64::UUNPKHI_ZZ_D: 18432 case AArch64::UUNPKHI_ZZ_H: 18433 case AArch64::UUNPKHI_ZZ_S: 18434 case AArch64::UUNPKLO_ZZ_D: 18435 case AArch64::UUNPKLO_ZZ_H: 18436 case AArch64::UUNPKLO_ZZ_S: { 18437 // op: Zd 18438 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18439 op &= UINT64_C(31); 18440 Value |= op; 18441 // op: Zn 18442 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18443 op &= UINT64_C(31); 18444 op <<= 5; 18445 Value |= op; 18446 break; 18447 } 18448 case AArch64::SMULLB_ZZZI_D: 18449 case AArch64::SMULLT_ZZZI_D: 18450 case AArch64::SQDMULLB_ZZZI_D: 18451 case AArch64::SQDMULLT_ZZZI_D: 18452 case AArch64::UMULLB_ZZZI_D: 18453 case AArch64::UMULLT_ZZZI_D: { 18454 // op: Zd 18455 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18456 op &= UINT64_C(31); 18457 Value |= op; 18458 // op: Zn 18459 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18460 op &= UINT64_C(31); 18461 op <<= 5; 18462 Value |= op; 18463 // op: Zm 18464 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18465 op &= UINT64_C(15); 18466 op <<= 16; 18467 Value |= op; 18468 // op: iop 18469 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18470 Value |= (op & UINT64_C(2)) << 19; 18471 Value |= (op & UINT64_C(1)) << 11; 18472 break; 18473 } 18474 case AArch64::FMUL_ZZZI_D: 18475 case AArch64::MUL_ZZZI_D: 18476 case AArch64::SQDMULH_ZZZI_D: 18477 case AArch64::SQRDMULH_ZZZI_D: { 18478 // op: Zd 18479 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18480 op &= UINT64_C(31); 18481 Value |= op; 18482 // op: Zn 18483 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18484 op &= UINT64_C(31); 18485 op <<= 5; 18486 Value |= op; 18487 // op: Zm 18488 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18489 op &= UINT64_C(15); 18490 op <<= 16; 18491 Value |= op; 18492 // op: iop 18493 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18494 op &= UINT64_C(1); 18495 op <<= 20; 18496 Value |= op; 18497 break; 18498 } 18499 case AArch64::ADDHNB_ZZZ_B: 18500 case AArch64::ADDHNB_ZZZ_H: 18501 case AArch64::ADDHNB_ZZZ_S: 18502 case AArch64::ADR_LSL_ZZZ_D_0: 18503 case AArch64::ADR_LSL_ZZZ_D_1: 18504 case AArch64::ADR_LSL_ZZZ_D_2: 18505 case AArch64::ADR_LSL_ZZZ_D_3: 18506 case AArch64::ADR_LSL_ZZZ_S_0: 18507 case AArch64::ADR_LSL_ZZZ_S_1: 18508 case AArch64::ADR_LSL_ZZZ_S_2: 18509 case AArch64::ADR_LSL_ZZZ_S_3: 18510 case AArch64::ADR_SXTW_ZZZ_D_0: 18511 case AArch64::ADR_SXTW_ZZZ_D_1: 18512 case AArch64::ADR_SXTW_ZZZ_D_2: 18513 case AArch64::ADR_SXTW_ZZZ_D_3: 18514 case AArch64::ADR_UXTW_ZZZ_D_0: 18515 case AArch64::ADR_UXTW_ZZZ_D_1: 18516 case AArch64::ADR_UXTW_ZZZ_D_2: 18517 case AArch64::ADR_UXTW_ZZZ_D_3: 18518 case AArch64::BDEP_ZZZ_B: 18519 case AArch64::BDEP_ZZZ_D: 18520 case AArch64::BDEP_ZZZ_H: 18521 case AArch64::BDEP_ZZZ_S: 18522 case AArch64::BEXT_ZZZ_B: 18523 case AArch64::BEXT_ZZZ_D: 18524 case AArch64::BEXT_ZZZ_H: 18525 case AArch64::BEXT_ZZZ_S: 18526 case AArch64::BGRP_ZZZ_B: 18527 case AArch64::BGRP_ZZZ_D: 18528 case AArch64::BGRP_ZZZ_H: 18529 case AArch64::BGRP_ZZZ_S: 18530 case AArch64::HISTSEG_ZZZ: 18531 case AArch64::PMULLB_ZZZ_D: 18532 case AArch64::PMULLB_ZZZ_H: 18533 case AArch64::PMULLB_ZZZ_Q: 18534 case AArch64::PMULLT_ZZZ_D: 18535 case AArch64::PMULLT_ZZZ_H: 18536 case AArch64::PMULLT_ZZZ_Q: 18537 case AArch64::RADDHNB_ZZZ_B: 18538 case AArch64::RADDHNB_ZZZ_H: 18539 case AArch64::RADDHNB_ZZZ_S: 18540 case AArch64::RAX1_ZZZ_D: 18541 case AArch64::RSUBHNB_ZZZ_B: 18542 case AArch64::RSUBHNB_ZZZ_H: 18543 case AArch64::RSUBHNB_ZZZ_S: 18544 case AArch64::SABDLB_ZZZ_D: 18545 case AArch64::SABDLB_ZZZ_H: 18546 case AArch64::SABDLB_ZZZ_S: 18547 case AArch64::SABDLT_ZZZ_D: 18548 case AArch64::SABDLT_ZZZ_H: 18549 case AArch64::SABDLT_ZZZ_S: 18550 case AArch64::SADDLBT_ZZZ_D: 18551 case AArch64::SADDLBT_ZZZ_H: 18552 case AArch64::SADDLBT_ZZZ_S: 18553 case AArch64::SADDLB_ZZZ_D: 18554 case AArch64::SADDLB_ZZZ_H: 18555 case AArch64::SADDLB_ZZZ_S: 18556 case AArch64::SADDLT_ZZZ_D: 18557 case AArch64::SADDLT_ZZZ_H: 18558 case AArch64::SADDLT_ZZZ_S: 18559 case AArch64::SADDWB_ZZZ_D: 18560 case AArch64::SADDWB_ZZZ_H: 18561 case AArch64::SADDWB_ZZZ_S: 18562 case AArch64::SADDWT_ZZZ_D: 18563 case AArch64::SADDWT_ZZZ_H: 18564 case AArch64::SADDWT_ZZZ_S: 18565 case AArch64::SM4EKEY_ZZZ_S: 18566 case AArch64::SMULLB_ZZZ_D: 18567 case AArch64::SMULLB_ZZZ_H: 18568 case AArch64::SMULLB_ZZZ_S: 18569 case AArch64::SMULLT_ZZZ_D: 18570 case AArch64::SMULLT_ZZZ_H: 18571 case AArch64::SMULLT_ZZZ_S: 18572 case AArch64::SQDMULLB_ZZZ_D: 18573 case AArch64::SQDMULLB_ZZZ_H: 18574 case AArch64::SQDMULLB_ZZZ_S: 18575 case AArch64::SQDMULLT_ZZZ_D: 18576 case AArch64::SQDMULLT_ZZZ_H: 18577 case AArch64::SQDMULLT_ZZZ_S: 18578 case AArch64::SSUBLBT_ZZZ_D: 18579 case AArch64::SSUBLBT_ZZZ_H: 18580 case AArch64::SSUBLBT_ZZZ_S: 18581 case AArch64::SSUBLB_ZZZ_D: 18582 case AArch64::SSUBLB_ZZZ_H: 18583 case AArch64::SSUBLB_ZZZ_S: 18584 case AArch64::SSUBLTB_ZZZ_D: 18585 case AArch64::SSUBLTB_ZZZ_H: 18586 case AArch64::SSUBLTB_ZZZ_S: 18587 case AArch64::SSUBLT_ZZZ_D: 18588 case AArch64::SSUBLT_ZZZ_H: 18589 case AArch64::SSUBLT_ZZZ_S: 18590 case AArch64::SSUBWB_ZZZ_D: 18591 case AArch64::SSUBWB_ZZZ_H: 18592 case AArch64::SSUBWB_ZZZ_S: 18593 case AArch64::SSUBWT_ZZZ_D: 18594 case AArch64::SSUBWT_ZZZ_H: 18595 case AArch64::SSUBWT_ZZZ_S: 18596 case AArch64::SUBHNB_ZZZ_B: 18597 case AArch64::SUBHNB_ZZZ_H: 18598 case AArch64::SUBHNB_ZZZ_S: 18599 case AArch64::TBLQ_ZZZ_B: 18600 case AArch64::TBLQ_ZZZ_D: 18601 case AArch64::TBLQ_ZZZ_H: 18602 case AArch64::TBLQ_ZZZ_S: 18603 case AArch64::UABDLB_ZZZ_D: 18604 case AArch64::UABDLB_ZZZ_H: 18605 case AArch64::UABDLB_ZZZ_S: 18606 case AArch64::UABDLT_ZZZ_D: 18607 case AArch64::UABDLT_ZZZ_H: 18608 case AArch64::UABDLT_ZZZ_S: 18609 case AArch64::UADDLB_ZZZ_D: 18610 case AArch64::UADDLB_ZZZ_H: 18611 case AArch64::UADDLB_ZZZ_S: 18612 case AArch64::UADDLT_ZZZ_D: 18613 case AArch64::UADDLT_ZZZ_H: 18614 case AArch64::UADDLT_ZZZ_S: 18615 case AArch64::UADDWB_ZZZ_D: 18616 case AArch64::UADDWB_ZZZ_H: 18617 case AArch64::UADDWB_ZZZ_S: 18618 case AArch64::UADDWT_ZZZ_D: 18619 case AArch64::UADDWT_ZZZ_H: 18620 case AArch64::UADDWT_ZZZ_S: 18621 case AArch64::UMULLB_ZZZ_D: 18622 case AArch64::UMULLB_ZZZ_H: 18623 case AArch64::UMULLB_ZZZ_S: 18624 case AArch64::UMULLT_ZZZ_D: 18625 case AArch64::UMULLT_ZZZ_H: 18626 case AArch64::UMULLT_ZZZ_S: 18627 case AArch64::USUBLB_ZZZ_D: 18628 case AArch64::USUBLB_ZZZ_H: 18629 case AArch64::USUBLB_ZZZ_S: 18630 case AArch64::USUBLT_ZZZ_D: 18631 case AArch64::USUBLT_ZZZ_H: 18632 case AArch64::USUBLT_ZZZ_S: 18633 case AArch64::USUBWB_ZZZ_D: 18634 case AArch64::USUBWB_ZZZ_H: 18635 case AArch64::USUBWB_ZZZ_S: 18636 case AArch64::USUBWT_ZZZ_D: 18637 case AArch64::USUBWT_ZZZ_H: 18638 case AArch64::USUBWT_ZZZ_S: 18639 case AArch64::UZPQ1_ZZZ_B: 18640 case AArch64::UZPQ1_ZZZ_D: 18641 case AArch64::UZPQ1_ZZZ_H: 18642 case AArch64::UZPQ1_ZZZ_S: 18643 case AArch64::UZPQ2_ZZZ_B: 18644 case AArch64::UZPQ2_ZZZ_D: 18645 case AArch64::UZPQ2_ZZZ_H: 18646 case AArch64::UZPQ2_ZZZ_S: 18647 case AArch64::ZIPQ1_ZZZ_B: 18648 case AArch64::ZIPQ1_ZZZ_D: 18649 case AArch64::ZIPQ1_ZZZ_H: 18650 case AArch64::ZIPQ1_ZZZ_S: 18651 case AArch64::ZIPQ2_ZZZ_B: 18652 case AArch64::ZIPQ2_ZZZ_D: 18653 case AArch64::ZIPQ2_ZZZ_H: 18654 case AArch64::ZIPQ2_ZZZ_S: { 18655 // op: Zd 18656 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18657 op &= UINT64_C(31); 18658 Value |= op; 18659 // op: Zn 18660 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18661 op &= UINT64_C(31); 18662 op <<= 5; 18663 Value |= op; 18664 // op: Zm 18665 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18666 op &= UINT64_C(31); 18667 op <<= 16; 18668 Value |= op; 18669 break; 18670 } 18671 case AArch64::BFMUL_ZZZI: 18672 case AArch64::FMUL_ZZZI_H: 18673 case AArch64::MUL_ZZZI_H: 18674 case AArch64::SQDMULH_ZZZI_H: 18675 case AArch64::SQRDMULH_ZZZI_H: { 18676 // op: Zd 18677 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18678 op &= UINT64_C(31); 18679 Value |= op; 18680 // op: Zn 18681 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18682 op &= UINT64_C(31); 18683 op <<= 5; 18684 Value |= op; 18685 // op: Zm 18686 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18687 op &= UINT64_C(7); 18688 op <<= 16; 18689 Value |= op; 18690 // op: iop 18691 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18692 Value |= (op & UINT64_C(4)) << 20; 18693 Value |= (op & UINT64_C(3)) << 19; 18694 break; 18695 } 18696 case AArch64::SMULLB_ZZZI_S: 18697 case AArch64::SMULLT_ZZZI_S: 18698 case AArch64::SQDMULLB_ZZZI_S: 18699 case AArch64::SQDMULLT_ZZZI_S: 18700 case AArch64::UMULLB_ZZZI_S: 18701 case AArch64::UMULLT_ZZZI_S: { 18702 // op: Zd 18703 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18704 op &= UINT64_C(31); 18705 Value |= op; 18706 // op: Zn 18707 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18708 op &= UINT64_C(31); 18709 op <<= 5; 18710 Value |= op; 18711 // op: Zm 18712 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18713 op &= UINT64_C(7); 18714 op <<= 16; 18715 Value |= op; 18716 // op: iop 18717 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18718 Value |= (op & UINT64_C(6)) << 18; 18719 Value |= (op & UINT64_C(1)) << 11; 18720 break; 18721 } 18722 case AArch64::FMUL_ZZZI_S: 18723 case AArch64::MUL_ZZZI_S: 18724 case AArch64::SQDMULH_ZZZI_S: 18725 case AArch64::SQRDMULH_ZZZI_S: { 18726 // op: Zd 18727 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18728 op &= UINT64_C(31); 18729 Value |= op; 18730 // op: Zn 18731 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18732 op &= UINT64_C(31); 18733 op <<= 5; 18734 Value |= op; 18735 // op: Zm 18736 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18737 op &= UINT64_C(7); 18738 op <<= 16; 18739 Value |= op; 18740 // op: iop 18741 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 18742 op &= UINT64_C(3); 18743 op <<= 19; 18744 Value |= op; 18745 break; 18746 } 18747 case AArch64::DUP_ZZI_S: { 18748 // op: Zd 18749 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18750 op &= UINT64_C(31); 18751 Value |= op; 18752 // op: Zn 18753 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18754 op &= UINT64_C(31); 18755 op <<= 5; 18756 Value |= op; 18757 // op: idx 18758 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18759 Value |= (op & UINT64_C(12)) << 20; 18760 Value |= (op & UINT64_C(3)) << 19; 18761 break; 18762 } 18763 case AArch64::DUP_ZZI_H: { 18764 // op: Zd 18765 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18766 op &= UINT64_C(31); 18767 Value |= op; 18768 // op: Zn 18769 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18770 op &= UINT64_C(31); 18771 op <<= 5; 18772 Value |= op; 18773 // op: idx 18774 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18775 Value |= (op & UINT64_C(24)) << 19; 18776 Value |= (op & UINT64_C(7)) << 18; 18777 break; 18778 } 18779 case AArch64::DUP_ZZI_B: { 18780 // op: Zd 18781 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18782 op &= UINT64_C(31); 18783 Value |= op; 18784 // op: Zn 18785 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18786 op &= UINT64_C(31); 18787 op <<= 5; 18788 Value |= op; 18789 // op: idx 18790 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18791 Value |= (op & UINT64_C(48)) << 18; 18792 Value |= (op & UINT64_C(15)) << 17; 18793 break; 18794 } 18795 case AArch64::DUP_ZZI_D: { 18796 // op: Zd 18797 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18798 op &= UINT64_C(31); 18799 Value |= op; 18800 // op: Zn 18801 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18802 op &= UINT64_C(31); 18803 op <<= 5; 18804 Value |= op; 18805 // op: idx 18806 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18807 Value |= (op & UINT64_C(6)) << 21; 18808 Value |= (op & UINT64_C(1)) << 20; 18809 break; 18810 } 18811 case AArch64::DUP_ZZI_Q: { 18812 // op: Zd 18813 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18814 op &= UINT64_C(31); 18815 Value |= op; 18816 // op: Zn 18817 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18818 op &= UINT64_C(31); 18819 op <<= 5; 18820 Value |= op; 18821 // op: idx 18822 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 18823 op &= UINT64_C(3); 18824 op <<= 22; 18825 Value |= op; 18826 break; 18827 } 18828 case AArch64::LSL_ZZI_H: 18829 case AArch64::SSHLLB_ZZI_S: 18830 case AArch64::SSHLLT_ZZI_S: 18831 case AArch64::USHLLB_ZZI_S: 18832 case AArch64::USHLLT_ZZI_S: { 18833 // op: Zd 18834 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18835 op &= UINT64_C(31); 18836 Value |= op; 18837 // op: Zn 18838 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18839 op &= UINT64_C(31); 18840 op <<= 5; 18841 Value |= op; 18842 // op: imm 18843 op = getVecShiftL16OpValue(MI, 2, Fixups, STI); 18844 op &= UINT64_C(15); 18845 op <<= 16; 18846 Value |= op; 18847 break; 18848 } 18849 case AArch64::LSL_ZZI_S: 18850 case AArch64::SSHLLB_ZZI_D: 18851 case AArch64::SSHLLT_ZZI_D: 18852 case AArch64::USHLLB_ZZI_D: 18853 case AArch64::USHLLT_ZZI_D: { 18854 // op: Zd 18855 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18856 op &= UINT64_C(31); 18857 Value |= op; 18858 // op: Zn 18859 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18860 op &= UINT64_C(31); 18861 op <<= 5; 18862 Value |= op; 18863 // op: imm 18864 op = getVecShiftL32OpValue(MI, 2, Fixups, STI); 18865 op &= UINT64_C(31); 18866 op <<= 16; 18867 Value |= op; 18868 break; 18869 } 18870 case AArch64::LSL_ZZI_D: { 18871 // op: Zd 18872 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18873 op &= UINT64_C(31); 18874 Value |= op; 18875 // op: Zn 18876 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18877 op &= UINT64_C(31); 18878 op <<= 5; 18879 Value |= op; 18880 // op: imm 18881 op = getVecShiftL64OpValue(MI, 2, Fixups, STI); 18882 Value |= (op & UINT64_C(32)) << 17; 18883 Value |= (op & UINT64_C(31)) << 16; 18884 break; 18885 } 18886 case AArch64::LSL_ZZI_B: 18887 case AArch64::SSHLLB_ZZI_H: 18888 case AArch64::SSHLLT_ZZI_H: 18889 case AArch64::USHLLB_ZZI_H: 18890 case AArch64::USHLLT_ZZI_H: { 18891 // op: Zd 18892 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18893 op &= UINT64_C(31); 18894 Value |= op; 18895 // op: Zn 18896 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18897 op &= UINT64_C(31); 18898 op <<= 5; 18899 Value |= op; 18900 // op: imm 18901 op = getVecShiftL8OpValue(MI, 2, Fixups, STI); 18902 op &= UINT64_C(7); 18903 op <<= 16; 18904 Value |= op; 18905 break; 18906 } 18907 case AArch64::ASR_ZZI_H: 18908 case AArch64::LSR_ZZI_H: 18909 case AArch64::RSHRNB_ZZI_H: 18910 case AArch64::SHRNB_ZZI_H: 18911 case AArch64::SQRSHRNB_ZZI_H: 18912 case AArch64::SQRSHRUNB_ZZI_H: 18913 case AArch64::SQSHRNB_ZZI_H: 18914 case AArch64::SQSHRUNB_ZZI_H: 18915 case AArch64::UQRSHRNB_ZZI_H: 18916 case AArch64::UQSHRNB_ZZI_H: { 18917 // op: Zd 18918 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18919 op &= UINT64_C(31); 18920 Value |= op; 18921 // op: Zn 18922 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18923 op &= UINT64_C(31); 18924 op <<= 5; 18925 Value |= op; 18926 // op: imm 18927 op = getVecShiftR16OpValue(MI, 2, Fixups, STI); 18928 op &= UINT64_C(15); 18929 op <<= 16; 18930 Value |= op; 18931 break; 18932 } 18933 case AArch64::ASR_ZZI_S: 18934 case AArch64::LSR_ZZI_S: 18935 case AArch64::RSHRNB_ZZI_S: 18936 case AArch64::SHRNB_ZZI_S: 18937 case AArch64::SQRSHRNB_ZZI_S: 18938 case AArch64::SQRSHRUNB_ZZI_S: 18939 case AArch64::SQSHRNB_ZZI_S: 18940 case AArch64::SQSHRUNB_ZZI_S: 18941 case AArch64::UQRSHRNB_ZZI_S: 18942 case AArch64::UQSHRNB_ZZI_S: { 18943 // op: Zd 18944 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18945 op &= UINT64_C(31); 18946 Value |= op; 18947 // op: Zn 18948 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18949 op &= UINT64_C(31); 18950 op <<= 5; 18951 Value |= op; 18952 // op: imm 18953 op = getVecShiftR32OpValue(MI, 2, Fixups, STI); 18954 op &= UINT64_C(31); 18955 op <<= 16; 18956 Value |= op; 18957 break; 18958 } 18959 case AArch64::ASR_ZZI_D: 18960 case AArch64::LSR_ZZI_D: { 18961 // op: Zd 18962 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18963 op &= UINT64_C(31); 18964 Value |= op; 18965 // op: Zn 18966 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18967 op &= UINT64_C(31); 18968 op <<= 5; 18969 Value |= op; 18970 // op: imm 18971 op = getVecShiftR64OpValue(MI, 2, Fixups, STI); 18972 Value |= (op & UINT64_C(32)) << 17; 18973 Value |= (op & UINT64_C(31)) << 16; 18974 break; 18975 } 18976 case AArch64::ASR_ZZI_B: 18977 case AArch64::LSR_ZZI_B: 18978 case AArch64::RSHRNB_ZZI_B: 18979 case AArch64::SHRNB_ZZI_B: 18980 case AArch64::SQRSHRNB_ZZI_B: 18981 case AArch64::SQRSHRUNB_ZZI_B: 18982 case AArch64::SQSHRNB_ZZI_B: 18983 case AArch64::SQSHRUNB_ZZI_B: 18984 case AArch64::UQRSHRNB_ZZI_B: 18985 case AArch64::UQSHRNB_ZZI_B: { 18986 // op: Zd 18987 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 18988 op &= UINT64_C(31); 18989 Value |= op; 18990 // op: Zn 18991 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 18992 op &= UINT64_C(31); 18993 op <<= 5; 18994 Value |= op; 18995 // op: imm 18996 op = getVecShiftR8OpValue(MI, 2, Fixups, STI); 18997 op &= UINT64_C(7); 18998 op <<= 16; 18999 Value |= op; 19000 break; 19001 } 19002 case AArch64::EXT_ZZI_B: { 19003 // op: Zd 19004 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19005 op &= UINT64_C(31); 19006 Value |= op; 19007 // op: Zn 19008 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19009 op &= UINT64_C(31); 19010 op <<= 5; 19011 Value |= op; 19012 // op: imm8 19013 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19014 Value |= (op & UINT64_C(248)) << 13; 19015 Value |= (op & UINT64_C(7)) << 10; 19016 break; 19017 } 19018 case AArch64::DUPQ_ZZI_D: { 19019 // op: Zd 19020 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19021 op &= UINT64_C(31); 19022 Value |= op; 19023 // op: Zn 19024 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19025 op &= UINT64_C(31); 19026 op <<= 5; 19027 Value |= op; 19028 // op: index 19029 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19030 op &= UINT64_C(1); 19031 op <<= 20; 19032 Value |= op; 19033 break; 19034 } 19035 case AArch64::DUPQ_ZZI_B: { 19036 // op: Zd 19037 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19038 op &= UINT64_C(31); 19039 Value |= op; 19040 // op: Zn 19041 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19042 op &= UINT64_C(31); 19043 op <<= 5; 19044 Value |= op; 19045 // op: index 19046 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19047 op &= UINT64_C(15); 19048 op <<= 17; 19049 Value |= op; 19050 break; 19051 } 19052 case AArch64::DUPQ_ZZI_S: { 19053 // op: Zd 19054 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19055 op &= UINT64_C(31); 19056 Value |= op; 19057 // op: Zn 19058 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19059 op &= UINT64_C(31); 19060 op <<= 5; 19061 Value |= op; 19062 // op: index 19063 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19064 op &= UINT64_C(3); 19065 op <<= 19; 19066 Value |= op; 19067 break; 19068 } 19069 case AArch64::DUPQ_ZZI_H: { 19070 // op: Zd 19071 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19072 op &= UINT64_C(31); 19073 Value |= op; 19074 // op: Zn 19075 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19076 op &= UINT64_C(31); 19077 op <<= 5; 19078 Value |= op; 19079 // op: index 19080 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19081 op &= UINT64_C(7); 19082 op <<= 18; 19083 Value |= op; 19084 break; 19085 } 19086 case AArch64::SQXTNT_ZZ_B: 19087 case AArch64::SQXTNT_ZZ_H: 19088 case AArch64::SQXTNT_ZZ_S: 19089 case AArch64::SQXTUNT_ZZ_B: 19090 case AArch64::SQXTUNT_ZZ_H: 19091 case AArch64::SQXTUNT_ZZ_S: 19092 case AArch64::UQXTNT_ZZ_B: 19093 case AArch64::UQXTNT_ZZ_H: 19094 case AArch64::UQXTNT_ZZ_S: { 19095 // op: Zd 19096 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19097 op &= UINT64_C(31); 19098 Value |= op; 19099 // op: Zn 19100 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19101 op &= UINT64_C(31); 19102 op <<= 5; 19103 Value |= op; 19104 break; 19105 } 19106 case AArch64::HISTCNT_ZPzZZ_D: 19107 case AArch64::HISTCNT_ZPzZZ_S: { 19108 // op: Zd 19109 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19110 op &= UINT64_C(31); 19111 Value |= op; 19112 // op: Zn 19113 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19114 op &= UINT64_C(31); 19115 op <<= 5; 19116 Value |= op; 19117 // op: Pg 19118 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19119 op &= UINT64_C(7); 19120 op <<= 10; 19121 Value |= op; 19122 // op: Zm 19123 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19124 op &= UINT64_C(31); 19125 op <<= 16; 19126 Value |= op; 19127 break; 19128 } 19129 case AArch64::ADDHNT_ZZZ_B: 19130 case AArch64::ADDHNT_ZZZ_H: 19131 case AArch64::ADDHNT_ZZZ_S: 19132 case AArch64::EORBT_ZZZ_B: 19133 case AArch64::EORBT_ZZZ_D: 19134 case AArch64::EORBT_ZZZ_H: 19135 case AArch64::EORBT_ZZZ_S: 19136 case AArch64::EORTB_ZZZ_B: 19137 case AArch64::EORTB_ZZZ_D: 19138 case AArch64::EORTB_ZZZ_H: 19139 case AArch64::EORTB_ZZZ_S: 19140 case AArch64::RADDHNT_ZZZ_B: 19141 case AArch64::RADDHNT_ZZZ_H: 19142 case AArch64::RADDHNT_ZZZ_S: 19143 case AArch64::RSUBHNT_ZZZ_B: 19144 case AArch64::RSUBHNT_ZZZ_H: 19145 case AArch64::RSUBHNT_ZZZ_S: 19146 case AArch64::SUBHNT_ZZZ_B: 19147 case AArch64::SUBHNT_ZZZ_H: 19148 case AArch64::SUBHNT_ZZZ_S: { 19149 // op: Zd 19150 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19151 op &= UINT64_C(31); 19152 Value |= op; 19153 // op: Zn 19154 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19155 op &= UINT64_C(31); 19156 op <<= 5; 19157 Value |= op; 19158 // op: Zm 19159 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19160 op &= UINT64_C(31); 19161 op <<= 16; 19162 Value |= op; 19163 break; 19164 } 19165 case AArch64::SLI_ZZI_H: { 19166 // op: Zd 19167 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19168 op &= UINT64_C(31); 19169 Value |= op; 19170 // op: Zn 19171 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19172 op &= UINT64_C(31); 19173 op <<= 5; 19174 Value |= op; 19175 // op: imm 19176 op = getVecShiftL16OpValue(MI, 3, Fixups, STI); 19177 op &= UINT64_C(15); 19178 op <<= 16; 19179 Value |= op; 19180 break; 19181 } 19182 case AArch64::SLI_ZZI_S: { 19183 // op: Zd 19184 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19185 op &= UINT64_C(31); 19186 Value |= op; 19187 // op: Zn 19188 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19189 op &= UINT64_C(31); 19190 op <<= 5; 19191 Value |= op; 19192 // op: imm 19193 op = getVecShiftL32OpValue(MI, 3, Fixups, STI); 19194 op &= UINT64_C(31); 19195 op <<= 16; 19196 Value |= op; 19197 break; 19198 } 19199 case AArch64::SLI_ZZI_D: { 19200 // op: Zd 19201 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19202 op &= UINT64_C(31); 19203 Value |= op; 19204 // op: Zn 19205 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19206 op &= UINT64_C(31); 19207 op <<= 5; 19208 Value |= op; 19209 // op: imm 19210 op = getVecShiftL64OpValue(MI, 3, Fixups, STI); 19211 Value |= (op & UINT64_C(32)) << 17; 19212 Value |= (op & UINT64_C(31)) << 16; 19213 break; 19214 } 19215 case AArch64::SLI_ZZI_B: { 19216 // op: Zd 19217 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19218 op &= UINT64_C(31); 19219 Value |= op; 19220 // op: Zn 19221 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19222 op &= UINT64_C(31); 19223 op <<= 5; 19224 Value |= op; 19225 // op: imm 19226 op = getVecShiftL8OpValue(MI, 3, Fixups, STI); 19227 op &= UINT64_C(7); 19228 op <<= 16; 19229 Value |= op; 19230 break; 19231 } 19232 case AArch64::RSHRNT_ZZI_H: 19233 case AArch64::SHRNT_ZZI_H: 19234 case AArch64::SQRSHRNT_ZZI_H: 19235 case AArch64::SQRSHRUNT_ZZI_H: 19236 case AArch64::SQSHRNT_ZZI_H: 19237 case AArch64::SQSHRUNT_ZZI_H: 19238 case AArch64::SRI_ZZI_H: 19239 case AArch64::UQRSHRNT_ZZI_H: 19240 case AArch64::UQSHRNT_ZZI_H: { 19241 // op: Zd 19242 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19243 op &= UINT64_C(31); 19244 Value |= op; 19245 // op: Zn 19246 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19247 op &= UINT64_C(31); 19248 op <<= 5; 19249 Value |= op; 19250 // op: imm 19251 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 19252 op &= UINT64_C(15); 19253 op <<= 16; 19254 Value |= op; 19255 break; 19256 } 19257 case AArch64::RSHRNT_ZZI_S: 19258 case AArch64::SHRNT_ZZI_S: 19259 case AArch64::SQRSHRNT_ZZI_S: 19260 case AArch64::SQRSHRUNT_ZZI_S: 19261 case AArch64::SQSHRNT_ZZI_S: 19262 case AArch64::SQSHRUNT_ZZI_S: 19263 case AArch64::SRI_ZZI_S: 19264 case AArch64::UQRSHRNT_ZZI_S: 19265 case AArch64::UQSHRNT_ZZI_S: { 19266 // op: Zd 19267 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19268 op &= UINT64_C(31); 19269 Value |= op; 19270 // op: Zn 19271 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19272 op &= UINT64_C(31); 19273 op <<= 5; 19274 Value |= op; 19275 // op: imm 19276 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 19277 op &= UINT64_C(31); 19278 op <<= 16; 19279 Value |= op; 19280 break; 19281 } 19282 case AArch64::SRI_ZZI_D: { 19283 // op: Zd 19284 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19285 op &= UINT64_C(31); 19286 Value |= op; 19287 // op: Zn 19288 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19289 op &= UINT64_C(31); 19290 op <<= 5; 19291 Value |= op; 19292 // op: imm 19293 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 19294 Value |= (op & UINT64_C(32)) << 17; 19295 Value |= (op & UINT64_C(31)) << 16; 19296 break; 19297 } 19298 case AArch64::RSHRNT_ZZI_B: 19299 case AArch64::SHRNT_ZZI_B: 19300 case AArch64::SQRSHRNT_ZZI_B: 19301 case AArch64::SQRSHRUNT_ZZI_B: 19302 case AArch64::SQSHRNT_ZZI_B: 19303 case AArch64::SQSHRUNT_ZZI_B: 19304 case AArch64::SRI_ZZI_B: 19305 case AArch64::UQRSHRNT_ZZI_B: 19306 case AArch64::UQSHRNT_ZZI_B: { 19307 // op: Zd 19308 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19309 op &= UINT64_C(31); 19310 Value |= op; 19311 // op: Zn 19312 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19313 op &= UINT64_C(31); 19314 op <<= 5; 19315 Value |= op; 19316 // op: imm 19317 op = getVecShiftR8OpValue(MI, 3, Fixups, STI); 19318 op &= UINT64_C(7); 19319 op <<= 16; 19320 Value |= op; 19321 break; 19322 } 19323 case AArch64::FCVTLT_ZPmZ_HtoS: 19324 case AArch64::FCVTLT_ZPmZ_StoD: 19325 case AArch64::FCVTNT_ZPmZ_DtoS: 19326 case AArch64::FCVTNT_ZPmZ_StoH: 19327 case AArch64::FCVTXNT_ZPmZ_DtoS: { 19328 // op: Zd 19329 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19330 op &= UINT64_C(31); 19331 Value |= op; 19332 // op: Zn 19333 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19334 op &= UINT64_C(31); 19335 op <<= 5; 19336 Value |= op; 19337 // op: Pg 19338 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19339 op &= UINT64_C(7); 19340 op <<= 10; 19341 Value |= op; 19342 break; 19343 } 19344 case AArch64::DUP_ZI_B: 19345 case AArch64::DUP_ZI_D: 19346 case AArch64::DUP_ZI_H: 19347 case AArch64::DUP_ZI_S: { 19348 // op: Zd 19349 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19350 op &= UINT64_C(31); 19351 Value |= op; 19352 // op: imm 19353 op = getImm8OptLsl(MI, 1, Fixups, STI); 19354 op &= UINT64_C(511); 19355 op <<= 5; 19356 Value |= op; 19357 break; 19358 } 19359 case AArch64::INDEX_II_B: 19360 case AArch64::INDEX_II_D: 19361 case AArch64::INDEX_II_H: 19362 case AArch64::INDEX_II_S: { 19363 // op: Zd 19364 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19365 op &= UINT64_C(31); 19366 Value |= op; 19367 // op: imm5 19368 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19369 op &= UINT64_C(31); 19370 op <<= 5; 19371 Value |= op; 19372 // op: imm5b 19373 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19374 op &= UINT64_C(31); 19375 op <<= 16; 19376 Value |= op; 19377 break; 19378 } 19379 case AArch64::FDUP_ZI_D: 19380 case AArch64::FDUP_ZI_H: 19381 case AArch64::FDUP_ZI_S: { 19382 // op: Zd 19383 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19384 op &= UINT64_C(31); 19385 Value |= op; 19386 // op: imm8 19387 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19388 op &= UINT64_C(255); 19389 op <<= 5; 19390 Value |= op; 19391 break; 19392 } 19393 case AArch64::DUPM_ZI: { 19394 // op: Zd 19395 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19396 op &= UINT64_C(31); 19397 Value |= op; 19398 // op: imms 19399 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19400 op &= UINT64_C(8191); 19401 op <<= 5; 19402 Value |= op; 19403 break; 19404 } 19405 case AArch64::FCMLA_ZPmZZ_D: 19406 case AArch64::FCMLA_ZPmZZ_H: 19407 case AArch64::FCMLA_ZPmZZ_S: { 19408 // op: Zda 19409 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19410 op &= UINT64_C(31); 19411 Value |= op; 19412 // op: Pg 19413 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 19414 op &= UINT64_C(7); 19415 op <<= 10; 19416 Value |= op; 19417 // op: Zn 19418 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19419 op &= UINT64_C(31); 19420 op <<= 5; 19421 Value |= op; 19422 // op: Zm 19423 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19424 op &= UINT64_C(31); 19425 op <<= 16; 19426 Value |= op; 19427 // op: imm 19428 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 19429 op &= UINT64_C(3); 19430 op <<= 13; 19431 Value |= op; 19432 break; 19433 } 19434 case AArch64::SMLALB_ZZZI_D: 19435 case AArch64::SMLALT_ZZZI_D: 19436 case AArch64::SMLSLB_ZZZI_D: 19437 case AArch64::SMLSLT_ZZZI_D: 19438 case AArch64::SQDMLALB_ZZZI_D: 19439 case AArch64::SQDMLALT_ZZZI_D: 19440 case AArch64::SQDMLSLB_ZZZI_D: 19441 case AArch64::SQDMLSLT_ZZZI_D: 19442 case AArch64::UMLALB_ZZZI_D: 19443 case AArch64::UMLALT_ZZZI_D: 19444 case AArch64::UMLSLB_ZZZI_D: 19445 case AArch64::UMLSLT_ZZZI_D: { 19446 // op: Zda 19447 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19448 op &= UINT64_C(31); 19449 Value |= op; 19450 // op: Zn 19451 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19452 op &= UINT64_C(31); 19453 op <<= 5; 19454 Value |= op; 19455 // op: Zm 19456 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19457 op &= UINT64_C(15); 19458 op <<= 16; 19459 Value |= op; 19460 // op: iop 19461 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19462 Value |= (op & UINT64_C(2)) << 19; 19463 Value |= (op & UINT64_C(1)) << 11; 19464 break; 19465 } 19466 case AArch64::FMLA_ZZZI_D: 19467 case AArch64::FMLS_ZZZI_D: 19468 case AArch64::MLA_ZZZI_D: 19469 case AArch64::MLS_ZZZI_D: 19470 case AArch64::SQRDMLAH_ZZZI_D: 19471 case AArch64::SQRDMLSH_ZZZI_D: { 19472 // op: Zda 19473 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19474 op &= UINT64_C(31); 19475 Value |= op; 19476 // op: Zn 19477 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19478 op &= UINT64_C(31); 19479 op <<= 5; 19480 Value |= op; 19481 // op: Zm 19482 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19483 op &= UINT64_C(15); 19484 op <<= 16; 19485 Value |= op; 19486 // op: iop 19487 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19488 op &= UINT64_C(1); 19489 op <<= 20; 19490 Value |= op; 19491 break; 19492 } 19493 case AArch64::ADCLB_ZZZ_D: 19494 case AArch64::ADCLB_ZZZ_S: 19495 case AArch64::ADCLT_ZZZ_D: 19496 case AArch64::ADCLT_ZZZ_S: 19497 case AArch64::BFDOT_ZZZ: 19498 case AArch64::BFMLALB_ZZZ: 19499 case AArch64::BFMLALT_ZZZ: 19500 case AArch64::BFMLSLB_ZZZ_S: 19501 case AArch64::BFMLSLT_ZZZ_S: 19502 case AArch64::FDOT_ZZZ_S: 19503 case AArch64::FMLALB_ZZZ_SHH: 19504 case AArch64::FMLALT_ZZZ_SHH: 19505 case AArch64::FMLSLB_ZZZ_SHH: 19506 case AArch64::FMLSLT_ZZZ_SHH: 19507 case AArch64::FMMLA_ZZZ_D: 19508 case AArch64::FMMLA_ZZZ_S: 19509 case AArch64::SABALB_ZZZ_D: 19510 case AArch64::SABALB_ZZZ_H: 19511 case AArch64::SABALB_ZZZ_S: 19512 case AArch64::SABALT_ZZZ_D: 19513 case AArch64::SABALT_ZZZ_H: 19514 case AArch64::SABALT_ZZZ_S: 19515 case AArch64::SABA_ZZZ_B: 19516 case AArch64::SABA_ZZZ_D: 19517 case AArch64::SABA_ZZZ_H: 19518 case AArch64::SABA_ZZZ_S: 19519 case AArch64::SBCLB_ZZZ_D: 19520 case AArch64::SBCLB_ZZZ_S: 19521 case AArch64::SBCLT_ZZZ_D: 19522 case AArch64::SBCLT_ZZZ_S: 19523 case AArch64::SDOT_ZZZ_D: 19524 case AArch64::SDOT_ZZZ_HtoS: 19525 case AArch64::SDOT_ZZZ_S: 19526 case AArch64::SMLALB_ZZZ_D: 19527 case AArch64::SMLALB_ZZZ_H: 19528 case AArch64::SMLALB_ZZZ_S: 19529 case AArch64::SMLALT_ZZZ_D: 19530 case AArch64::SMLALT_ZZZ_H: 19531 case AArch64::SMLALT_ZZZ_S: 19532 case AArch64::SMLSLB_ZZZ_D: 19533 case AArch64::SMLSLB_ZZZ_H: 19534 case AArch64::SMLSLB_ZZZ_S: 19535 case AArch64::SMLSLT_ZZZ_D: 19536 case AArch64::SMLSLT_ZZZ_H: 19537 case AArch64::SMLSLT_ZZZ_S: 19538 case AArch64::SMMLA_ZZZ: 19539 case AArch64::SQDMLALBT_ZZZ_D: 19540 case AArch64::SQDMLALBT_ZZZ_H: 19541 case AArch64::SQDMLALBT_ZZZ_S: 19542 case AArch64::SQDMLALB_ZZZ_D: 19543 case AArch64::SQDMLALB_ZZZ_H: 19544 case AArch64::SQDMLALB_ZZZ_S: 19545 case AArch64::SQDMLALT_ZZZ_D: 19546 case AArch64::SQDMLALT_ZZZ_H: 19547 case AArch64::SQDMLALT_ZZZ_S: 19548 case AArch64::SQDMLSLBT_ZZZ_D: 19549 case AArch64::SQDMLSLBT_ZZZ_H: 19550 case AArch64::SQDMLSLBT_ZZZ_S: 19551 case AArch64::SQDMLSLB_ZZZ_D: 19552 case AArch64::SQDMLSLB_ZZZ_H: 19553 case AArch64::SQDMLSLB_ZZZ_S: 19554 case AArch64::SQDMLSLT_ZZZ_D: 19555 case AArch64::SQDMLSLT_ZZZ_H: 19556 case AArch64::SQDMLSLT_ZZZ_S: 19557 case AArch64::SQRDMLAH_ZZZ_B: 19558 case AArch64::SQRDMLAH_ZZZ_D: 19559 case AArch64::SQRDMLAH_ZZZ_H: 19560 case AArch64::SQRDMLAH_ZZZ_S: 19561 case AArch64::SQRDMLSH_ZZZ_B: 19562 case AArch64::SQRDMLSH_ZZZ_D: 19563 case AArch64::SQRDMLSH_ZZZ_H: 19564 case AArch64::SQRDMLSH_ZZZ_S: 19565 case AArch64::UABALB_ZZZ_D: 19566 case AArch64::UABALB_ZZZ_H: 19567 case AArch64::UABALB_ZZZ_S: 19568 case AArch64::UABALT_ZZZ_D: 19569 case AArch64::UABALT_ZZZ_H: 19570 case AArch64::UABALT_ZZZ_S: 19571 case AArch64::UABA_ZZZ_B: 19572 case AArch64::UABA_ZZZ_D: 19573 case AArch64::UABA_ZZZ_H: 19574 case AArch64::UABA_ZZZ_S: 19575 case AArch64::UDOT_ZZZ_D: 19576 case AArch64::UDOT_ZZZ_HtoS: 19577 case AArch64::UDOT_ZZZ_S: 19578 case AArch64::UMLALB_ZZZ_D: 19579 case AArch64::UMLALB_ZZZ_H: 19580 case AArch64::UMLALB_ZZZ_S: 19581 case AArch64::UMLALT_ZZZ_D: 19582 case AArch64::UMLALT_ZZZ_H: 19583 case AArch64::UMLALT_ZZZ_S: 19584 case AArch64::UMLSLB_ZZZ_D: 19585 case AArch64::UMLSLB_ZZZ_H: 19586 case AArch64::UMLSLB_ZZZ_S: 19587 case AArch64::UMLSLT_ZZZ_D: 19588 case AArch64::UMLSLT_ZZZ_H: 19589 case AArch64::UMLSLT_ZZZ_S: 19590 case AArch64::UMMLA_ZZZ: 19591 case AArch64::USDOT_ZZZ: 19592 case AArch64::USMMLA_ZZZ: { 19593 // op: Zda 19594 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19595 op &= UINT64_C(31); 19596 Value |= op; 19597 // op: Zn 19598 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19599 op &= UINT64_C(31); 19600 op <<= 5; 19601 Value |= op; 19602 // op: Zm 19603 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19604 op &= UINT64_C(31); 19605 op <<= 16; 19606 Value |= op; 19607 break; 19608 } 19609 case AArch64::CDOT_ZZZ_D: 19610 case AArch64::CDOT_ZZZ_S: 19611 case AArch64::CMLA_ZZZ_B: 19612 case AArch64::CMLA_ZZZ_D: 19613 case AArch64::CMLA_ZZZ_H: 19614 case AArch64::CMLA_ZZZ_S: 19615 case AArch64::SQRDCMLAH_ZZZ_B: 19616 case AArch64::SQRDCMLAH_ZZZ_D: 19617 case AArch64::SQRDCMLAH_ZZZ_H: 19618 case AArch64::SQRDCMLAH_ZZZ_S: { 19619 // op: Zda 19620 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19621 op &= UINT64_C(31); 19622 Value |= op; 19623 // op: Zn 19624 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19625 op &= UINT64_C(31); 19626 op <<= 5; 19627 Value |= op; 19628 // op: Zm 19629 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19630 op &= UINT64_C(31); 19631 op <<= 16; 19632 Value |= op; 19633 // op: rot 19634 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19635 op &= UINT64_C(3); 19636 op <<= 10; 19637 Value |= op; 19638 break; 19639 } 19640 case AArch64::SDOT_ZZZI_HtoS: 19641 case AArch64::UDOT_ZZZI_HtoS: { 19642 // op: Zda 19643 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19644 op &= UINT64_C(31); 19645 Value |= op; 19646 // op: Zn 19647 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19648 op &= UINT64_C(31); 19649 op <<= 5; 19650 Value |= op; 19651 // op: Zm 19652 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19653 op &= UINT64_C(7); 19654 op <<= 16; 19655 Value |= op; 19656 // op: i2 19657 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19658 op &= UINT64_C(3); 19659 op <<= 19; 19660 Value |= op; 19661 break; 19662 } 19663 case AArch64::SUDOT_ZZZI: 19664 case AArch64::USDOT_ZZZI: { 19665 // op: Zda 19666 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19667 op &= UINT64_C(31); 19668 Value |= op; 19669 // op: Zn 19670 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19671 op &= UINT64_C(31); 19672 op <<= 5; 19673 Value |= op; 19674 // op: Zm 19675 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19676 op &= UINT64_C(7); 19677 op <<= 16; 19678 Value |= op; 19679 // op: idx 19680 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19681 op &= UINT64_C(3); 19682 op <<= 19; 19683 Value |= op; 19684 break; 19685 } 19686 case AArch64::BFMLA_ZZZI: 19687 case AArch64::BFMLS_ZZZI: 19688 case AArch64::FMLA_ZZZI_H: 19689 case AArch64::FMLS_ZZZI_H: 19690 case AArch64::MLA_ZZZI_H: 19691 case AArch64::MLS_ZZZI_H: 19692 case AArch64::SQRDMLAH_ZZZI_H: 19693 case AArch64::SQRDMLSH_ZZZI_H: { 19694 // op: Zda 19695 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19696 op &= UINT64_C(31); 19697 Value |= op; 19698 // op: Zn 19699 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19700 op &= UINT64_C(31); 19701 op <<= 5; 19702 Value |= op; 19703 // op: Zm 19704 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19705 op &= UINT64_C(7); 19706 op <<= 16; 19707 Value |= op; 19708 // op: iop 19709 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19710 Value |= (op & UINT64_C(4)) << 20; 19711 Value |= (op & UINT64_C(3)) << 19; 19712 break; 19713 } 19714 case AArch64::BFMLALB_ZZZI: 19715 case AArch64::BFMLALT_ZZZI: 19716 case AArch64::BFMLSLB_ZZZI_S: 19717 case AArch64::BFMLSLT_ZZZI_S: 19718 case AArch64::FMLALB_ZZZI_SHH: 19719 case AArch64::FMLALT_ZZZI_SHH: 19720 case AArch64::FMLSLB_ZZZI_SHH: 19721 case AArch64::FMLSLT_ZZZI_SHH: 19722 case AArch64::SMLALB_ZZZI_S: 19723 case AArch64::SMLALT_ZZZI_S: 19724 case AArch64::SMLSLB_ZZZI_S: 19725 case AArch64::SMLSLT_ZZZI_S: 19726 case AArch64::SQDMLALB_ZZZI_S: 19727 case AArch64::SQDMLALT_ZZZI_S: 19728 case AArch64::SQDMLSLB_ZZZI_S: 19729 case AArch64::SQDMLSLT_ZZZI_S: 19730 case AArch64::UMLALB_ZZZI_S: 19731 case AArch64::UMLALT_ZZZI_S: 19732 case AArch64::UMLSLB_ZZZI_S: 19733 case AArch64::UMLSLT_ZZZI_S: { 19734 // op: Zda 19735 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19736 op &= UINT64_C(31); 19737 Value |= op; 19738 // op: Zn 19739 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19740 op &= UINT64_C(31); 19741 op <<= 5; 19742 Value |= op; 19743 // op: Zm 19744 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19745 op &= UINT64_C(7); 19746 op <<= 16; 19747 Value |= op; 19748 // op: iop 19749 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19750 Value |= (op & UINT64_C(6)) << 18; 19751 Value |= (op & UINT64_C(1)) << 11; 19752 break; 19753 } 19754 case AArch64::BFDOT_ZZI: 19755 case AArch64::FDOT_ZZZI_S: 19756 case AArch64::FMLA_ZZZI_S: 19757 case AArch64::FMLS_ZZZI_S: 19758 case AArch64::MLA_ZZZI_S: 19759 case AArch64::MLS_ZZZI_S: 19760 case AArch64::SQRDMLAH_ZZZI_S: 19761 case AArch64::SQRDMLSH_ZZZI_S: { 19762 // op: Zda 19763 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19764 op &= UINT64_C(31); 19765 Value |= op; 19766 // op: Zn 19767 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19768 op &= UINT64_C(31); 19769 op <<= 5; 19770 Value |= op; 19771 // op: Zm 19772 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19773 op &= UINT64_C(7); 19774 op <<= 16; 19775 Value |= op; 19776 // op: iop 19777 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19778 op &= UINT64_C(3); 19779 op <<= 19; 19780 Value |= op; 19781 break; 19782 } 19783 case AArch64::FCMLA_ZZZI_S: { 19784 // op: Zda 19785 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19786 op &= UINT64_C(31); 19787 Value |= op; 19788 // op: Zn 19789 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19790 op &= UINT64_C(31); 19791 op <<= 5; 19792 Value |= op; 19793 // op: imm 19794 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 19795 op &= UINT64_C(3); 19796 op <<= 10; 19797 Value |= op; 19798 // op: Zm 19799 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19800 op &= UINT64_C(15); 19801 op <<= 16; 19802 Value |= op; 19803 // op: iop 19804 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19805 op &= UINT64_C(1); 19806 op <<= 20; 19807 Value |= op; 19808 break; 19809 } 19810 case AArch64::FCMLA_ZZZI_H: { 19811 // op: Zda 19812 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19813 op &= UINT64_C(31); 19814 Value |= op; 19815 // op: Zn 19816 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19817 op &= UINT64_C(31); 19818 op <<= 5; 19819 Value |= op; 19820 // op: imm 19821 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 19822 op &= UINT64_C(3); 19823 op <<= 10; 19824 Value |= op; 19825 // op: Zm 19826 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19827 op &= UINT64_C(7); 19828 op <<= 16; 19829 Value |= op; 19830 // op: iop 19831 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19832 op &= UINT64_C(3); 19833 op <<= 19; 19834 Value |= op; 19835 break; 19836 } 19837 case AArch64::SRSRA_ZZI_H: 19838 case AArch64::SSRA_ZZI_H: 19839 case AArch64::URSRA_ZZI_H: 19840 case AArch64::USRA_ZZI_H: { 19841 // op: Zda 19842 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19843 op &= UINT64_C(31); 19844 Value |= op; 19845 // op: Zn 19846 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19847 op &= UINT64_C(31); 19848 op <<= 5; 19849 Value |= op; 19850 // op: imm 19851 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 19852 op &= UINT64_C(15); 19853 op <<= 16; 19854 Value |= op; 19855 break; 19856 } 19857 case AArch64::SRSRA_ZZI_S: 19858 case AArch64::SSRA_ZZI_S: 19859 case AArch64::URSRA_ZZI_S: 19860 case AArch64::USRA_ZZI_S: { 19861 // op: Zda 19862 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19863 op &= UINT64_C(31); 19864 Value |= op; 19865 // op: Zn 19866 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19867 op &= UINT64_C(31); 19868 op <<= 5; 19869 Value |= op; 19870 // op: imm 19871 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 19872 op &= UINT64_C(31); 19873 op <<= 16; 19874 Value |= op; 19875 break; 19876 } 19877 case AArch64::SRSRA_ZZI_D: 19878 case AArch64::SSRA_ZZI_D: 19879 case AArch64::URSRA_ZZI_D: 19880 case AArch64::USRA_ZZI_D: { 19881 // op: Zda 19882 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19883 op &= UINT64_C(31); 19884 Value |= op; 19885 // op: Zn 19886 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19887 op &= UINT64_C(31); 19888 op <<= 5; 19889 Value |= op; 19890 // op: imm 19891 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 19892 Value |= (op & UINT64_C(32)) << 17; 19893 Value |= (op & UINT64_C(31)) << 16; 19894 break; 19895 } 19896 case AArch64::SRSRA_ZZI_B: 19897 case AArch64::SSRA_ZZI_B: 19898 case AArch64::URSRA_ZZI_B: 19899 case AArch64::USRA_ZZI_B: { 19900 // op: Zda 19901 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19902 op &= UINT64_C(31); 19903 Value |= op; 19904 // op: Zn 19905 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19906 op &= UINT64_C(31); 19907 op <<= 5; 19908 Value |= op; 19909 // op: imm 19910 op = getVecShiftR8OpValue(MI, 3, Fixups, STI); 19911 op &= UINT64_C(7); 19912 op <<= 16; 19913 Value |= op; 19914 break; 19915 } 19916 case AArch64::SDOT_ZZZI_D: 19917 case AArch64::UDOT_ZZZI_D: { 19918 // op: Zda 19919 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19920 op &= UINT64_C(31); 19921 Value |= op; 19922 // op: Zn 19923 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19924 op &= UINT64_C(31); 19925 op <<= 5; 19926 Value |= op; 19927 // op: iop 19928 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19929 op &= UINT64_C(1); 19930 op <<= 20; 19931 Value |= op; 19932 // op: Zm 19933 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19934 op &= UINT64_C(15); 19935 op <<= 16; 19936 Value |= op; 19937 break; 19938 } 19939 case AArch64::SDOT_ZZZI_S: 19940 case AArch64::UDOT_ZZZI_S: { 19941 // op: Zda 19942 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19943 op &= UINT64_C(31); 19944 Value |= op; 19945 // op: Zn 19946 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19947 op &= UINT64_C(31); 19948 op <<= 5; 19949 Value |= op; 19950 // op: iop 19951 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19952 op &= UINT64_C(3); 19953 op <<= 19; 19954 Value |= op; 19955 // op: Zm 19956 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19957 op &= UINT64_C(7); 19958 op <<= 16; 19959 Value |= op; 19960 break; 19961 } 19962 case AArch64::CDOT_ZZZI_D: 19963 case AArch64::CMLA_ZZZI_S: 19964 case AArch64::SQRDCMLAH_ZZZI_S: { 19965 // op: Zda 19966 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19967 op &= UINT64_C(31); 19968 Value |= op; 19969 // op: Zn 19970 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 19971 op &= UINT64_C(31); 19972 op <<= 5; 19973 Value |= op; 19974 // op: rot 19975 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 19976 op &= UINT64_C(3); 19977 op <<= 10; 19978 Value |= op; 19979 // op: iop 19980 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 19981 op &= UINT64_C(1); 19982 op <<= 20; 19983 Value |= op; 19984 // op: Zm 19985 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 19986 op &= UINT64_C(15); 19987 op <<= 16; 19988 Value |= op; 19989 break; 19990 } 19991 case AArch64::CDOT_ZZZI_S: 19992 case AArch64::CMLA_ZZZI_H: 19993 case AArch64::SQRDCMLAH_ZZZI_H: { 19994 // op: Zda 19995 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 19996 op &= UINT64_C(31); 19997 Value |= op; 19998 // op: Zn 19999 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20000 op &= UINT64_C(31); 20001 op <<= 5; 20002 Value |= op; 20003 // op: rot 20004 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 20005 op &= UINT64_C(3); 20006 op <<= 10; 20007 Value |= op; 20008 // op: iop 20009 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 20010 op &= UINT64_C(3); 20011 op <<= 19; 20012 Value |= op; 20013 // op: Zm 20014 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20015 op &= UINT64_C(7); 20016 op <<= 16; 20017 Value |= op; 20018 break; 20019 } 20020 case AArch64::AESIMC_ZZ_B: 20021 case AArch64::AESMC_ZZ_B: { 20022 // op: Zdn 20023 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20024 op &= UINT64_C(31); 20025 Value |= op; 20026 break; 20027 } 20028 case AArch64::BCAX_ZZZZ: 20029 case AArch64::BSL1N_ZZZZ: 20030 case AArch64::BSL2N_ZZZZ: 20031 case AArch64::BSL_ZZZZ: 20032 case AArch64::EOR3_ZZZZ: 20033 case AArch64::NBSL_ZZZZ: { 20034 // op: Zdn 20035 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20036 op &= UINT64_C(31); 20037 Value |= op; 20038 // op: Zk 20039 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20040 op &= UINT64_C(31); 20041 op <<= 5; 20042 Value |= op; 20043 // op: Zm 20044 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20045 op &= UINT64_C(31); 20046 op <<= 16; 20047 Value |= op; 20048 break; 20049 } 20050 case AArch64::AESD_ZZZ_B: 20051 case AArch64::AESE_ZZZ_B: 20052 case AArch64::SM4E_ZZZ_S: { 20053 // op: Zdn 20054 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20055 op &= UINT64_C(31); 20056 Value |= op; 20057 // op: Zm 20058 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20059 op &= UINT64_C(31); 20060 op <<= 5; 20061 Value |= op; 20062 break; 20063 } 20064 case AArch64::XAR_ZZZI_H: { 20065 // op: Zdn 20066 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20067 op &= UINT64_C(31); 20068 Value |= op; 20069 // op: Zm 20070 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20071 op &= UINT64_C(31); 20072 op <<= 5; 20073 Value |= op; 20074 // op: imm 20075 op = getVecShiftR16OpValue(MI, 3, Fixups, STI); 20076 op &= UINT64_C(15); 20077 op <<= 16; 20078 Value |= op; 20079 break; 20080 } 20081 case AArch64::XAR_ZZZI_S: { 20082 // op: Zdn 20083 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20084 op &= UINT64_C(31); 20085 Value |= op; 20086 // op: Zm 20087 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20088 op &= UINT64_C(31); 20089 op <<= 5; 20090 Value |= op; 20091 // op: imm 20092 op = getVecShiftR32OpValue(MI, 3, Fixups, STI); 20093 op &= UINT64_C(31); 20094 op <<= 16; 20095 Value |= op; 20096 break; 20097 } 20098 case AArch64::XAR_ZZZI_D: { 20099 // op: Zdn 20100 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20101 op &= UINT64_C(31); 20102 Value |= op; 20103 // op: Zm 20104 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20105 op &= UINT64_C(31); 20106 op <<= 5; 20107 Value |= op; 20108 // op: imm 20109 op = getVecShiftR64OpValue(MI, 3, Fixups, STI); 20110 Value |= (op & UINT64_C(32)) << 17; 20111 Value |= (op & UINT64_C(31)) << 16; 20112 break; 20113 } 20114 case AArch64::XAR_ZZZI_B: { 20115 // op: Zdn 20116 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20117 op &= UINT64_C(31); 20118 Value |= op; 20119 // op: Zm 20120 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20121 op &= UINT64_C(31); 20122 op <<= 5; 20123 Value |= op; 20124 // op: imm 20125 op = getVecShiftR8OpValue(MI, 3, Fixups, STI); 20126 op &= UINT64_C(7); 20127 op <<= 16; 20128 Value |= op; 20129 break; 20130 } 20131 case AArch64::FTMAD_ZZI_D: 20132 case AArch64::FTMAD_ZZI_H: 20133 case AArch64::FTMAD_ZZI_S: { 20134 // op: Zdn 20135 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20136 op &= UINT64_C(31); 20137 Value |= op; 20138 // op: Zm 20139 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20140 op &= UINT64_C(31); 20141 op <<= 5; 20142 Value |= op; 20143 // op: imm3 20144 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20145 op &= UINT64_C(7); 20146 op <<= 16; 20147 Value |= op; 20148 break; 20149 } 20150 case AArch64::EXTQ_ZZI: { 20151 // op: Zdn 20152 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20153 op &= UINT64_C(31); 20154 Value |= op; 20155 // op: Zm 20156 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20157 op &= UINT64_C(31); 20158 op <<= 5; 20159 Value |= op; 20160 // op: imm4 20161 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20162 op &= UINT64_C(15); 20163 op <<= 16; 20164 Value |= op; 20165 break; 20166 } 20167 case AArch64::EXT_ZZI: { 20168 // op: Zdn 20169 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20170 op &= UINT64_C(31); 20171 Value |= op; 20172 // op: Zm 20173 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20174 op &= UINT64_C(31); 20175 op <<= 5; 20176 Value |= op; 20177 // op: imm8 20178 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20179 Value |= (op & UINT64_C(248)) << 13; 20180 Value |= (op & UINT64_C(7)) << 10; 20181 break; 20182 } 20183 case AArch64::CADD_ZZI_B: 20184 case AArch64::CADD_ZZI_D: 20185 case AArch64::CADD_ZZI_H: 20186 case AArch64::CADD_ZZI_S: 20187 case AArch64::SQCADD_ZZI_B: 20188 case AArch64::SQCADD_ZZI_D: 20189 case AArch64::SQCADD_ZZI_H: 20190 case AArch64::SQCADD_ZZI_S: { 20191 // op: Zdn 20192 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20193 op &= UINT64_C(31); 20194 Value |= op; 20195 // op: Zm 20196 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20197 op &= UINT64_C(31); 20198 op <<= 5; 20199 Value |= op; 20200 // op: rot 20201 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20202 op &= UINT64_C(1); 20203 op <<= 10; 20204 Value |= op; 20205 break; 20206 } 20207 case AArch64::FCADD_ZPmZ_D: 20208 case AArch64::FCADD_ZPmZ_H: 20209 case AArch64::FCADD_ZPmZ_S: { 20210 // op: Zdn 20211 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20212 op &= UINT64_C(31); 20213 Value |= op; 20214 // op: Zm 20215 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20216 op &= UINT64_C(31); 20217 op <<= 5; 20218 Value |= op; 20219 // op: Pg 20220 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 20221 op &= UINT64_C(7); 20222 op <<= 10; 20223 Value |= op; 20224 // op: imm 20225 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 20226 op &= UINT64_C(1); 20227 op <<= 16; 20228 Value |= op; 20229 break; 20230 } 20231 case AArch64::ADD_ZI_B: 20232 case AArch64::ADD_ZI_D: 20233 case AArch64::ADD_ZI_H: 20234 case AArch64::ADD_ZI_S: 20235 case AArch64::SQADD_ZI_B: 20236 case AArch64::SQADD_ZI_D: 20237 case AArch64::SQADD_ZI_H: 20238 case AArch64::SQADD_ZI_S: 20239 case AArch64::SQSUB_ZI_B: 20240 case AArch64::SQSUB_ZI_D: 20241 case AArch64::SQSUB_ZI_H: 20242 case AArch64::SQSUB_ZI_S: 20243 case AArch64::SUBR_ZI_B: 20244 case AArch64::SUBR_ZI_D: 20245 case AArch64::SUBR_ZI_H: 20246 case AArch64::SUBR_ZI_S: 20247 case AArch64::SUB_ZI_B: 20248 case AArch64::SUB_ZI_D: 20249 case AArch64::SUB_ZI_H: 20250 case AArch64::SUB_ZI_S: 20251 case AArch64::UQADD_ZI_B: 20252 case AArch64::UQADD_ZI_D: 20253 case AArch64::UQADD_ZI_H: 20254 case AArch64::UQADD_ZI_S: 20255 case AArch64::UQSUB_ZI_B: 20256 case AArch64::UQSUB_ZI_D: 20257 case AArch64::UQSUB_ZI_H: 20258 case AArch64::UQSUB_ZI_S: { 20259 // op: Zdn 20260 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20261 op &= UINT64_C(31); 20262 Value |= op; 20263 // op: imm 20264 op = getImm8OptLsl(MI, 2, Fixups, STI); 20265 op &= UINT64_C(511); 20266 op <<= 5; 20267 Value |= op; 20268 break; 20269 } 20270 case AArch64::MUL_ZI_B: 20271 case AArch64::MUL_ZI_D: 20272 case AArch64::MUL_ZI_H: 20273 case AArch64::MUL_ZI_S: 20274 case AArch64::SMAX_ZI_B: 20275 case AArch64::SMAX_ZI_D: 20276 case AArch64::SMAX_ZI_H: 20277 case AArch64::SMAX_ZI_S: 20278 case AArch64::SMIN_ZI_B: 20279 case AArch64::SMIN_ZI_D: 20280 case AArch64::SMIN_ZI_H: 20281 case AArch64::SMIN_ZI_S: 20282 case AArch64::UMAX_ZI_B: 20283 case AArch64::UMAX_ZI_D: 20284 case AArch64::UMAX_ZI_H: 20285 case AArch64::UMAX_ZI_S: 20286 case AArch64::UMIN_ZI_B: 20287 case AArch64::UMIN_ZI_D: 20288 case AArch64::UMIN_ZI_H: 20289 case AArch64::UMIN_ZI_S: { 20290 // op: Zdn 20291 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20292 op &= UINT64_C(31); 20293 Value |= op; 20294 // op: imm 20295 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20296 op &= UINT64_C(255); 20297 op <<= 5; 20298 Value |= op; 20299 break; 20300 } 20301 case AArch64::AND_ZI: 20302 case AArch64::EOR_ZI: 20303 case AArch64::ORR_ZI: { 20304 // op: Zdn 20305 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20306 op &= UINT64_C(31); 20307 Value |= op; 20308 // op: imms13 20309 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20310 op &= UINT64_C(8191); 20311 op <<= 5; 20312 Value |= op; 20313 break; 20314 } 20315 case AArch64::DECD_ZPiI: 20316 case AArch64::DECH_ZPiI: 20317 case AArch64::DECW_ZPiI: 20318 case AArch64::INCD_ZPiI: 20319 case AArch64::INCH_ZPiI: 20320 case AArch64::INCW_ZPiI: 20321 case AArch64::SQDECD_ZPiI: 20322 case AArch64::SQDECH_ZPiI: 20323 case AArch64::SQDECW_ZPiI: 20324 case AArch64::SQINCD_ZPiI: 20325 case AArch64::SQINCH_ZPiI: 20326 case AArch64::SQINCW_ZPiI: 20327 case AArch64::UQDECD_ZPiI: 20328 case AArch64::UQDECH_ZPiI: 20329 case AArch64::UQDECW_ZPiI: 20330 case AArch64::UQINCD_ZPiI: 20331 case AArch64::UQINCH_ZPiI: 20332 case AArch64::UQINCW_ZPiI: { 20333 // op: Zdn 20334 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20335 op &= UINT64_C(31); 20336 Value |= op; 20337 // op: pattern 20338 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20339 op &= UINT64_C(31); 20340 op <<= 5; 20341 Value |= op; 20342 // op: imm4 20343 op = getSVEIncDecImm(MI, 3, Fixups, STI); 20344 op &= UINT64_C(15); 20345 op <<= 16; 20346 Value |= op; 20347 break; 20348 } 20349 case AArch64::BFMAXNM_VG2_2Z2Z_H: 20350 case AArch64::BFMAX_VG2_2Z2Z_H: 20351 case AArch64::BFMINNM_VG2_2Z2Z_H: 20352 case AArch64::BFMIN_VG2_2Z2Z_H: 20353 case AArch64::FMAXNM_VG2_2Z2Z_D: 20354 case AArch64::FMAXNM_VG2_2Z2Z_H: 20355 case AArch64::FMAXNM_VG2_2Z2Z_S: 20356 case AArch64::FMAX_VG2_2Z2Z_D: 20357 case AArch64::FMAX_VG2_2Z2Z_H: 20358 case AArch64::FMAX_VG2_2Z2Z_S: 20359 case AArch64::FMINNM_VG2_2Z2Z_D: 20360 case AArch64::FMINNM_VG2_2Z2Z_H: 20361 case AArch64::FMINNM_VG2_2Z2Z_S: 20362 case AArch64::FMIN_VG2_2Z2Z_D: 20363 case AArch64::FMIN_VG2_2Z2Z_H: 20364 case AArch64::FMIN_VG2_2Z2Z_S: 20365 case AArch64::SMAX_VG2_2Z2Z_B: 20366 case AArch64::SMAX_VG2_2Z2Z_D: 20367 case AArch64::SMAX_VG2_2Z2Z_H: 20368 case AArch64::SMAX_VG2_2Z2Z_S: 20369 case AArch64::SMIN_VG2_2Z2Z_B: 20370 case AArch64::SMIN_VG2_2Z2Z_D: 20371 case AArch64::SMIN_VG2_2Z2Z_H: 20372 case AArch64::SMIN_VG2_2Z2Z_S: 20373 case AArch64::SQDMULH_VG2_2Z2Z_B: 20374 case AArch64::SQDMULH_VG2_2Z2Z_D: 20375 case AArch64::SQDMULH_VG2_2Z2Z_H: 20376 case AArch64::SQDMULH_VG2_2Z2Z_S: 20377 case AArch64::SRSHL_VG2_2Z2Z_B: 20378 case AArch64::SRSHL_VG2_2Z2Z_D: 20379 case AArch64::SRSHL_VG2_2Z2Z_H: 20380 case AArch64::SRSHL_VG2_2Z2Z_S: 20381 case AArch64::UMAX_VG2_2Z2Z_B: 20382 case AArch64::UMAX_VG2_2Z2Z_D: 20383 case AArch64::UMAX_VG2_2Z2Z_H: 20384 case AArch64::UMAX_VG2_2Z2Z_S: 20385 case AArch64::UMIN_VG2_2Z2Z_B: 20386 case AArch64::UMIN_VG2_2Z2Z_D: 20387 case AArch64::UMIN_VG2_2Z2Z_H: 20388 case AArch64::UMIN_VG2_2Z2Z_S: 20389 case AArch64::URSHL_VG2_2Z2Z_B: 20390 case AArch64::URSHL_VG2_2Z2Z_D: 20391 case AArch64::URSHL_VG2_2Z2Z_H: 20392 case AArch64::URSHL_VG2_2Z2Z_S: { 20393 // op: Zm 20394 op = EncodeRegAsMultipleOf<2>(MI, 2, Fixups, STI); 20395 op &= UINT64_C(15); 20396 op <<= 17; 20397 Value |= op; 20398 // op: Zdn 20399 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 20400 op &= UINT64_C(15); 20401 op <<= 1; 20402 Value |= op; 20403 break; 20404 } 20405 case AArch64::SMLALL_VG2_M2Z2Z_BtoS: 20406 case AArch64::SMLALL_VG2_M2Z2Z_HtoD: 20407 case AArch64::SMLSLL_VG2_M2Z2Z_BtoS: 20408 case AArch64::SMLSLL_VG2_M2Z2Z_HtoD: 20409 case AArch64::UMLALL_VG2_M2Z2Z_BtoS: 20410 case AArch64::UMLALL_VG2_M2Z2Z_HtoD: 20411 case AArch64::UMLSLL_VG2_M2Z2Z_BtoS: 20412 case AArch64::UMLSLL_VG2_M2Z2Z_HtoD: 20413 case AArch64::USMLALL_VG2_M2Z2Z_BtoS: { 20414 // op: Zm 20415 op = EncodeRegAsMultipleOf<2>(MI, 5, Fixups, STI); 20416 op &= UINT64_C(15); 20417 op <<= 17; 20418 Value |= op; 20419 // op: Rv 20420 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20421 op &= UINT64_C(3); 20422 op <<= 13; 20423 Value |= op; 20424 // op: Zn 20425 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 20426 op &= UINT64_C(15); 20427 op <<= 6; 20428 Value |= op; 20429 // op: imm 20430 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20431 op &= UINT64_C(1); 20432 Value |= op; 20433 break; 20434 } 20435 case AArch64::ADD_VG2_M2Z2Z_D: 20436 case AArch64::ADD_VG2_M2Z2Z_S: 20437 case AArch64::BFDOT_VG2_M2Z2Z_HtoS: 20438 case AArch64::BFMLA_VG2_M2Z2Z: 20439 case AArch64::BFMLS_VG2_M2Z2Z: 20440 case AArch64::FDOT_VG2_M2Z2Z_HtoS: 20441 case AArch64::FMLA_VG2_M2Z2Z_D: 20442 case AArch64::FMLA_VG2_M2Z2Z_S: 20443 case AArch64::FMLA_VG2_M2Z4Z_H: 20444 case AArch64::FMLS_VG2_M2Z2Z_D: 20445 case AArch64::FMLS_VG2_M2Z2Z_H: 20446 case AArch64::FMLS_VG2_M2Z2Z_S: 20447 case AArch64::SDOT_VG2_M2Z2Z_BtoS: 20448 case AArch64::SDOT_VG2_M2Z2Z_HtoD: 20449 case AArch64::SDOT_VG2_M2Z2Z_HtoS: 20450 case AArch64::SUB_VG2_M2Z2Z_D: 20451 case AArch64::SUB_VG2_M2Z2Z_S: 20452 case AArch64::UDOT_VG2_M2Z2Z_BtoS: 20453 case AArch64::UDOT_VG2_M2Z2Z_HtoD: 20454 case AArch64::UDOT_VG2_M2Z2Z_HtoS: 20455 case AArch64::USDOT_VG2_M2Z2Z_BToS: { 20456 // op: Zm 20457 op = EncodeRegAsMultipleOf<2>(MI, 5, Fixups, STI); 20458 op &= UINT64_C(15); 20459 op <<= 17; 20460 Value |= op; 20461 // op: Zn 20462 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 20463 op &= UINT64_C(15); 20464 op <<= 6; 20465 Value |= op; 20466 // op: Rv 20467 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20468 op &= UINT64_C(3); 20469 op <<= 13; 20470 Value |= op; 20471 // op: imm3 20472 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20473 op &= UINT64_C(7); 20474 Value |= op; 20475 break; 20476 } 20477 case AArch64::BFMAXNM_VG4_4Z2Z_H: 20478 case AArch64::BFMAX_VG4_4Z2Z_H: 20479 case AArch64::BFMINNM_VG4_4Z2Z_H: 20480 case AArch64::BFMIN_VG4_4Z2Z_H: 20481 case AArch64::FMAXNM_VG4_4Z4Z_D: 20482 case AArch64::FMAXNM_VG4_4Z4Z_H: 20483 case AArch64::FMAXNM_VG4_4Z4Z_S: 20484 case AArch64::FMAX_VG4_4Z4Z_D: 20485 case AArch64::FMAX_VG4_4Z4Z_H: 20486 case AArch64::FMAX_VG4_4Z4Z_S: 20487 case AArch64::FMINNM_VG4_4Z4Z_D: 20488 case AArch64::FMINNM_VG4_4Z4Z_H: 20489 case AArch64::FMINNM_VG4_4Z4Z_S: 20490 case AArch64::FMIN_VG4_4Z4Z_D: 20491 case AArch64::FMIN_VG4_4Z4Z_H: 20492 case AArch64::FMIN_VG4_4Z4Z_S: 20493 case AArch64::SMAX_VG4_4Z4Z_B: 20494 case AArch64::SMAX_VG4_4Z4Z_D: 20495 case AArch64::SMAX_VG4_4Z4Z_H: 20496 case AArch64::SMAX_VG4_4Z4Z_S: 20497 case AArch64::SMIN_VG4_4Z4Z_B: 20498 case AArch64::SMIN_VG4_4Z4Z_D: 20499 case AArch64::SMIN_VG4_4Z4Z_H: 20500 case AArch64::SMIN_VG4_4Z4Z_S: 20501 case AArch64::SQDMULH_VG4_4Z4Z_B: 20502 case AArch64::SQDMULH_VG4_4Z4Z_D: 20503 case AArch64::SQDMULH_VG4_4Z4Z_H: 20504 case AArch64::SQDMULH_VG4_4Z4Z_S: 20505 case AArch64::SRSHL_VG4_4Z4Z_B: 20506 case AArch64::SRSHL_VG4_4Z4Z_D: 20507 case AArch64::SRSHL_VG4_4Z4Z_H: 20508 case AArch64::SRSHL_VG4_4Z4Z_S: 20509 case AArch64::UMAX_VG4_4Z4Z_B: 20510 case AArch64::UMAX_VG4_4Z4Z_D: 20511 case AArch64::UMAX_VG4_4Z4Z_H: 20512 case AArch64::UMAX_VG4_4Z4Z_S: 20513 case AArch64::UMIN_VG4_4Z4Z_B: 20514 case AArch64::UMIN_VG4_4Z4Z_D: 20515 case AArch64::UMIN_VG4_4Z4Z_H: 20516 case AArch64::UMIN_VG4_4Z4Z_S: 20517 case AArch64::URSHL_VG4_4Z4Z_B: 20518 case AArch64::URSHL_VG4_4Z4Z_D: 20519 case AArch64::URSHL_VG4_4Z4Z_H: 20520 case AArch64::URSHL_VG4_4Z4Z_S: { 20521 // op: Zm 20522 op = EncodeRegAsMultipleOf<4>(MI, 2, Fixups, STI); 20523 op &= UINT64_C(7); 20524 op <<= 18; 20525 Value |= op; 20526 // op: Zdn 20527 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 20528 op &= UINT64_C(7); 20529 op <<= 2; 20530 Value |= op; 20531 break; 20532 } 20533 case AArch64::SMLALL_VG4_M4Z4Z_BtoS: 20534 case AArch64::SMLALL_VG4_M4Z4Z_HtoD: 20535 case AArch64::SMLSLL_VG4_M4Z4Z_BtoS: 20536 case AArch64::SMLSLL_VG4_M4Z4Z_HtoD: 20537 case AArch64::UMLALL_VG4_M4Z4Z_BtoS: 20538 case AArch64::UMLALL_VG4_M4Z4Z_HtoD: 20539 case AArch64::UMLSLL_VG4_M4Z4Z_BtoS: 20540 case AArch64::UMLSLL_VG4_M4Z4Z_HtoD: 20541 case AArch64::USMLALL_VG4_M4Z4Z_BtoS: { 20542 // op: Zm 20543 op = EncodeRegAsMultipleOf<4>(MI, 5, Fixups, STI); 20544 op &= UINT64_C(7); 20545 op <<= 18; 20546 Value |= op; 20547 // op: Rv 20548 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20549 op &= UINT64_C(3); 20550 op <<= 13; 20551 Value |= op; 20552 // op: Zn 20553 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 20554 op &= UINT64_C(7); 20555 op <<= 7; 20556 Value |= op; 20557 // op: imm 20558 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20559 op &= UINT64_C(1); 20560 Value |= op; 20561 break; 20562 } 20563 case AArch64::ADD_VG4_M4Z4Z_D: 20564 case AArch64::ADD_VG4_M4Z4Z_S: 20565 case AArch64::BFDOT_VG4_M4Z4Z_HtoS: 20566 case AArch64::BFMLA_VG4_M4Z4Z: 20567 case AArch64::BFMLS_VG4_M4Z4Z: 20568 case AArch64::FDOT_VG4_M4Z4Z_HtoS: 20569 case AArch64::FMLA_VG4_M4Z4Z_D: 20570 case AArch64::FMLA_VG4_M4Z4Z_H: 20571 case AArch64::FMLA_VG4_M4Z4Z_S: 20572 case AArch64::FMLS_VG4_M4Z2Z_H: 20573 case AArch64::FMLS_VG4_M4Z4Z_D: 20574 case AArch64::FMLS_VG4_M4Z4Z_S: 20575 case AArch64::SDOT_VG4_M4Z4Z_BtoS: 20576 case AArch64::SDOT_VG4_M4Z4Z_HtoD: 20577 case AArch64::SDOT_VG4_M4Z4Z_HtoS: 20578 case AArch64::SUB_VG4_M4Z4Z_D: 20579 case AArch64::SUB_VG4_M4Z4Z_S: 20580 case AArch64::UDOT_VG4_M4Z4Z_BtoS: 20581 case AArch64::UDOT_VG4_M4Z4Z_HtoD: 20582 case AArch64::UDOT_VG4_M4Z4Z_HtoS: 20583 case AArch64::USDOT_VG4_M4Z4Z_BToS: { 20584 // op: Zm 20585 op = EncodeRegAsMultipleOf<4>(MI, 5, Fixups, STI); 20586 op &= UINT64_C(7); 20587 op <<= 18; 20588 Value |= op; 20589 // op: Zn 20590 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 20591 op &= UINT64_C(7); 20592 op <<= 7; 20593 Value |= op; 20594 // op: Rv 20595 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20596 op &= UINT64_C(3); 20597 op <<= 13; 20598 Value |= op; 20599 // op: imm3 20600 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20601 op &= UINT64_C(7); 20602 Value |= op; 20603 break; 20604 } 20605 case AArch64::ADD_VG2_2ZZ_B: 20606 case AArch64::ADD_VG2_2ZZ_D: 20607 case AArch64::ADD_VG2_2ZZ_H: 20608 case AArch64::ADD_VG2_2ZZ_S: 20609 case AArch64::BFMAXNM_VG2_2ZZ_H: 20610 case AArch64::BFMAX_VG2_2ZZ_H: 20611 case AArch64::BFMINNM_VG2_2ZZ_H: 20612 case AArch64::BFMIN_VG2_2ZZ_H: 20613 case AArch64::FMAXNM_VG2_2ZZ_D: 20614 case AArch64::FMAXNM_VG2_2ZZ_H: 20615 case AArch64::FMAXNM_VG2_2ZZ_S: 20616 case AArch64::FMAX_VG2_2ZZ_D: 20617 case AArch64::FMAX_VG2_2ZZ_H: 20618 case AArch64::FMAX_VG2_2ZZ_S: 20619 case AArch64::FMINNM_VG2_2ZZ_D: 20620 case AArch64::FMINNM_VG2_2ZZ_H: 20621 case AArch64::FMINNM_VG2_2ZZ_S: 20622 case AArch64::FMIN_VG2_2ZZ_D: 20623 case AArch64::FMIN_VG2_2ZZ_H: 20624 case AArch64::FMIN_VG2_2ZZ_S: 20625 case AArch64::SMAX_VG2_2ZZ_B: 20626 case AArch64::SMAX_VG2_2ZZ_D: 20627 case AArch64::SMAX_VG2_2ZZ_H: 20628 case AArch64::SMAX_VG2_2ZZ_S: 20629 case AArch64::SMIN_VG2_2ZZ_B: 20630 case AArch64::SMIN_VG2_2ZZ_D: 20631 case AArch64::SMIN_VG2_2ZZ_H: 20632 case AArch64::SMIN_VG2_2ZZ_S: 20633 case AArch64::SQDMULH_VG2_2ZZ_B: 20634 case AArch64::SQDMULH_VG2_2ZZ_D: 20635 case AArch64::SQDMULH_VG2_2ZZ_H: 20636 case AArch64::SQDMULH_VG2_2ZZ_S: 20637 case AArch64::SRSHL_VG2_2ZZ_B: 20638 case AArch64::SRSHL_VG2_2ZZ_D: 20639 case AArch64::SRSHL_VG2_2ZZ_H: 20640 case AArch64::SRSHL_VG2_2ZZ_S: 20641 case AArch64::UMAX_VG2_2ZZ_B: 20642 case AArch64::UMAX_VG2_2ZZ_D: 20643 case AArch64::UMAX_VG2_2ZZ_H: 20644 case AArch64::UMAX_VG2_2ZZ_S: 20645 case AArch64::UMIN_VG2_2ZZ_B: 20646 case AArch64::UMIN_VG2_2ZZ_D: 20647 case AArch64::UMIN_VG2_2ZZ_H: 20648 case AArch64::UMIN_VG2_2ZZ_S: 20649 case AArch64::URSHL_VG2_2ZZ_B: 20650 case AArch64::URSHL_VG2_2ZZ_D: 20651 case AArch64::URSHL_VG2_2ZZ_H: 20652 case AArch64::URSHL_VG2_2ZZ_S: { 20653 // op: Zm 20654 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20655 op &= UINT64_C(15); 20656 op <<= 16; 20657 Value |= op; 20658 // op: Zdn 20659 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 20660 op &= UINT64_C(15); 20661 op <<= 1; 20662 Value |= op; 20663 break; 20664 } 20665 case AArch64::ADD_VG4_4ZZ_B: 20666 case AArch64::ADD_VG4_4ZZ_D: 20667 case AArch64::ADD_VG4_4ZZ_H: 20668 case AArch64::ADD_VG4_4ZZ_S: 20669 case AArch64::BFMAXNM_VG4_4ZZ_H: 20670 case AArch64::BFMAX_VG4_4ZZ_H: 20671 case AArch64::BFMINNM_VG4_4ZZ_H: 20672 case AArch64::BFMIN_VG4_4ZZ_H: 20673 case AArch64::FMAXNM_VG4_4ZZ_D: 20674 case AArch64::FMAXNM_VG4_4ZZ_H: 20675 case AArch64::FMAXNM_VG4_4ZZ_S: 20676 case AArch64::FMAX_VG4_4ZZ_D: 20677 case AArch64::FMAX_VG4_4ZZ_H: 20678 case AArch64::FMAX_VG4_4ZZ_S: 20679 case AArch64::FMINNM_VG4_4ZZ_D: 20680 case AArch64::FMINNM_VG4_4ZZ_H: 20681 case AArch64::FMINNM_VG4_4ZZ_S: 20682 case AArch64::FMIN_VG4_4ZZ_D: 20683 case AArch64::FMIN_VG4_4ZZ_H: 20684 case AArch64::FMIN_VG4_4ZZ_S: 20685 case AArch64::SMAX_VG4_4ZZ_B: 20686 case AArch64::SMAX_VG4_4ZZ_D: 20687 case AArch64::SMAX_VG4_4ZZ_H: 20688 case AArch64::SMAX_VG4_4ZZ_S: 20689 case AArch64::SMIN_VG4_4ZZ_B: 20690 case AArch64::SMIN_VG4_4ZZ_D: 20691 case AArch64::SMIN_VG4_4ZZ_H: 20692 case AArch64::SMIN_VG4_4ZZ_S: 20693 case AArch64::SQDMULH_VG4_4ZZ_B: 20694 case AArch64::SQDMULH_VG4_4ZZ_D: 20695 case AArch64::SQDMULH_VG4_4ZZ_H: 20696 case AArch64::SQDMULH_VG4_4ZZ_S: 20697 case AArch64::SRSHL_VG4_4ZZ_B: 20698 case AArch64::SRSHL_VG4_4ZZ_D: 20699 case AArch64::SRSHL_VG4_4ZZ_H: 20700 case AArch64::SRSHL_VG4_4ZZ_S: 20701 case AArch64::UMAX_VG4_4ZZ_B: 20702 case AArch64::UMAX_VG4_4ZZ_D: 20703 case AArch64::UMAX_VG4_4ZZ_H: 20704 case AArch64::UMAX_VG4_4ZZ_S: 20705 case AArch64::UMIN_VG4_4ZZ_B: 20706 case AArch64::UMIN_VG4_4ZZ_D: 20707 case AArch64::UMIN_VG4_4ZZ_H: 20708 case AArch64::UMIN_VG4_4ZZ_S: 20709 case AArch64::URSHL_VG4_4ZZ_B: 20710 case AArch64::URSHL_VG4_4ZZ_D: 20711 case AArch64::URSHL_VG4_4ZZ_H: 20712 case AArch64::URSHL_VG4_4ZZ_S: { 20713 // op: Zm 20714 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20715 op &= UINT64_C(15); 20716 op <<= 16; 20717 Value |= op; 20718 // op: Zdn 20719 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 20720 op &= UINT64_C(7); 20721 op <<= 2; 20722 Value |= op; 20723 break; 20724 } 20725 case AArch64::SCLAMP_ZZZ_B: 20726 case AArch64::SCLAMP_ZZZ_D: 20727 case AArch64::SCLAMP_ZZZ_H: 20728 case AArch64::SCLAMP_ZZZ_S: 20729 case AArch64::UCLAMP_ZZZ_B: 20730 case AArch64::UCLAMP_ZZZ_D: 20731 case AArch64::UCLAMP_ZZZ_H: 20732 case AArch64::UCLAMP_ZZZ_S: { 20733 // op: Zm 20734 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20735 op &= UINT64_C(31); 20736 op <<= 16; 20737 Value |= op; 20738 // op: Zn 20739 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 20740 op &= UINT64_C(31); 20741 op <<= 5; 20742 Value |= op; 20743 // op: Zd 20744 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20745 op &= UINT64_C(31); 20746 Value |= op; 20747 break; 20748 } 20749 case AArch64::BFMMLA_ZZZ: { 20750 // op: Zm 20751 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20752 op &= UINT64_C(31); 20753 op <<= 16; 20754 Value |= op; 20755 // op: Zda 20756 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20757 op &= UINT64_C(31); 20758 Value |= op; 20759 // op: Zn 20760 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20761 op &= UINT64_C(31); 20762 op <<= 5; 20763 Value |= op; 20764 break; 20765 } 20766 case AArch64::BFCLAMP_VG2_2ZZZ_H: 20767 case AArch64::FCLAMP_VG2_2Z2Z_D: 20768 case AArch64::FCLAMP_VG2_2Z2Z_H: 20769 case AArch64::FCLAMP_VG2_2Z2Z_S: 20770 case AArch64::SCLAMP_VG2_2Z2Z_B: 20771 case AArch64::SCLAMP_VG2_2Z2Z_D: 20772 case AArch64::SCLAMP_VG2_2Z2Z_H: 20773 case AArch64::SCLAMP_VG2_2Z2Z_S: 20774 case AArch64::UCLAMP_VG2_2Z2Z_B: 20775 case AArch64::UCLAMP_VG2_2Z2Z_D: 20776 case AArch64::UCLAMP_VG2_2Z2Z_H: 20777 case AArch64::UCLAMP_VG2_2Z2Z_S: { 20778 // op: Zm 20779 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20780 op &= UINT64_C(31); 20781 op <<= 16; 20782 Value |= op; 20783 // op: Zn 20784 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20785 op &= UINT64_C(31); 20786 op <<= 5; 20787 Value |= op; 20788 // op: Zd 20789 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 20790 op &= UINT64_C(15); 20791 op <<= 1; 20792 Value |= op; 20793 break; 20794 } 20795 case AArch64::BFCLAMP_VG4_4ZZZ_H: 20796 case AArch64::FCLAMP_VG4_4Z4Z_D: 20797 case AArch64::FCLAMP_VG4_4Z4Z_H: 20798 case AArch64::FCLAMP_VG4_4Z4Z_S: 20799 case AArch64::SCLAMP_VG4_4Z4Z_B: 20800 case AArch64::SCLAMP_VG4_4Z4Z_D: 20801 case AArch64::SCLAMP_VG4_4Z4Z_H: 20802 case AArch64::SCLAMP_VG4_4Z4Z_S: 20803 case AArch64::UCLAMP_VG4_4Z4Z_B: 20804 case AArch64::UCLAMP_VG4_4Z4Z_D: 20805 case AArch64::UCLAMP_VG4_4Z4Z_H: 20806 case AArch64::UCLAMP_VG4_4Z4Z_S: { 20807 // op: Zm 20808 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20809 op &= UINT64_C(31); 20810 op <<= 16; 20811 Value |= op; 20812 // op: Zn 20813 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20814 op &= UINT64_C(31); 20815 op <<= 5; 20816 Value |= op; 20817 // op: Zd 20818 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 20819 op &= UINT64_C(7); 20820 op <<= 2; 20821 Value |= op; 20822 break; 20823 } 20824 case AArch64::BFCLAMP_ZZZ: 20825 case AArch64::FCLAMP_ZZZ_D: 20826 case AArch64::FCLAMP_ZZZ_H: 20827 case AArch64::FCLAMP_ZZZ_S: { 20828 // op: Zm 20829 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20830 op &= UINT64_C(31); 20831 op <<= 16; 20832 Value |= op; 20833 // op: Zn 20834 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 20835 op &= UINT64_C(31); 20836 op <<= 5; 20837 Value |= op; 20838 // op: Zd 20839 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 20840 op &= UINT64_C(31); 20841 Value |= op; 20842 break; 20843 } 20844 case AArch64::BFMLA_VG2_M2ZZI: 20845 case AArch64::BFMLS_VG2_M2ZZI: 20846 case AArch64::FMLA_VG2_M2ZZI_H: 20847 case AArch64::FMLS_VG2_M2ZZI_H: { 20848 // op: Zm 20849 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 20850 op &= UINT64_C(15); 20851 op <<= 16; 20852 Value |= op; 20853 // op: Rv 20854 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20855 op &= UINT64_C(3); 20856 op <<= 13; 20857 Value |= op; 20858 // op: Zn 20859 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 20860 op &= UINT64_C(15); 20861 op <<= 6; 20862 Value |= op; 20863 // op: imm3 20864 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20865 op &= UINT64_C(7); 20866 Value |= op; 20867 // op: i 20868 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 20869 Value |= (op & UINT64_C(6)) << 9; 20870 Value |= (op & UINT64_C(1)) << 3; 20871 break; 20872 } 20873 case AArch64::BFDOT_VG2_M2ZZI_HtoS: 20874 case AArch64::BFVDOT_VG2_M2ZZI_HtoS: 20875 case AArch64::FDOT_VG2_M2ZZI_HtoS: 20876 case AArch64::FMLA_VG2_M2ZZI_S: 20877 case AArch64::FMLS_VG2_M2ZZI_S: 20878 case AArch64::FVDOT_VG2_M2ZZI_HtoS: 20879 case AArch64::SDOT_VG2_M2ZZI_BToS: 20880 case AArch64::SDOT_VG2_M2ZZI_HToS: 20881 case AArch64::SUDOT_VG2_M2ZZI_BToS: 20882 case AArch64::SVDOT_VG2_M2ZZI_HtoS: 20883 case AArch64::UDOT_VG2_M2ZZI_BToS: 20884 case AArch64::UDOT_VG2_M2ZZI_HToS: 20885 case AArch64::USDOT_VG2_M2ZZI_BToS: 20886 case AArch64::UVDOT_VG2_M2ZZI_HtoS: { 20887 // op: Zm 20888 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 20889 op &= UINT64_C(15); 20890 op <<= 16; 20891 Value |= op; 20892 // op: Rv 20893 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20894 op &= UINT64_C(3); 20895 op <<= 13; 20896 Value |= op; 20897 // op: Zn 20898 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 20899 op &= UINT64_C(15); 20900 op <<= 6; 20901 Value |= op; 20902 // op: imm3 20903 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20904 op &= UINT64_C(7); 20905 Value |= op; 20906 // op: i 20907 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 20908 op &= UINT64_C(3); 20909 op <<= 10; 20910 Value |= op; 20911 break; 20912 } 20913 case AArch64::BFMLA_VG4_M4ZZI: 20914 case AArch64::BFMLS_VG4_M4ZZI: 20915 case AArch64::FMLA_VG4_M4ZZI_H: 20916 case AArch64::FMLS_VG4_M4ZZI_H: { 20917 // op: Zm 20918 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 20919 op &= UINT64_C(15); 20920 op <<= 16; 20921 Value |= op; 20922 // op: Rv 20923 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20924 op &= UINT64_C(3); 20925 op <<= 13; 20926 Value |= op; 20927 // op: Zn 20928 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 20929 op &= UINT64_C(7); 20930 op <<= 7; 20931 Value |= op; 20932 // op: imm3 20933 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20934 op &= UINT64_C(7); 20935 Value |= op; 20936 // op: i 20937 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 20938 Value |= (op & UINT64_C(6)) << 9; 20939 Value |= (op & UINT64_C(1)) << 3; 20940 break; 20941 } 20942 case AArch64::BFDOT_VG4_M4ZZI_HtoS: 20943 case AArch64::FDOT_VG4_M4ZZI_HtoS: 20944 case AArch64::FMLA_VG4_M4ZZI_S: 20945 case AArch64::FMLS_VG4_M4ZZI_S: 20946 case AArch64::SDOT_VG4_M4ZZI_BToS: 20947 case AArch64::SDOT_VG4_M4ZZI_HToS: 20948 case AArch64::SUDOT_VG4_M4ZZI_BToS: 20949 case AArch64::SUVDOT_VG4_M4ZZI_BToS: 20950 case AArch64::SVDOT_VG4_M4ZZI_BtoS: 20951 case AArch64::UDOT_VG4_M4ZZI_BtoS: 20952 case AArch64::UDOT_VG4_M4ZZI_HToS: 20953 case AArch64::USDOT_VG4_M4ZZI_BToS: 20954 case AArch64::USVDOT_VG4_M4ZZI_BToS: 20955 case AArch64::UVDOT_VG4_M4ZZI_BtoS: { 20956 // op: Zm 20957 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 20958 op &= UINT64_C(15); 20959 op <<= 16; 20960 Value |= op; 20961 // op: Rv 20962 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 20963 op &= UINT64_C(3); 20964 op <<= 13; 20965 Value |= op; 20966 // op: Zn 20967 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 20968 op &= UINT64_C(7); 20969 op <<= 7; 20970 Value |= op; 20971 // op: imm3 20972 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 20973 op &= UINT64_C(7); 20974 Value |= op; 20975 // op: i 20976 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 20977 op &= UINT64_C(3); 20978 op <<= 10; 20979 Value |= op; 20980 break; 20981 } 20982 case AArch64::SMLALL_VG2_M2ZZ_BtoS: 20983 case AArch64::SMLALL_VG2_M2ZZ_HtoD: 20984 case AArch64::SMLALL_VG4_M4ZZ_BtoS: 20985 case AArch64::SMLALL_VG4_M4ZZ_HtoD: 20986 case AArch64::SMLSLL_VG2_M2ZZ_BtoS: 20987 case AArch64::SMLSLL_VG2_M2ZZ_HtoD: 20988 case AArch64::SMLSLL_VG4_M4ZZ_BtoS: 20989 case AArch64::SMLSLL_VG4_M4ZZ_HtoD: 20990 case AArch64::SUMLALL_VG2_M2ZZ_BtoS: 20991 case AArch64::SUMLALL_VG4_M4ZZ_BtoS: 20992 case AArch64::UMLALL_VG2_M2ZZ_BtoS: 20993 case AArch64::UMLALL_VG2_M2ZZ_HtoD: 20994 case AArch64::UMLALL_VG4_M4ZZ_BtoS: 20995 case AArch64::UMLALL_VG4_M4ZZ_HtoD: 20996 case AArch64::UMLSLL_VG2_M2ZZ_BtoS: 20997 case AArch64::UMLSLL_VG2_M2ZZ_HtoD: 20998 case AArch64::UMLSLL_VG4_M4ZZ_BtoS: 20999 case AArch64::UMLSLL_VG4_M4ZZ_HtoD: 21000 case AArch64::USMLALL_VG2_M2ZZ_BtoS: 21001 case AArch64::USMLALL_VG4_M4ZZ_BtoS: { 21002 // op: Zm 21003 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21004 op &= UINT64_C(15); 21005 op <<= 16; 21006 Value |= op; 21007 // op: Rv 21008 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21009 op &= UINT64_C(3); 21010 op <<= 13; 21011 Value |= op; 21012 // op: Zn 21013 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21014 op &= UINT64_C(31); 21015 op <<= 5; 21016 Value |= op; 21017 // op: imm 21018 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21019 op &= UINT64_C(1); 21020 Value |= op; 21021 break; 21022 } 21023 case AArch64::SMLALL_MZZ_BtoS: 21024 case AArch64::SMLALL_MZZ_HtoD: 21025 case AArch64::SMLSLL_MZZ_BtoS: 21026 case AArch64::SMLSLL_MZZ_HtoD: 21027 case AArch64::UMLALL_MZZ_BtoS: 21028 case AArch64::UMLALL_MZZ_HtoD: 21029 case AArch64::UMLSLL_MZZ_BtoS: 21030 case AArch64::UMLSLL_MZZ_HtoD: 21031 case AArch64::USMLALL_MZZ_BtoS: { 21032 // op: Zm 21033 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21034 op &= UINT64_C(15); 21035 op <<= 16; 21036 Value |= op; 21037 // op: Rv 21038 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21039 op &= UINT64_C(3); 21040 op <<= 13; 21041 Value |= op; 21042 // op: Zn 21043 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21044 op &= UINT64_C(31); 21045 op <<= 5; 21046 Value |= op; 21047 // op: imm 21048 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21049 op &= UINT64_C(3); 21050 Value |= op; 21051 break; 21052 } 21053 case AArch64::SMLALL_VG2_M2ZZI_BtoS: 21054 case AArch64::SMLSLL_VG2_M2ZZI_BtoS: 21055 case AArch64::SUMLALL_VG2_M2ZZI_BtoS: 21056 case AArch64::UMLALL_VG2_M2ZZI_BtoS: 21057 case AArch64::UMLSLL_VG2_M2ZZI_BtoS: 21058 case AArch64::USMLALL_VG2_M2ZZI_BtoS: { 21059 // op: Zm 21060 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21061 op &= UINT64_C(15); 21062 op <<= 16; 21063 Value |= op; 21064 // op: Rv 21065 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21066 op &= UINT64_C(3); 21067 op <<= 13; 21068 Value |= op; 21069 // op: i 21070 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21071 Value |= (op & UINT64_C(12)) << 8; 21072 Value |= (op & UINT64_C(3)) << 1; 21073 // op: imm 21074 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21075 op &= UINT64_C(1); 21076 Value |= op; 21077 // op: Zn 21078 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 21079 op &= UINT64_C(15); 21080 op <<= 6; 21081 Value |= op; 21082 break; 21083 } 21084 case AArch64::SMLALL_VG4_M4ZZI_BtoS: 21085 case AArch64::SMLSLL_VG4_M4ZZI_BtoS: 21086 case AArch64::SUMLALL_VG4_M4ZZI_BtoS: 21087 case AArch64::UMLALL_VG4_M4ZZI_BtoS: 21088 case AArch64::UMLSLL_VG4_M4ZZI_BtoS: 21089 case AArch64::USMLALL_VG4_M4ZZI_BtoS: { 21090 // op: Zm 21091 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21092 op &= UINT64_C(15); 21093 op <<= 16; 21094 Value |= op; 21095 // op: Rv 21096 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21097 op &= UINT64_C(3); 21098 op <<= 13; 21099 Value |= op; 21100 // op: i 21101 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21102 Value |= (op & UINT64_C(12)) << 8; 21103 Value |= (op & UINT64_C(3)) << 1; 21104 // op: imm 21105 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21106 op &= UINT64_C(1); 21107 Value |= op; 21108 // op: Zn 21109 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 21110 op &= UINT64_C(7); 21111 op <<= 7; 21112 Value |= op; 21113 break; 21114 } 21115 case AArch64::SMLALL_MZZI_HtoD: 21116 case AArch64::SMLSLL_MZZI_HtoD: 21117 case AArch64::UMLALL_MZZI_HtoD: 21118 case AArch64::UMLSLL_MZZI_HtoD: { 21119 // op: Zm 21120 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21121 op &= UINT64_C(15); 21122 op <<= 16; 21123 Value |= op; 21124 // op: Rv 21125 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21126 op &= UINT64_C(3); 21127 op <<= 13; 21128 Value |= op; 21129 // op: i 21130 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21131 Value |= (op & UINT64_C(4)) << 13; 21132 Value |= (op & UINT64_C(3)) << 10; 21133 // op: Zn 21134 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21135 op &= UINT64_C(31); 21136 op <<= 5; 21137 Value |= op; 21138 // op: imm2 21139 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21140 op &= UINT64_C(3); 21141 Value |= op; 21142 break; 21143 } 21144 case AArch64::SMLALL_VG2_M2ZZI_HtoD: 21145 case AArch64::SMLSLL_VG2_M2ZZI_HtoD: 21146 case AArch64::UMLALL_VG2_M2ZZI_HtoD: 21147 case AArch64::UMLSLL_VG2_M2ZZI_HtoD: { 21148 // op: Zm 21149 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21150 op &= UINT64_C(15); 21151 op <<= 16; 21152 Value |= op; 21153 // op: Rv 21154 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21155 op &= UINT64_C(3); 21156 op <<= 13; 21157 Value |= op; 21158 // op: i 21159 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21160 Value |= (op & UINT64_C(4)) << 8; 21161 Value |= (op & UINT64_C(3)) << 1; 21162 // op: imm 21163 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21164 op &= UINT64_C(1); 21165 Value |= op; 21166 // op: Zn 21167 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 21168 op &= UINT64_C(15); 21169 op <<= 6; 21170 Value |= op; 21171 break; 21172 } 21173 case AArch64::SMLALL_VG4_M4ZZI_HtoD: 21174 case AArch64::SMLSLL_VG4_M4ZZI_HtoD: 21175 case AArch64::UMLALL_VG4_M4ZZI_HtoD: 21176 case AArch64::UMLSLL_VG4_M4ZZI_HtoD: { 21177 // op: Zm 21178 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21179 op &= UINT64_C(15); 21180 op <<= 16; 21181 Value |= op; 21182 // op: Rv 21183 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21184 op &= UINT64_C(3); 21185 op <<= 13; 21186 Value |= op; 21187 // op: i 21188 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21189 Value |= (op & UINT64_C(4)) << 8; 21190 Value |= (op & UINT64_C(3)) << 1; 21191 // op: imm 21192 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21193 op &= UINT64_C(1); 21194 Value |= op; 21195 // op: Zn 21196 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 21197 op &= UINT64_C(7); 21198 op <<= 7; 21199 Value |= op; 21200 break; 21201 } 21202 case AArch64::SMLALL_MZZI_BtoS: 21203 case AArch64::SMLSLL_MZZI_BtoS: 21204 case AArch64::SUMLALL_MZZI_BtoS: 21205 case AArch64::UMLALL_MZZI_BtoS: 21206 case AArch64::UMLSLL_MZZI_BtoS: 21207 case AArch64::USMLALL_MZZI_BtoS: { 21208 // op: Zm 21209 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21210 op &= UINT64_C(15); 21211 op <<= 16; 21212 Value |= op; 21213 // op: Rv 21214 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21215 op &= UINT64_C(3); 21216 op <<= 13; 21217 Value |= op; 21218 // op: i 21219 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21220 Value |= (op & UINT64_C(8)) << 12; 21221 Value |= (op & UINT64_C(7)) << 10; 21222 // op: Zn 21223 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21224 op &= UINT64_C(31); 21225 op <<= 5; 21226 Value |= op; 21227 // op: imm2 21228 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21229 op &= UINT64_C(3); 21230 Value |= op; 21231 break; 21232 } 21233 case AArch64::FMLA_VG2_M2ZZI_D: 21234 case AArch64::FMLS_VG2_M2ZZI_D: 21235 case AArch64::SDOT_VG2_M2ZZI_HtoD: 21236 case AArch64::UDOT_VG2_M2ZZI_HtoD: { 21237 // op: Zm 21238 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21239 op &= UINT64_C(15); 21240 op <<= 16; 21241 Value |= op; 21242 // op: Rv 21243 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21244 op &= UINT64_C(3); 21245 op <<= 13; 21246 Value |= op; 21247 // op: i1 21248 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21249 op &= UINT64_C(1); 21250 op <<= 10; 21251 Value |= op; 21252 // op: Zn 21253 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 21254 op &= UINT64_C(15); 21255 op <<= 6; 21256 Value |= op; 21257 // op: imm3 21258 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21259 op &= UINT64_C(7); 21260 Value |= op; 21261 break; 21262 } 21263 case AArch64::FMLA_VG4_M4ZZI_D: 21264 case AArch64::FMLS_VG4_M4ZZI_D: 21265 case AArch64::SDOT_VG4_M4ZZI_HtoD: 21266 case AArch64::SVDOT_VG4_M4ZZI_HtoD: 21267 case AArch64::UDOT_VG4_M4ZZI_HtoD: 21268 case AArch64::UVDOT_VG4_M4ZZI_HtoD: { 21269 // op: Zm 21270 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21271 op &= UINT64_C(15); 21272 op <<= 16; 21273 Value |= op; 21274 // op: Rv 21275 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21276 op &= UINT64_C(3); 21277 op <<= 13; 21278 Value |= op; 21279 // op: i1 21280 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21281 op &= UINT64_C(1); 21282 op <<= 10; 21283 Value |= op; 21284 // op: Zn 21285 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 21286 op &= UINT64_C(7); 21287 op <<= 7; 21288 Value |= op; 21289 // op: imm3 21290 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21291 op &= UINT64_C(7); 21292 Value |= op; 21293 break; 21294 } 21295 case AArch64::BFMLAL_MZZI_S: 21296 case AArch64::BFMLSL_MZZI_S: 21297 case AArch64::FMLAL_MZZI_S: 21298 case AArch64::FMLSL_MZZI_S: 21299 case AArch64::SMLAL_MZZI_S: 21300 case AArch64::SMLSL_MZZI_S: 21301 case AArch64::UMLAL_MZZI_S: 21302 case AArch64::UMLSL_MZZI_S: { 21303 // op: Zm 21304 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21305 op &= UINT64_C(15); 21306 op <<= 16; 21307 Value |= op; 21308 // op: Rv 21309 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21310 op &= UINT64_C(3); 21311 op <<= 13; 21312 Value |= op; 21313 // op: i3 21314 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21315 Value |= (op & UINT64_C(4)) << 13; 21316 Value |= (op & UINT64_C(3)) << 10; 21317 // op: Zn 21318 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21319 op &= UINT64_C(31); 21320 op <<= 5; 21321 Value |= op; 21322 // op: imm 21323 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21324 op &= UINT64_C(7); 21325 Value |= op; 21326 break; 21327 } 21328 case AArch64::BFMLAL_VG2_M2ZZI_S: 21329 case AArch64::BFMLSL_VG2_M2ZZI_S: 21330 case AArch64::FMLAL_VG2_M2ZZI_S: 21331 case AArch64::FMLSL_VG2_M2ZZI_S: 21332 case AArch64::SMLAL_VG2_M2ZZI_S: 21333 case AArch64::SMLSL_VG2_M2ZZI_S: 21334 case AArch64::UMLAL_VG2_M2ZZI_S: 21335 case AArch64::UMLSL_VG2_M2ZZI_S: { 21336 // op: Zm 21337 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21338 op &= UINT64_C(15); 21339 op <<= 16; 21340 Value |= op; 21341 // op: Rv 21342 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21343 op &= UINT64_C(3); 21344 op <<= 13; 21345 Value |= op; 21346 // op: i3 21347 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21348 Value |= (op & UINT64_C(6)) << 9; 21349 Value |= (op & UINT64_C(1)) << 2; 21350 // op: Zn 21351 op = EncodeRegAsMultipleOf<2>(MI, 4, Fixups, STI); 21352 op &= UINT64_C(15); 21353 op <<= 6; 21354 Value |= op; 21355 // op: imm 21356 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21357 op &= UINT64_C(3); 21358 Value |= op; 21359 break; 21360 } 21361 case AArch64::BFMLAL_VG4_M4ZZI_S: 21362 case AArch64::BFMLSL_VG4_M4ZZI_S: 21363 case AArch64::FMLAL_VG4_M4ZZI_S: 21364 case AArch64::FMLSL_VG4_M4ZZI_S: 21365 case AArch64::SMLAL_VG4_M4ZZI_S: 21366 case AArch64::SMLSL_VG4_M4ZZI_S: 21367 case AArch64::UMLAL_VG4_M4ZZI_S: 21368 case AArch64::UMLSL_VG4_M4ZZI_S: { 21369 // op: Zm 21370 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21371 op &= UINT64_C(15); 21372 op <<= 16; 21373 Value |= op; 21374 // op: Rv 21375 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21376 op &= UINT64_C(3); 21377 op <<= 13; 21378 Value |= op; 21379 // op: i3 21380 op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); 21381 Value |= (op & UINT64_C(6)) << 9; 21382 Value |= (op & UINT64_C(1)) << 2; 21383 // op: Zn 21384 op = EncodeRegAsMultipleOf<4>(MI, 4, Fixups, STI); 21385 op &= UINT64_C(7); 21386 op <<= 7; 21387 Value |= op; 21388 // op: imm 21389 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21390 op &= UINT64_C(3); 21391 Value |= op; 21392 break; 21393 } 21394 case AArch64::ADD_VG2_M2ZZ_D: 21395 case AArch64::ADD_VG2_M2ZZ_S: 21396 case AArch64::ADD_VG4_M4ZZ_D: 21397 case AArch64::ADD_VG4_M4ZZ_S: 21398 case AArch64::BFDOT_VG2_M2ZZ_HtoS: 21399 case AArch64::BFDOT_VG4_M4ZZ_HtoS: 21400 case AArch64::BFMLA_VG2_M2ZZ: 21401 case AArch64::BFMLA_VG4_M4ZZ: 21402 case AArch64::BFMLS_VG2_M2ZZ: 21403 case AArch64::BFMLS_VG4_M4ZZ: 21404 case AArch64::FDOT_VG2_M2ZZ_HtoS: 21405 case AArch64::FDOT_VG4_M4ZZ_HtoS: 21406 case AArch64::FMLA_VG2_M2ZZ_D: 21407 case AArch64::FMLA_VG2_M2ZZ_H: 21408 case AArch64::FMLA_VG2_M2ZZ_S: 21409 case AArch64::FMLA_VG4_M4ZZ_D: 21410 case AArch64::FMLA_VG4_M4ZZ_H: 21411 case AArch64::FMLA_VG4_M4ZZ_S: 21412 case AArch64::FMLS_VG2_M2ZZ_D: 21413 case AArch64::FMLS_VG2_M2ZZ_H: 21414 case AArch64::FMLS_VG2_M2ZZ_S: 21415 case AArch64::FMLS_VG4_M4ZZ_D: 21416 case AArch64::FMLS_VG4_M4ZZ_H: 21417 case AArch64::FMLS_VG4_M4ZZ_S: 21418 case AArch64::SDOT_VG2_M2ZZ_BtoS: 21419 case AArch64::SDOT_VG2_M2ZZ_HtoD: 21420 case AArch64::SDOT_VG2_M2ZZ_HtoS: 21421 case AArch64::SDOT_VG4_M4ZZ_BtoS: 21422 case AArch64::SDOT_VG4_M4ZZ_HtoD: 21423 case AArch64::SDOT_VG4_M4ZZ_HtoS: 21424 case AArch64::SUB_VG2_M2ZZ_D: 21425 case AArch64::SUB_VG2_M2ZZ_S: 21426 case AArch64::SUB_VG4_M4ZZ_D: 21427 case AArch64::SUB_VG4_M4ZZ_S: 21428 case AArch64::SUDOT_VG2_M2ZZ_BToS: 21429 case AArch64::SUDOT_VG4_M4ZZ_BToS: 21430 case AArch64::UDOT_VG2_M2ZZ_BtoS: 21431 case AArch64::UDOT_VG2_M2ZZ_HtoD: 21432 case AArch64::UDOT_VG2_M2ZZ_HtoS: 21433 case AArch64::UDOT_VG4_M4ZZ_BtoS: 21434 case AArch64::UDOT_VG4_M4ZZ_HtoD: 21435 case AArch64::UDOT_VG4_M4ZZ_HtoS: 21436 case AArch64::USDOT_VG2_M2ZZ_BToS: 21437 case AArch64::USDOT_VG4_M4ZZ_BToS: { 21438 // op: Zm 21439 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21440 op &= UINT64_C(15); 21441 op <<= 16; 21442 Value |= op; 21443 // op: Zn 21444 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21445 op &= UINT64_C(31); 21446 op <<= 5; 21447 Value |= op; 21448 // op: Rv 21449 op = encodeMatrixIndexGPR32<AArch64::W8>(MI, 2, Fixups, STI); 21450 op &= UINT64_C(3); 21451 op <<= 13; 21452 Value |= op; 21453 // op: imm3 21454 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21455 op &= UINT64_C(7); 21456 Value |= op; 21457 break; 21458 } 21459 case AArch64::BFMOPA_MPPZZ_H: 21460 case AArch64::BFMOPS_MPPZZ_H: 21461 case AArch64::FMOPA_MPPZZ_H: 21462 case AArch64::FMOPS_MPPZZ_H: { 21463 // op: Zm 21464 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21465 op &= UINT64_C(31); 21466 op <<= 16; 21467 Value |= op; 21468 // op: Pm 21469 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21470 op &= UINT64_C(7); 21471 op <<= 13; 21472 Value |= op; 21473 // op: Pn 21474 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21475 op &= UINT64_C(7); 21476 op <<= 10; 21477 Value |= op; 21478 // op: Zn 21479 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21480 op &= UINT64_C(31); 21481 op <<= 5; 21482 Value |= op; 21483 // op: ZAda 21484 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21485 op &= UINT64_C(1); 21486 Value |= op; 21487 break; 21488 } 21489 case AArch64::BFMOPA_MPPZZ: 21490 case AArch64::BFMOPS_MPPZZ: 21491 case AArch64::BMOPA_MPPZZ_S: 21492 case AArch64::BMOPS_MPPZZ_S: 21493 case AArch64::FMOPAL_MPPZZ: 21494 case AArch64::FMOPA_MPPZZ_S: 21495 case AArch64::FMOPSL_MPPZZ: 21496 case AArch64::FMOPS_MPPZZ_S: 21497 case AArch64::SMOPA_MPPZZ_HtoS: 21498 case AArch64::SMOPA_MPPZZ_S: 21499 case AArch64::SMOPS_MPPZZ_HtoS: 21500 case AArch64::SMOPS_MPPZZ_S: 21501 case AArch64::SUMOPA_MPPZZ_S: 21502 case AArch64::SUMOPS_MPPZZ_S: 21503 case AArch64::UMOPA_MPPZZ_HtoS: 21504 case AArch64::UMOPA_MPPZZ_S: 21505 case AArch64::UMOPS_MPPZZ_HtoS: 21506 case AArch64::UMOPS_MPPZZ_S: 21507 case AArch64::USMOPA_MPPZZ_S: 21508 case AArch64::USMOPS_MPPZZ_S: { 21509 // op: Zm 21510 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21511 op &= UINT64_C(31); 21512 op <<= 16; 21513 Value |= op; 21514 // op: Pm 21515 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21516 op &= UINT64_C(7); 21517 op <<= 13; 21518 Value |= op; 21519 // op: Pn 21520 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21521 op &= UINT64_C(7); 21522 op <<= 10; 21523 Value |= op; 21524 // op: Zn 21525 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21526 op &= UINT64_C(31); 21527 op <<= 5; 21528 Value |= op; 21529 // op: ZAda 21530 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21531 op &= UINT64_C(3); 21532 Value |= op; 21533 break; 21534 } 21535 case AArch64::FMOPA_MPPZZ_D: 21536 case AArch64::FMOPS_MPPZZ_D: 21537 case AArch64::SMOPA_MPPZZ_D: 21538 case AArch64::SMOPS_MPPZZ_D: 21539 case AArch64::SUMOPA_MPPZZ_D: 21540 case AArch64::SUMOPS_MPPZZ_D: 21541 case AArch64::UMOPA_MPPZZ_D: 21542 case AArch64::UMOPS_MPPZZ_D: 21543 case AArch64::USMOPA_MPPZZ_D: 21544 case AArch64::USMOPS_MPPZZ_D: { 21545 // op: Zm 21546 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); 21547 op &= UINT64_C(31); 21548 op <<= 16; 21549 Value |= op; 21550 // op: Pm 21551 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21552 op &= UINT64_C(7); 21553 op <<= 13; 21554 Value |= op; 21555 // op: Pn 21556 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21557 op &= UINT64_C(7); 21558 op <<= 10; 21559 Value |= op; 21560 // op: Zn 21561 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 21562 op &= UINT64_C(31); 21563 op <<= 5; 21564 Value |= op; 21565 // op: ZAda 21566 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21567 op &= UINT64_C(7); 21568 Value |= op; 21569 break; 21570 } 21571 case AArch64::FCVTZS_2Z2Z_StoS: 21572 case AArch64::FCVTZU_2Z2Z_StoS: 21573 case AArch64::FRINTA_2Z2Z_S: 21574 case AArch64::FRINTM_2Z2Z_S: 21575 case AArch64::FRINTN_2Z2Z_S: 21576 case AArch64::FRINTP_2Z2Z_S: 21577 case AArch64::SCVTF_2Z2Z_StoS: 21578 case AArch64::UCVTF_2Z2Z_StoS: { 21579 // op: Zn 21580 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 21581 op &= UINT64_C(15); 21582 op <<= 6; 21583 Value |= op; 21584 // op: Zd 21585 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 21586 op &= UINT64_C(15); 21587 op <<= 1; 21588 Value |= op; 21589 break; 21590 } 21591 case AArch64::SUNPK_VG4_4Z2Z_D: 21592 case AArch64::SUNPK_VG4_4Z2Z_H: 21593 case AArch64::SUNPK_VG4_4Z2Z_S: 21594 case AArch64::UUNPK_VG4_4Z2Z_D: 21595 case AArch64::UUNPK_VG4_4Z2Z_H: 21596 case AArch64::UUNPK_VG4_4Z2Z_S: { 21597 // op: Zn 21598 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 21599 op &= UINT64_C(15); 21600 op <<= 6; 21601 Value |= op; 21602 // op: Zd 21603 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 21604 op &= UINT64_C(7); 21605 op <<= 2; 21606 Value |= op; 21607 break; 21608 } 21609 case AArch64::BFCVTN_Z2Z_StoH: 21610 case AArch64::BFCVT_Z2Z_StoH: 21611 case AArch64::FCVTN_Z2Z_StoH: 21612 case AArch64::FCVT_Z2Z_StoH: 21613 case AArch64::SQCVTU_Z2Z_StoH: 21614 case AArch64::SQCVT_Z2Z_StoH: 21615 case AArch64::UQCVT_Z2Z_StoH: { 21616 // op: Zn 21617 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 21618 op &= UINT64_C(15); 21619 op <<= 6; 21620 Value |= op; 21621 // op: Zd 21622 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21623 op &= UINT64_C(31); 21624 Value |= op; 21625 break; 21626 } 21627 case AArch64::FCVTZS_4Z4Z_StoS: 21628 case AArch64::FCVTZU_4Z4Z_StoS: 21629 case AArch64::FRINTA_4Z4Z_S: 21630 case AArch64::FRINTM_4Z4Z_S: 21631 case AArch64::FRINTN_4Z4Z_S: 21632 case AArch64::FRINTP_4Z4Z_S: 21633 case AArch64::SCVTF_4Z4Z_StoS: 21634 case AArch64::UCVTF_4Z4Z_StoS: 21635 case AArch64::UZP_VG4_4Z4Z_B: 21636 case AArch64::UZP_VG4_4Z4Z_D: 21637 case AArch64::UZP_VG4_4Z4Z_H: 21638 case AArch64::UZP_VG4_4Z4Z_Q: 21639 case AArch64::UZP_VG4_4Z4Z_S: 21640 case AArch64::ZIP_VG4_4Z4Z_B: 21641 case AArch64::ZIP_VG4_4Z4Z_D: 21642 case AArch64::ZIP_VG4_4Z4Z_H: 21643 case AArch64::ZIP_VG4_4Z4Z_Q: 21644 case AArch64::ZIP_VG4_4Z4Z_S: { 21645 // op: Zn 21646 op = EncodeRegAsMultipleOf<4>(MI, 1, Fixups, STI); 21647 op &= UINT64_C(7); 21648 op <<= 7; 21649 Value |= op; 21650 // op: Zd 21651 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 21652 op &= UINT64_C(7); 21653 op <<= 2; 21654 Value |= op; 21655 break; 21656 } 21657 case AArch64::SQCVTN_Z4Z_DtoH: 21658 case AArch64::SQCVTN_Z4Z_StoB: 21659 case AArch64::SQCVTUN_Z4Z_DtoH: 21660 case AArch64::SQCVTUN_Z4Z_StoB: 21661 case AArch64::SQCVTU_Z4Z_DtoH: 21662 case AArch64::SQCVTU_Z4Z_StoB: 21663 case AArch64::SQCVT_Z4Z_DtoH: 21664 case AArch64::SQCVT_Z4Z_StoB: 21665 case AArch64::UQCVTN_Z4Z_DtoH: 21666 case AArch64::UQCVTN_Z4Z_StoB: 21667 case AArch64::UQCVT_Z4Z_DtoH: 21668 case AArch64::UQCVT_Z4Z_StoB: { 21669 // op: Zn 21670 op = EncodeRegAsMultipleOf<4>(MI, 1, Fixups, STI); 21671 op &= UINT64_C(7); 21672 op <<= 7; 21673 Value |= op; 21674 // op: Zd 21675 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21676 op &= UINT64_C(31); 21677 Value |= op; 21678 break; 21679 } 21680 case AArch64::SQRSHRN_VG4_Z4ZI_B: 21681 case AArch64::SQRSHRUN_VG4_Z4ZI_B: 21682 case AArch64::SQRSHRU_VG4_Z4ZI_B: 21683 case AArch64::SQRSHR_VG4_Z4ZI_B: 21684 case AArch64::UQRSHRN_VG4_Z4ZI_B: 21685 case AArch64::UQRSHR_VG4_Z4ZI_B: { 21686 // op: Zn 21687 op = EncodeRegAsMultipleOf<4>(MI, 1, Fixups, STI); 21688 op &= UINT64_C(7); 21689 op <<= 7; 21690 Value |= op; 21691 // op: Zd 21692 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21693 op &= UINT64_C(31); 21694 Value |= op; 21695 // op: imm 21696 op = getVecShiftR32OpValue(MI, 2, Fixups, STI); 21697 op &= UINT64_C(31); 21698 op <<= 16; 21699 Value |= op; 21700 break; 21701 } 21702 case AArch64::SQRSHRN_VG4_Z4ZI_H: 21703 case AArch64::SQRSHRUN_VG4_Z4ZI_H: 21704 case AArch64::SQRSHRU_VG4_Z4ZI_H: 21705 case AArch64::SQRSHR_VG4_Z4ZI_H: 21706 case AArch64::UQRSHRN_VG4_Z4ZI_H: 21707 case AArch64::UQRSHR_VG4_Z4ZI_H: { 21708 // op: Zn 21709 op = EncodeRegAsMultipleOf<4>(MI, 1, Fixups, STI); 21710 op &= UINT64_C(7); 21711 op <<= 7; 21712 Value |= op; 21713 // op: Zd 21714 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21715 op &= UINT64_C(31); 21716 Value |= op; 21717 // op: imm 21718 op = getVecShiftR64OpValue(MI, 2, Fixups, STI); 21719 Value |= (op & UINT64_C(32)) << 17; 21720 Value |= (op & UINT64_C(31)) << 16; 21721 break; 21722 } 21723 case AArch64::FCVTL_2ZZ_H_S: 21724 case AArch64::FCVT_2ZZ_H_S: 21725 case AArch64::SUNPK_VG2_2ZZ_D: 21726 case AArch64::SUNPK_VG2_2ZZ_H: 21727 case AArch64::SUNPK_VG2_2ZZ_S: 21728 case AArch64::UUNPK_VG2_2ZZ_D: 21729 case AArch64::UUNPK_VG2_2ZZ_H: 21730 case AArch64::UUNPK_VG2_2ZZ_S: { 21731 // op: Zn 21732 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 21733 op &= UINT64_C(31); 21734 op <<= 5; 21735 Value |= op; 21736 // op: Zd 21737 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 21738 op &= UINT64_C(15); 21739 op <<= 1; 21740 Value |= op; 21741 break; 21742 } 21743 case AArch64::FADDV_VPZ_D: 21744 case AArch64::FADDV_VPZ_H: 21745 case AArch64::FADDV_VPZ_S: 21746 case AArch64::FMAXNMV_VPZ_D: 21747 case AArch64::FMAXNMV_VPZ_H: 21748 case AArch64::FMAXNMV_VPZ_S: 21749 case AArch64::FMAXV_VPZ_D: 21750 case AArch64::FMAXV_VPZ_H: 21751 case AArch64::FMAXV_VPZ_S: 21752 case AArch64::FMINNMV_VPZ_D: 21753 case AArch64::FMINNMV_VPZ_H: 21754 case AArch64::FMINNMV_VPZ_S: 21755 case AArch64::FMINV_VPZ_D: 21756 case AArch64::FMINV_VPZ_H: 21757 case AArch64::FMINV_VPZ_S: { 21758 // op: Zn 21759 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21760 op &= UINT64_C(31); 21761 op <<= 5; 21762 Value |= op; 21763 // op: Vd 21764 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21765 op &= UINT64_C(31); 21766 Value |= op; 21767 // op: Pg 21768 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 21769 op &= UINT64_C(7); 21770 op <<= 10; 21771 Value |= op; 21772 break; 21773 } 21774 case AArch64::LUTI4_2ZTZI_B: 21775 case AArch64::LUTI4_2ZTZI_H: 21776 case AArch64::LUTI4_2ZTZI_S: { 21777 // op: Zn 21778 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21779 op &= UINT64_C(31); 21780 op <<= 5; 21781 Value |= op; 21782 // op: Zd 21783 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 21784 op &= UINT64_C(15); 21785 op <<= 1; 21786 Value |= op; 21787 // op: i 21788 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21789 op &= UINT64_C(3); 21790 op <<= 15; 21791 Value |= op; 21792 break; 21793 } 21794 case AArch64::LUTI2_2ZTZI_B: 21795 case AArch64::LUTI2_2ZTZI_H: 21796 case AArch64::LUTI2_2ZTZI_S: { 21797 // op: Zn 21798 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21799 op &= UINT64_C(31); 21800 op <<= 5; 21801 Value |= op; 21802 // op: Zd 21803 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 21804 op &= UINT64_C(15); 21805 op <<= 1; 21806 Value |= op; 21807 // op: i 21808 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21809 op &= UINT64_C(7); 21810 op <<= 15; 21811 Value |= op; 21812 break; 21813 } 21814 case AArch64::LUTI4_4ZTZI_H: 21815 case AArch64::LUTI4_4ZTZI_S: { 21816 // op: Zn 21817 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21818 op &= UINT64_C(31); 21819 op <<= 5; 21820 Value |= op; 21821 // op: Zd 21822 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 21823 op &= UINT64_C(7); 21824 op <<= 2; 21825 Value |= op; 21826 // op: i 21827 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21828 op &= UINT64_C(1); 21829 op <<= 16; 21830 Value |= op; 21831 break; 21832 } 21833 case AArch64::LUTI2_4ZTZI_B: 21834 case AArch64::LUTI2_4ZTZI_H: 21835 case AArch64::LUTI2_4ZTZI_S: { 21836 // op: Zn 21837 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21838 op &= UINT64_C(31); 21839 op <<= 5; 21840 Value |= op; 21841 // op: Zd 21842 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 21843 op &= UINT64_C(7); 21844 op <<= 2; 21845 Value |= op; 21846 // op: i 21847 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21848 op &= UINT64_C(3); 21849 op <<= 16; 21850 Value |= op; 21851 break; 21852 } 21853 case AArch64::LUTI4_S_2ZTZI_B: 21854 case AArch64::LUTI4_S_2ZTZI_H: { 21855 // op: Zn 21856 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21857 op &= UINT64_C(31); 21858 op <<= 5; 21859 Value |= op; 21860 // op: Zd 21861 op = EncodeZPR2StridedRegisterClass(MI, 0, Fixups, STI); 21862 Value |= (op & UINT64_C(8)) << 1; 21863 Value |= (op & UINT64_C(7)); 21864 // op: i 21865 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21866 op &= UINT64_C(3); 21867 op <<= 15; 21868 Value |= op; 21869 break; 21870 } 21871 case AArch64::LUTI2_S_2ZTZI_B: 21872 case AArch64::LUTI2_S_2ZTZI_H: { 21873 // op: Zn 21874 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21875 op &= UINT64_C(31); 21876 op <<= 5; 21877 Value |= op; 21878 // op: Zd 21879 op = EncodeZPR2StridedRegisterClass(MI, 0, Fixups, STI); 21880 Value |= (op & UINT64_C(8)) << 1; 21881 Value |= (op & UINT64_C(7)); 21882 // op: i 21883 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21884 op &= UINT64_C(7); 21885 op <<= 15; 21886 Value |= op; 21887 break; 21888 } 21889 case AArch64::LUTI4_S_4ZTZI_H: { 21890 // op: Zn 21891 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21892 op &= UINT64_C(31); 21893 op <<= 5; 21894 Value |= op; 21895 // op: Zd 21896 op = EncodeZPR4StridedRegisterClass(MI, 0, Fixups, STI); 21897 Value |= (op & UINT64_C(4)) << 2; 21898 Value |= (op & UINT64_C(3)); 21899 // op: i 21900 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21901 op &= UINT64_C(1); 21902 op <<= 16; 21903 Value |= op; 21904 break; 21905 } 21906 case AArch64::LUTI2_S_4ZTZI_B: 21907 case AArch64::LUTI2_S_4ZTZI_H: { 21908 // op: Zn 21909 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21910 op &= UINT64_C(31); 21911 op <<= 5; 21912 Value |= op; 21913 // op: Zd 21914 op = EncodeZPR4StridedRegisterClass(MI, 0, Fixups, STI); 21915 Value |= (op & UINT64_C(4)) << 2; 21916 Value |= (op & UINT64_C(3)); 21917 // op: i 21918 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21919 op &= UINT64_C(3); 21920 op <<= 16; 21921 Value |= op; 21922 break; 21923 } 21924 case AArch64::LUTI2_ZTZI_B: 21925 case AArch64::LUTI2_ZTZI_H: 21926 case AArch64::LUTI2_ZTZI_S: { 21927 // op: Zn 21928 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21929 op &= UINT64_C(31); 21930 op <<= 5; 21931 Value |= op; 21932 // op: Zd 21933 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21934 op &= UINT64_C(31); 21935 Value |= op; 21936 // op: i 21937 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21938 op &= UINT64_C(15); 21939 op <<= 14; 21940 Value |= op; 21941 break; 21942 } 21943 case AArch64::LUTI4_ZTZI_B: 21944 case AArch64::LUTI4_ZTZI_H: 21945 case AArch64::LUTI4_ZTZI_S: { 21946 // op: Zn 21947 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21948 op &= UINT64_C(31); 21949 op <<= 5; 21950 Value |= op; 21951 // op: Zd 21952 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 21953 op &= UINT64_C(31); 21954 Value |= op; 21955 // op: i 21956 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21957 op &= UINT64_C(7); 21958 op <<= 14; 21959 Value |= op; 21960 break; 21961 } 21962 case AArch64::LD1B_2Z: 21963 case AArch64::LD1D_2Z: 21964 case AArch64::LD1H_2Z: 21965 case AArch64::LD1W_2Z: 21966 case AArch64::LDNT1B_2Z: 21967 case AArch64::LDNT1D_2Z: 21968 case AArch64::LDNT1H_2Z: 21969 case AArch64::LDNT1W_2Z: 21970 case AArch64::ST1B_2Z: 21971 case AArch64::ST1D_2Z: 21972 case AArch64::ST1H_2Z: 21973 case AArch64::ST1W_2Z: 21974 case AArch64::STNT1B_2Z: 21975 case AArch64::STNT1D_2Z: 21976 case AArch64::STNT1H_2Z: 21977 case AArch64::STNT1W_2Z: { 21978 // op: Zt 21979 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 21980 op &= UINT64_C(15); 21981 op <<= 1; 21982 Value |= op; 21983 // op: Rm 21984 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 21985 op &= UINT64_C(31); 21986 op <<= 16; 21987 Value |= op; 21988 // op: Rn 21989 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 21990 op &= UINT64_C(31); 21991 op <<= 5; 21992 Value |= op; 21993 // op: PNg 21994 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 21995 op &= UINT64_C(7); 21996 op <<= 10; 21997 Value |= op; 21998 break; 21999 } 22000 case AArch64::LD1B_2Z_IMM: 22001 case AArch64::LD1D_2Z_IMM: 22002 case AArch64::LD1H_2Z_IMM: 22003 case AArch64::LD1W_2Z_IMM: 22004 case AArch64::LDNT1B_2Z_IMM: 22005 case AArch64::LDNT1D_2Z_IMM: 22006 case AArch64::LDNT1H_2Z_IMM: 22007 case AArch64::LDNT1W_2Z_IMM: 22008 case AArch64::ST1B_2Z_IMM: 22009 case AArch64::ST1D_2Z_IMM: 22010 case AArch64::ST1H_2Z_IMM: 22011 case AArch64::ST1W_2Z_IMM: 22012 case AArch64::STNT1B_2Z_IMM: 22013 case AArch64::STNT1D_2Z_IMM: 22014 case AArch64::STNT1H_2Z_IMM: 22015 case AArch64::STNT1W_2Z_IMM: { 22016 // op: Zt 22017 op = EncodeRegAsMultipleOf<2>(MI, 0, Fixups, STI); 22018 op &= UINT64_C(15); 22019 op <<= 1; 22020 Value |= op; 22021 // op: Rn 22022 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22023 op &= UINT64_C(31); 22024 op <<= 5; 22025 Value |= op; 22026 // op: PNg 22027 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 22028 op &= UINT64_C(7); 22029 op <<= 10; 22030 Value |= op; 22031 // op: imm4 22032 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22033 op &= UINT64_C(15); 22034 op <<= 16; 22035 Value |= op; 22036 break; 22037 } 22038 case AArch64::LD1B_4Z: 22039 case AArch64::LD1D_4Z: 22040 case AArch64::LD1H_4Z: 22041 case AArch64::LD1W_4Z: 22042 case AArch64::LDNT1B_4Z: 22043 case AArch64::LDNT1D_4Z: 22044 case AArch64::LDNT1H_4Z: 22045 case AArch64::LDNT1W_4Z: 22046 case AArch64::ST1B_4Z: 22047 case AArch64::ST1D_4Z: 22048 case AArch64::ST1H_4Z: 22049 case AArch64::ST1W_4Z: 22050 case AArch64::STNT1B_4Z: 22051 case AArch64::STNT1D_4Z: 22052 case AArch64::STNT1H_4Z: 22053 case AArch64::STNT1W_4Z: { 22054 // op: Zt 22055 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 22056 op &= UINT64_C(7); 22057 op <<= 2; 22058 Value |= op; 22059 // op: Rm 22060 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22061 op &= UINT64_C(31); 22062 op <<= 16; 22063 Value |= op; 22064 // op: Rn 22065 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22066 op &= UINT64_C(31); 22067 op <<= 5; 22068 Value |= op; 22069 // op: PNg 22070 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 22071 op &= UINT64_C(7); 22072 op <<= 10; 22073 Value |= op; 22074 break; 22075 } 22076 case AArch64::LD1B_4Z_IMM: 22077 case AArch64::LD1D_4Z_IMM: 22078 case AArch64::LD1H_4Z_IMM: 22079 case AArch64::LD1W_4Z_IMM: 22080 case AArch64::LDNT1B_4Z_IMM: 22081 case AArch64::LDNT1D_4Z_IMM: 22082 case AArch64::LDNT1H_4Z_IMM: 22083 case AArch64::LDNT1W_4Z_IMM: 22084 case AArch64::ST1B_4Z_IMM: 22085 case AArch64::ST1D_4Z_IMM: 22086 case AArch64::ST1H_4Z_IMM: 22087 case AArch64::ST1W_4Z_IMM: 22088 case AArch64::STNT1B_4Z_IMM: 22089 case AArch64::STNT1D_4Z_IMM: 22090 case AArch64::STNT1H_4Z_IMM: 22091 case AArch64::STNT1W_4Z_IMM: { 22092 // op: Zt 22093 op = EncodeRegAsMultipleOf<4>(MI, 0, Fixups, STI); 22094 op &= UINT64_C(7); 22095 op <<= 2; 22096 Value |= op; 22097 // op: Rn 22098 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22099 op &= UINT64_C(31); 22100 op <<= 5; 22101 Value |= op; 22102 // op: PNg 22103 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 22104 op &= UINT64_C(7); 22105 op <<= 10; 22106 Value |= op; 22107 // op: imm4 22108 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22109 op &= UINT64_C(15); 22110 op <<= 16; 22111 Value |= op; 22112 break; 22113 } 22114 case AArch64::LD1B: 22115 case AArch64::LD1B_D: 22116 case AArch64::LD1B_H: 22117 case AArch64::LD1B_S: 22118 case AArch64::LD1D: 22119 case AArch64::LD1H: 22120 case AArch64::LD1H_D: 22121 case AArch64::LD1H_S: 22122 case AArch64::LD1SB_D: 22123 case AArch64::LD1SB_H: 22124 case AArch64::LD1SB_S: 22125 case AArch64::LD1SH_D: 22126 case AArch64::LD1SH_S: 22127 case AArch64::LD1SW_D: 22128 case AArch64::LD1W: 22129 case AArch64::LD1W_D: 22130 case AArch64::LDFF1B_D_REAL: 22131 case AArch64::LDFF1B_H_REAL: 22132 case AArch64::LDFF1B_REAL: 22133 case AArch64::LDFF1B_S_REAL: 22134 case AArch64::LDFF1D_REAL: 22135 case AArch64::LDFF1H_D_REAL: 22136 case AArch64::LDFF1H_REAL: 22137 case AArch64::LDFF1H_S_REAL: 22138 case AArch64::LDFF1SB_D_REAL: 22139 case AArch64::LDFF1SB_H_REAL: 22140 case AArch64::LDFF1SB_S_REAL: 22141 case AArch64::LDFF1SH_D_REAL: 22142 case AArch64::LDFF1SH_S_REAL: 22143 case AArch64::LDFF1SW_D_REAL: 22144 case AArch64::LDFF1W_D_REAL: 22145 case AArch64::LDFF1W_REAL: { 22146 // op: Zt 22147 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22148 op &= UINT64_C(31); 22149 Value |= op; 22150 // op: Pg 22151 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22152 op &= UINT64_C(7); 22153 op <<= 10; 22154 Value |= op; 22155 // op: Rm 22156 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22157 op &= UINT64_C(31); 22158 op <<= 16; 22159 Value |= op; 22160 // op: Rn 22161 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22162 op &= UINT64_C(31); 22163 op <<= 5; 22164 Value |= op; 22165 break; 22166 } 22167 case AArch64::LD1RO_B: 22168 case AArch64::LD1RO_D: 22169 case AArch64::LD1RO_H: 22170 case AArch64::LD1RO_W: 22171 case AArch64::LD1RQ_B: 22172 case AArch64::LD1RQ_D: 22173 case AArch64::LD1RQ_H: 22174 case AArch64::LD1RQ_W: { 22175 // op: Zt 22176 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22177 op &= UINT64_C(31); 22178 Value |= op; 22179 // op: Pg 22180 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22181 op &= UINT64_C(7); 22182 op <<= 10; 22183 Value |= op; 22184 // op: Rn 22185 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22186 op &= UINT64_C(31); 22187 op <<= 5; 22188 Value |= op; 22189 // op: Rm 22190 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22191 op &= UINT64_C(31); 22192 op <<= 16; 22193 Value |= op; 22194 break; 22195 } 22196 case AArch64::LD2B_IMM: 22197 case AArch64::LD2D_IMM: 22198 case AArch64::LD2H_IMM: 22199 case AArch64::LD2Q_IMM: 22200 case AArch64::LD2W_IMM: 22201 case AArch64::LD3B_IMM: 22202 case AArch64::LD3D_IMM: 22203 case AArch64::LD3H_IMM: 22204 case AArch64::LD3Q_IMM: 22205 case AArch64::LD3W_IMM: 22206 case AArch64::LD4B_IMM: 22207 case AArch64::LD4D_IMM: 22208 case AArch64::LD4H_IMM: 22209 case AArch64::LD4Q_IMM: 22210 case AArch64::LD4W_IMM: 22211 case AArch64::LDNT1B_ZRI: 22212 case AArch64::LDNT1D_ZRI: 22213 case AArch64::LDNT1H_ZRI: 22214 case AArch64::LDNT1W_ZRI: { 22215 // op: Zt 22216 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22217 op &= UINT64_C(31); 22218 Value |= op; 22219 // op: Pg 22220 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22221 op &= UINT64_C(7); 22222 op <<= 10; 22223 Value |= op; 22224 // op: Rn 22225 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22226 op &= UINT64_C(31); 22227 op <<= 5; 22228 Value |= op; 22229 // op: imm4 22230 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22231 op &= UINT64_C(15); 22232 op <<= 16; 22233 Value |= op; 22234 break; 22235 } 22236 case AArch64::LD1D_Q: 22237 case AArch64::LD1W_Q: 22238 case AArch64::ST2Q: 22239 case AArch64::ST3Q: 22240 case AArch64::ST4Q: { 22241 // op: Zt 22242 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22243 op &= UINT64_C(31); 22244 Value |= op; 22245 // op: Rn 22246 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22247 op &= UINT64_C(31); 22248 op <<= 5; 22249 Value |= op; 22250 // op: Pg 22251 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22252 op &= UINT64_C(7); 22253 op <<= 10; 22254 Value |= op; 22255 // op: Rm 22256 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22257 op &= UINT64_C(31); 22258 op <<= 16; 22259 Value |= op; 22260 break; 22261 } 22262 case AArch64::LD1D_Q_IMM: 22263 case AArch64::LD1RO_B_IMM: 22264 case AArch64::LD1RO_D_IMM: 22265 case AArch64::LD1RO_H_IMM: 22266 case AArch64::LD1RO_W_IMM: 22267 case AArch64::LD1RQ_B_IMM: 22268 case AArch64::LD1RQ_D_IMM: 22269 case AArch64::LD1RQ_H_IMM: 22270 case AArch64::LD1RQ_W_IMM: 22271 case AArch64::LD1W_Q_IMM: 22272 case AArch64::ST2Q_IMM: 22273 case AArch64::ST3Q_IMM: 22274 case AArch64::ST4Q_IMM: { 22275 // op: Zt 22276 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22277 op &= UINT64_C(31); 22278 Value |= op; 22279 // op: Rn 22280 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22281 op &= UINT64_C(31); 22282 op <<= 5; 22283 Value |= op; 22284 // op: Pg 22285 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22286 op &= UINT64_C(7); 22287 op <<= 10; 22288 Value |= op; 22289 // op: imm4 22290 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22291 op &= UINT64_C(15); 22292 op <<= 16; 22293 Value |= op; 22294 break; 22295 } 22296 case AArch64::GLD1Q: 22297 case AArch64::SST1Q: { 22298 // op: Zt 22299 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22300 op &= UINT64_C(31); 22301 Value |= op; 22302 // op: Zn 22303 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22304 op &= UINT64_C(31); 22305 op <<= 5; 22306 Value |= op; 22307 // op: Pg 22308 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22309 op &= UINT64_C(7); 22310 op <<= 10; 22311 Value |= op; 22312 // op: Rm 22313 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22314 op &= UINT64_C(31); 22315 op <<= 16; 22316 Value |= op; 22317 break; 22318 } 22319 case AArch64::B: 22320 case AArch64::BL: { 22321 // op: addr 22322 op = getBranchTargetOpValue(MI, 0, Fixups, STI); 22323 op &= UINT64_C(67108863); 22324 Value |= op; 22325 break; 22326 } 22327 case AArch64::BCcc: 22328 case AArch64::Bcc: { 22329 // op: cond 22330 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22331 op &= UINT64_C(15); 22332 Value |= op; 22333 // op: target 22334 op = getCondBranchTargetOpValue(MI, 1, Fixups, STI); 22335 op &= UINT64_C(524287); 22336 op <<= 5; 22337 Value |= op; 22338 break; 22339 } 22340 case AArch64::DUPi64: { 22341 // op: dst 22342 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22343 op &= UINT64_C(31); 22344 Value |= op; 22345 // op: src 22346 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22347 op &= UINT64_C(31); 22348 op <<= 5; 22349 Value |= op; 22350 // op: idx 22351 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22352 op &= UINT64_C(1); 22353 op <<= 20; 22354 Value |= op; 22355 break; 22356 } 22357 case AArch64::DUPi8: { 22358 // op: dst 22359 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22360 op &= UINT64_C(31); 22361 Value |= op; 22362 // op: src 22363 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22364 op &= UINT64_C(31); 22365 op <<= 5; 22366 Value |= op; 22367 // op: idx 22368 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22369 op &= UINT64_C(15); 22370 op <<= 17; 22371 Value |= op; 22372 break; 22373 } 22374 case AArch64::DUPi32: { 22375 // op: dst 22376 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22377 op &= UINT64_C(31); 22378 Value |= op; 22379 // op: src 22380 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22381 op &= UINT64_C(31); 22382 op <<= 5; 22383 Value |= op; 22384 // op: idx 22385 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22386 op &= UINT64_C(3); 22387 op <<= 19; 22388 Value |= op; 22389 break; 22390 } 22391 case AArch64::DUPi16: { 22392 // op: dst 22393 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22394 op &= UINT64_C(31); 22395 Value |= op; 22396 // op: src 22397 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22398 op &= UINT64_C(31); 22399 op <<= 5; 22400 Value |= op; 22401 // op: idx 22402 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22403 op &= UINT64_C(7); 22404 op <<= 18; 22405 Value |= op; 22406 break; 22407 } 22408 case AArch64::ZERO_M: { 22409 // op: imm 22410 op = EncodeMatrixTileListRegisterClass(MI, 0, Fixups, STI); 22411 op &= UINT64_C(255); 22412 Value |= op; 22413 break; 22414 } 22415 case AArch64::HINT: { 22416 // op: imm 22417 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22418 op &= UINT64_C(127); 22419 op <<= 5; 22420 Value |= op; 22421 break; 22422 } 22423 case AArch64::UDF: { 22424 // op: imm 22425 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22426 op &= UINT64_C(65535); 22427 Value |= op; 22428 break; 22429 } 22430 case AArch64::BRK: 22431 case AArch64::DCPS1: 22432 case AArch64::DCPS2: 22433 case AArch64::DCPS3: 22434 case AArch64::HLT: 22435 case AArch64::HVC: 22436 case AArch64::SMC: 22437 case AArch64::SVC: 22438 case AArch64::TCANCEL: { 22439 // op: imm 22440 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22441 op &= UINT64_C(65535); 22442 op <<= 5; 22443 Value |= op; 22444 break; 22445 } 22446 case AArch64::MOVT_TIX: { 22447 // op: imm3 22448 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22449 op &= UINT64_C(7); 22450 op <<= 12; 22451 Value |= op; 22452 // op: Rt 22453 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22454 op &= UINT64_C(31); 22455 Value |= op; 22456 break; 22457 } 22458 case AArch64::MOVT_XTI: { 22459 // op: imm3 22460 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22461 op &= UINT64_C(7); 22462 op <<= 12; 22463 Value |= op; 22464 // op: Rt 22465 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22466 op &= UINT64_C(31); 22467 Value |= op; 22468 break; 22469 } 22470 case AArch64::LD1B_VG2_M2ZPXI: 22471 case AArch64::LD1D_VG2_M2ZPXI: 22472 case AArch64::LD1H_VG2_M2ZPXI: 22473 case AArch64::LD1W_VG2_M2ZPXI: 22474 case AArch64::LDNT1B_VG2_M2ZPXI: 22475 case AArch64::LDNT1D_VG2_M2ZPXI: 22476 case AArch64::LDNT1H_VG2_M2ZPXI: 22477 case AArch64::LDNT1W_VG2_M2ZPXI: 22478 case AArch64::ST1B_VG2_M2ZPXI: 22479 case AArch64::ST1D_VG2_M2ZPXI: 22480 case AArch64::ST1H_VG2_M2ZPXI: 22481 case AArch64::ST1W_VG2_M2ZPXI: 22482 case AArch64::STNT1B_VG2_M2ZPXI: 22483 case AArch64::STNT1D_VG2_M2ZPXI: 22484 case AArch64::STNT1H_VG2_M2ZPXI: 22485 case AArch64::STNT1W_VG2_M2ZPXI: { 22486 // op: imm4 22487 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22488 op &= UINT64_C(15); 22489 op <<= 16; 22490 Value |= op; 22491 // op: PNg 22492 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 22493 op &= UINT64_C(7); 22494 op <<= 10; 22495 Value |= op; 22496 // op: Rn 22497 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22498 op &= UINT64_C(31); 22499 op <<= 5; 22500 Value |= op; 22501 // op: Zt 22502 op = EncodeZPR2StridedRegisterClass(MI, 0, Fixups, STI); 22503 Value |= (op & UINT64_C(8)) << 1; 22504 Value |= (op & UINT64_C(7)); 22505 break; 22506 } 22507 case AArch64::LD1B_VG4_M4ZPXI: 22508 case AArch64::LD1D_VG4_M4ZPXI: 22509 case AArch64::LD1H_VG4_M4ZPXI: 22510 case AArch64::LD1W_VG4_M4ZPXI: 22511 case AArch64::LDNT1B_VG4_M4ZPXI: 22512 case AArch64::LDNT1D_VG4_M4ZPXI: 22513 case AArch64::LDNT1H_VG4_M4ZPXI: 22514 case AArch64::LDNT1W_VG4_M4ZPXI: 22515 case AArch64::ST1B_VG4_M4ZPXI: 22516 case AArch64::ST1D_VG4_M4ZPXI: 22517 case AArch64::ST1H_VG4_M4ZPXI: 22518 case AArch64::ST1W_VG4_M4ZPXI: 22519 case AArch64::STNT1B_VG4_M4ZPXI: 22520 case AArch64::STNT1D_VG4_M4ZPXI: 22521 case AArch64::STNT1H_VG4_M4ZPXI: 22522 case AArch64::STNT1W_VG4_M4ZPXI: { 22523 // op: imm4 22524 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22525 op &= UINT64_C(15); 22526 op <<= 16; 22527 Value |= op; 22528 // op: PNg 22529 op = EncodePPR_p8to15(MI, 1, Fixups, STI); 22530 op &= UINT64_C(7); 22531 op <<= 10; 22532 Value |= op; 22533 // op: Rn 22534 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22535 op &= UINT64_C(31); 22536 op <<= 5; 22537 Value |= op; 22538 // op: Zt 22539 op = EncodeZPR4StridedRegisterClass(MI, 0, Fixups, STI); 22540 Value |= (op & UINT64_C(4)) << 2; 22541 Value |= (op & UINT64_C(3)); 22542 break; 22543 } 22544 case AArch64::SQRSHRU_VG2_Z2ZI_H: 22545 case AArch64::SQRSHR_VG2_Z2ZI_H: 22546 case AArch64::UQRSHR_VG2_Z2ZI_H: { 22547 // op: imm4 22548 op = getVecShiftR16OpValue(MI, 2, Fixups, STI); 22549 op &= UINT64_C(15); 22550 op <<= 16; 22551 Value |= op; 22552 // op: Zn 22553 op = EncodeRegAsMultipleOf<2>(MI, 1, Fixups, STI); 22554 op &= UINT64_C(15); 22555 op <<= 6; 22556 Value |= op; 22557 // op: Zd 22558 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22559 op &= UINT64_C(31); 22560 Value |= op; 22561 break; 22562 } 22563 case AArch64::LDRAAindexed: 22564 case AArch64::LDRABindexed: { 22565 // op: offset 22566 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22567 Value |= (op & UINT64_C(512)) << 13; 22568 Value |= (op & UINT64_C(511)) << 12; 22569 // op: Rn 22570 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22571 op &= UINT64_C(31); 22572 op <<= 5; 22573 Value |= op; 22574 // op: Rt 22575 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22576 op &= UINT64_C(31); 22577 Value |= op; 22578 break; 22579 } 22580 case AArch64::LDRAAwriteback: 22581 case AArch64::LDRABwriteback: { 22582 // op: offset 22583 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22584 Value |= (op & UINT64_C(512)) << 13; 22585 Value |= (op & UINT64_C(511)) << 12; 22586 // op: Rn 22587 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22588 op &= UINT64_C(31); 22589 op <<= 5; 22590 Value |= op; 22591 // op: Rt 22592 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22593 op &= UINT64_C(31); 22594 Value |= op; 22595 break; 22596 } 22597 case AArch64::SYSPxt_XZR: { 22598 // op: op1 22599 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22600 op &= UINT64_C(7); 22601 op <<= 16; 22602 Value |= op; 22603 // op: Cn 22604 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22605 op &= UINT64_C(15); 22606 op <<= 12; 22607 Value |= op; 22608 // op: Cm 22609 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 22610 op &= UINT64_C(15); 22611 op <<= 8; 22612 Value |= op; 22613 // op: op2 22614 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 22615 op &= UINT64_C(7); 22616 op <<= 5; 22617 Value |= op; 22618 break; 22619 } 22620 case AArch64::MSRpstateImm1: { 22621 // op: pstatefield 22622 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22623 Value |= (op & UINT64_C(56)) << 13; 22624 Value |= (op & UINT64_C(448)) << 3; 22625 Value |= (op & UINT64_C(7)) << 5; 22626 // op: imm 22627 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22628 op &= UINT64_C(1); 22629 op <<= 8; 22630 Value |= op; 22631 break; 22632 } 22633 case AArch64::MSRpstateImm4: { 22634 // op: pstatefield 22635 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22636 Value |= (op & UINT64_C(56)) << 13; 22637 Value |= (op & UINT64_C(7)) << 5; 22638 // op: imm 22639 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22640 op &= UINT64_C(15); 22641 op <<= 8; 22642 Value |= op; 22643 break; 22644 } 22645 case AArch64::MSRpstatesvcrImm1: { 22646 // op: pstatefield 22647 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 22648 op &= UINT64_C(7); 22649 op <<= 9; 22650 Value |= op; 22651 // op: imm 22652 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 22653 op &= UINT64_C(1); 22654 op <<= 8; 22655 Value |= op; 22656 break; 22657 } 22658 default: 22659 std::string msg; 22660 raw_string_ostream Msg(msg); 22661 Msg << "Not supported instr: " << MI; 22662 report_fatal_error(Msg.str().c_str()); 22663 } 22664 return Value; 22665} 22666 22667