1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Global Combiner *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9#ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS 10#include "llvm/ADT/SparseBitVector.h" 11namespace llvm { 12extern cl::OptionCategory GICombinerOptionCategory; 13} // end namespace llvm 14#endif // ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS 15 16#ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H 17class AArch64GenPostLegalizerCombinerHelperRuleConfig { 18 SparseBitVector<> DisabledRules; 19 20public: 21 bool parseCommandLineOption(); 22 bool isRuleDisabled(unsigned ID) const; 23 bool setRuleEnabled(StringRef RuleIdentifier); 24 bool setRuleDisabled(StringRef RuleIdentifier); 25}; 26 27class AArch64GenPostLegalizerCombinerHelper { 28 const AArch64GenPostLegalizerCombinerHelperRuleConfig *RuleConfig; 29 30public: 31 template <typename... Args>AArch64GenPostLegalizerCombinerHelper(const AArch64GenPostLegalizerCombinerHelperRuleConfig &RuleConfig, Args &&... args) : RuleConfig(&RuleConfig) {} 32 33 bool tryCombineAll( 34 GISelChangeObserver &Observer, 35 MachineInstr &MI, 36 MachineIRBuilder &B, 37 CombinerHelper & Helper) const; 38}; 39 40static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) { 41 uint64_t I; 42 // getAtInteger(...) returns false on success 43 bool Parsed = !RuleIdentifier.getAsInteger(0, I); 44 if (Parsed) 45 return I; 46 47#ifndef NDEBUG 48 switch (RuleIdentifier.size()) { 49 default: break; 50 case 9: // 2 strings to match. 51 switch (RuleIdentifier[0]) { 52 default: break; 53 case 'c': // 1 string to match. 54 if (memcmp(RuleIdentifier.data()+1, "opy_prop", 8) != 0) 55 break; 56 return 0; // "copy_prop" 57 case 'm': // 1 string to match. 58 if (memcmp(RuleIdentifier.data()+1, "ul_const", 8) != 0) 59 break; 60 return 10; // "mul_const" 61 } 62 break; 63 case 10: // 2 strings to match. 64 switch (RuleIdentifier[0]) { 65 default: break; 66 case 'i': // 1 string to match. 67 if (memcmp(RuleIdentifier.data()+1, "2p_to_p2i", 9) != 0) 68 break; 69 return 30; // "i2p_to_p2i" 70 case 'p': // 1 string to match. 71 if (memcmp(RuleIdentifier.data()+1, "2i_to_i2p", 9) != 0) 72 break; 73 return 29; // "p2i_to_i2p" 74 } 75 break; 76 case 11: // 1 string to match. 77 if (memcmp(RuleIdentifier.data()+0, "add_sub_reg", 11) != 0) 78 break; 79 return 34; // "add_sub_reg" 80 case 12: // 1 string to match. 81 if (memcmp(RuleIdentifier.data()+0, "redundant_or", 12) != 0) 82 break; 83 return 9; // "redundant_or" 84 case 13: // 5 strings to match. 85 switch (RuleIdentifier[0]) { 86 default: break; 87 case 'c': // 1 string to match. 88 if (memcmp(RuleIdentifier.data()+1, "onstant_fold", 12) != 0) 89 break; 90 return 23; // "constant_fold" 91 case 'l': // 1 string to match. 92 if (memcmp(RuleIdentifier.data()+1, "oad_and_mask", 12) != 0) 93 break; 94 return 2; // "load_and_mask" 95 case 'm': // 1 string to match. 96 if (memcmp(RuleIdentifier.data()+1, "erge_unmerge", 12) != 0) 97 break; 98 return 18; // "merge_unmerge" 99 case 'r': // 1 string to match. 100 if (memcmp(RuleIdentifier.data()+1, "edundant_and", 12) != 0) 101 break; 102 return 6; // "redundant_and" 103 case 'u': // 1 string to match. 104 if (memcmp(RuleIdentifier.data()+1, "nmerge_undef", 12) != 0) 105 break; 106 return 52; // "unmerge_undef" 107 } 108 break; 109 case 14: // 2 strings to match. 110 switch (RuleIdentifier[0]) { 111 default: break; 112 case 'b': // 1 string to match. 113 if (memcmp(RuleIdentifier.data()+1, "inop_same_val", 13) != 0) 114 break; 115 return 26; // "binop_same_val" 116 case 'f': // 1 string to match. 117 if (memcmp(RuleIdentifier.data()+1, "neg_fneg_fold", 13) != 0) 118 break; 119 return 32; // "fneg_fneg_fold" 120 } 121 break; 122 case 15: // 3 strings to match. 123 switch (RuleIdentifier[0]) { 124 default: break; 125 case 'e': // 1 string to match. 126 if (memcmp(RuleIdentifier.data()+1, "xtending_loads", 14) != 0) 127 break; 128 return 1; // "extending_loads" 129 case 'o': // 1 string to match. 130 if (memcmp(RuleIdentifier.data()+1, "verlapping_and", 14) != 0) 131 break; 132 return 40; // "overlapping_and" 133 case 's': // 1 string to match. 134 if (memcmp(RuleIdentifier.data()+1, "elect_same_val", 14) != 0) 135 break; 136 return 24; // "select_same_val" 137 } 138 break; 139 case 16: // 3 strings to match. 140 switch (RuleIdentifier[0]) { 141 default: break; 142 case 's': // 2 strings to match. 143 if (memcmp(RuleIdentifier.data()+1, "elect_", 6) != 0) 144 break; 145 switch (RuleIdentifier[7]) { 146 default: break; 147 case 't': // 1 string to match. 148 if (memcmp(RuleIdentifier.data()+8, "o_minmax", 8) != 0) 149 break; 150 return 54; // "select_to_minmax" 151 case 'u': // 1 string to match. 152 if (memcmp(RuleIdentifier.data()+8, "ndef_cmp", 8) != 0) 153 break; 154 return 19; // "select_undef_cmp" 155 } 156 break; 157 case 'u': // 1 string to match. 158 if (memcmp(RuleIdentifier.data()+1, "ndef_to_fp_zero", 15) != 0) 159 break; 160 return 42; // "undef_to_fp_zero" 161 } 162 break; 163 case 17: // 4 strings to match. 164 switch (RuleIdentifier[0]) { 165 default: break; 166 case 'a': // 1 string to match. 167 if (memcmp(RuleIdentifier.data()+1, "nyext_trunc_fold", 16) != 0) 168 break; 169 return 31; // "anyext_trunc_fold" 170 case 'e': // 1 string to match. 171 if (memcmp(RuleIdentifier.data()+1, "rase_undef_store", 16) != 0) 172 break; 173 return 51; // "erase_undef_store" 174 case 's': // 1 string to match. 175 if (memcmp(RuleIdentifier.data()+1, "elect_to_logical", 16) != 0) 176 break; 177 return 21; // "select_to_logical" 178 case 'u': // 1 string to match. 179 if (memcmp(RuleIdentifier.data()+1, "ndef_to_int_zero", 16) != 0) 180 break; 181 return 43; // "undef_to_int_zero" 182 } 183 break; 184 case 18: // 3 strings to match. 185 switch (RuleIdentifier[0]) { 186 default: break; 187 case 'b': // 1 string to match. 188 if (memcmp(RuleIdentifier.data()+1, "inop_left_to_zero", 17) != 0) 189 break; 190 return 27; // "binop_left_to_zero" 191 case 'f': // 1 string to match. 192 if (memcmp(RuleIdentifier.data()+1, "old_merge_to_zext", 17) != 0) 193 break; 194 return 22; // "fold_merge_to_zext" 195 case 'r': // 1 string to match. 196 if (memcmp(RuleIdentifier.data()+1, "ight_identity_one", 17) != 0) 197 break; 198 return 33; // "right_identity_one" 199 } 200 break; 201 case 19: // 7 strings to match. 202 switch (RuleIdentifier[0]) { 203 default: break; 204 case 'b': // 1 string to match. 205 if (memcmp(RuleIdentifier.data()+1, "inop_right_to_zero", 18) != 0) 206 break; 207 return 28; // "binop_right_to_zero" 208 case 'p': // 1 string to match. 209 if (memcmp(RuleIdentifier.data()+1, "tr_add_immed_chain", 18) != 0) 210 break; 211 return 39; // "ptr_add_immed_chain" 212 case 'r': // 2 strings to match. 213 switch (RuleIdentifier[1]) { 214 default: break; 215 case 'i': // 1 string to match. 216 if (memcmp(RuleIdentifier.data()+2, "ght_identity_zero", 17) != 0) 217 break; 218 return 25; // "right_identity_zero" 219 case 'o': // 1 string to match. 220 if (memcmp(RuleIdentifier.data()+2, "tate_out_of_range", 17) != 0) 221 break; 222 return 16; // "rotate_out_of_range" 223 } 224 break; 225 case 's': // 2 strings to match. 226 if (RuleIdentifier[1] != 'e') 227 break; 228 switch (RuleIdentifier[2]) { 229 default: break; 230 case 'l': // 1 string to match. 231 if (memcmp(RuleIdentifier.data()+3, "ect_constant_cmp", 16) != 0) 232 break; 233 return 20; // "select_constant_cmp" 234 case 'x': // 1 string to match. 235 if (memcmp(RuleIdentifier.data()+3, "t_trunc_sextload", 16) != 0) 236 break; 237 return 3; // "sext_trunc_sextload" 238 } 239 break; 240 case 'u': // 1 string to match. 241 if (memcmp(RuleIdentifier.data()+1, "nary_undef_to_zero", 18) != 0) 242 break; 243 return 47; // "unary_undef_to_zero" 244 } 245 break; 246 case 20: // 3 strings to match. 247 switch (RuleIdentifier[0]) { 248 default: break; 249 case 'b': // 1 string to match. 250 if (memcmp(RuleIdentifier.data()+1, "itcast_bitcast_fold", 19) != 0) 251 break; 252 return 38; // "bitcast_bitcast_fold" 253 case 'r': // 1 string to match. 254 if (memcmp(RuleIdentifier.data()+1, "edundant_sext_inreg", 19) != 0) 255 break; 256 return 11; // "redundant_sext_inreg" 257 case 's': // 1 string to match. 258 if (memcmp(RuleIdentifier.data()+1, "plit_store_zero_128", 19) != 0) 259 break; 260 return 41; // "split_store_zero_128" 261 } 262 break; 263 case 21: // 2 strings to match. 264 switch (RuleIdentifier[0]) { 265 default: break; 266 case 'm': // 1 string to match. 267 if (memcmp(RuleIdentifier.data()+1, "utate_anyext_to_zext", 20) != 0) 268 break; 269 return 4; // "mutate_anyext_to_zext" 270 case 'u': // 1 string to match. 271 if (memcmp(RuleIdentifier.data()+1, "ndef_to_negative_one", 20) != 0) 272 break; 273 return 44; // "undef_to_negative_one" 274 } 275 break; 276 case 22: // 2 strings to match. 277 switch (RuleIdentifier[0]) { 278 default: break; 279 case 'p': // 1 string to match. 280 if (memcmp(RuleIdentifier.data()+1, "ropagate_undef_any_op", 21) != 0) 281 break; 282 return 48; // "propagate_undef_any_op" 283 case 't': // 1 string to match. 284 if (memcmp(RuleIdentifier.data()+1, "runc_buildvector_fold", 21) != 0) 285 break; 286 return 36; // "trunc_buildvector_fold" 287 } 288 break; 289 case 23: // 1 string to match. 290 if (memcmp(RuleIdentifier.data()+0, "propagate_undef_all_ops", 23) != 0) 291 break; 292 return 49; // "propagate_undef_all_ops" 293 case 24: // 2 strings to match. 294 switch (RuleIdentifier[0]) { 295 default: break; 296 case 'b': // 1 string to match. 297 if (memcmp(RuleIdentifier.data()+1, "inop_left_undef_to_zero", 23) != 0) 298 break; 299 return 45; // "binop_left_undef_to_zero" 300 case 'x': // 1 string to match. 301 if (memcmp(RuleIdentifier.data()+1, "or_of_and_with_same_reg", 23) != 0) 302 break; 303 return 7; // "xor_of_and_with_same_reg" 304 } 305 break; 306 case 25: // 3 strings to match. 307 if (RuleIdentifier[0] != 'b') 308 break; 309 switch (RuleIdentifier[1]) { 310 default: break; 311 case 'i': // 2 strings to match. 312 if (memcmp(RuleIdentifier.data()+2, "tfield_extract_from_", 20) != 0) 313 break; 314 switch (RuleIdentifier[22]) { 315 default: break; 316 case 'a': // 1 string to match. 317 if (memcmp(RuleIdentifier.data()+23, "nd", 2) != 0) 318 break; 319 return 13; // "bitfield_extract_from_and" 320 case 's': // 1 string to match. 321 if (memcmp(RuleIdentifier.data()+23, "hr", 2) != 0) 322 break; 323 return 14; // "bitfield_extract_from_shr" 324 } 325 break; 326 case 'u': // 1 string to match. 327 if (memcmp(RuleIdentifier.data()+2, "ildvector_identity_fold", 23) != 0) 328 break; 329 return 35; // "buildvector_identity_fold" 330 } 331 break; 332 case 26: // 2 strings to match. 333 switch (RuleIdentifier[0]) { 334 default: break; 335 case 'b': // 1 string to match. 336 if (memcmp(RuleIdentifier.data()+1, "inop_right_undef_to_undef", 25) != 0) 337 break; 338 return 46; // "binop_right_undef_to_undef" 339 case 'e': // 1 string to match. 340 if (memcmp(RuleIdentifier.data()+1, "xtractvecelt_pairwise_add", 25) != 0) 341 break; 342 return 8; // "extractvecelt_pairwise_add" 343 } 344 break; 345 case 27: // 1 string to match. 346 if (memcmp(RuleIdentifier.data()+0, "trunc_lshr_buildvector_fold", 27) != 0) 347 break; 348 return 37; // "trunc_lshr_buildvector_fold" 349 case 28: // 1 string to match. 350 if (memcmp(RuleIdentifier.data()+0, "propagate_undef_shuffle_mask", 28) != 0) 351 break; 352 return 50; // "propagate_undef_shuffle_mask" 353 case 29: // 2 strings to match. 354 switch (RuleIdentifier[0]) { 355 default: break; 356 case 'b': // 1 string to match. 357 if (memcmp(RuleIdentifier.data()+1, "itfield_extract_from_shr_and", 28) != 0) 358 break; 359 return 15; // "bitfield_extract_from_shr_and" 360 case 'i': // 1 string to match. 361 if (memcmp(RuleIdentifier.data()+1, "cmp_to_true_false_known_bits", 28) != 0) 362 break; 363 return 17; // "icmp_to_true_false_known_bits" 364 } 365 break; 366 case 32: // 1 string to match. 367 if (memcmp(RuleIdentifier.data()+0, "bitfield_extract_from_sext_inreg", 32) != 0) 368 break; 369 return 12; // "bitfield_extract_from_sext_inreg" 370 case 36: // 1 string to match. 371 if (memcmp(RuleIdentifier.data()+0, "insert_extract_vec_elt_out_of_bounds", 36) != 0) 372 break; 373 return 53; // "insert_extract_vec_elt_out_of_bounds" 374 case 37: // 1 string to match. 375 if (memcmp(RuleIdentifier.data()+0, "hoist_logic_op_with_same_opcode_hands", 37) != 0) 376 break; 377 return 5; // "hoist_logic_op_with_same_opcode_hands" 378 } 379#endif // ifndef NDEBUG 380 381 return std::nullopt; 382} 383static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) { 384 std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-'); 385 if (!RangePair.second.empty()) { 386 const auto First = getRuleIdxForIdentifier(RangePair.first); 387 const auto Last = getRuleIdxForIdentifier(RangePair.second); 388 if (!First || !Last) 389 return std::nullopt; 390 if (First >= Last) 391 report_fatal_error("Beginning of range should be before end of range"); 392 return {{*First, *Last + 1}}; 393 } 394 if (RangePair.first == "*") { 395 return {{0, 55}}; 396 } 397 const auto I = getRuleIdxForIdentifier(RangePair.first); 398 if (!I) 399 return std::nullopt; 400 return {{*I, *I + 1}}; 401} 402 403bool AArch64GenPostLegalizerCombinerHelperRuleConfig::setRuleEnabled(StringRef RuleIdentifier) { 404 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); 405 if (!MaybeRange) 406 return false; 407 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) 408 DisabledRules.reset(I); 409 return true; 410} 411 412bool AArch64GenPostLegalizerCombinerHelperRuleConfig::setRuleDisabled(StringRef RuleIdentifier) { 413 auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier); 414 if (!MaybeRange) 415 return false; 416 for (auto I = MaybeRange->first; I < MaybeRange->second; ++I) 417 DisabledRules.set(I); 418 return true; 419} 420 421bool AArch64GenPostLegalizerCombinerHelperRuleConfig::isRuleDisabled(unsigned RuleID) const { 422 return DisabledRules.test(RuleID); 423} 424#endif // ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H 425 426#ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP 427 428std::vector<std::string> AArch64PostLegalizerCombinerHelperOption; 429cl::list<std::string> AArch64PostLegalizerCombinerHelperDisableOption( 430 "aarch64postlegalizercombinerhelper-disable-rule", 431 cl::desc("Disable one or more combiner rules temporarily in the AArch64PostLegalizerCombinerHelper pass"), 432 cl::CommaSeparated, 433 cl::Hidden, 434 cl::cat(GICombinerOptionCategory), 435 cl::callback([](const std::string &Str) { 436 AArch64PostLegalizerCombinerHelperOption.push_back(Str); 437 })); 438cl::list<std::string> AArch64PostLegalizerCombinerHelperOnlyEnableOption( 439 "aarch64postlegalizercombinerhelper-only-enable-rule", 440 cl::desc("Disable all rules in the AArch64PostLegalizerCombinerHelper pass then re-enable the specified ones"), 441 cl::Hidden, 442 cl::cat(GICombinerOptionCategory), 443 cl::callback([](const std::string &CommaSeparatedArg) { 444 StringRef Str = CommaSeparatedArg; 445 AArch64PostLegalizerCombinerHelperOption.push_back("*"); 446 do { 447 auto X = Str.split(","); 448 AArch64PostLegalizerCombinerHelperOption.push_back(("!" + X.first).str()); 449 Str = X.second; 450 } while (!Str.empty()); 451 })); 452 453bool AArch64GenPostLegalizerCombinerHelperRuleConfig::parseCommandLineOption() { 454 for (StringRef Identifier : AArch64PostLegalizerCombinerHelperOption) { 455 bool Enabled = Identifier.consume_front("!"); 456 if (Enabled && !setRuleEnabled(Identifier)) 457 return false; 458 if (!Enabled && !setRuleDisabled(Identifier)) 459 return false; 460 } 461 return true; 462} 463 464bool AArch64GenPostLegalizerCombinerHelper::tryCombineAll( 465 GISelChangeObserver &Observer, 466 MachineInstr &MI, 467 MachineIRBuilder &B, 468 CombinerHelper & Helper) const { 469 MachineBasicBlock *MBB = MI.getParent(); 470 MachineFunction *MF = MBB->getParent(); 471 MachineRegisterInfo &MRI = MF->getRegInfo(); 472 SmallVector<MachineInstr *, 8> MIs = {&MI}; 473 474 (void)MBB; (void)MF; (void)MRI; (void)RuleConfig; 475 476 // Match data 477 PreferredTuple MatchData1; 478 std::function<void(MachineIRBuilder &)> MatchData2; 479 InstructionStepsMatchInfo MatchData5; 480 Register MatchData6; 481 std::pair<Register, Register> MatchData7; 482 std::tuple<unsigned, LLT, Register> MatchData8; 483 Register MatchData9; 484 std::function<void(MachineIRBuilder&, Register)> MatchData10; 485 std::function<void(MachineIRBuilder &)> MatchData12; 486 std::function<void(MachineIRBuilder &)> MatchData13; 487 std::function<void(MachineIRBuilder &)> MatchData14; 488 std::function<void(MachineIRBuilder &)> MatchData15; 489 int64_t MatchData17; 490 Register MatchData18; 491 unsigned MatchData20; 492 std::function<void(MachineIRBuilder &)> MatchData21; 493 APInt MatchData23; 494 Register MatchData29; 495 Register MatchData30; 496 Register MatchData31; 497 Register MatchData32; 498 Register MatchData34; 499 Register MatchData35; 500 Register MatchData36; 501 Register MatchData37; 502 PtrAddChain MatchData39; 503 std::function<void(MachineIRBuilder &)> MatchData40; 504 std::function<void(MachineIRBuilder &)> MatchData52; 505 std::function<void(MachineIRBuilder &)> MatchData54; 506 507 int Partition = -1; 508 Partition = -1; 509 switch (MIs[0]->getOpcode()) { 510 case TargetOpcode::COPY: Partition = 0; break; 511 case TargetOpcode::G_LOAD: Partition = 1; break; 512 case TargetOpcode::G_SEXTLOAD: Partition = 2; break; 513 case TargetOpcode::G_ZEXTLOAD: Partition = 3; break; 514 case TargetOpcode::G_AND: Partition = 4; break; 515 case TargetOpcode::G_SEXT_INREG: Partition = 5; break; 516 case TargetOpcode::G_ANYEXT: Partition = 6; break; 517 case TargetOpcode::G_OR: Partition = 7; break; 518 case TargetOpcode::G_XOR: Partition = 8; break; 519 case TargetOpcode::G_EXTRACT_VECTOR_ELT: Partition = 9; break; 520 case TargetOpcode::G_MUL: Partition = 10; break; 521 case TargetOpcode::G_ASHR: Partition = 11; break; 522 case TargetOpcode::G_LSHR: Partition = 12; break; 523 case TargetOpcode::G_ROTR: Partition = 13; break; 524 case TargetOpcode::G_ROTL: Partition = 14; break; 525 case TargetOpcode::G_ICMP: Partition = 15; break; 526 case TargetOpcode::G_MERGE_VALUES: Partition = 16; break; 527 case TargetOpcode::G_SELECT: Partition = 17; break; 528 case TargetOpcode::G_ADD: Partition = 18; break; 529 case TargetOpcode::G_SUB: Partition = 19; break; 530 case TargetOpcode::G_SHL: Partition = 20; break; 531 case TargetOpcode::G_PTR_ADD: Partition = 21; break; 532 case TargetOpcode::G_SDIV: Partition = 22; break; 533 case TargetOpcode::G_UDIV: Partition = 23; break; 534 case TargetOpcode::G_SREM: Partition = 24; break; 535 case TargetOpcode::G_UREM: Partition = 25; break; 536 case TargetOpcode::G_INTTOPTR: Partition = 26; break; 537 case TargetOpcode::G_PTRTOINT: Partition = 27; break; 538 case TargetOpcode::G_FNEG: Partition = 28; break; 539 case TargetOpcode::G_BUILD_VECTOR_TRUNC: Partition = 29; break; 540 case TargetOpcode::G_BUILD_VECTOR: Partition = 30; break; 541 case TargetOpcode::G_TRUNC: Partition = 31; break; 542 case TargetOpcode::G_BITCAST: Partition = 32; break; 543 case TargetOpcode::G_STORE: Partition = 33; break; 544 case TargetOpcode::G_UITOFP: Partition = 34; break; 545 case TargetOpcode::G_SITOFP: Partition = 35; break; 546 case TargetOpcode::G_ABS: Partition = 36; break; 547 case TargetOpcode::G_FPTOSI: Partition = 37; break; 548 case TargetOpcode::G_FPTOUI: Partition = 38; break; 549 case TargetOpcode::G_SHUFFLE_VECTOR: Partition = 39; break; 550 case TargetOpcode::G_UNMERGE_VALUES: Partition = 40; break; 551 case TargetOpcode::G_INSERT_VECTOR_ELT: Partition = 41; break; 552 } 553 // Default case but without conflicting with potential default case in selection. 554 if (Partition == -1) return false; 555 if (Partition == 0 /* TargetOpcode::COPY */) { 556 // Leaf name: copy_prop 557 // Rule: copy_prop 558 if (!RuleConfig->isRuleDisabled(0)) { 559 if (1 560 && [&]() { 561 return Helper.matchCombineCopy(*MIs[0]); 562 return true; 563 }() ) { 564 LLVM_DEBUG(dbgs() << "Applying rule 'copy_prop'\n"); 565 Helper.applyCombineCopy(*MIs[0]); 566 return true; 567 } 568 } 569 return false; 570 } 571 if (Partition == 1 /* TargetOpcode::G_LOAD */) { 572 // Leaf name: extending_loads 573 // Rule: extending_loads 574 if (!RuleConfig->isRuleDisabled(1)) { 575 if (1 576 && [&]() { 577 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData1); 578 return true; 579 }() ) { 580 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n"); 581 Helper.applyCombineExtendingLoads(*MIs[0], MatchData1); 582 return true; 583 } 584 } 585 return false; 586 } 587 if (Partition == 2 /* TargetOpcode::G_SEXTLOAD */) { 588 // Leaf name: extending_loads 589 // Rule: extending_loads 590 if (!RuleConfig->isRuleDisabled(1)) { 591 if (1 592 && [&]() { 593 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData1); 594 return true; 595 }() ) { 596 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n"); 597 Helper.applyCombineExtendingLoads(*MIs[0], MatchData1); 598 return true; 599 } 600 } 601 return false; 602 } 603 if (Partition == 3 /* TargetOpcode::G_ZEXTLOAD */) { 604 // Leaf name: extending_loads 605 // Rule: extending_loads 606 if (!RuleConfig->isRuleDisabled(1)) { 607 if (1 608 && [&]() { 609 return Helper.matchCombineExtendingLoads(*MIs[0], MatchData1); 610 return true; 611 }() ) { 612 LLVM_DEBUG(dbgs() << "Applying rule 'extending_loads'\n"); 613 Helper.applyCombineExtendingLoads(*MIs[0], MatchData1); 614 return true; 615 } 616 } 617 return false; 618 } 619 if (Partition == 4 /* TargetOpcode::G_AND */) { 620 // Leaf name: load_and_mask 621 // Rule: load_and_mask 622 if (!RuleConfig->isRuleDisabled(2)) { 623 if (1 624 && [&]() { 625 return Helper.matchCombineLoadWithAndMask(*MIs[0], MatchData2); 626 return true; 627 }() ) { 628 LLVM_DEBUG(dbgs() << "Applying rule 'load_and_mask'\n"); 629 Helper.applyBuildFn(*MIs[0], MatchData2); 630 return true; 631 } 632 } 633 // Leaf name: hoist_logic_op_with_same_opcode_hands 634 // Rule: hoist_logic_op_with_same_opcode_hands 635 if (!RuleConfig->isRuleDisabled(5)) { 636 if (1 637 && [&]() { 638 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData5); 639 return true; 640 }() ) { 641 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"); 642 Helper.applyBuildInstructionSteps(*MIs[0], MatchData5); 643 return true; 644 } 645 } 646 // Leaf name: redundant_and 647 // Rule: redundant_and 648 if (!RuleConfig->isRuleDisabled(6)) { 649 if (1 650 && [&]() { 651 return Helper.matchRedundantAnd(*MIs[0], MatchData6); 652 return true; 653 }() ) { 654 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_and'\n"); 655 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData6); 656 return true; 657 } 658 } 659 // Leaf name: bitfield_extract_from_and 660 // Rule: bitfield_extract_from_and 661 if (!RuleConfig->isRuleDisabled(13)) { 662 if (1 663 && [&]() { 664 return Helper.matchBitfieldExtractFromAnd(*MIs[0], MatchData13); 665 return true; 666 }() ) { 667 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_and'\n"); 668 Helper.applyBuildFn(*MIs[0], MatchData13); 669 return true; 670 } 671 } 672 // Leaf name: constant_fold 673 // Rule: constant_fold 674 if (!RuleConfig->isRuleDisabled(23)) { 675 if (1 676 && [&]() { 677 return Helper.matchConstantFold(*MIs[0], MatchData23); 678 return true; 679 }() ) { 680 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 681 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 682 return true; 683 } 684 } 685 // Leaf name: binop_same_val 686 // Rule: binop_same_val 687 if (!RuleConfig->isRuleDisabled(26)) { 688 if (1 689 && [&]() { 690 return Helper.matchBinOpSameVal(*MIs[0]); 691 return true; 692 }() ) { 693 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n"); 694 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 695 return true; 696 } 697 } 698 // Leaf name: overlapping_and 699 // Rule: overlapping_and 700 if (!RuleConfig->isRuleDisabled(40)) { 701 if (1 702 && [&]() { 703 return Helper.matchOverlappingAnd(*MIs[0], MatchData40); 704 return true; 705 }() ) { 706 LLVM_DEBUG(dbgs() << "Applying rule 'overlapping_and'\n"); 707 Helper.applyBuildFn(*MIs[0], MatchData40); 708 return true; 709 } 710 } 711 // Leaf name: undef_to_int_zero 712 // Rule: undef_to_int_zero 713 if (!RuleConfig->isRuleDisabled(43)) { 714 if (1 715 && [&]() { 716 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 717 return true; 718 }() ) { 719 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n"); 720 Helper.replaceInstWithConstant(*MIs[0], 0); 721 return true; 722 } 723 } 724 return false; 725 } 726 if (Partition == 5 /* TargetOpcode::G_SEXT_INREG */) { 727 // Leaf name: sext_trunc_sextload 728 // Rule: sext_trunc_sextload 729 if (!RuleConfig->isRuleDisabled(3)) { 730 if (1 731 && [&]() { 732 return Helper.matchSextTruncSextLoad(*MIs[0]); 733 return true; 734 }() ) { 735 LLVM_DEBUG(dbgs() << "Applying rule 'sext_trunc_sextload'\n"); 736 Helper.applySextTruncSextLoad(*MIs[0]); 737 return true; 738 } 739 } 740 // Leaf name: redundant_sext_inreg 741 // Rule: redundant_sext_inreg 742 if (!RuleConfig->isRuleDisabled(11)) { 743 if (1 744 && [&]() { 745 return Helper.matchRedundantSExtInReg(*MIs[0]); 746 return true; 747 }() ) { 748 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_sext_inreg'\n"); 749 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 750 return true; 751 } 752 } 753 // Leaf name: bitfield_extract_from_sext_inreg 754 // Rule: bitfield_extract_from_sext_inreg 755 if (!RuleConfig->isRuleDisabled(12)) { 756 if (1 757 && [&]() { 758 return Helper.matchBitfieldExtractFromSExtInReg(*MIs[0], MatchData12); 759 return true; 760 }() ) { 761 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_sext_inreg'\n"); 762 Helper.applyBuildFn(*MIs[0], MatchData12); 763 return true; 764 } 765 } 766 return false; 767 } 768 if (Partition == 6 /* TargetOpcode::G_ANYEXT */) { 769 // Leaf name: mutate_anyext_to_zext 770 // Rule: mutate_anyext_to_zext 771 if (!RuleConfig->isRuleDisabled(4)) { 772 if (1 773 && [&]() { 774 return matchMutateAnyExtToZExt(*MIs[0], MRI); 775 return true; 776 }() ) { 777 LLVM_DEBUG(dbgs() << "Applying rule 'mutate_anyext_to_zext'\n"); 778 applyMutateAnyExtToZExt(*MIs[0], MRI, B, Observer); 779 return true; 780 } 781 } 782 // Leaf name: anyext_trunc_fold 783 // Rule: anyext_trunc_fold 784 if (!RuleConfig->isRuleDisabled(31)) { 785 if (1 786 && [&]() { 787 return Helper.matchCombineAnyExtTrunc(*MIs[0], MatchData31); 788 return true; 789 }() ) { 790 LLVM_DEBUG(dbgs() << "Applying rule 'anyext_trunc_fold'\n"); 791 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData31); 792 return true; 793 } 794 } 795 return false; 796 } 797 if (Partition == 7 /* TargetOpcode::G_OR */) { 798 // Leaf name: hoist_logic_op_with_same_opcode_hands 799 // Rule: hoist_logic_op_with_same_opcode_hands 800 if (!RuleConfig->isRuleDisabled(5)) { 801 if (1 802 && [&]() { 803 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData5); 804 return true; 805 }() ) { 806 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"); 807 Helper.applyBuildInstructionSteps(*MIs[0], MatchData5); 808 return true; 809 } 810 } 811 // Leaf name: redundant_or 812 // Rule: redundant_or 813 if (!RuleConfig->isRuleDisabled(9)) { 814 if (1 815 && [&]() { 816 return Helper.matchRedundantOr(*MIs[0], MatchData9); 817 return true; 818 }() ) { 819 LLVM_DEBUG(dbgs() << "Applying rule 'redundant_or'\n"); 820 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData9); 821 return true; 822 } 823 } 824 // Leaf name: constant_fold 825 // Rule: constant_fold 826 if (!RuleConfig->isRuleDisabled(23)) { 827 if (1 828 && [&]() { 829 return Helper.matchConstantFold(*MIs[0], MatchData23); 830 return true; 831 }() ) { 832 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 833 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 834 return true; 835 } 836 } 837 // Leaf name: right_identity_zero 838 // Rule: right_identity_zero 839 if (!RuleConfig->isRuleDisabled(25)) { 840 if (1 841 && [&]() { 842 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 843 return true; 844 }() ) { 845 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 846 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 847 return true; 848 } 849 } 850 // Leaf name: binop_same_val 851 // Rule: binop_same_val 852 if (!RuleConfig->isRuleDisabled(26)) { 853 if (1 854 && [&]() { 855 return Helper.matchBinOpSameVal(*MIs[0]); 856 return true; 857 }() ) { 858 LLVM_DEBUG(dbgs() << "Applying rule 'binop_same_val'\n"); 859 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 860 return true; 861 } 862 } 863 // Leaf name: undef_to_negative_one 864 // Rule: undef_to_negative_one 865 if (!RuleConfig->isRuleDisabled(44)) { 866 if (1 867 && [&]() { 868 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 869 return true; 870 }() ) { 871 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_negative_one'\n"); 872 Helper.replaceInstWithConstant(*MIs[0], -1); 873 return true; 874 } 875 } 876 return false; 877 } 878 if (Partition == 8 /* TargetOpcode::G_XOR */) { 879 // Leaf name: hoist_logic_op_with_same_opcode_hands 880 // Rule: hoist_logic_op_with_same_opcode_hands 881 if (!RuleConfig->isRuleDisabled(5)) { 882 if (1 883 && [&]() { 884 return Helper.matchHoistLogicOpWithSameOpcodeHands(*MIs[0], MatchData5); 885 return true; 886 }() ) { 887 LLVM_DEBUG(dbgs() << "Applying rule 'hoist_logic_op_with_same_opcode_hands'\n"); 888 Helper.applyBuildInstructionSteps(*MIs[0], MatchData5); 889 return true; 890 } 891 } 892 // Leaf name: xor_of_and_with_same_reg 893 // Rule: xor_of_and_with_same_reg 894 if (!RuleConfig->isRuleDisabled(7)) { 895 if (1 896 && [&]() { 897 return Helper.matchXorOfAndWithSameReg(*MIs[0], MatchData7); 898 return true; 899 }() ) { 900 LLVM_DEBUG(dbgs() << "Applying rule 'xor_of_and_with_same_reg'\n"); 901 Helper.applyXorOfAndWithSameReg(*MIs[0], MatchData7); 902 return true; 903 } 904 } 905 // Leaf name: constant_fold 906 // Rule: constant_fold 907 if (!RuleConfig->isRuleDisabled(23)) { 908 if (1 909 && [&]() { 910 return Helper.matchConstantFold(*MIs[0], MatchData23); 911 return true; 912 }() ) { 913 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 914 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 915 return true; 916 } 917 } 918 // Leaf name: right_identity_zero 919 // Rule: right_identity_zero 920 if (!RuleConfig->isRuleDisabled(25)) { 921 if (1 922 && [&]() { 923 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 924 return true; 925 }() ) { 926 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 927 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 928 return true; 929 } 930 } 931 // Leaf name: propagate_undef_any_op 932 // Rule: propagate_undef_any_op 933 if (!RuleConfig->isRuleDisabled(48)) { 934 if (1 935 && [&]() { 936 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 937 return true; 938 }() ) { 939 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 940 Helper.replaceInstWithUndef(*MIs[0]); 941 return true; 942 } 943 } 944 return false; 945 } 946 if (Partition == 9 /* TargetOpcode::G_EXTRACT_VECTOR_ELT */) { 947 // Leaf name: extractvecelt_pairwise_add 948 // Rule: extractvecelt_pairwise_add 949 if (!RuleConfig->isRuleDisabled(8)) { 950 if (1 951 && [&]() { 952 return matchExtractVecEltPairwiseAdd(*MIs[0], MRI, MatchData8); 953 return true; 954 }() ) { 955 LLVM_DEBUG(dbgs() << "Applying rule 'extractvecelt_pairwise_add'\n"); 956 applyExtractVecEltPairwiseAdd(*MIs[0], MRI, B, MatchData8); 957 return true; 958 } 959 } 960 // Leaf name: insert_extract_vec_elt_out_of_bounds 961 // Rule: insert_extract_vec_elt_out_of_bounds 962 if (!RuleConfig->isRuleDisabled(53)) { 963 if (1 964 && [&]() { 965 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); 966 return true; 967 }() ) { 968 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"); 969 Helper.replaceInstWithUndef(*MIs[0]); 970 return true; 971 } 972 } 973 return false; 974 } 975 if (Partition == 10 /* TargetOpcode::G_MUL */) { 976 // Leaf name: mul_const 977 // Rule: mul_const 978 if (!RuleConfig->isRuleDisabled(10)) { 979 if (1 980 && [&]() { 981 return matchAArch64MulConstCombine(*MIs[0], MRI, MatchData10); 982 return true; 983 }() ) { 984 LLVM_DEBUG(dbgs() << "Applying rule 'mul_const'\n"); 985 applyAArch64MulConstCombine(*MIs[0], MRI, B, MatchData10); 986 return true; 987 } 988 } 989 // Leaf name: constant_fold 990 // Rule: constant_fold 991 if (!RuleConfig->isRuleDisabled(23)) { 992 if (1 993 && [&]() { 994 return Helper.matchConstantFold(*MIs[0], MatchData23); 995 return true; 996 }() ) { 997 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 998 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 999 return true; 1000 } 1001 } 1002 // Leaf name: binop_right_to_zero 1003 // Rule: binop_right_to_zero 1004 if (!RuleConfig->isRuleDisabled(28)) { 1005 if (1 1006 && [&]() { 1007 return Helper.matchOperandIsZero(*MIs[0], 2); 1008 return true; 1009 }() ) { 1010 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_to_zero'\n"); 1011 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); 1012 return true; 1013 } 1014 } 1015 // Leaf name: right_identity_one 1016 // Rule: right_identity_one 1017 if (!RuleConfig->isRuleDisabled(33)) { 1018 if (1 1019 && [&]() { 1020 return Helper.matchConstantOp(MIs[0]->getOperand(2), 1); 1021 return true; 1022 }() ) { 1023 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_one'\n"); 1024 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1025 return true; 1026 } 1027 } 1028 // Leaf name: undef_to_int_zero 1029 // Rule: undef_to_int_zero 1030 if (!RuleConfig->isRuleDisabled(43)) { 1031 if (1 1032 && [&]() { 1033 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1034 return true; 1035 }() ) { 1036 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_int_zero'\n"); 1037 Helper.replaceInstWithConstant(*MIs[0], 0); 1038 return true; 1039 } 1040 } 1041 return false; 1042 } 1043 if (Partition == 11 /* TargetOpcode::G_ASHR */) { 1044 // Leaf name: bitfield_extract_from_shr 1045 // Rule: bitfield_extract_from_shr 1046 if (!RuleConfig->isRuleDisabled(14)) { 1047 if (1 1048 && [&]() { 1049 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData14); 1050 return true; 1051 }() ) { 1052 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"); 1053 Helper.applyBuildFn(*MIs[0], MatchData14); 1054 return true; 1055 } 1056 } 1057 // Leaf name: bitfield_extract_from_shr_and 1058 // Rule: bitfield_extract_from_shr_and 1059 if (!RuleConfig->isRuleDisabled(15)) { 1060 if (1 1061 && [&]() { 1062 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData15); 1063 return true; 1064 }() ) { 1065 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"); 1066 Helper.applyBuildFn(*MIs[0], MatchData15); 1067 return true; 1068 } 1069 } 1070 // Leaf name: right_identity_zero 1071 // Rule: right_identity_zero 1072 if (!RuleConfig->isRuleDisabled(25)) { 1073 if (1 1074 && [&]() { 1075 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1076 return true; 1077 }() ) { 1078 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1079 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1080 return true; 1081 } 1082 } 1083 // Leaf name: binop_right_undef_to_undef 1084 // Rule: binop_right_undef_to_undef 1085 if (!RuleConfig->isRuleDisabled(46)) { 1086 if (1 1087 && [&]() { 1088 return Helper.matchOperandIsUndef(*MIs[0], 2); 1089 return true; 1090 }() ) { 1091 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"); 1092 Helper.replaceInstWithUndef(*MIs[0]); 1093 return true; 1094 } 1095 } 1096 return false; 1097 } 1098 if (Partition == 12 /* TargetOpcode::G_LSHR */) { 1099 // Leaf name: bitfield_extract_from_shr 1100 // Rule: bitfield_extract_from_shr 1101 if (!RuleConfig->isRuleDisabled(14)) { 1102 if (1 1103 && [&]() { 1104 return Helper.matchBitfieldExtractFromShr(*MIs[0], MatchData14); 1105 return true; 1106 }() ) { 1107 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr'\n"); 1108 Helper.applyBuildFn(*MIs[0], MatchData14); 1109 return true; 1110 } 1111 } 1112 // Leaf name: bitfield_extract_from_shr_and 1113 // Rule: bitfield_extract_from_shr_and 1114 if (!RuleConfig->isRuleDisabled(15)) { 1115 if (1 1116 && [&]() { 1117 return Helper.matchBitfieldExtractFromShrAnd(*MIs[0], MatchData15); 1118 return true; 1119 }() ) { 1120 LLVM_DEBUG(dbgs() << "Applying rule 'bitfield_extract_from_shr_and'\n"); 1121 Helper.applyBuildFn(*MIs[0], MatchData15); 1122 return true; 1123 } 1124 } 1125 // Leaf name: right_identity_zero 1126 // Rule: right_identity_zero 1127 if (!RuleConfig->isRuleDisabled(25)) { 1128 if (1 1129 && [&]() { 1130 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1131 return true; 1132 }() ) { 1133 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1134 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1135 return true; 1136 } 1137 } 1138 // Leaf name: binop_right_undef_to_undef 1139 // Rule: binop_right_undef_to_undef 1140 if (!RuleConfig->isRuleDisabled(46)) { 1141 if (1 1142 && [&]() { 1143 return Helper.matchOperandIsUndef(*MIs[0], 2); 1144 return true; 1145 }() ) { 1146 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"); 1147 Helper.replaceInstWithUndef(*MIs[0]); 1148 return true; 1149 } 1150 } 1151 return false; 1152 } 1153 if (Partition == 13 /* TargetOpcode::G_ROTR */) { 1154 // Leaf name: rotate_out_of_range 1155 // Rule: rotate_out_of_range 1156 if (!RuleConfig->isRuleDisabled(16)) { 1157 if (1 1158 && [&]() { 1159 return Helper.matchRotateOutOfRange(*MIs[0]); 1160 return true; 1161 }() ) { 1162 LLVM_DEBUG(dbgs() << "Applying rule 'rotate_out_of_range'\n"); 1163 Helper.applyRotateOutOfRange(*MIs[0]); 1164 return true; 1165 } 1166 } 1167 // Leaf name: right_identity_zero 1168 // Rule: right_identity_zero 1169 if (!RuleConfig->isRuleDisabled(25)) { 1170 if (1 1171 && [&]() { 1172 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1173 return true; 1174 }() ) { 1175 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1176 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1177 return true; 1178 } 1179 } 1180 return false; 1181 } 1182 if (Partition == 14 /* TargetOpcode::G_ROTL */) { 1183 // Leaf name: rotate_out_of_range 1184 // Rule: rotate_out_of_range 1185 if (!RuleConfig->isRuleDisabled(16)) { 1186 if (1 1187 && [&]() { 1188 return Helper.matchRotateOutOfRange(*MIs[0]); 1189 return true; 1190 }() ) { 1191 LLVM_DEBUG(dbgs() << "Applying rule 'rotate_out_of_range'\n"); 1192 Helper.applyRotateOutOfRange(*MIs[0]); 1193 return true; 1194 } 1195 } 1196 // Leaf name: right_identity_zero 1197 // Rule: right_identity_zero 1198 if (!RuleConfig->isRuleDisabled(25)) { 1199 if (1 1200 && [&]() { 1201 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1202 return true; 1203 }() ) { 1204 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1205 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1206 return true; 1207 } 1208 } 1209 return false; 1210 } 1211 if (Partition == 15 /* TargetOpcode::G_ICMP */) { 1212 // Leaf name: icmp_to_true_false_known_bits 1213 // Rule: icmp_to_true_false_known_bits 1214 if (!RuleConfig->isRuleDisabled(17)) { 1215 if (1 1216 && [&]() { 1217 return Helper.matchICmpToTrueFalseKnownBits(*MIs[0], MatchData17); 1218 return true; 1219 }() ) { 1220 LLVM_DEBUG(dbgs() << "Applying rule 'icmp_to_true_false_known_bits'\n"); 1221 Helper.replaceInstWithConstant(*MIs[0], MatchData17); 1222 return true; 1223 } 1224 } 1225 return false; 1226 } 1227 if (Partition == 16 /* TargetOpcode::G_MERGE_VALUES */) { 1228 // Leaf name: merge_unmerge 1229 // Rule: merge_unmerge 1230 if (!RuleConfig->isRuleDisabled(18)) { 1231 if (1 1232 && [&]() { 1233 return Helper.matchCombineMergeUnmerge(*MIs[0], MatchData18); 1234 return true; 1235 }() ) { 1236 LLVM_DEBUG(dbgs() << "Applying rule 'merge_unmerge'\n"); 1237 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData18); 1238 return true; 1239 } 1240 } 1241 // Leaf name: fold_merge_to_zext 1242 // Rule: fold_merge_to_zext 1243 if (!RuleConfig->isRuleDisabled(22)) { 1244 if (1 1245 && [&]() { 1246 return matchFoldMergeToZext(*MIs[0], MRI); 1247 return true; 1248 }() ) { 1249 LLVM_DEBUG(dbgs() << "Applying rule 'fold_merge_to_zext'\n"); 1250 applyFoldMergeToZext(*MIs[0], MRI, B, Observer); 1251 return true; 1252 } 1253 } 1254 return false; 1255 } 1256 if (Partition == 17 /* TargetOpcode::G_SELECT */) { 1257 // Leaf name: select_undef_cmp 1258 // Rule: select_undef_cmp 1259 if (!RuleConfig->isRuleDisabled(19)) { 1260 if (1 1261 && [&]() { 1262 return Helper.matchUndefSelectCmp(*MIs[0]); 1263 return true; 1264 }() ) { 1265 LLVM_DEBUG(dbgs() << "Applying rule 'select_undef_cmp'\n"); 1266 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); 1267 return true; 1268 } 1269 } 1270 // Leaf name: select_constant_cmp 1271 // Rule: select_constant_cmp 1272 if (!RuleConfig->isRuleDisabled(20)) { 1273 if (1 1274 && [&]() { 1275 return Helper.matchConstantSelectCmp(*MIs[0], MatchData20); 1276 return true; 1277 }() ) { 1278 LLVM_DEBUG(dbgs() << "Applying rule 'select_constant_cmp'\n"); 1279 return Helper.replaceSingleDefInstWithOperand(*MIs[0], MatchData20); 1280 return true; 1281 } 1282 } 1283 // Leaf name: select_to_logical 1284 // Rule: select_to_logical 1285 if (!RuleConfig->isRuleDisabled(21)) { 1286 if (1 1287 && [&]() { 1288 return Helper.matchSelectToLogical(*MIs[0], MatchData21); 1289 return true; 1290 }() ) { 1291 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_logical'\n"); 1292 Helper.applyBuildFn(*MIs[0], MatchData21); 1293 return true; 1294 } 1295 } 1296 // Leaf name: select_same_val 1297 // Rule: select_same_val 1298 if (!RuleConfig->isRuleDisabled(24)) { 1299 if (1 1300 && [&]() { 1301 return Helper.matchSelectSameVal(*MIs[0]); 1302 return true; 1303 }() ) { 1304 LLVM_DEBUG(dbgs() << "Applying rule 'select_same_val'\n"); 1305 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 2); 1306 return true; 1307 } 1308 } 1309 // Leaf name: select_to_minmax 1310 // Rule: select_to_minmax 1311 if (!RuleConfig->isRuleDisabled(54)) { 1312 if (1 1313 && [&]() { 1314 return Helper.matchSimplifySelectToMinMax(*MIs[0], MatchData54); 1315 return true; 1316 }() ) { 1317 LLVM_DEBUG(dbgs() << "Applying rule 'select_to_minmax'\n"); 1318 Helper.applyBuildFn(*MIs[0], MatchData54); 1319 return true; 1320 } 1321 } 1322 return false; 1323 } 1324 if (Partition == 18 /* TargetOpcode::G_ADD */) { 1325 // Leaf name: constant_fold 1326 // Rule: constant_fold 1327 if (!RuleConfig->isRuleDisabled(23)) { 1328 if (1 1329 && [&]() { 1330 return Helper.matchConstantFold(*MIs[0], MatchData23); 1331 return true; 1332 }() ) { 1333 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 1334 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 1335 return true; 1336 } 1337 } 1338 // Leaf name: right_identity_zero 1339 // Rule: right_identity_zero 1340 if (!RuleConfig->isRuleDisabled(25)) { 1341 if (1 1342 && [&]() { 1343 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1344 return true; 1345 }() ) { 1346 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1347 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1348 return true; 1349 } 1350 } 1351 // Leaf name: add_sub_reg 1352 // Rule: add_sub_reg 1353 if (!RuleConfig->isRuleDisabled(34)) { 1354 if (1 1355 && [&]() { 1356 return Helper.matchAddSubSameReg(*MIs[0], MatchData34); 1357 return true; 1358 }() ) { 1359 LLVM_DEBUG(dbgs() << "Applying rule 'add_sub_reg'\n"); 1360 return Helper.replaceSingleDefInstWithReg(*MIs[0], 1361 MatchData34); 1362 return true; 1363 } 1364 } 1365 // Leaf name: propagate_undef_any_op 1366 // Rule: propagate_undef_any_op 1367 if (!RuleConfig->isRuleDisabled(48)) { 1368 if (1 1369 && [&]() { 1370 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1371 return true; 1372 }() ) { 1373 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 1374 Helper.replaceInstWithUndef(*MIs[0]); 1375 return true; 1376 } 1377 } 1378 return false; 1379 } 1380 if (Partition == 19 /* TargetOpcode::G_SUB */) { 1381 // Leaf name: constant_fold 1382 // Rule: constant_fold 1383 if (!RuleConfig->isRuleDisabled(23)) { 1384 if (1 1385 && [&]() { 1386 return Helper.matchConstantFold(*MIs[0], MatchData23); 1387 return true; 1388 }() ) { 1389 LLVM_DEBUG(dbgs() << "Applying rule 'constant_fold'\n"); 1390 Helper.replaceInstWithConstant(*MIs[0], MatchData23); 1391 return true; 1392 } 1393 } 1394 // Leaf name: right_identity_zero 1395 // Rule: right_identity_zero 1396 if (!RuleConfig->isRuleDisabled(25)) { 1397 if (1 1398 && [&]() { 1399 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1400 return true; 1401 }() ) { 1402 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1403 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1404 return true; 1405 } 1406 } 1407 // Leaf name: propagate_undef_any_op 1408 // Rule: propagate_undef_any_op 1409 if (!RuleConfig->isRuleDisabled(48)) { 1410 if (1 1411 && [&]() { 1412 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1413 return true; 1414 }() ) { 1415 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 1416 Helper.replaceInstWithUndef(*MIs[0]); 1417 return true; 1418 } 1419 } 1420 return false; 1421 } 1422 if (Partition == 20 /* TargetOpcode::G_SHL */) { 1423 // Leaf name: right_identity_zero 1424 // Rule: right_identity_zero 1425 if (!RuleConfig->isRuleDisabled(25)) { 1426 if (1 1427 && [&]() { 1428 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1429 return true; 1430 }() ) { 1431 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1432 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1433 return true; 1434 } 1435 } 1436 // Leaf name: binop_left_undef_to_zero 1437 // Rule: binop_left_undef_to_zero 1438 if (!RuleConfig->isRuleDisabled(45)) { 1439 if (1 1440 && [&]() { 1441 return Helper.matchOperandIsUndef(*MIs[0], 1); 1442 return true; 1443 }() ) { 1444 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"); 1445 Helper.replaceInstWithConstant(*MIs[0], 0); 1446 return true; 1447 } 1448 } 1449 // Leaf name: binop_right_undef_to_undef 1450 // Rule: binop_right_undef_to_undef 1451 if (!RuleConfig->isRuleDisabled(46)) { 1452 if (1 1453 && [&]() { 1454 return Helper.matchOperandIsUndef(*MIs[0], 2); 1455 return true; 1456 }() ) { 1457 LLVM_DEBUG(dbgs() << "Applying rule 'binop_right_undef_to_undef'\n"); 1458 Helper.replaceInstWithUndef(*MIs[0]); 1459 return true; 1460 } 1461 } 1462 return false; 1463 } 1464 if (Partition == 21 /* TargetOpcode::G_PTR_ADD */) { 1465 // Leaf name: right_identity_zero 1466 // Rule: right_identity_zero 1467 if (!RuleConfig->isRuleDisabled(25)) { 1468 if (1 1469 && [&]() { 1470 return Helper.matchConstantOp(MIs[0]->getOperand(2), 0); 1471 return true; 1472 }() ) { 1473 LLVM_DEBUG(dbgs() << "Applying rule 'right_identity_zero'\n"); 1474 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1475 return true; 1476 } 1477 } 1478 // Leaf name: ptr_add_immed_chain 1479 // Rule: ptr_add_immed_chain 1480 if (!RuleConfig->isRuleDisabled(39)) { 1481 if (1 1482 && [&]() { 1483 return Helper.matchPtrAddImmedChain(*MIs[0], MatchData39); 1484 return true; 1485 }() ) { 1486 LLVM_DEBUG(dbgs() << "Applying rule 'ptr_add_immed_chain'\n"); 1487 Helper.applyPtrAddImmedChain(*MIs[0], MatchData39); 1488 return true; 1489 } 1490 } 1491 return false; 1492 } 1493 if (Partition == 22 /* TargetOpcode::G_SDIV */) { 1494 // Leaf name: binop_left_to_zero 1495 // Rule: binop_left_to_zero 1496 if (!RuleConfig->isRuleDisabled(27)) { 1497 if (1 1498 && [&]() { 1499 return Helper.matchOperandIsZero(*MIs[0], 1); 1500 return true; 1501 }() ) { 1502 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n"); 1503 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1504 return true; 1505 } 1506 } 1507 return false; 1508 } 1509 if (Partition == 23 /* TargetOpcode::G_UDIV */) { 1510 // Leaf name: binop_left_to_zero 1511 // Rule: binop_left_to_zero 1512 if (!RuleConfig->isRuleDisabled(27)) { 1513 if (1 1514 && [&]() { 1515 return Helper.matchOperandIsZero(*MIs[0], 1); 1516 return true; 1517 }() ) { 1518 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n"); 1519 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1520 return true; 1521 } 1522 } 1523 // Leaf name: binop_left_undef_to_zero 1524 // Rule: binop_left_undef_to_zero 1525 if (!RuleConfig->isRuleDisabled(45)) { 1526 if (1 1527 && [&]() { 1528 return Helper.matchOperandIsUndef(*MIs[0], 1); 1529 return true; 1530 }() ) { 1531 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"); 1532 Helper.replaceInstWithConstant(*MIs[0], 0); 1533 return true; 1534 } 1535 } 1536 return false; 1537 } 1538 if (Partition == 24 /* TargetOpcode::G_SREM */) { 1539 // Leaf name: binop_left_to_zero 1540 // Rule: binop_left_to_zero 1541 if (!RuleConfig->isRuleDisabled(27)) { 1542 if (1 1543 && [&]() { 1544 return Helper.matchOperandIsZero(*MIs[0], 1); 1545 return true; 1546 }() ) { 1547 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n"); 1548 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1549 return true; 1550 } 1551 } 1552 return false; 1553 } 1554 if (Partition == 25 /* TargetOpcode::G_UREM */) { 1555 // Leaf name: binop_left_to_zero 1556 // Rule: binop_left_to_zero 1557 if (!RuleConfig->isRuleDisabled(27)) { 1558 if (1 1559 && [&]() { 1560 return Helper.matchOperandIsZero(*MIs[0], 1); 1561 return true; 1562 }() ) { 1563 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_to_zero'\n"); 1564 return Helper.replaceSingleDefInstWithOperand(*MIs[0], 1); 1565 return true; 1566 } 1567 } 1568 // Leaf name: binop_left_undef_to_zero 1569 // Rule: binop_left_undef_to_zero 1570 if (!RuleConfig->isRuleDisabled(45)) { 1571 if (1 1572 && [&]() { 1573 return Helper.matchOperandIsUndef(*MIs[0], 1); 1574 return true; 1575 }() ) { 1576 LLVM_DEBUG(dbgs() << "Applying rule 'binop_left_undef_to_zero'\n"); 1577 Helper.replaceInstWithConstant(*MIs[0], 0); 1578 return true; 1579 } 1580 } 1581 return false; 1582 } 1583 if (Partition == 26 /* TargetOpcode::G_INTTOPTR */) { 1584 // Leaf name: p2i_to_i2p 1585 // Rule: p2i_to_i2p 1586 if (!RuleConfig->isRuleDisabled(29)) { 1587 if (1 1588 && [&]() { 1589 return Helper.matchCombineI2PToP2I(*MIs[0], MatchData29); 1590 return true; 1591 }() ) { 1592 LLVM_DEBUG(dbgs() << "Applying rule 'p2i_to_i2p'\n"); 1593 Helper.applyCombineI2PToP2I(*MIs[0], MatchData29); 1594 return true; 1595 } 1596 } 1597 return false; 1598 } 1599 if (Partition == 27 /* TargetOpcode::G_PTRTOINT */) { 1600 Partition = -1; 1601 if (MIs.size() <= 1) MIs.resize(2); 1602 MIs[1] = nullptr; 1603 if (MIs[0]->getOperand(1).isReg()) 1604 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); 1605 if (MIs[1] != nullptr) Partition = 0; 1606 if (Partition == -1) return false; 1607 if (Partition == 0 /* true */) { 1608 Partition = -1; 1609 switch (MIs[1]->getOpcode()) { 1610 case TargetOpcode::G_INTTOPTR: Partition = 0; break; 1611 } 1612 // Default case but without conflicting with potential default case in selection. 1613 if (Partition == -1) return false; 1614 if (Partition == 0 /* TargetOpcode::G_INTTOPTR */) { 1615 // Leaf name: i2p_to_p2i 1616 // Rule: i2p_to_p2i 1617 if (!RuleConfig->isRuleDisabled(30)) { 1618 if (1 1619 && [&]() { 1620 MatchData30 = MIs[1]->getOperand(1).getReg(); 1621 return true; 1622 }() ) { 1623 LLVM_DEBUG(dbgs() << "Applying rule 'i2p_to_p2i'\n"); 1624 Helper.applyCombineP2IToI2P(*MIs[0], MatchData30); 1625 return true; 1626 } 1627 } 1628 return false; 1629 } 1630 } 1631 } 1632 if (Partition == 28 /* TargetOpcode::G_FNEG */) { 1633 Partition = -1; 1634 if (MIs.size() <= 1) MIs.resize(2); 1635 MIs[1] = nullptr; 1636 if (MIs[0]->getOperand(1).isReg()) 1637 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); 1638 if (MIs[1] != nullptr) Partition = 0; 1639 if (Partition == -1) return false; 1640 if (Partition == 0 /* true */) { 1641 Partition = -1; 1642 switch (MIs[1]->getOpcode()) { 1643 case TargetOpcode::G_FNEG: Partition = 0; break; 1644 } 1645 // Default case but without conflicting with potential default case in selection. 1646 if (Partition == -1) return false; 1647 if (Partition == 0 /* TargetOpcode::G_FNEG */) { 1648 // Leaf name: fneg_fneg_fold 1649 // Rule: fneg_fneg_fold 1650 if (!RuleConfig->isRuleDisabled(32)) { 1651 if (1 1652 && [&]() { 1653 MatchData32 = MIs[1]->getOperand(1).getReg(); 1654 return true; 1655 }() ) { 1656 LLVM_DEBUG(dbgs() << "Applying rule 'fneg_fneg_fold'\n"); 1657 return Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData32); 1658 return true; 1659 } 1660 } 1661 return false; 1662 } 1663 } 1664 } 1665 if (Partition == 29 /* TargetOpcode::G_BUILD_VECTOR_TRUNC */) { 1666 // Leaf name: buildvector_identity_fold 1667 // Rule: buildvector_identity_fold 1668 if (!RuleConfig->isRuleDisabled(35)) { 1669 if (1 1670 && [&]() { 1671 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData35); 1672 return true; 1673 }() ) { 1674 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n"); 1675 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); 1676 return true; 1677 } 1678 } 1679 return false; 1680 } 1681 if (Partition == 30 /* TargetOpcode::G_BUILD_VECTOR */) { 1682 // Leaf name: buildvector_identity_fold 1683 // Rule: buildvector_identity_fold 1684 if (!RuleConfig->isRuleDisabled(35)) { 1685 if (1 1686 && [&]() { 1687 return Helper.matchBuildVectorIdentityFold(*MIs[0], MatchData35); 1688 return true; 1689 }() ) { 1690 LLVM_DEBUG(dbgs() << "Applying rule 'buildvector_identity_fold'\n"); 1691 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData35); 1692 return true; 1693 } 1694 } 1695 return false; 1696 } 1697 if (Partition == 31 /* TargetOpcode::G_TRUNC */) { 1698 // Leaf name: trunc_buildvector_fold 1699 // Rule: trunc_buildvector_fold 1700 if (!RuleConfig->isRuleDisabled(36)) { 1701 if (1 1702 && [&]() { 1703 return Helper.matchTruncBuildVectorFold(*MIs[0], MatchData36); 1704 return true; 1705 }() ) { 1706 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_buildvector_fold'\n"); 1707 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData36); 1708 return true; 1709 } 1710 } 1711 // Leaf name: trunc_lshr_buildvector_fold 1712 // Rule: trunc_lshr_buildvector_fold 1713 if (!RuleConfig->isRuleDisabled(37)) { 1714 if (1 1715 && [&]() { 1716 return Helper.matchTruncLshrBuildVectorFold(*MIs[0], MatchData37); 1717 return true; 1718 }() ) { 1719 LLVM_DEBUG(dbgs() << "Applying rule 'trunc_lshr_buildvector_fold'\n"); 1720 Helper.replaceSingleDefInstWithReg(*MIs[0], MatchData37); 1721 return true; 1722 } 1723 } 1724 // Leaf name: propagate_undef_any_op 1725 // Rule: propagate_undef_any_op 1726 if (!RuleConfig->isRuleDisabled(48)) { 1727 if (1 1728 && [&]() { 1729 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1730 return true; 1731 }() ) { 1732 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 1733 Helper.replaceInstWithUndef(*MIs[0]); 1734 return true; 1735 } 1736 } 1737 return false; 1738 } 1739 if (Partition == 32 /* TargetOpcode::G_BITCAST */) { 1740 Partition = -1; 1741 if (MIs.size() <= 1) MIs.resize(2); 1742 MIs[1] = nullptr; 1743 if (MIs[0]->getOperand(1).isReg()) 1744 MIs[1] = MRI.getVRegDef(MIs[0]->getOperand(1).getReg()); 1745 if (MIs[1] != nullptr) Partition = 0; 1746 if (Partition == -1) return false; 1747 if (Partition == 0 /* true */) { 1748 Partition = -1; 1749 switch (MIs[1]->getOpcode()) { 1750 case TargetOpcode::G_BITCAST: Partition = 0; break; 1751 } 1752 // Default case but without conflicting with potential default case in selection. 1753 if (Partition == -1) return false; 1754 if (Partition == 0 /* TargetOpcode::G_BITCAST */) { 1755 // Leaf name: bitcast_bitcast_fold 1756 // Rule: bitcast_bitcast_fold 1757 if (!RuleConfig->isRuleDisabled(38)) { 1758 if (1 1759 && [&]() { 1760 return MRI.getType(MIs[1]->getOperand(1).getReg()) == MRI.getType(MIs[0]->getOperand(0).getReg()); 1761 return true; 1762 }() ) { 1763 LLVM_DEBUG(dbgs() << "Applying rule 'bitcast_bitcast_fold'\n"); 1764 Helper.replaceSingleDefInstWithReg(*MIs[0], MIs[1]->getOperand(1).getReg()); 1765 return true; 1766 } 1767 } 1768 return false; 1769 } 1770 } 1771 } 1772 if (Partition == 33 /* TargetOpcode::G_STORE */) { 1773 // Leaf name: split_store_zero_128 1774 // Rule: split_store_zero_128 1775 if (!RuleConfig->isRuleDisabled(41)) { 1776 if (1 1777 && [&]() { 1778 return matchSplitStoreZero128(*MIs[0], MRI); 1779 return true; 1780 }() ) { 1781 LLVM_DEBUG(dbgs() << "Applying rule 'split_store_zero_128'\n"); 1782 applySplitStoreZero128(*MIs[0], MRI, B, Observer); 1783 return true; 1784 } 1785 } 1786 // Leaf name: erase_undef_store 1787 // Rule: erase_undef_store 1788 if (!RuleConfig->isRuleDisabled(51)) { 1789 if (1 1790 && [&]() { 1791 return Helper.matchUndefStore(*MIs[0]); 1792 return true; 1793 }() ) { 1794 LLVM_DEBUG(dbgs() << "Applying rule 'erase_undef_store'\n"); 1795 return Helper.eraseInst(*MIs[0]); 1796 return true; 1797 } 1798 } 1799 return false; 1800 } 1801 if (Partition == 34 /* TargetOpcode::G_UITOFP */) { 1802 // Leaf name: undef_to_fp_zero 1803 // Rule: undef_to_fp_zero 1804 if (!RuleConfig->isRuleDisabled(42)) { 1805 if (1 1806 && [&]() { 1807 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1808 return true; 1809 }() ) { 1810 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n"); 1811 Helper.replaceInstWithFConstant(*MIs[0], 0.0); 1812 return true; 1813 } 1814 } 1815 return false; 1816 } 1817 if (Partition == 35 /* TargetOpcode::G_SITOFP */) { 1818 // Leaf name: undef_to_fp_zero 1819 // Rule: undef_to_fp_zero 1820 if (!RuleConfig->isRuleDisabled(42)) { 1821 if (1 1822 && [&]() { 1823 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1824 return true; 1825 }() ) { 1826 LLVM_DEBUG(dbgs() << "Applying rule 'undef_to_fp_zero'\n"); 1827 Helper.replaceInstWithFConstant(*MIs[0], 0.0); 1828 return true; 1829 } 1830 } 1831 return false; 1832 } 1833 if (Partition == 36 /* TargetOpcode::G_ABS */) { 1834 // Leaf name: unary_undef_to_zero 1835 // Rule: unary_undef_to_zero 1836 if (!RuleConfig->isRuleDisabled(47)) { 1837 if (1 1838 && [&]() { 1839 return Helper.matchOperandIsUndef(*MIs[0], 1); 1840 return true; 1841 }() ) { 1842 LLVM_DEBUG(dbgs() << "Applying rule 'unary_undef_to_zero'\n"); 1843 Helper.replaceInstWithConstant(*MIs[0], 0); 1844 return true; 1845 } 1846 } 1847 return false; 1848 } 1849 if (Partition == 37 /* TargetOpcode::G_FPTOSI */) { 1850 // Leaf name: propagate_undef_any_op 1851 // Rule: propagate_undef_any_op 1852 if (!RuleConfig->isRuleDisabled(48)) { 1853 if (1 1854 && [&]() { 1855 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1856 return true; 1857 }() ) { 1858 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 1859 Helper.replaceInstWithUndef(*MIs[0]); 1860 return true; 1861 } 1862 } 1863 return false; 1864 } 1865 if (Partition == 38 /* TargetOpcode::G_FPTOUI */) { 1866 // Leaf name: propagate_undef_any_op 1867 // Rule: propagate_undef_any_op 1868 if (!RuleConfig->isRuleDisabled(48)) { 1869 if (1 1870 && [&]() { 1871 return Helper.matchAnyExplicitUseIsUndef(*MIs[0]); 1872 return true; 1873 }() ) { 1874 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_any_op'\n"); 1875 Helper.replaceInstWithUndef(*MIs[0]); 1876 return true; 1877 } 1878 } 1879 return false; 1880 } 1881 if (Partition == 39 /* TargetOpcode::G_SHUFFLE_VECTOR */) { 1882 // Leaf name: propagate_undef_all_ops 1883 // Rule: propagate_undef_all_ops 1884 if (!RuleConfig->isRuleDisabled(49)) { 1885 if (1 1886 && [&]() { 1887 return Helper.matchAllExplicitUsesAreUndef(*MIs[0]); 1888 return true; 1889 }() ) { 1890 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_all_ops'\n"); 1891 Helper.replaceInstWithUndef(*MIs[0]); 1892 return true; 1893 } 1894 } 1895 // Leaf name: propagate_undef_shuffle_mask 1896 // Rule: propagate_undef_shuffle_mask 1897 if (!RuleConfig->isRuleDisabled(50)) { 1898 if (1 1899 && [&]() { 1900 return Helper.matchUndefShuffleVectorMask(*MIs[0]); 1901 return true; 1902 }() ) { 1903 LLVM_DEBUG(dbgs() << "Applying rule 'propagate_undef_shuffle_mask'\n"); 1904 Helper.replaceInstWithUndef(*MIs[0]); 1905 return true; 1906 } 1907 } 1908 return false; 1909 } 1910 if (Partition == 40 /* TargetOpcode::G_UNMERGE_VALUES */) { 1911 // Leaf name: unmerge_undef 1912 // Rule: unmerge_undef 1913 if (!RuleConfig->isRuleDisabled(52)) { 1914 if (1 1915 && [&]() { 1916 return Helper.matchCombineUnmergeUndef(*MIs[0], MatchData52); 1917 return true; 1918 }() ) { 1919 LLVM_DEBUG(dbgs() << "Applying rule 'unmerge_undef'\n"); 1920 Helper.applyBuildFn(*MIs[0], MatchData52); 1921 return true; 1922 } 1923 } 1924 return false; 1925 } 1926 if (Partition == 41 /* TargetOpcode::G_INSERT_VECTOR_ELT */) { 1927 // Leaf name: insert_extract_vec_elt_out_of_bounds 1928 // Rule: insert_extract_vec_elt_out_of_bounds 1929 if (!RuleConfig->isRuleDisabled(53)) { 1930 if (1 1931 && [&]() { 1932 return Helper.matchInsertExtractVecEltOutOfBounds(*MIs[0]); 1933 return true; 1934 }() ) { 1935 LLVM_DEBUG(dbgs() << "Applying rule 'insert_extract_vec_elt_out_of_bounds'\n"); 1936 Helper.replaceInstWithUndef(*MIs[0]); 1937 return true; 1938 } 1939 } 1940 return false; 1941 } 1942 1943 return false; 1944} 1945#endif // ifdef AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP 1946