1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* "Fast" Instruction Selector for the ARM target *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9 10// FastEmit Immediate Predicate functions. 11static bool Predicate_mod_imm(int64_t Imm) { 12 13 return ARM_AM::getSOImmVal(Imm) != -1; 14 15} 16static bool Predicate_imm0_65535(int64_t Imm) { 17 18 return Imm >= 0 && Imm < 65536; 19 20} 21static bool Predicate_imm0_7(int64_t Imm) { 22 23 return Imm >= 0 && Imm < 8; 24 25} 26static bool Predicate_imm8_255(int64_t Imm) { 27 28 return Imm >= 8 && Imm < 256; 29 30} 31static bool Predicate_imm0_255(int64_t Imm) { 32 return Imm >= 0 && Imm < 256; 33} 34static bool Predicate_t2_so_imm(int64_t Imm) { 35 36 return ARM_AM::getT2SOImmVal(Imm) != -1; 37 38} 39static bool Predicate_imm0_4095(int64_t Imm) { 40 41 return Imm >= 0 && Imm < 4096; 42 43} 44static bool Predicate_imm1_31(int64_t Imm) { 45 return Imm > 0 && Imm < 32; 46} 47static bool Predicate_shr_imm8(int64_t Imm) { 48 return Imm > 0 && Imm <= 8; 49} 50static bool Predicate_shr_imm16(int64_t Imm) { 51 return Imm > 0 && Imm <= 16; 52} 53static bool Predicate_shr_imm32(int64_t Imm) { 54 return Imm > 0 && Imm <= 32; 55} 56static bool Predicate_VectorIndex32(int64_t Imm) { 57 58 return ((uint64_t)Imm) < 2; 59 60} 61static bool Predicate_imm0_31(int64_t Imm) { 62 63 return Imm >= 0 && Imm < 32; 64 65} 66static bool Predicate_t2_so_imm_neg(int64_t Imm) { 67 68 return Imm && ARM_AM::getT2SOImmVal(-(uint32_t)Imm) != -1; 69 70} 71static bool Predicate_imm0_15(int64_t Imm) { 72 73 return Imm >= 0 && Imm < 16; 74 75} 76 77 78// FastEmit functions for ARMISD::CALL. 79 80unsigned fastEmit_ARMISD_CALL_MVT_i32_r(MVT RetVT, unsigned Op0) { 81 if (RetVT.SimpleTy != MVT::isVoid) 82 return 0; 83 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb()) && ( MF->getSubtarget<ARMSubtarget>().hardenSlsBlr() )) { 84 return fastEmitInst_r(ARM::BLX_noip, &ARM::GPRnoipRegClass, Op0); 85 } 86 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb()) && ( !MF->getSubtarget<ARMSubtarget>().hardenSlsBlr() )) { 87 return fastEmitInst_r(ARM::BLX, &ARM::GPRRegClass, Op0); 88 } 89 return 0; 90} 91 92unsigned fastEmit_ARMISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0) { 93 switch (VT.SimpleTy) { 94 case MVT::i32: return fastEmit_ARMISD_CALL_MVT_i32_r(RetVT, Op0); 95 default: return 0; 96 } 97} 98 99// FastEmit functions for ARMISD::CALL_NOLINK. 100 101unsigned fastEmit_ARMISD_CALL_NOLINK_MVT_i32_r(MVT RetVT, unsigned Op0) { 102 if (RetVT.SimpleTy != MVT::isVoid) 103 return 0; 104 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 105 return fastEmitInst_r(ARM::tBX_CALL, &ARM::tGPRRegClass, Op0); 106 } 107 if ((!Subtarget->isThumb()) && (!Subtarget->hasV4TOps())) { 108 return fastEmitInst_r(ARM::BMOVPCRX_CALL, &ARM::tGPRRegClass, Op0); 109 } 110 if ((Subtarget->hasV4TOps()) && (!Subtarget->isThumb())) { 111 return fastEmitInst_r(ARM::BX_CALL, &ARM::tGPRRegClass, Op0); 112 } 113 return 0; 114} 115 116unsigned fastEmit_ARMISD_CALL_NOLINK_r(MVT VT, MVT RetVT, unsigned Op0) { 117 switch (VT.SimpleTy) { 118 case MVT::i32: return fastEmit_ARMISD_CALL_NOLINK_MVT_i32_r(RetVT, Op0); 119 default: return 0; 120 } 121} 122 123// FastEmit functions for ARMISD::CALL_PRED. 124 125unsigned fastEmit_ARMISD_CALL_PRED_MVT_i32_r(MVT RetVT, unsigned Op0) { 126 if (RetVT.SimpleTy != MVT::isVoid) 127 return 0; 128 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb()) && ( MF->getSubtarget<ARMSubtarget>().hardenSlsBlr() )) { 129 return fastEmitInst_r(ARM::BLX_pred_noip, &ARM::GPRnoipRegClass, Op0); 130 } 131 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb()) && ( !MF->getSubtarget<ARMSubtarget>().hardenSlsBlr() )) { 132 return fastEmitInst_r(ARM::BLX_pred, &ARM::GPRRegClass, Op0); 133 } 134 return 0; 135} 136 137unsigned fastEmit_ARMISD_CALL_PRED_r(MVT VT, MVT RetVT, unsigned Op0) { 138 switch (VT.SimpleTy) { 139 case MVT::i32: return fastEmit_ARMISD_CALL_PRED_MVT_i32_r(RetVT, Op0); 140 default: return 0; 141 } 142} 143 144// FastEmit functions for ARMISD::CMPFPEw0. 145 146unsigned fastEmit_ARMISD_CMPFPEw0_MVT_f16_r(MVT RetVT, unsigned Op0) { 147 if (RetVT.SimpleTy != MVT::isVoid) 148 return 0; 149 if ((Subtarget->hasFullFP16())) { 150 return fastEmitInst_r(ARM::VCMPEZH, &ARM::HPRRegClass, Op0); 151 } 152 return 0; 153} 154 155unsigned fastEmit_ARMISD_CMPFPEw0_MVT_f32_r(MVT RetVT, unsigned Op0) { 156 if (RetVT.SimpleTy != MVT::isVoid) 157 return 0; 158 if ((Subtarget->hasVFP2Base())) { 159 return fastEmitInst_r(ARM::VCMPEZS, &ARM::SPRRegClass, Op0); 160 } 161 return 0; 162} 163 164unsigned fastEmit_ARMISD_CMPFPEw0_MVT_f64_r(MVT RetVT, unsigned Op0) { 165 if (RetVT.SimpleTy != MVT::isVoid) 166 return 0; 167 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 168 return fastEmitInst_r(ARM::VCMPEZD, &ARM::DPRRegClass, Op0); 169 } 170 return 0; 171} 172 173unsigned fastEmit_ARMISD_CMPFPEw0_r(MVT VT, MVT RetVT, unsigned Op0) { 174 switch (VT.SimpleTy) { 175 case MVT::f16: return fastEmit_ARMISD_CMPFPEw0_MVT_f16_r(RetVT, Op0); 176 case MVT::f32: return fastEmit_ARMISD_CMPFPEw0_MVT_f32_r(RetVT, Op0); 177 case MVT::f64: return fastEmit_ARMISD_CMPFPEw0_MVT_f64_r(RetVT, Op0); 178 default: return 0; 179 } 180} 181 182// FastEmit functions for ARMISD::CMPFPw0. 183 184unsigned fastEmit_ARMISD_CMPFPw0_MVT_f16_r(MVT RetVT, unsigned Op0) { 185 if (RetVT.SimpleTy != MVT::isVoid) 186 return 0; 187 if ((Subtarget->hasFullFP16())) { 188 return fastEmitInst_r(ARM::VCMPZH, &ARM::HPRRegClass, Op0); 189 } 190 return 0; 191} 192 193unsigned fastEmit_ARMISD_CMPFPw0_MVT_f32_r(MVT RetVT, unsigned Op0) { 194 if (RetVT.SimpleTy != MVT::isVoid) 195 return 0; 196 if ((Subtarget->hasVFP2Base())) { 197 return fastEmitInst_r(ARM::VCMPZS, &ARM::SPRRegClass, Op0); 198 } 199 return 0; 200} 201 202unsigned fastEmit_ARMISD_CMPFPw0_MVT_f64_r(MVT RetVT, unsigned Op0) { 203 if (RetVT.SimpleTy != MVT::isVoid) 204 return 0; 205 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 206 return fastEmitInst_r(ARM::VCMPZD, &ARM::DPRRegClass, Op0); 207 } 208 return 0; 209} 210 211unsigned fastEmit_ARMISD_CMPFPw0_r(MVT VT, MVT RetVT, unsigned Op0) { 212 switch (VT.SimpleTy) { 213 case MVT::f16: return fastEmit_ARMISD_CMPFPw0_MVT_f16_r(RetVT, Op0); 214 case MVT::f32: return fastEmit_ARMISD_CMPFPw0_MVT_f32_r(RetVT, Op0); 215 case MVT::f64: return fastEmit_ARMISD_CMPFPw0_MVT_f64_r(RetVT, Op0); 216 default: return 0; 217 } 218} 219 220// FastEmit functions for ARMISD::RRX. 221 222unsigned fastEmit_ARMISD_RRX_MVT_i32_r(MVT RetVT, unsigned Op0) { 223 if (RetVT.SimpleTy != MVT::i32) 224 return 0; 225 if ((Subtarget->isThumb2())) { 226 return fastEmitInst_r(ARM::t2RRX, &ARM::rGPRRegClass, Op0); 227 } 228 if ((!Subtarget->isThumb())) { 229 return fastEmitInst_r(ARM::RRX, &ARM::GPRRegClass, Op0); 230 } 231 return 0; 232} 233 234unsigned fastEmit_ARMISD_RRX_r(MVT VT, MVT RetVT, unsigned Op0) { 235 switch (VT.SimpleTy) { 236 case MVT::i32: return fastEmit_ARMISD_RRX_MVT_i32_r(RetVT, Op0); 237 default: return 0; 238 } 239} 240 241// FastEmit functions for ARMISD::SRA_FLAG. 242 243unsigned fastEmit_ARMISD_SRA_FLAG_MVT_i32_r(MVT RetVT, unsigned Op0) { 244 if (RetVT.SimpleTy != MVT::i32) 245 return 0; 246 if ((Subtarget->isThumb2())) { 247 return fastEmitInst_r(ARM::t2MOVsra_flag, &ARM::rGPRRegClass, Op0); 248 } 249 if ((!Subtarget->isThumb())) { 250 return fastEmitInst_r(ARM::MOVsra_flag, &ARM::GPRRegClass, Op0); 251 } 252 return 0; 253} 254 255unsigned fastEmit_ARMISD_SRA_FLAG_r(MVT VT, MVT RetVT, unsigned Op0) { 256 switch (VT.SimpleTy) { 257 case MVT::i32: return fastEmit_ARMISD_SRA_FLAG_MVT_i32_r(RetVT, Op0); 258 default: return 0; 259 } 260} 261 262// FastEmit functions for ARMISD::SRL_FLAG. 263 264unsigned fastEmit_ARMISD_SRL_FLAG_MVT_i32_r(MVT RetVT, unsigned Op0) { 265 if (RetVT.SimpleTy != MVT::i32) 266 return 0; 267 if ((Subtarget->isThumb2())) { 268 return fastEmitInst_r(ARM::t2MOVsrl_flag, &ARM::rGPRRegClass, Op0); 269 } 270 if ((!Subtarget->isThumb())) { 271 return fastEmitInst_r(ARM::MOVsrl_flag, &ARM::GPRRegClass, Op0); 272 } 273 return 0; 274} 275 276unsigned fastEmit_ARMISD_SRL_FLAG_r(MVT VT, MVT RetVT, unsigned Op0) { 277 switch (VT.SimpleTy) { 278 case MVT::i32: return fastEmit_ARMISD_SRL_FLAG_MVT_i32_r(RetVT, Op0); 279 default: return 0; 280 } 281} 282 283// FastEmit functions for ARMISD::VADDVs. 284 285unsigned fastEmit_ARMISD_VADDVs_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 286 if (RetVT.SimpleTy != MVT::i32) 287 return 0; 288 if ((Subtarget->hasMVEIntegerOps())) { 289 return fastEmitInst_r(ARM::MVE_VADDVs8no_acc, &ARM::tGPREvenRegClass, Op0); 290 } 291 return 0; 292} 293 294unsigned fastEmit_ARMISD_VADDVs_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 295 if (RetVT.SimpleTy != MVT::i32) 296 return 0; 297 if ((Subtarget->hasMVEIntegerOps())) { 298 return fastEmitInst_r(ARM::MVE_VADDVs16no_acc, &ARM::tGPREvenRegClass, Op0); 299 } 300 return 0; 301} 302 303unsigned fastEmit_ARMISD_VADDVs_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 304 if (RetVT.SimpleTy != MVT::i32) 305 return 0; 306 if ((Subtarget->hasMVEIntegerOps())) { 307 return fastEmitInst_r(ARM::MVE_VADDVs32no_acc, &ARM::tGPREvenRegClass, Op0); 308 } 309 return 0; 310} 311 312unsigned fastEmit_ARMISD_VADDVs_r(MVT VT, MVT RetVT, unsigned Op0) { 313 switch (VT.SimpleTy) { 314 case MVT::v16i8: return fastEmit_ARMISD_VADDVs_MVT_v16i8_r(RetVT, Op0); 315 case MVT::v8i16: return fastEmit_ARMISD_VADDVs_MVT_v8i16_r(RetVT, Op0); 316 case MVT::v4i32: return fastEmit_ARMISD_VADDVs_MVT_v4i32_r(RetVT, Op0); 317 default: return 0; 318 } 319} 320 321// FastEmit functions for ARMISD::VADDVu. 322 323unsigned fastEmit_ARMISD_VADDVu_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 324 if (RetVT.SimpleTy != MVT::i32) 325 return 0; 326 if ((Subtarget->hasMVEIntegerOps())) { 327 return fastEmitInst_r(ARM::MVE_VADDVu8no_acc, &ARM::tGPREvenRegClass, Op0); 328 } 329 return 0; 330} 331 332unsigned fastEmit_ARMISD_VADDVu_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 333 if (RetVT.SimpleTy != MVT::i32) 334 return 0; 335 if ((Subtarget->hasMVEIntegerOps())) { 336 return fastEmitInst_r(ARM::MVE_VADDVu16no_acc, &ARM::tGPREvenRegClass, Op0); 337 } 338 return 0; 339} 340 341unsigned fastEmit_ARMISD_VADDVu_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 342 if (RetVT.SimpleTy != MVT::i32) 343 return 0; 344 if ((Subtarget->hasMVEIntegerOps())) { 345 return fastEmitInst_r(ARM::MVE_VADDVu32no_acc, &ARM::tGPREvenRegClass, Op0); 346 } 347 return 0; 348} 349 350unsigned fastEmit_ARMISD_VADDVu_r(MVT VT, MVT RetVT, unsigned Op0) { 351 switch (VT.SimpleTy) { 352 case MVT::v16i8: return fastEmit_ARMISD_VADDVu_MVT_v16i8_r(RetVT, Op0); 353 case MVT::v8i16: return fastEmit_ARMISD_VADDVu_MVT_v8i16_r(RetVT, Op0); 354 case MVT::v4i32: return fastEmit_ARMISD_VADDVu_MVT_v4i32_r(RetVT, Op0); 355 default: return 0; 356 } 357} 358 359// FastEmit functions for ARMISD::VDUP. 360 361unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8i8_r(unsigned Op0) { 362 if ((Subtarget->hasNEON())) { 363 return fastEmitInst_r(ARM::VDUP8d, &ARM::DPRRegClass, Op0); 364 } 365 return 0; 366} 367 368unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v16i8_r(unsigned Op0) { 369 if ((Subtarget->hasMVEIntegerOps())) { 370 return fastEmitInst_r(ARM::MVE_VDUP8, &ARM::MQPRRegClass, Op0); 371 } 372 if ((Subtarget->hasNEON())) { 373 return fastEmitInst_r(ARM::VDUP8q, &ARM::QPRRegClass, Op0); 374 } 375 return 0; 376} 377 378unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4i16_r(unsigned Op0) { 379 if ((Subtarget->hasNEON())) { 380 return fastEmitInst_r(ARM::VDUP16d, &ARM::DPRRegClass, Op0); 381 } 382 return 0; 383} 384 385unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8i16_r(unsigned Op0) { 386 if ((Subtarget->hasMVEIntegerOps())) { 387 return fastEmitInst_r(ARM::MVE_VDUP16, &ARM::MQPRRegClass, Op0); 388 } 389 if ((Subtarget->hasNEON())) { 390 return fastEmitInst_r(ARM::VDUP16q, &ARM::QPRRegClass, Op0); 391 } 392 return 0; 393} 394 395unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v2i32_r(unsigned Op0) { 396 if ((!Subtarget->hasSlowVDUP32()) && (Subtarget->hasNEON())) { 397 return fastEmitInst_r(ARM::VDUP32d, &ARM::DPRRegClass, Op0); 398 } 399 return 0; 400} 401 402unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4i32_r(unsigned Op0) { 403 if ((Subtarget->hasMVEIntegerOps())) { 404 return fastEmitInst_r(ARM::MVE_VDUP32, &ARM::MQPRRegClass, Op0); 405 } 406 if ((Subtarget->hasNEON())) { 407 return fastEmitInst_r(ARM::VDUP32q, &ARM::QPRRegClass, Op0); 408 } 409 return 0; 410} 411 412unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8f16_r(unsigned Op0) { 413 if ((Subtarget->hasMVEIntegerOps())) { 414 return fastEmitInst_r(ARM::MVE_VDUP16, &ARM::MQPRRegClass, Op0); 415 } 416 return 0; 417} 418 419unsigned fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4f32_r(unsigned Op0) { 420 if ((Subtarget->hasMVEIntegerOps())) { 421 return fastEmitInst_r(ARM::MVE_VDUP32, &ARM::MQPRRegClass, Op0); 422 } 423 return 0; 424} 425 426unsigned fastEmit_ARMISD_VDUP_MVT_i32_r(MVT RetVT, unsigned Op0) { 427switch (RetVT.SimpleTy) { 428 case MVT::v8i8: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8i8_r(Op0); 429 case MVT::v16i8: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v16i8_r(Op0); 430 case MVT::v4i16: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4i16_r(Op0); 431 case MVT::v8i16: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8i16_r(Op0); 432 case MVT::v2i32: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v2i32_r(Op0); 433 case MVT::v4i32: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4i32_r(Op0); 434 case MVT::v8f16: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v8f16_r(Op0); 435 case MVT::v4f32: return fastEmit_ARMISD_VDUP_MVT_i32_MVT_v4f32_r(Op0); 436 default: return 0; 437} 438} 439 440unsigned fastEmit_ARMISD_VDUP_r(MVT VT, MVT RetVT, unsigned Op0) { 441 switch (VT.SimpleTy) { 442 case MVT::i32: return fastEmit_ARMISD_VDUP_MVT_i32_r(RetVT, Op0); 443 default: return 0; 444 } 445} 446 447// FastEmit functions for ARMISD::VMOVSR. 448 449unsigned fastEmit_ARMISD_VMOVSR_MVT_i32_r(MVT RetVT, unsigned Op0) { 450 if (RetVT.SimpleTy != MVT::f32) 451 return 0; 452 if ((Subtarget->hasVFP2Base()) && (Subtarget->preferVMOVSR() ||!Subtarget->useNEONForSinglePrecisionFP())) { 453 return fastEmitInst_r(ARM::VMOVSR, &ARM::SPRRegClass, Op0); 454 } 455 return 0; 456} 457 458unsigned fastEmit_ARMISD_VMOVSR_r(MVT VT, MVT RetVT, unsigned Op0) { 459 switch (VT.SimpleTy) { 460 case MVT::i32: return fastEmit_ARMISD_VMOVSR_MVT_i32_r(RetVT, Op0); 461 default: return 0; 462 } 463} 464 465// FastEmit functions for ARMISD::VMOVhr. 466 467unsigned fastEmit_ARMISD_VMOVhr_MVT_i32_MVT_bf16_r(unsigned Op0) { 468 if ((Subtarget->hasFPRegs16())) { 469 return fastEmitInst_r(ARM::VMOVHR, &ARM::HPRRegClass, Op0); 470 } 471 return 0; 472} 473 474unsigned fastEmit_ARMISD_VMOVhr_MVT_i32_MVT_f16_r(unsigned Op0) { 475 if ((Subtarget->hasFPRegs16())) { 476 return fastEmitInst_r(ARM::VMOVHR, &ARM::HPRRegClass, Op0); 477 } 478 return 0; 479} 480 481unsigned fastEmit_ARMISD_VMOVhr_MVT_i32_r(MVT RetVT, unsigned Op0) { 482switch (RetVT.SimpleTy) { 483 case MVT::bf16: return fastEmit_ARMISD_VMOVhr_MVT_i32_MVT_bf16_r(Op0); 484 case MVT::f16: return fastEmit_ARMISD_VMOVhr_MVT_i32_MVT_f16_r(Op0); 485 default: return 0; 486} 487} 488 489unsigned fastEmit_ARMISD_VMOVhr_r(MVT VT, MVT RetVT, unsigned Op0) { 490 switch (VT.SimpleTy) { 491 case MVT::i32: return fastEmit_ARMISD_VMOVhr_MVT_i32_r(RetVT, Op0); 492 default: return 0; 493 } 494} 495 496// FastEmit functions for ARMISD::VMOVrh. 497 498unsigned fastEmit_ARMISD_VMOVrh_MVT_bf16_r(MVT RetVT, unsigned Op0) { 499 if (RetVT.SimpleTy != MVT::i32) 500 return 0; 501 if ((Subtarget->hasFPRegs16())) { 502 return fastEmitInst_r(ARM::VMOVRH, &ARM::rGPRRegClass, Op0); 503 } 504 return 0; 505} 506 507unsigned fastEmit_ARMISD_VMOVrh_MVT_f16_r(MVT RetVT, unsigned Op0) { 508 if (RetVT.SimpleTy != MVT::i32) 509 return 0; 510 if ((Subtarget->hasFPRegs16())) { 511 return fastEmitInst_r(ARM::VMOVRH, &ARM::rGPRRegClass, Op0); 512 } 513 return 0; 514} 515 516unsigned fastEmit_ARMISD_VMOVrh_r(MVT VT, MVT RetVT, unsigned Op0) { 517 switch (VT.SimpleTy) { 518 case MVT::bf16: return fastEmit_ARMISD_VMOVrh_MVT_bf16_r(RetVT, Op0); 519 case MVT::f16: return fastEmit_ARMISD_VMOVrh_MVT_f16_r(RetVT, Op0); 520 default: return 0; 521 } 522} 523 524// FastEmit functions for ARMISD::VREV16. 525 526unsigned fastEmit_ARMISD_VREV16_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 527 if (RetVT.SimpleTy != MVT::v8i8) 528 return 0; 529 if ((Subtarget->hasNEON())) { 530 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 531 } 532 return 0; 533} 534 535unsigned fastEmit_ARMISD_VREV16_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 536 if (RetVT.SimpleTy != MVT::v16i8) 537 return 0; 538 if ((Subtarget->hasMVEIntegerOps())) { 539 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 540 } 541 if ((Subtarget->hasNEON())) { 542 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 543 } 544 return 0; 545} 546 547unsigned fastEmit_ARMISD_VREV16_r(MVT VT, MVT RetVT, unsigned Op0) { 548 switch (VT.SimpleTy) { 549 case MVT::v8i8: return fastEmit_ARMISD_VREV16_MVT_v8i8_r(RetVT, Op0); 550 case MVT::v16i8: return fastEmit_ARMISD_VREV16_MVT_v16i8_r(RetVT, Op0); 551 default: return 0; 552 } 553} 554 555// FastEmit functions for ARMISD::VREV32. 556 557unsigned fastEmit_ARMISD_VREV32_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 558 if (RetVT.SimpleTy != MVT::v8i8) 559 return 0; 560 if ((Subtarget->hasNEON())) { 561 return fastEmitInst_r(ARM::VREV32d8, &ARM::DPRRegClass, Op0); 562 } 563 return 0; 564} 565 566unsigned fastEmit_ARMISD_VREV32_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 567 if (RetVT.SimpleTy != MVT::v16i8) 568 return 0; 569 if ((Subtarget->hasMVEIntegerOps())) { 570 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 571 } 572 if ((Subtarget->hasNEON())) { 573 return fastEmitInst_r(ARM::VREV32q8, &ARM::QPRRegClass, Op0); 574 } 575 return 0; 576} 577 578unsigned fastEmit_ARMISD_VREV32_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 579 if (RetVT.SimpleTy != MVT::v4i16) 580 return 0; 581 if ((Subtarget->hasNEON())) { 582 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 583 } 584 return 0; 585} 586 587unsigned fastEmit_ARMISD_VREV32_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 588 if (RetVT.SimpleTy != MVT::v8i16) 589 return 0; 590 if ((Subtarget->hasMVEIntegerOps())) { 591 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 592 } 593 if ((Subtarget->hasNEON())) { 594 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 595 } 596 return 0; 597} 598 599unsigned fastEmit_ARMISD_VREV32_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 600 if (RetVT.SimpleTy != MVT::v4f16) 601 return 0; 602 if ((Subtarget->hasNEON())) { 603 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 604 } 605 return 0; 606} 607 608unsigned fastEmit_ARMISD_VREV32_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 609 if (RetVT.SimpleTy != MVT::v8f16) 610 return 0; 611 if ((Subtarget->hasMVEIntegerOps())) { 612 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 613 } 614 if ((Subtarget->hasNEON())) { 615 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 616 } 617 return 0; 618} 619 620unsigned fastEmit_ARMISD_VREV32_MVT_v4bf16_r(MVT RetVT, unsigned Op0) { 621 if (RetVT.SimpleTy != MVT::v4bf16) 622 return 0; 623 if ((Subtarget->hasNEON())) { 624 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 625 } 626 return 0; 627} 628 629unsigned fastEmit_ARMISD_VREV32_MVT_v8bf16_r(MVT RetVT, unsigned Op0) { 630 if (RetVT.SimpleTy != MVT::v8bf16) 631 return 0; 632 if ((Subtarget->hasNEON())) { 633 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 634 } 635 return 0; 636} 637 638unsigned fastEmit_ARMISD_VREV32_r(MVT VT, MVT RetVT, unsigned Op0) { 639 switch (VT.SimpleTy) { 640 case MVT::v8i8: return fastEmit_ARMISD_VREV32_MVT_v8i8_r(RetVT, Op0); 641 case MVT::v16i8: return fastEmit_ARMISD_VREV32_MVT_v16i8_r(RetVT, Op0); 642 case MVT::v4i16: return fastEmit_ARMISD_VREV32_MVT_v4i16_r(RetVT, Op0); 643 case MVT::v8i16: return fastEmit_ARMISD_VREV32_MVT_v8i16_r(RetVT, Op0); 644 case MVT::v4f16: return fastEmit_ARMISD_VREV32_MVT_v4f16_r(RetVT, Op0); 645 case MVT::v8f16: return fastEmit_ARMISD_VREV32_MVT_v8f16_r(RetVT, Op0); 646 case MVT::v4bf16: return fastEmit_ARMISD_VREV32_MVT_v4bf16_r(RetVT, Op0); 647 case MVT::v8bf16: return fastEmit_ARMISD_VREV32_MVT_v8bf16_r(RetVT, Op0); 648 default: return 0; 649 } 650} 651 652// FastEmit functions for ARMISD::VREV64. 653 654unsigned fastEmit_ARMISD_VREV64_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 655 if (RetVT.SimpleTy != MVT::v8i8) 656 return 0; 657 if ((Subtarget->hasNEON())) { 658 return fastEmitInst_r(ARM::VREV64d8, &ARM::DPRRegClass, Op0); 659 } 660 return 0; 661} 662 663unsigned fastEmit_ARMISD_VREV64_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 664 if (RetVT.SimpleTy != MVT::v16i8) 665 return 0; 666 if ((Subtarget->hasMVEIntegerOps())) { 667 return fastEmitInst_r(ARM::MVE_VREV64_8, &ARM::MQPRRegClass, Op0); 668 } 669 if ((Subtarget->hasNEON())) { 670 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0); 671 } 672 return 0; 673} 674 675unsigned fastEmit_ARMISD_VREV64_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 676 if (RetVT.SimpleTy != MVT::v4i16) 677 return 0; 678 if ((Subtarget->hasNEON())) { 679 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 680 } 681 return 0; 682} 683 684unsigned fastEmit_ARMISD_VREV64_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 685 if (RetVT.SimpleTy != MVT::v8i16) 686 return 0; 687 if ((Subtarget->hasMVEIntegerOps())) { 688 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 689 } 690 if ((Subtarget->hasNEON())) { 691 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 692 } 693 return 0; 694} 695 696unsigned fastEmit_ARMISD_VREV64_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 697 if (RetVT.SimpleTy != MVT::v2i32) 698 return 0; 699 if ((Subtarget->hasNEON())) { 700 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 701 } 702 return 0; 703} 704 705unsigned fastEmit_ARMISD_VREV64_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 706 if (RetVT.SimpleTy != MVT::v4i32) 707 return 0; 708 if ((Subtarget->hasMVEIntegerOps())) { 709 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 710 } 711 if ((Subtarget->hasNEON())) { 712 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 713 } 714 return 0; 715} 716 717unsigned fastEmit_ARMISD_VREV64_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 718 if (RetVT.SimpleTy != MVT::v4f16) 719 return 0; 720 if ((Subtarget->hasNEON())) { 721 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 722 } 723 return 0; 724} 725 726unsigned fastEmit_ARMISD_VREV64_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 727 if (RetVT.SimpleTy != MVT::v8f16) 728 return 0; 729 if ((Subtarget->hasMVEIntegerOps())) { 730 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 731 } 732 if ((Subtarget->hasNEON())) { 733 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 734 } 735 return 0; 736} 737 738unsigned fastEmit_ARMISD_VREV64_MVT_v4bf16_r(MVT RetVT, unsigned Op0) { 739 if (RetVT.SimpleTy != MVT::v4bf16) 740 return 0; 741 if ((Subtarget->hasNEON())) { 742 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 743 } 744 return 0; 745} 746 747unsigned fastEmit_ARMISD_VREV64_MVT_v8bf16_r(MVT RetVT, unsigned Op0) { 748 if (RetVT.SimpleTy != MVT::v8bf16) 749 return 0; 750 if ((Subtarget->hasNEON())) { 751 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 752 } 753 return 0; 754} 755 756unsigned fastEmit_ARMISD_VREV64_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 757 if (RetVT.SimpleTy != MVT::v2f32) 758 return 0; 759 if ((Subtarget->hasNEON())) { 760 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 761 } 762 return 0; 763} 764 765unsigned fastEmit_ARMISD_VREV64_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 766 if (RetVT.SimpleTy != MVT::v4f32) 767 return 0; 768 if ((Subtarget->hasMVEIntegerOps())) { 769 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 770 } 771 if ((Subtarget->hasNEON())) { 772 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 773 } 774 return 0; 775} 776 777unsigned fastEmit_ARMISD_VREV64_r(MVT VT, MVT RetVT, unsigned Op0) { 778 switch (VT.SimpleTy) { 779 case MVT::v8i8: return fastEmit_ARMISD_VREV64_MVT_v8i8_r(RetVT, Op0); 780 case MVT::v16i8: return fastEmit_ARMISD_VREV64_MVT_v16i8_r(RetVT, Op0); 781 case MVT::v4i16: return fastEmit_ARMISD_VREV64_MVT_v4i16_r(RetVT, Op0); 782 case MVT::v8i16: return fastEmit_ARMISD_VREV64_MVT_v8i16_r(RetVT, Op0); 783 case MVT::v2i32: return fastEmit_ARMISD_VREV64_MVT_v2i32_r(RetVT, Op0); 784 case MVT::v4i32: return fastEmit_ARMISD_VREV64_MVT_v4i32_r(RetVT, Op0); 785 case MVT::v4f16: return fastEmit_ARMISD_VREV64_MVT_v4f16_r(RetVT, Op0); 786 case MVT::v8f16: return fastEmit_ARMISD_VREV64_MVT_v8f16_r(RetVT, Op0); 787 case MVT::v4bf16: return fastEmit_ARMISD_VREV64_MVT_v4bf16_r(RetVT, Op0); 788 case MVT::v8bf16: return fastEmit_ARMISD_VREV64_MVT_v8bf16_r(RetVT, Op0); 789 case MVT::v2f32: return fastEmit_ARMISD_VREV64_MVT_v2f32_r(RetVT, Op0); 790 case MVT::v4f32: return fastEmit_ARMISD_VREV64_MVT_v4f32_r(RetVT, Op0); 791 default: return 0; 792 } 793} 794 795// FastEmit functions for ARMISD::WIN__DBZCHK. 796 797unsigned fastEmit_ARMISD_WIN__DBZCHK_MVT_i32_r(MVT RetVT, unsigned Op0) { 798 if (RetVT.SimpleTy != MVT::isVoid) 799 return 0; 800 return fastEmitInst_r(ARM::WIN__DBZCHK, &ARM::tGPRRegClass, Op0); 801} 802 803unsigned fastEmit_ARMISD_WIN__DBZCHK_r(MVT VT, MVT RetVT, unsigned Op0) { 804 switch (VT.SimpleTy) { 805 case MVT::i32: return fastEmit_ARMISD_WIN__DBZCHK_MVT_i32_r(RetVT, Op0); 806 default: return 0; 807 } 808} 809 810// FastEmit functions for ARMISD::tSECALL. 811 812unsigned fastEmit_ARMISD_tSECALL_MVT_i32_r(MVT RetVT, unsigned Op0) { 813 if (RetVT.SimpleTy != MVT::isVoid) 814 return 0; 815 if ((Subtarget->has8MSecExt()) && (Subtarget->isThumb())) { 816 return fastEmitInst_r(ARM::tBLXNS_CALL, &ARM::GPRnopcRegClass, Op0); 817 } 818 return 0; 819} 820 821unsigned fastEmit_ARMISD_tSECALL_r(MVT VT, MVT RetVT, unsigned Op0) { 822 switch (VT.SimpleTy) { 823 case MVT::i32: return fastEmit_ARMISD_tSECALL_MVT_i32_r(RetVT, Op0); 824 default: return 0; 825 } 826} 827 828// FastEmit functions for ISD::ABS. 829 830unsigned fastEmit_ISD_ABS_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 831 if (RetVT.SimpleTy != MVT::v8i8) 832 return 0; 833 if ((Subtarget->hasNEON())) { 834 return fastEmitInst_r(ARM::VABSv8i8, &ARM::DPRRegClass, Op0); 835 } 836 return 0; 837} 838 839unsigned fastEmit_ISD_ABS_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 840 if (RetVT.SimpleTy != MVT::v16i8) 841 return 0; 842 if ((Subtarget->hasMVEIntegerOps())) { 843 return fastEmitInst_r(ARM::MVE_VABSs8, &ARM::MQPRRegClass, Op0); 844 } 845 if ((Subtarget->hasNEON())) { 846 return fastEmitInst_r(ARM::VABSv16i8, &ARM::QPRRegClass, Op0); 847 } 848 return 0; 849} 850 851unsigned fastEmit_ISD_ABS_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 852 if (RetVT.SimpleTy != MVT::v4i16) 853 return 0; 854 if ((Subtarget->hasNEON())) { 855 return fastEmitInst_r(ARM::VABSv4i16, &ARM::DPRRegClass, Op0); 856 } 857 return 0; 858} 859 860unsigned fastEmit_ISD_ABS_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 861 if (RetVT.SimpleTy != MVT::v8i16) 862 return 0; 863 if ((Subtarget->hasMVEIntegerOps())) { 864 return fastEmitInst_r(ARM::MVE_VABSs16, &ARM::MQPRRegClass, Op0); 865 } 866 if ((Subtarget->hasNEON())) { 867 return fastEmitInst_r(ARM::VABSv8i16, &ARM::QPRRegClass, Op0); 868 } 869 return 0; 870} 871 872unsigned fastEmit_ISD_ABS_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 873 if (RetVT.SimpleTy != MVT::v2i32) 874 return 0; 875 if ((Subtarget->hasNEON())) { 876 return fastEmitInst_r(ARM::VABSv2i32, &ARM::DPRRegClass, Op0); 877 } 878 return 0; 879} 880 881unsigned fastEmit_ISD_ABS_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 882 if (RetVT.SimpleTy != MVT::v4i32) 883 return 0; 884 if ((Subtarget->hasMVEIntegerOps())) { 885 return fastEmitInst_r(ARM::MVE_VABSs32, &ARM::MQPRRegClass, Op0); 886 } 887 if ((Subtarget->hasNEON())) { 888 return fastEmitInst_r(ARM::VABSv4i32, &ARM::QPRRegClass, Op0); 889 } 890 return 0; 891} 892 893unsigned fastEmit_ISD_ABS_r(MVT VT, MVT RetVT, unsigned Op0) { 894 switch (VT.SimpleTy) { 895 case MVT::v8i8: return fastEmit_ISD_ABS_MVT_v8i8_r(RetVT, Op0); 896 case MVT::v16i8: return fastEmit_ISD_ABS_MVT_v16i8_r(RetVT, Op0); 897 case MVT::v4i16: return fastEmit_ISD_ABS_MVT_v4i16_r(RetVT, Op0); 898 case MVT::v8i16: return fastEmit_ISD_ABS_MVT_v8i16_r(RetVT, Op0); 899 case MVT::v2i32: return fastEmit_ISD_ABS_MVT_v2i32_r(RetVT, Op0); 900 case MVT::v4i32: return fastEmit_ISD_ABS_MVT_v4i32_r(RetVT, Op0); 901 default: return 0; 902 } 903} 904 905// FastEmit functions for ISD::ANY_EXTEND. 906 907unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 908 if (RetVT.SimpleTy != MVT::v8i16) 909 return 0; 910 if ((Subtarget->hasNEON())) { 911 return fastEmitInst_r(ARM::VMOVLuv8i16, &ARM::QPRRegClass, Op0); 912 } 913 return 0; 914} 915 916unsigned fastEmit_ISD_ANY_EXTEND_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 917 if (RetVT.SimpleTy != MVT::v4i32) 918 return 0; 919 if ((Subtarget->hasNEON())) { 920 return fastEmitInst_r(ARM::VMOVLuv4i32, &ARM::QPRRegClass, Op0); 921 } 922 return 0; 923} 924 925unsigned fastEmit_ISD_ANY_EXTEND_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 926 if (RetVT.SimpleTy != MVT::v2i64) 927 return 0; 928 if ((Subtarget->hasNEON())) { 929 return fastEmitInst_r(ARM::VMOVLuv2i64, &ARM::QPRRegClass, Op0); 930 } 931 return 0; 932} 933 934unsigned fastEmit_ISD_ANY_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { 935 switch (VT.SimpleTy) { 936 case MVT::v8i8: return fastEmit_ISD_ANY_EXTEND_MVT_v8i8_r(RetVT, Op0); 937 case MVT::v4i16: return fastEmit_ISD_ANY_EXTEND_MVT_v4i16_r(RetVT, Op0); 938 case MVT::v2i32: return fastEmit_ISD_ANY_EXTEND_MVT_v2i32_r(RetVT, Op0); 939 default: return 0; 940 } 941} 942 943// FastEmit functions for ISD::BITCAST. 944 945unsigned fastEmit_ISD_BITCAST_MVT_i32_r(MVT RetVT, unsigned Op0) { 946 if (RetVT.SimpleTy != MVT::f32) 947 return 0; 948 if ((Subtarget->hasFPRegs()) && (Subtarget->preferVMOVSR() ||!Subtarget->useNEONForSinglePrecisionFP())) { 949 return fastEmitInst_r(ARM::VMOVSR, &ARM::SPRRegClass, Op0); 950 } 951 return 0; 952} 953 954unsigned fastEmit_ISD_BITCAST_MVT_f32_r(MVT RetVT, unsigned Op0) { 955 if (RetVT.SimpleTy != MVT::i32) 956 return 0; 957 if ((Subtarget->hasFPRegs())) { 958 return fastEmitInst_r(ARM::VMOVRS, &ARM::GPRRegClass, Op0); 959 } 960 return 0; 961} 962 963unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v8i8_r(unsigned Op0) { 964 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 965 return fastEmitInst_r(ARM::VREV64d8, &ARM::DPRRegClass, Op0); 966 } 967 return 0; 968} 969 970unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v4i16_r(unsigned Op0) { 971 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 972 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 973 } 974 return 0; 975} 976 977unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v2i32_r(unsigned Op0) { 978 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 979 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 980 } 981 return 0; 982} 983 984unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(unsigned Op0) { 985 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 986 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 987 } 988 return 0; 989} 990 991unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v4bf16_r(unsigned Op0) { 992 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 993 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 994 } 995 return 0; 996} 997 998unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v2f32_r(unsigned Op0) { 999 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1000 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1001 } 1002 return 0; 1003} 1004 1005unsigned fastEmit_ISD_BITCAST_MVT_f64_r(MVT RetVT, unsigned Op0) { 1006switch (RetVT.SimpleTy) { 1007 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v8i8_r(Op0); 1008 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4i16_r(Op0); 1009 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v2i32_r(Op0); 1010 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(Op0); 1011 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4bf16_r(Op0); 1012 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v2f32_r(Op0); 1013 default: return 0; 1014} 1015} 1016 1017unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_f64_r(unsigned Op0) { 1018 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1019 return fastEmitInst_r(ARM::VREV64d8, &ARM::DPRRegClass, Op0); 1020 } 1021 return 0; 1022} 1023 1024unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4i16_r(unsigned Op0) { 1025 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1026 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1027 } 1028 return 0; 1029} 1030 1031unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2i32_r(unsigned Op0) { 1032 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1033 return fastEmitInst_r(ARM::VREV32d8, &ARM::DPRRegClass, Op0); 1034 } 1035 return 0; 1036} 1037 1038unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1i64_r(unsigned Op0) { 1039 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1040 return fastEmitInst_r(ARM::VREV64d8, &ARM::DPRRegClass, Op0); 1041 } 1042 return 0; 1043} 1044 1045unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(unsigned Op0) { 1046 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1047 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1048 } 1049 return 0; 1050} 1051 1052unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4bf16_r(unsigned Op0) { 1053 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1054 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1055 } 1056 return 0; 1057} 1058 1059unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2f32_r(unsigned Op0) { 1060 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1061 return fastEmitInst_r(ARM::VREV32d8, &ARM::DPRRegClass, Op0); 1062 } 1063 return 0; 1064} 1065 1066unsigned fastEmit_ISD_BITCAST_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 1067switch (RetVT.SimpleTy) { 1068 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_f64_r(Op0); 1069 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4i16_r(Op0); 1070 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2i32_r(Op0); 1071 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1i64_r(Op0); 1072 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(Op0); 1073 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4bf16_r(Op0); 1074 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2f32_r(Op0); 1075 default: return 0; 1076} 1077} 1078 1079unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8i16_r(unsigned Op0) { 1080 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1081 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 1082 } 1083 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1084 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1085 } 1086 return 0; 1087} 1088 1089unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4i32_r(unsigned Op0) { 1090 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1091 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 1092 } 1093 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1094 return fastEmitInst_r(ARM::VREV32q8, &ARM::QPRRegClass, Op0); 1095 } 1096 return 0; 1097} 1098 1099unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2i64_r(unsigned Op0) { 1100 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1101 return fastEmitInst_r(ARM::MVE_VREV64_8, &ARM::MQPRRegClass, Op0); 1102 } 1103 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1104 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0); 1105 } 1106 return 0; 1107} 1108 1109unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8f16_r(unsigned Op0) { 1110 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1111 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 1112 } 1113 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1114 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1115 } 1116 return 0; 1117} 1118 1119unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8bf16_r(unsigned Op0) { 1120 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1121 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1122 } 1123 return 0; 1124} 1125 1126unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4f32_r(unsigned Op0) { 1127 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1128 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 1129 } 1130 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1131 return fastEmitInst_r(ARM::VREV32q8, &ARM::QPRRegClass, Op0); 1132 } 1133 return 0; 1134} 1135 1136unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2f64_r(unsigned Op0) { 1137 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1138 return fastEmitInst_r(ARM::MVE_VREV64_8, &ARM::MQPRRegClass, Op0); 1139 } 1140 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1141 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0); 1142 } 1143 return 0; 1144} 1145 1146unsigned fastEmit_ISD_BITCAST_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 1147switch (RetVT.SimpleTy) { 1148 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8i16_r(Op0); 1149 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4i32_r(Op0); 1150 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2i64_r(Op0); 1151 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8f16_r(Op0); 1152 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8bf16_r(Op0); 1153 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4f32_r(Op0); 1154 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2f64_r(Op0); 1155 default: return 0; 1156} 1157} 1158 1159unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_f64_r(unsigned Op0) { 1160 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1161 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1162 } 1163 return 0; 1164} 1165 1166unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v8i8_r(unsigned Op0) { 1167 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1168 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1169 } 1170 return 0; 1171} 1172 1173unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2i32_r(unsigned Op0) { 1174 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1175 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1176 } 1177 return 0; 1178} 1179 1180unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1i64_r(unsigned Op0) { 1181 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1182 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1183 } 1184 return 0; 1185} 1186 1187unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2f32_r(unsigned Op0) { 1188 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1189 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1190 } 1191 return 0; 1192} 1193 1194unsigned fastEmit_ISD_BITCAST_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 1195switch (RetVT.SimpleTy) { 1196 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_f64_r(Op0); 1197 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v8i8_r(Op0); 1198 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2i32_r(Op0); 1199 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1i64_r(Op0); 1200 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2f32_r(Op0); 1201 default: return 0; 1202} 1203} 1204 1205unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v16i8_r(unsigned Op0) { 1206 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1207 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 1208 } 1209 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1210 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1211 } 1212 return 0; 1213} 1214 1215unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4i32_r(unsigned Op0) { 1216 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1217 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1218 } 1219 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1220 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1221 } 1222 return 0; 1223} 1224 1225unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2i64_r(unsigned Op0) { 1226 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1227 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1228 } 1229 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1230 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1231 } 1232 return 0; 1233} 1234 1235unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4f32_r(unsigned Op0) { 1236 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1237 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1238 } 1239 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1240 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1241 } 1242 return 0; 1243} 1244 1245unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2f64_r(unsigned Op0) { 1246 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1247 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1248 } 1249 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1250 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1251 } 1252 return 0; 1253} 1254 1255unsigned fastEmit_ISD_BITCAST_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 1256switch (RetVT.SimpleTy) { 1257 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v16i8_r(Op0); 1258 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4i32_r(Op0); 1259 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2i64_r(Op0); 1260 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4f32_r(Op0); 1261 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2f64_r(Op0); 1262 default: return 0; 1263} 1264} 1265 1266unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_f64_r(unsigned Op0) { 1267 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1268 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1269 } 1270 return 0; 1271} 1272 1273unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v8i8_r(unsigned Op0) { 1274 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1275 return fastEmitInst_r(ARM::VREV32d8, &ARM::DPRRegClass, Op0); 1276 } 1277 return 0; 1278} 1279 1280unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4i16_r(unsigned Op0) { 1281 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1282 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1283 } 1284 return 0; 1285} 1286 1287unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1i64_r(unsigned Op0) { 1288 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1289 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1290 } 1291 return 0; 1292} 1293 1294unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(unsigned Op0) { 1295 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1296 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1297 } 1298 return 0; 1299} 1300 1301unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4bf16_r(unsigned Op0) { 1302 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1303 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1304 } 1305 return 0; 1306} 1307 1308unsigned fastEmit_ISD_BITCAST_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 1309switch (RetVT.SimpleTy) { 1310 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_f64_r(Op0); 1311 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v8i8_r(Op0); 1312 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4i16_r(Op0); 1313 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1i64_r(Op0); 1314 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(Op0); 1315 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4bf16_r(Op0); 1316 default: return 0; 1317} 1318} 1319 1320unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v16i8_r(unsigned Op0) { 1321 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1322 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 1323 } 1324 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1325 return fastEmitInst_r(ARM::VREV32q8, &ARM::QPRRegClass, Op0); 1326 } 1327 return 0; 1328} 1329 1330unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8i16_r(unsigned Op0) { 1331 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1332 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1333 } 1334 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1335 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1336 } 1337 return 0; 1338} 1339 1340unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2i64_r(unsigned Op0) { 1341 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1342 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1343 } 1344 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1345 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1346 } 1347 return 0; 1348} 1349 1350unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8f16_r(unsigned Op0) { 1351 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1352 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1353 } 1354 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1355 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1356 } 1357 return 0; 1358} 1359 1360unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8bf16_r(unsigned Op0) { 1361 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1362 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1363 } 1364 return 0; 1365} 1366 1367unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2f64_r(unsigned Op0) { 1368 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1369 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1370 } 1371 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1372 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1373 } 1374 return 0; 1375} 1376 1377unsigned fastEmit_ISD_BITCAST_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 1378switch (RetVT.SimpleTy) { 1379 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v16i8_r(Op0); 1380 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8i16_r(Op0); 1381 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2i64_r(Op0); 1382 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8f16_r(Op0); 1383 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8bf16_r(Op0); 1384 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2f64_r(Op0); 1385 default: return 0; 1386} 1387} 1388 1389unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v8i8_r(unsigned Op0) { 1390 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1391 return fastEmitInst_r(ARM::VREV64d8, &ARM::DPRRegClass, Op0); 1392 } 1393 return 0; 1394} 1395 1396unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4i16_r(unsigned Op0) { 1397 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1398 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1399 } 1400 return 0; 1401} 1402 1403unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2i32_r(unsigned Op0) { 1404 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1405 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1406 } 1407 return 0; 1408} 1409 1410unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(unsigned Op0) { 1411 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1412 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1413 } 1414 return 0; 1415} 1416 1417unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4bf16_r(unsigned Op0) { 1418 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1419 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1420 } 1421 return 0; 1422} 1423 1424unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2f32_r(unsigned Op0) { 1425 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1426 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1427 } 1428 return 0; 1429} 1430 1431unsigned fastEmit_ISD_BITCAST_MVT_v1i64_r(MVT RetVT, unsigned Op0) { 1432switch (RetVT.SimpleTy) { 1433 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v8i8_r(Op0); 1434 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4i16_r(Op0); 1435 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2i32_r(Op0); 1436 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(Op0); 1437 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4bf16_r(Op0); 1438 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2f32_r(Op0); 1439 default: return 0; 1440} 1441} 1442 1443unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v16i8_r(unsigned Op0) { 1444 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1445 return fastEmitInst_r(ARM::MVE_VREV64_8, &ARM::MQPRRegClass, Op0); 1446 } 1447 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1448 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0); 1449 } 1450 return 0; 1451} 1452 1453unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8i16_r(unsigned Op0) { 1454 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1455 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1456 } 1457 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1458 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1459 } 1460 return 0; 1461} 1462 1463unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4i32_r(unsigned Op0) { 1464 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1465 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1466 } 1467 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1468 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1469 } 1470 return 0; 1471} 1472 1473unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8f16_r(unsigned Op0) { 1474 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1475 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1476 } 1477 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1478 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1479 } 1480 return 0; 1481} 1482 1483unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8bf16_r(unsigned Op0) { 1484 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1485 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1486 } 1487 return 0; 1488} 1489 1490unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4f32_r(unsigned Op0) { 1491 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1492 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1493 } 1494 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1495 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1496 } 1497 return 0; 1498} 1499 1500unsigned fastEmit_ISD_BITCAST_MVT_v2i64_r(MVT RetVT, unsigned Op0) { 1501switch (RetVT.SimpleTy) { 1502 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v16i8_r(Op0); 1503 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8i16_r(Op0); 1504 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4i32_r(Op0); 1505 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8f16_r(Op0); 1506 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8bf16_r(Op0); 1507 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4f32_r(Op0); 1508 default: return 0; 1509} 1510} 1511 1512unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_f64_r(unsigned Op0) { 1513 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1514 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1515 } 1516 return 0; 1517} 1518 1519unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v8i8_r(unsigned Op0) { 1520 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1521 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1522 } 1523 return 0; 1524} 1525 1526unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2i32_r(unsigned Op0) { 1527 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1528 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1529 } 1530 return 0; 1531} 1532 1533unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1i64_r(unsigned Op0) { 1534 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1535 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1536 } 1537 return 0; 1538} 1539 1540unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2f32_r(unsigned Op0) { 1541 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1542 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1543 } 1544 return 0; 1545} 1546 1547unsigned fastEmit_ISD_BITCAST_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 1548switch (RetVT.SimpleTy) { 1549 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_f64_r(Op0); 1550 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v8i8_r(Op0); 1551 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2i32_r(Op0); 1552 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1i64_r(Op0); 1553 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2f32_r(Op0); 1554 default: return 0; 1555} 1556} 1557 1558unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v16i8_r(unsigned Op0) { 1559 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1560 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 1561 } 1562 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1563 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1564 } 1565 return 0; 1566} 1567 1568unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4i32_r(unsigned Op0) { 1569 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1570 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1571 } 1572 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1573 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1574 } 1575 return 0; 1576} 1577 1578unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2i64_r(unsigned Op0) { 1579 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1580 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1581 } 1582 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1583 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1584 } 1585 return 0; 1586} 1587 1588unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4f32_r(unsigned Op0) { 1589 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1590 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1591 } 1592 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1593 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1594 } 1595 return 0; 1596} 1597 1598unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2f64_r(unsigned Op0) { 1599 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1600 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1601 } 1602 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1603 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1604 } 1605 return 0; 1606} 1607 1608unsigned fastEmit_ISD_BITCAST_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 1609switch (RetVT.SimpleTy) { 1610 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v16i8_r(Op0); 1611 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4i32_r(Op0); 1612 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2i64_r(Op0); 1613 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4f32_r(Op0); 1614 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2f64_r(Op0); 1615 default: return 0; 1616} 1617} 1618 1619unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_f64_r(unsigned Op0) { 1620 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1621 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1622 } 1623 return 0; 1624} 1625 1626unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v8i8_r(unsigned Op0) { 1627 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1628 return fastEmitInst_r(ARM::VREV16d8, &ARM::DPRRegClass, Op0); 1629 } 1630 return 0; 1631} 1632 1633unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v2i32_r(unsigned Op0) { 1634 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1635 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1636 } 1637 return 0; 1638} 1639 1640unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v1i64_r(unsigned Op0) { 1641 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1642 return fastEmitInst_r(ARM::VREV64d16, &ARM::DPRRegClass, Op0); 1643 } 1644 return 0; 1645} 1646 1647unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v2f32_r(unsigned Op0) { 1648 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1649 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1650 } 1651 return 0; 1652} 1653 1654unsigned fastEmit_ISD_BITCAST_MVT_v4bf16_r(MVT RetVT, unsigned Op0) { 1655switch (RetVT.SimpleTy) { 1656 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_f64_r(Op0); 1657 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v8i8_r(Op0); 1658 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v2i32_r(Op0); 1659 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v1i64_r(Op0); 1660 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v4bf16_MVT_v2f32_r(Op0); 1661 default: return 0; 1662} 1663} 1664 1665unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v16i8_r(unsigned Op0) { 1666 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1667 return fastEmitInst_r(ARM::VREV16q8, &ARM::QPRRegClass, Op0); 1668 } 1669 return 0; 1670} 1671 1672unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v4i32_r(unsigned Op0) { 1673 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1674 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1675 } 1676 return 0; 1677} 1678 1679unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v2i64_r(unsigned Op0) { 1680 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1681 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1682 } 1683 return 0; 1684} 1685 1686unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v4f32_r(unsigned Op0) { 1687 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1688 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1689 } 1690 return 0; 1691} 1692 1693unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v2f64_r(unsigned Op0) { 1694 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1695 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1696 } 1697 return 0; 1698} 1699 1700unsigned fastEmit_ISD_BITCAST_MVT_v8bf16_r(MVT RetVT, unsigned Op0) { 1701switch (RetVT.SimpleTy) { 1702 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v16i8_r(Op0); 1703 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v4i32_r(Op0); 1704 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v2i64_r(Op0); 1705 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v4f32_r(Op0); 1706 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v8bf16_MVT_v2f64_r(Op0); 1707 default: return 0; 1708} 1709} 1710 1711unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_f64_r(unsigned Op0) { 1712 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1713 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1714 } 1715 return 0; 1716} 1717 1718unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v8i8_r(unsigned Op0) { 1719 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1720 return fastEmitInst_r(ARM::VREV32d8, &ARM::DPRRegClass, Op0); 1721 } 1722 return 0; 1723} 1724 1725unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4i16_r(unsigned Op0) { 1726 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1727 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1728 } 1729 return 0; 1730} 1731 1732unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1i64_r(unsigned Op0) { 1733 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1734 return fastEmitInst_r(ARM::VREV64d32, &ARM::DPRRegClass, Op0); 1735 } 1736 return 0; 1737} 1738 1739unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(unsigned Op0) { 1740 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1741 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1742 } 1743 return 0; 1744} 1745 1746unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4bf16_r(unsigned Op0) { 1747 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1748 return fastEmitInst_r(ARM::VREV32d16, &ARM::DPRRegClass, Op0); 1749 } 1750 return 0; 1751} 1752 1753unsigned fastEmit_ISD_BITCAST_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 1754switch (RetVT.SimpleTy) { 1755 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_f64_r(Op0); 1756 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v8i8_r(Op0); 1757 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4i16_r(Op0); 1758 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1i64_r(Op0); 1759 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(Op0); 1760 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4bf16_r(Op0); 1761 default: return 0; 1762} 1763} 1764 1765unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v16i8_r(unsigned Op0) { 1766 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1767 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 1768 } 1769 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1770 return fastEmitInst_r(ARM::VREV32q8, &ARM::QPRRegClass, Op0); 1771 } 1772 return 0; 1773} 1774 1775unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8i16_r(unsigned Op0) { 1776 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1777 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1778 } 1779 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1780 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1781 } 1782 return 0; 1783} 1784 1785unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2i64_r(unsigned Op0) { 1786 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1787 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1788 } 1789 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1790 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1791 } 1792 return 0; 1793} 1794 1795unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8f16_r(unsigned Op0) { 1796 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1797 return fastEmitInst_r(ARM::MVE_VREV32_16, &ARM::MQPRRegClass, Op0); 1798 } 1799 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1800 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1801 } 1802 return 0; 1803} 1804 1805unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8bf16_r(unsigned Op0) { 1806 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1807 return fastEmitInst_r(ARM::VREV32q16, &ARM::QPRRegClass, Op0); 1808 } 1809 return 0; 1810} 1811 1812unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2f64_r(unsigned Op0) { 1813 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1814 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1815 } 1816 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1817 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1818 } 1819 return 0; 1820} 1821 1822unsigned fastEmit_ISD_BITCAST_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 1823switch (RetVT.SimpleTy) { 1824 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v16i8_r(Op0); 1825 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8i16_r(Op0); 1826 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2i64_r(Op0); 1827 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8f16_r(Op0); 1828 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8bf16_r(Op0); 1829 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2f64_r(Op0); 1830 default: return 0; 1831} 1832} 1833 1834unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v16i8_r(unsigned Op0) { 1835 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1836 return fastEmitInst_r(ARM::MVE_VREV64_8, &ARM::MQPRRegClass, Op0); 1837 } 1838 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1839 return fastEmitInst_r(ARM::VREV64q8, &ARM::QPRRegClass, Op0); 1840 } 1841 return 0; 1842} 1843 1844unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8i16_r(unsigned Op0) { 1845 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1846 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1847 } 1848 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1849 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1850 } 1851 return 0; 1852} 1853 1854unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4i32_r(unsigned Op0) { 1855 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1856 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1857 } 1858 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1859 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1860 } 1861 return 0; 1862} 1863 1864unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8f16_r(unsigned Op0) { 1865 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1866 return fastEmitInst_r(ARM::MVE_VREV64_16, &ARM::MQPRRegClass, Op0); 1867 } 1868 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1869 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1870 } 1871 return 0; 1872} 1873 1874unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8bf16_r(unsigned Op0) { 1875 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1876 return fastEmitInst_r(ARM::VREV64q16, &ARM::QPRRegClass, Op0); 1877 } 1878 return 0; 1879} 1880 1881unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4f32_r(unsigned Op0) { 1882 if ((Subtarget->hasMVEIntegerOps()) && (MF->getDataLayout().isBigEndian())) { 1883 return fastEmitInst_r(ARM::MVE_VREV64_32, &ARM::MQPRRegClass, Op0); 1884 } 1885 if ((Subtarget->hasNEON()) && (MF->getDataLayout().isBigEndian())) { 1886 return fastEmitInst_r(ARM::VREV64q32, &ARM::QPRRegClass, Op0); 1887 } 1888 return 0; 1889} 1890 1891unsigned fastEmit_ISD_BITCAST_MVT_v2f64_r(MVT RetVT, unsigned Op0) { 1892switch (RetVT.SimpleTy) { 1893 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v16i8_r(Op0); 1894 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8i16_r(Op0); 1895 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4i32_r(Op0); 1896 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8f16_r(Op0); 1897 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8bf16_r(Op0); 1898 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4f32_r(Op0); 1899 default: return 0; 1900} 1901} 1902 1903unsigned fastEmit_ISD_BITCAST_r(MVT VT, MVT RetVT, unsigned Op0) { 1904 switch (VT.SimpleTy) { 1905 case MVT::i32: return fastEmit_ISD_BITCAST_MVT_i32_r(RetVT, Op0); 1906 case MVT::f32: return fastEmit_ISD_BITCAST_MVT_f32_r(RetVT, Op0); 1907 case MVT::f64: return fastEmit_ISD_BITCAST_MVT_f64_r(RetVT, Op0); 1908 case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v8i8_r(RetVT, Op0); 1909 case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v16i8_r(RetVT, Op0); 1910 case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v4i16_r(RetVT, Op0); 1911 case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v8i16_r(RetVT, Op0); 1912 case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v2i32_r(RetVT, Op0); 1913 case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v4i32_r(RetVT, Op0); 1914 case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v1i64_r(RetVT, Op0); 1915 case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v2i64_r(RetVT, Op0); 1916 case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v4f16_r(RetVT, Op0); 1917 case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v8f16_r(RetVT, Op0); 1918 case MVT::v4bf16: return fastEmit_ISD_BITCAST_MVT_v4bf16_r(RetVT, Op0); 1919 case MVT::v8bf16: return fastEmit_ISD_BITCAST_MVT_v8bf16_r(RetVT, Op0); 1920 case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v2f32_r(RetVT, Op0); 1921 case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v4f32_r(RetVT, Op0); 1922 case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v2f64_r(RetVT, Op0); 1923 default: return 0; 1924 } 1925} 1926 1927// FastEmit functions for ISD::BITREVERSE. 1928 1929unsigned fastEmit_ISD_BITREVERSE_MVT_i32_r(MVT RetVT, unsigned Op0) { 1930 if (RetVT.SimpleTy != MVT::i32) 1931 return 0; 1932 if ((Subtarget->isThumb2())) { 1933 return fastEmitInst_r(ARM::t2RBIT, &ARM::rGPRRegClass, Op0); 1934 } 1935 if ((Subtarget->hasV6T2Ops()) && (!Subtarget->isThumb())) { 1936 return fastEmitInst_r(ARM::RBIT, &ARM::GPRRegClass, Op0); 1937 } 1938 return 0; 1939} 1940 1941unsigned fastEmit_ISD_BITREVERSE_r(MVT VT, MVT RetVT, unsigned Op0) { 1942 switch (VT.SimpleTy) { 1943 case MVT::i32: return fastEmit_ISD_BITREVERSE_MVT_i32_r(RetVT, Op0); 1944 default: return 0; 1945 } 1946} 1947 1948// FastEmit functions for ISD::BRIND. 1949 1950unsigned fastEmit_ISD_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0) { 1951 if (RetVT.SimpleTy != MVT::isVoid) 1952 return 0; 1953 if ((Subtarget->isThumb())) { 1954 return fastEmitInst_r(ARM::tBRIND, &ARM::GPRRegClass, Op0); 1955 } 1956 if ((!Subtarget->isThumb()) && (!Subtarget->hasV4TOps())) { 1957 return fastEmitInst_r(ARM::MOVPCRX, &ARM::GPRRegClass, Op0); 1958 } 1959 if ((Subtarget->hasV4TOps()) && (!Subtarget->isThumb())) { 1960 return fastEmitInst_r(ARM::BX, &ARM::GPRRegClass, Op0); 1961 } 1962 return 0; 1963} 1964 1965unsigned fastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0) { 1966 switch (VT.SimpleTy) { 1967 case MVT::i32: return fastEmit_ISD_BRIND_MVT_i32_r(RetVT, Op0); 1968 default: return 0; 1969 } 1970} 1971 1972// FastEmit functions for ISD::BSWAP. 1973 1974unsigned fastEmit_ISD_BSWAP_MVT_i32_r(MVT RetVT, unsigned Op0) { 1975 if (RetVT.SimpleTy != MVT::i32) 1976 return 0; 1977 if ((Subtarget->isThumb2())) { 1978 return fastEmitInst_r(ARM::t2REV, &ARM::rGPRRegClass, Op0); 1979 } 1980 if ((Subtarget->hasV6Ops()) && (Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 1981 return fastEmitInst_r(ARM::tREV, &ARM::tGPRRegClass, Op0); 1982 } 1983 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 1984 return fastEmitInst_r(ARM::REV, &ARM::GPRRegClass, Op0); 1985 } 1986 return 0; 1987} 1988 1989unsigned fastEmit_ISD_BSWAP_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 1990 if (RetVT.SimpleTy != MVT::v8i16) 1991 return 0; 1992 if ((Subtarget->hasMVEIntegerOps())) { 1993 return fastEmitInst_r(ARM::MVE_VREV16_8, &ARM::MQPRRegClass, Op0); 1994 } 1995 return 0; 1996} 1997 1998unsigned fastEmit_ISD_BSWAP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 1999 if (RetVT.SimpleTy != MVT::v4i32) 2000 return 0; 2001 if ((Subtarget->hasMVEIntegerOps())) { 2002 return fastEmitInst_r(ARM::MVE_VREV32_8, &ARM::MQPRRegClass, Op0); 2003 } 2004 return 0; 2005} 2006 2007unsigned fastEmit_ISD_BSWAP_r(MVT VT, MVT RetVT, unsigned Op0) { 2008 switch (VT.SimpleTy) { 2009 case MVT::i32: return fastEmit_ISD_BSWAP_MVT_i32_r(RetVT, Op0); 2010 case MVT::v8i16: return fastEmit_ISD_BSWAP_MVT_v8i16_r(RetVT, Op0); 2011 case MVT::v4i32: return fastEmit_ISD_BSWAP_MVT_v4i32_r(RetVT, Op0); 2012 default: return 0; 2013 } 2014} 2015 2016// FastEmit functions for ISD::CTLZ. 2017 2018unsigned fastEmit_ISD_CTLZ_MVT_i32_r(MVT RetVT, unsigned Op0) { 2019 if (RetVT.SimpleTy != MVT::i32) 2020 return 0; 2021 if ((Subtarget->isThumb2())) { 2022 return fastEmitInst_r(ARM::t2CLZ, &ARM::rGPRRegClass, Op0); 2023 } 2024 if ((Subtarget->hasV5TOps()) && (!Subtarget->isThumb())) { 2025 return fastEmitInst_r(ARM::CLZ, &ARM::GPRRegClass, Op0); 2026 } 2027 return 0; 2028} 2029 2030unsigned fastEmit_ISD_CTLZ_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 2031 if (RetVT.SimpleTy != MVT::v8i8) 2032 return 0; 2033 if ((Subtarget->hasNEON())) { 2034 return fastEmitInst_r(ARM::VCLZv8i8, &ARM::DPRRegClass, Op0); 2035 } 2036 return 0; 2037} 2038 2039unsigned fastEmit_ISD_CTLZ_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 2040 if (RetVT.SimpleTy != MVT::v16i8) 2041 return 0; 2042 if ((Subtarget->hasMVEIntegerOps())) { 2043 return fastEmitInst_r(ARM::MVE_VCLZs8, &ARM::MQPRRegClass, Op0); 2044 } 2045 if ((Subtarget->hasNEON())) { 2046 return fastEmitInst_r(ARM::VCLZv16i8, &ARM::QPRRegClass, Op0); 2047 } 2048 return 0; 2049} 2050 2051unsigned fastEmit_ISD_CTLZ_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 2052 if (RetVT.SimpleTy != MVT::v4i16) 2053 return 0; 2054 if ((Subtarget->hasNEON())) { 2055 return fastEmitInst_r(ARM::VCLZv4i16, &ARM::DPRRegClass, Op0); 2056 } 2057 return 0; 2058} 2059 2060unsigned fastEmit_ISD_CTLZ_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 2061 if (RetVT.SimpleTy != MVT::v8i16) 2062 return 0; 2063 if ((Subtarget->hasMVEIntegerOps())) { 2064 return fastEmitInst_r(ARM::MVE_VCLZs16, &ARM::MQPRRegClass, Op0); 2065 } 2066 if ((Subtarget->hasNEON())) { 2067 return fastEmitInst_r(ARM::VCLZv8i16, &ARM::QPRRegClass, Op0); 2068 } 2069 return 0; 2070} 2071 2072unsigned fastEmit_ISD_CTLZ_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 2073 if (RetVT.SimpleTy != MVT::v2i32) 2074 return 0; 2075 if ((Subtarget->hasNEON())) { 2076 return fastEmitInst_r(ARM::VCLZv2i32, &ARM::DPRRegClass, Op0); 2077 } 2078 return 0; 2079} 2080 2081unsigned fastEmit_ISD_CTLZ_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 2082 if (RetVT.SimpleTy != MVT::v4i32) 2083 return 0; 2084 if ((Subtarget->hasMVEIntegerOps())) { 2085 return fastEmitInst_r(ARM::MVE_VCLZs32, &ARM::MQPRRegClass, Op0); 2086 } 2087 if ((Subtarget->hasNEON())) { 2088 return fastEmitInst_r(ARM::VCLZv4i32, &ARM::QPRRegClass, Op0); 2089 } 2090 return 0; 2091} 2092 2093unsigned fastEmit_ISD_CTLZ_r(MVT VT, MVT RetVT, unsigned Op0) { 2094 switch (VT.SimpleTy) { 2095 case MVT::i32: return fastEmit_ISD_CTLZ_MVT_i32_r(RetVT, Op0); 2096 case MVT::v8i8: return fastEmit_ISD_CTLZ_MVT_v8i8_r(RetVT, Op0); 2097 case MVT::v16i8: return fastEmit_ISD_CTLZ_MVT_v16i8_r(RetVT, Op0); 2098 case MVT::v4i16: return fastEmit_ISD_CTLZ_MVT_v4i16_r(RetVT, Op0); 2099 case MVT::v8i16: return fastEmit_ISD_CTLZ_MVT_v8i16_r(RetVT, Op0); 2100 case MVT::v2i32: return fastEmit_ISD_CTLZ_MVT_v2i32_r(RetVT, Op0); 2101 case MVT::v4i32: return fastEmit_ISD_CTLZ_MVT_v4i32_r(RetVT, Op0); 2102 default: return 0; 2103 } 2104} 2105 2106// FastEmit functions for ISD::CTPOP. 2107 2108unsigned fastEmit_ISD_CTPOP_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 2109 if (RetVT.SimpleTy != MVT::v8i8) 2110 return 0; 2111 if ((Subtarget->hasNEON())) { 2112 return fastEmitInst_r(ARM::VCNTd, &ARM::DPRRegClass, Op0); 2113 } 2114 return 0; 2115} 2116 2117unsigned fastEmit_ISD_CTPOP_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 2118 if (RetVT.SimpleTy != MVT::v16i8) 2119 return 0; 2120 if ((Subtarget->hasNEON())) { 2121 return fastEmitInst_r(ARM::VCNTq, &ARM::QPRRegClass, Op0); 2122 } 2123 return 0; 2124} 2125 2126unsigned fastEmit_ISD_CTPOP_r(MVT VT, MVT RetVT, unsigned Op0) { 2127 switch (VT.SimpleTy) { 2128 case MVT::v8i8: return fastEmit_ISD_CTPOP_MVT_v8i8_r(RetVT, Op0); 2129 case MVT::v16i8: return fastEmit_ISD_CTPOP_MVT_v16i8_r(RetVT, Op0); 2130 default: return 0; 2131 } 2132} 2133 2134// FastEmit functions for ISD::FABS. 2135 2136unsigned fastEmit_ISD_FABS_MVT_f16_r(MVT RetVT, unsigned Op0) { 2137 if (RetVT.SimpleTy != MVT::f16) 2138 return 0; 2139 if ((Subtarget->hasFullFP16())) { 2140 return fastEmitInst_r(ARM::VABSH, &ARM::HPRRegClass, Op0); 2141 } 2142 return 0; 2143} 2144 2145unsigned fastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0) { 2146 if (RetVT.SimpleTy != MVT::f32) 2147 return 0; 2148 if ((!Subtarget->useNEONForSinglePrecisionFP()) && (Subtarget->hasVFP2Base())) { 2149 return fastEmitInst_r(ARM::VABSS, &ARM::SPRRegClass, Op0); 2150 } 2151 return 0; 2152} 2153 2154unsigned fastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0) { 2155 if (RetVT.SimpleTy != MVT::f64) 2156 return 0; 2157 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 2158 return fastEmitInst_r(ARM::VABSD, &ARM::DPRRegClass, Op0); 2159 } 2160 return 0; 2161} 2162 2163unsigned fastEmit_ISD_FABS_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 2164 if (RetVT.SimpleTy != MVT::v4f16) 2165 return 0; 2166 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2167 return fastEmitInst_r(ARM::VABShd, &ARM::DPRRegClass, Op0); 2168 } 2169 return 0; 2170} 2171 2172unsigned fastEmit_ISD_FABS_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2173 if (RetVT.SimpleTy != MVT::v8f16) 2174 return 0; 2175 if ((Subtarget->hasMVEIntegerOps())) { 2176 return fastEmitInst_r(ARM::MVE_VABSf16, &ARM::MQPRRegClass, Op0); 2177 } 2178 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2179 return fastEmitInst_r(ARM::VABShq, &ARM::QPRRegClass, Op0); 2180 } 2181 return 0; 2182} 2183 2184unsigned fastEmit_ISD_FABS_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 2185 if (RetVT.SimpleTy != MVT::v2f32) 2186 return 0; 2187 if ((Subtarget->hasNEON())) { 2188 return fastEmitInst_r(ARM::VABSfd, &ARM::DPRRegClass, Op0); 2189 } 2190 return 0; 2191} 2192 2193unsigned fastEmit_ISD_FABS_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2194 if (RetVT.SimpleTy != MVT::v4f32) 2195 return 0; 2196 if ((Subtarget->hasMVEIntegerOps())) { 2197 return fastEmitInst_r(ARM::MVE_VABSf32, &ARM::MQPRRegClass, Op0); 2198 } 2199 if ((Subtarget->hasNEON())) { 2200 return fastEmitInst_r(ARM::VABSfq, &ARM::QPRRegClass, Op0); 2201 } 2202 return 0; 2203} 2204 2205unsigned fastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0) { 2206 switch (VT.SimpleTy) { 2207 case MVT::f16: return fastEmit_ISD_FABS_MVT_f16_r(RetVT, Op0); 2208 case MVT::f32: return fastEmit_ISD_FABS_MVT_f32_r(RetVT, Op0); 2209 case MVT::f64: return fastEmit_ISD_FABS_MVT_f64_r(RetVT, Op0); 2210 case MVT::v4f16: return fastEmit_ISD_FABS_MVT_v4f16_r(RetVT, Op0); 2211 case MVT::v8f16: return fastEmit_ISD_FABS_MVT_v8f16_r(RetVT, Op0); 2212 case MVT::v2f32: return fastEmit_ISD_FABS_MVT_v2f32_r(RetVT, Op0); 2213 case MVT::v4f32: return fastEmit_ISD_FABS_MVT_v4f32_r(RetVT, Op0); 2214 default: return 0; 2215 } 2216} 2217 2218// FastEmit functions for ISD::FCEIL. 2219 2220unsigned fastEmit_ISD_FCEIL_MVT_f16_r(MVT RetVT, unsigned Op0) { 2221 if (RetVT.SimpleTy != MVT::f16) 2222 return 0; 2223 if ((Subtarget->hasFullFP16())) { 2224 return fastEmitInst_r(ARM::VRINTPH, &ARM::HPRRegClass, Op0); 2225 } 2226 return 0; 2227} 2228 2229unsigned fastEmit_ISD_FCEIL_MVT_f32_r(MVT RetVT, unsigned Op0) { 2230 if (RetVT.SimpleTy != MVT::f32) 2231 return 0; 2232 if ((Subtarget->hasFPARMv8Base())) { 2233 return fastEmitInst_r(ARM::VRINTPS, &ARM::SPRRegClass, Op0); 2234 } 2235 return 0; 2236} 2237 2238unsigned fastEmit_ISD_FCEIL_MVT_f64_r(MVT RetVT, unsigned Op0) { 2239 if (RetVT.SimpleTy != MVT::f64) 2240 return 0; 2241 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2242 return fastEmitInst_r(ARM::VRINTPD, &ARM::DPRRegClass, Op0); 2243 } 2244 return 0; 2245} 2246 2247unsigned fastEmit_ISD_FCEIL_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2248 if (RetVT.SimpleTy != MVT::v8f16) 2249 return 0; 2250 if ((Subtarget->hasMVEFloatOps())) { 2251 return fastEmitInst_r(ARM::MVE_VRINTf16P, &ARM::MQPRRegClass, Op0); 2252 } 2253 return 0; 2254} 2255 2256unsigned fastEmit_ISD_FCEIL_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2257 if (RetVT.SimpleTy != MVT::v4f32) 2258 return 0; 2259 if ((Subtarget->hasMVEFloatOps())) { 2260 return fastEmitInst_r(ARM::MVE_VRINTf32P, &ARM::MQPRRegClass, Op0); 2261 } 2262 return 0; 2263} 2264 2265unsigned fastEmit_ISD_FCEIL_r(MVT VT, MVT RetVT, unsigned Op0) { 2266 switch (VT.SimpleTy) { 2267 case MVT::f16: return fastEmit_ISD_FCEIL_MVT_f16_r(RetVT, Op0); 2268 case MVT::f32: return fastEmit_ISD_FCEIL_MVT_f32_r(RetVT, Op0); 2269 case MVT::f64: return fastEmit_ISD_FCEIL_MVT_f64_r(RetVT, Op0); 2270 case MVT::v8f16: return fastEmit_ISD_FCEIL_MVT_v8f16_r(RetVT, Op0); 2271 case MVT::v4f32: return fastEmit_ISD_FCEIL_MVT_v4f32_r(RetVT, Op0); 2272 default: return 0; 2273 } 2274} 2275 2276// FastEmit functions for ISD::FFLOOR. 2277 2278unsigned fastEmit_ISD_FFLOOR_MVT_f16_r(MVT RetVT, unsigned Op0) { 2279 if (RetVT.SimpleTy != MVT::f16) 2280 return 0; 2281 if ((Subtarget->hasFullFP16())) { 2282 return fastEmitInst_r(ARM::VRINTMH, &ARM::HPRRegClass, Op0); 2283 } 2284 return 0; 2285} 2286 2287unsigned fastEmit_ISD_FFLOOR_MVT_f32_r(MVT RetVT, unsigned Op0) { 2288 if (RetVT.SimpleTy != MVT::f32) 2289 return 0; 2290 if ((Subtarget->hasFPARMv8Base())) { 2291 return fastEmitInst_r(ARM::VRINTMS, &ARM::SPRRegClass, Op0); 2292 } 2293 return 0; 2294} 2295 2296unsigned fastEmit_ISD_FFLOOR_MVT_f64_r(MVT RetVT, unsigned Op0) { 2297 if (RetVT.SimpleTy != MVT::f64) 2298 return 0; 2299 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2300 return fastEmitInst_r(ARM::VRINTMD, &ARM::DPRRegClass, Op0); 2301 } 2302 return 0; 2303} 2304 2305unsigned fastEmit_ISD_FFLOOR_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2306 if (RetVT.SimpleTy != MVT::v8f16) 2307 return 0; 2308 if ((Subtarget->hasMVEFloatOps())) { 2309 return fastEmitInst_r(ARM::MVE_VRINTf16M, &ARM::MQPRRegClass, Op0); 2310 } 2311 return 0; 2312} 2313 2314unsigned fastEmit_ISD_FFLOOR_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2315 if (RetVT.SimpleTy != MVT::v4f32) 2316 return 0; 2317 if ((Subtarget->hasMVEFloatOps())) { 2318 return fastEmitInst_r(ARM::MVE_VRINTf32M, &ARM::MQPRRegClass, Op0); 2319 } 2320 return 0; 2321} 2322 2323unsigned fastEmit_ISD_FFLOOR_r(MVT VT, MVT RetVT, unsigned Op0) { 2324 switch (VT.SimpleTy) { 2325 case MVT::f16: return fastEmit_ISD_FFLOOR_MVT_f16_r(RetVT, Op0); 2326 case MVT::f32: return fastEmit_ISD_FFLOOR_MVT_f32_r(RetVT, Op0); 2327 case MVT::f64: return fastEmit_ISD_FFLOOR_MVT_f64_r(RetVT, Op0); 2328 case MVT::v8f16: return fastEmit_ISD_FFLOOR_MVT_v8f16_r(RetVT, Op0); 2329 case MVT::v4f32: return fastEmit_ISD_FFLOOR_MVT_v4f32_r(RetVT, Op0); 2330 default: return 0; 2331 } 2332} 2333 2334// FastEmit functions for ISD::FNEARBYINT. 2335 2336unsigned fastEmit_ISD_FNEARBYINT_MVT_f16_r(MVT RetVT, unsigned Op0) { 2337 if (RetVT.SimpleTy != MVT::f16) 2338 return 0; 2339 if ((Subtarget->hasFullFP16())) { 2340 return fastEmitInst_r(ARM::VRINTRH, &ARM::HPRRegClass, Op0); 2341 } 2342 return 0; 2343} 2344 2345unsigned fastEmit_ISD_FNEARBYINT_MVT_f32_r(MVT RetVT, unsigned Op0) { 2346 if (RetVT.SimpleTy != MVT::f32) 2347 return 0; 2348 if ((Subtarget->hasFPARMv8Base())) { 2349 return fastEmitInst_r(ARM::VRINTRS, &ARM::SPRRegClass, Op0); 2350 } 2351 return 0; 2352} 2353 2354unsigned fastEmit_ISD_FNEARBYINT_MVT_f64_r(MVT RetVT, unsigned Op0) { 2355 if (RetVT.SimpleTy != MVT::f64) 2356 return 0; 2357 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2358 return fastEmitInst_r(ARM::VRINTRD, &ARM::DPRRegClass, Op0); 2359 } 2360 return 0; 2361} 2362 2363unsigned fastEmit_ISD_FNEARBYINT_r(MVT VT, MVT RetVT, unsigned Op0) { 2364 switch (VT.SimpleTy) { 2365 case MVT::f16: return fastEmit_ISD_FNEARBYINT_MVT_f16_r(RetVT, Op0); 2366 case MVT::f32: return fastEmit_ISD_FNEARBYINT_MVT_f32_r(RetVT, Op0); 2367 case MVT::f64: return fastEmit_ISD_FNEARBYINT_MVT_f64_r(RetVT, Op0); 2368 default: return 0; 2369 } 2370} 2371 2372// FastEmit functions for ISD::FNEG. 2373 2374unsigned fastEmit_ISD_FNEG_MVT_f16_r(MVT RetVT, unsigned Op0) { 2375 if (RetVT.SimpleTy != MVT::f16) 2376 return 0; 2377 if ((Subtarget->hasFullFP16())) { 2378 return fastEmitInst_r(ARM::VNEGH, &ARM::HPRRegClass, Op0); 2379 } 2380 return 0; 2381} 2382 2383unsigned fastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0) { 2384 if (RetVT.SimpleTy != MVT::f32) 2385 return 0; 2386 if ((!Subtarget->useNEONForSinglePrecisionFP()) && (Subtarget->hasVFP2Base())) { 2387 return fastEmitInst_r(ARM::VNEGS, &ARM::SPRRegClass, Op0); 2388 } 2389 return 0; 2390} 2391 2392unsigned fastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0) { 2393 if (RetVT.SimpleTy != MVT::f64) 2394 return 0; 2395 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 2396 return fastEmitInst_r(ARM::VNEGD, &ARM::DPRRegClass, Op0); 2397 } 2398 return 0; 2399} 2400 2401unsigned fastEmit_ISD_FNEG_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 2402 if (RetVT.SimpleTy != MVT::v4f16) 2403 return 0; 2404 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2405 return fastEmitInst_r(ARM::VNEGhd, &ARM::DPRRegClass, Op0); 2406 } 2407 return 0; 2408} 2409 2410unsigned fastEmit_ISD_FNEG_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2411 if (RetVT.SimpleTy != MVT::v8f16) 2412 return 0; 2413 if ((Subtarget->hasMVEIntegerOps())) { 2414 return fastEmitInst_r(ARM::MVE_VNEGf16, &ARM::MQPRRegClass, Op0); 2415 } 2416 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2417 return fastEmitInst_r(ARM::VNEGhq, &ARM::QPRRegClass, Op0); 2418 } 2419 return 0; 2420} 2421 2422unsigned fastEmit_ISD_FNEG_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 2423 if (RetVT.SimpleTy != MVT::v2f32) 2424 return 0; 2425 if ((Subtarget->hasNEON())) { 2426 return fastEmitInst_r(ARM::VNEGfd, &ARM::DPRRegClass, Op0); 2427 } 2428 return 0; 2429} 2430 2431unsigned fastEmit_ISD_FNEG_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2432 if (RetVT.SimpleTy != MVT::v4f32) 2433 return 0; 2434 if ((Subtarget->hasMVEIntegerOps())) { 2435 return fastEmitInst_r(ARM::MVE_VNEGf32, &ARM::MQPRRegClass, Op0); 2436 } 2437 if ((Subtarget->hasNEON())) { 2438 return fastEmitInst_r(ARM::VNEGf32q, &ARM::QPRRegClass, Op0); 2439 } 2440 return 0; 2441} 2442 2443unsigned fastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0) { 2444 switch (VT.SimpleTy) { 2445 case MVT::f16: return fastEmit_ISD_FNEG_MVT_f16_r(RetVT, Op0); 2446 case MVT::f32: return fastEmit_ISD_FNEG_MVT_f32_r(RetVT, Op0); 2447 case MVT::f64: return fastEmit_ISD_FNEG_MVT_f64_r(RetVT, Op0); 2448 case MVT::v4f16: return fastEmit_ISD_FNEG_MVT_v4f16_r(RetVT, Op0); 2449 case MVT::v8f16: return fastEmit_ISD_FNEG_MVT_v8f16_r(RetVT, Op0); 2450 case MVT::v2f32: return fastEmit_ISD_FNEG_MVT_v2f32_r(RetVT, Op0); 2451 case MVT::v4f32: return fastEmit_ISD_FNEG_MVT_v4f32_r(RetVT, Op0); 2452 default: return 0; 2453 } 2454} 2455 2456// FastEmit functions for ISD::FP_EXTEND. 2457 2458unsigned fastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0) { 2459 if (RetVT.SimpleTy != MVT::f64) 2460 return 0; 2461 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 2462 return fastEmitInst_r(ARM::VCVTDS, &ARM::DPRRegClass, Op0); 2463 } 2464 return 0; 2465} 2466 2467unsigned fastEmit_ISD_FP_EXTEND_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 2468 if (RetVT.SimpleTy != MVT::v4f32) 2469 return 0; 2470 return fastEmitInst_r(ARM::VCVTh2f, &ARM::QPRRegClass, Op0); 2471} 2472 2473unsigned fastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { 2474 switch (VT.SimpleTy) { 2475 case MVT::f32: return fastEmit_ISD_FP_EXTEND_MVT_f32_r(RetVT, Op0); 2476 case MVT::v4f16: return fastEmit_ISD_FP_EXTEND_MVT_v4f16_r(RetVT, Op0); 2477 default: return 0; 2478 } 2479} 2480 2481// FastEmit functions for ISD::FP_ROUND. 2482 2483unsigned fastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0) { 2484 if (RetVT.SimpleTy != MVT::f32) 2485 return 0; 2486 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 2487 return fastEmitInst_r(ARM::VCVTSD, &ARM::SPRRegClass, Op0); 2488 } 2489 return 0; 2490} 2491 2492unsigned fastEmit_ISD_FP_ROUND_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2493 if (RetVT.SimpleTy != MVT::v4f16) 2494 return 0; 2495 return fastEmitInst_r(ARM::VCVTf2h, &ARM::DPRRegClass, Op0); 2496} 2497 2498unsigned fastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0) { 2499 switch (VT.SimpleTy) { 2500 case MVT::f64: return fastEmit_ISD_FP_ROUND_MVT_f64_r(RetVT, Op0); 2501 case MVT::v4f32: return fastEmit_ISD_FP_ROUND_MVT_v4f32_r(RetVT, Op0); 2502 default: return 0; 2503 } 2504} 2505 2506// FastEmit functions for ISD::FP_TO_SINT. 2507 2508unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 2509 if (RetVT.SimpleTy != MVT::v4i16) 2510 return 0; 2511 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2512 return fastEmitInst_r(ARM::VCVTh2sd, &ARM::DPRRegClass, Op0); 2513 } 2514 return 0; 2515} 2516 2517unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2518 if (RetVT.SimpleTy != MVT::v8i16) 2519 return 0; 2520 if ((Subtarget->hasMVEFloatOps())) { 2521 return fastEmitInst_r(ARM::MVE_VCVTs16f16z, &ARM::MQPRRegClass, Op0); 2522 } 2523 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2524 return fastEmitInst_r(ARM::VCVTh2sq, &ARM::QPRRegClass, Op0); 2525 } 2526 return 0; 2527} 2528 2529unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 2530 if (RetVT.SimpleTy != MVT::v2i32) 2531 return 0; 2532 if ((Subtarget->hasNEON())) { 2533 return fastEmitInst_r(ARM::VCVTf2sd, &ARM::DPRRegClass, Op0); 2534 } 2535 return 0; 2536} 2537 2538unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2539 if (RetVT.SimpleTy != MVT::v4i32) 2540 return 0; 2541 if ((Subtarget->hasMVEFloatOps())) { 2542 return fastEmitInst_r(ARM::MVE_VCVTs32f32z, &ARM::MQPRRegClass, Op0); 2543 } 2544 if ((Subtarget->hasNEON())) { 2545 return fastEmitInst_r(ARM::VCVTf2sq, &ARM::QPRRegClass, Op0); 2546 } 2547 return 0; 2548} 2549 2550unsigned fastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0) { 2551 switch (VT.SimpleTy) { 2552 case MVT::v4f16: return fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(RetVT, Op0); 2553 case MVT::v8f16: return fastEmit_ISD_FP_TO_SINT_MVT_v8f16_r(RetVT, Op0); 2554 case MVT::v2f32: return fastEmit_ISD_FP_TO_SINT_MVT_v2f32_r(RetVT, Op0); 2555 case MVT::v4f32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(RetVT, Op0); 2556 default: return 0; 2557 } 2558} 2559 2560// FastEmit functions for ISD::FP_TO_UINT. 2561 2562unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(MVT RetVT, unsigned Op0) { 2563 if (RetVT.SimpleTy != MVT::v4i16) 2564 return 0; 2565 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2566 return fastEmitInst_r(ARM::VCVTh2ud, &ARM::DPRRegClass, Op0); 2567 } 2568 return 0; 2569} 2570 2571unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2572 if (RetVT.SimpleTy != MVT::v8i16) 2573 return 0; 2574 if ((Subtarget->hasMVEFloatOps())) { 2575 return fastEmitInst_r(ARM::MVE_VCVTu16f16z, &ARM::MQPRRegClass, Op0); 2576 } 2577 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2578 return fastEmitInst_r(ARM::VCVTh2uq, &ARM::QPRRegClass, Op0); 2579 } 2580 return 0; 2581} 2582 2583unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f32_r(MVT RetVT, unsigned Op0) { 2584 if (RetVT.SimpleTy != MVT::v2i32) 2585 return 0; 2586 if ((Subtarget->hasNEON())) { 2587 return fastEmitInst_r(ARM::VCVTf2ud, &ARM::DPRRegClass, Op0); 2588 } 2589 return 0; 2590} 2591 2592unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2593 if (RetVT.SimpleTy != MVT::v4i32) 2594 return 0; 2595 if ((Subtarget->hasMVEFloatOps())) { 2596 return fastEmitInst_r(ARM::MVE_VCVTu32f32z, &ARM::MQPRRegClass, Op0); 2597 } 2598 if ((Subtarget->hasNEON())) { 2599 return fastEmitInst_r(ARM::VCVTf2uq, &ARM::QPRRegClass, Op0); 2600 } 2601 return 0; 2602} 2603 2604unsigned fastEmit_ISD_FP_TO_UINT_r(MVT VT, MVT RetVT, unsigned Op0) { 2605 switch (VT.SimpleTy) { 2606 case MVT::v4f16: return fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(RetVT, Op0); 2607 case MVT::v8f16: return fastEmit_ISD_FP_TO_UINT_MVT_v8f16_r(RetVT, Op0); 2608 case MVT::v2f32: return fastEmit_ISD_FP_TO_UINT_MVT_v2f32_r(RetVT, Op0); 2609 case MVT::v4f32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(RetVT, Op0); 2610 default: return 0; 2611 } 2612} 2613 2614// FastEmit functions for ISD::FRINT. 2615 2616unsigned fastEmit_ISD_FRINT_MVT_f16_r(MVT RetVT, unsigned Op0) { 2617 if (RetVT.SimpleTy != MVT::f16) 2618 return 0; 2619 if ((Subtarget->hasFullFP16())) { 2620 return fastEmitInst_r(ARM::VRINTXH, &ARM::HPRRegClass, Op0); 2621 } 2622 return 0; 2623} 2624 2625unsigned fastEmit_ISD_FRINT_MVT_f32_r(MVT RetVT, unsigned Op0) { 2626 if (RetVT.SimpleTy != MVT::f32) 2627 return 0; 2628 if ((Subtarget->hasFPARMv8Base())) { 2629 return fastEmitInst_r(ARM::VRINTXS, &ARM::SPRRegClass, Op0); 2630 } 2631 return 0; 2632} 2633 2634unsigned fastEmit_ISD_FRINT_MVT_f64_r(MVT RetVT, unsigned Op0) { 2635 if (RetVT.SimpleTy != MVT::f64) 2636 return 0; 2637 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2638 return fastEmitInst_r(ARM::VRINTXD, &ARM::DPRRegClass, Op0); 2639 } 2640 return 0; 2641} 2642 2643unsigned fastEmit_ISD_FRINT_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2644 if (RetVT.SimpleTy != MVT::v8f16) 2645 return 0; 2646 if ((Subtarget->hasMVEFloatOps())) { 2647 return fastEmitInst_r(ARM::MVE_VRINTf16X, &ARM::MQPRRegClass, Op0); 2648 } 2649 return 0; 2650} 2651 2652unsigned fastEmit_ISD_FRINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2653 if (RetVT.SimpleTy != MVT::v4f32) 2654 return 0; 2655 if ((Subtarget->hasMVEFloatOps())) { 2656 return fastEmitInst_r(ARM::MVE_VRINTf32X, &ARM::MQPRRegClass, Op0); 2657 } 2658 return 0; 2659} 2660 2661unsigned fastEmit_ISD_FRINT_r(MVT VT, MVT RetVT, unsigned Op0) { 2662 switch (VT.SimpleTy) { 2663 case MVT::f16: return fastEmit_ISD_FRINT_MVT_f16_r(RetVT, Op0); 2664 case MVT::f32: return fastEmit_ISD_FRINT_MVT_f32_r(RetVT, Op0); 2665 case MVT::f64: return fastEmit_ISD_FRINT_MVT_f64_r(RetVT, Op0); 2666 case MVT::v8f16: return fastEmit_ISD_FRINT_MVT_v8f16_r(RetVT, Op0); 2667 case MVT::v4f32: return fastEmit_ISD_FRINT_MVT_v4f32_r(RetVT, Op0); 2668 default: return 0; 2669 } 2670} 2671 2672// FastEmit functions for ISD::FROUND. 2673 2674unsigned fastEmit_ISD_FROUND_MVT_f16_r(MVT RetVT, unsigned Op0) { 2675 if (RetVT.SimpleTy != MVT::f16) 2676 return 0; 2677 if ((Subtarget->hasFullFP16())) { 2678 return fastEmitInst_r(ARM::VRINTAH, &ARM::HPRRegClass, Op0); 2679 } 2680 return 0; 2681} 2682 2683unsigned fastEmit_ISD_FROUND_MVT_f32_r(MVT RetVT, unsigned Op0) { 2684 if (RetVT.SimpleTy != MVT::f32) 2685 return 0; 2686 if ((Subtarget->hasFPARMv8Base())) { 2687 return fastEmitInst_r(ARM::VRINTAS, &ARM::SPRRegClass, Op0); 2688 } 2689 return 0; 2690} 2691 2692unsigned fastEmit_ISD_FROUND_MVT_f64_r(MVT RetVT, unsigned Op0) { 2693 if (RetVT.SimpleTy != MVT::f64) 2694 return 0; 2695 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2696 return fastEmitInst_r(ARM::VRINTAD, &ARM::DPRRegClass, Op0); 2697 } 2698 return 0; 2699} 2700 2701unsigned fastEmit_ISD_FROUND_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2702 if (RetVT.SimpleTy != MVT::v8f16) 2703 return 0; 2704 if ((Subtarget->hasMVEFloatOps())) { 2705 return fastEmitInst_r(ARM::MVE_VRINTf16A, &ARM::MQPRRegClass, Op0); 2706 } 2707 return 0; 2708} 2709 2710unsigned fastEmit_ISD_FROUND_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2711 if (RetVT.SimpleTy != MVT::v4f32) 2712 return 0; 2713 if ((Subtarget->hasMVEFloatOps())) { 2714 return fastEmitInst_r(ARM::MVE_VRINTf32A, &ARM::MQPRRegClass, Op0); 2715 } 2716 return 0; 2717} 2718 2719unsigned fastEmit_ISD_FROUND_r(MVT VT, MVT RetVT, unsigned Op0) { 2720 switch (VT.SimpleTy) { 2721 case MVT::f16: return fastEmit_ISD_FROUND_MVT_f16_r(RetVT, Op0); 2722 case MVT::f32: return fastEmit_ISD_FROUND_MVT_f32_r(RetVT, Op0); 2723 case MVT::f64: return fastEmit_ISD_FROUND_MVT_f64_r(RetVT, Op0); 2724 case MVT::v8f16: return fastEmit_ISD_FROUND_MVT_v8f16_r(RetVT, Op0); 2725 case MVT::v4f32: return fastEmit_ISD_FROUND_MVT_v4f32_r(RetVT, Op0); 2726 default: return 0; 2727 } 2728} 2729 2730// FastEmit functions for ISD::FSQRT. 2731 2732unsigned fastEmit_ISD_FSQRT_MVT_f16_r(MVT RetVT, unsigned Op0) { 2733 if (RetVT.SimpleTy != MVT::f16) 2734 return 0; 2735 if ((Subtarget->hasFullFP16())) { 2736 return fastEmitInst_r(ARM::VSQRTH, &ARM::HPRRegClass, Op0); 2737 } 2738 return 0; 2739} 2740 2741unsigned fastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0) { 2742 if (RetVT.SimpleTy != MVT::f32) 2743 return 0; 2744 if ((Subtarget->hasVFP2Base())) { 2745 return fastEmitInst_r(ARM::VSQRTS, &ARM::SPRRegClass, Op0); 2746 } 2747 return 0; 2748} 2749 2750unsigned fastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0) { 2751 if (RetVT.SimpleTy != MVT::f64) 2752 return 0; 2753 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 2754 return fastEmitInst_r(ARM::VSQRTD, &ARM::DPRRegClass, Op0); 2755 } 2756 return 0; 2757} 2758 2759unsigned fastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0) { 2760 switch (VT.SimpleTy) { 2761 case MVT::f16: return fastEmit_ISD_FSQRT_MVT_f16_r(RetVT, Op0); 2762 case MVT::f32: return fastEmit_ISD_FSQRT_MVT_f32_r(RetVT, Op0); 2763 case MVT::f64: return fastEmit_ISD_FSQRT_MVT_f64_r(RetVT, Op0); 2764 default: return 0; 2765 } 2766} 2767 2768// FastEmit functions for ISD::FTRUNC. 2769 2770unsigned fastEmit_ISD_FTRUNC_MVT_f16_r(MVT RetVT, unsigned Op0) { 2771 if (RetVT.SimpleTy != MVT::f16) 2772 return 0; 2773 if ((Subtarget->hasFullFP16())) { 2774 return fastEmitInst_r(ARM::VRINTZH, &ARM::HPRRegClass, Op0); 2775 } 2776 return 0; 2777} 2778 2779unsigned fastEmit_ISD_FTRUNC_MVT_f32_r(MVT RetVT, unsigned Op0) { 2780 if (RetVT.SimpleTy != MVT::f32) 2781 return 0; 2782 if ((Subtarget->hasFPARMv8Base())) { 2783 return fastEmitInst_r(ARM::VRINTZS, &ARM::SPRRegClass, Op0); 2784 } 2785 return 0; 2786} 2787 2788unsigned fastEmit_ISD_FTRUNC_MVT_f64_r(MVT RetVT, unsigned Op0) { 2789 if (RetVT.SimpleTy != MVT::f64) 2790 return 0; 2791 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 2792 return fastEmitInst_r(ARM::VRINTZD, &ARM::DPRRegClass, Op0); 2793 } 2794 return 0; 2795} 2796 2797unsigned fastEmit_ISD_FTRUNC_MVT_v8f16_r(MVT RetVT, unsigned Op0) { 2798 if (RetVT.SimpleTy != MVT::v8f16) 2799 return 0; 2800 if ((Subtarget->hasMVEFloatOps())) { 2801 return fastEmitInst_r(ARM::MVE_VRINTf16Z, &ARM::MQPRRegClass, Op0); 2802 } 2803 return 0; 2804} 2805 2806unsigned fastEmit_ISD_FTRUNC_MVT_v4f32_r(MVT RetVT, unsigned Op0) { 2807 if (RetVT.SimpleTy != MVT::v4f32) 2808 return 0; 2809 if ((Subtarget->hasMVEFloatOps())) { 2810 return fastEmitInst_r(ARM::MVE_VRINTf32Z, &ARM::MQPRRegClass, Op0); 2811 } 2812 return 0; 2813} 2814 2815unsigned fastEmit_ISD_FTRUNC_r(MVT VT, MVT RetVT, unsigned Op0) { 2816 switch (VT.SimpleTy) { 2817 case MVT::f16: return fastEmit_ISD_FTRUNC_MVT_f16_r(RetVT, Op0); 2818 case MVT::f32: return fastEmit_ISD_FTRUNC_MVT_f32_r(RetVT, Op0); 2819 case MVT::f64: return fastEmit_ISD_FTRUNC_MVT_f64_r(RetVT, Op0); 2820 case MVT::v8f16: return fastEmit_ISD_FTRUNC_MVT_v8f16_r(RetVT, Op0); 2821 case MVT::v4f32: return fastEmit_ISD_FTRUNC_MVT_v4f32_r(RetVT, Op0); 2822 default: return 0; 2823 } 2824} 2825 2826// FastEmit functions for ISD::SIGN_EXTEND. 2827 2828unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 2829 if (RetVT.SimpleTy != MVT::v8i16) 2830 return 0; 2831 if ((Subtarget->hasNEON())) { 2832 return fastEmitInst_r(ARM::VMOVLsv8i16, &ARM::QPRRegClass, Op0); 2833 } 2834 return 0; 2835} 2836 2837unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 2838 if (RetVT.SimpleTy != MVT::v4i32) 2839 return 0; 2840 if ((Subtarget->hasNEON())) { 2841 return fastEmitInst_r(ARM::VMOVLsv4i32, &ARM::QPRRegClass, Op0); 2842 } 2843 return 0; 2844} 2845 2846unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 2847 if (RetVT.SimpleTy != MVT::v2i64) 2848 return 0; 2849 if ((Subtarget->hasNEON())) { 2850 return fastEmitInst_r(ARM::VMOVLsv2i64, &ARM::QPRRegClass, Op0); 2851 } 2852 return 0; 2853} 2854 2855unsigned fastEmit_ISD_SIGN_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { 2856 switch (VT.SimpleTy) { 2857 case MVT::v8i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i8_r(RetVT, Op0); 2858 case MVT::v4i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i16_r(RetVT, Op0); 2859 case MVT::v2i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v2i32_r(RetVT, Op0); 2860 default: return 0; 2861 } 2862} 2863 2864// FastEmit functions for ISD::SINT_TO_FP. 2865 2866unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 2867 if (RetVT.SimpleTy != MVT::v4f16) 2868 return 0; 2869 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2870 return fastEmitInst_r(ARM::VCVTs2hd, &ARM::DPRRegClass, Op0); 2871 } 2872 return 0; 2873} 2874 2875unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 2876 if (RetVT.SimpleTy != MVT::v8f16) 2877 return 0; 2878 if ((Subtarget->hasMVEFloatOps())) { 2879 return fastEmitInst_r(ARM::MVE_VCVTf16s16n, &ARM::MQPRRegClass, Op0); 2880 } 2881 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2882 return fastEmitInst_r(ARM::VCVTs2hq, &ARM::QPRRegClass, Op0); 2883 } 2884 return 0; 2885} 2886 2887unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 2888 if (RetVT.SimpleTy != MVT::v2f32) 2889 return 0; 2890 if ((Subtarget->hasNEON())) { 2891 return fastEmitInst_r(ARM::VCVTs2fd, &ARM::DPRRegClass, Op0); 2892 } 2893 return 0; 2894} 2895 2896unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 2897 if (RetVT.SimpleTy != MVT::v4f32) 2898 return 0; 2899 if ((Subtarget->hasMVEFloatOps())) { 2900 return fastEmitInst_r(ARM::MVE_VCVTf32s32n, &ARM::MQPRRegClass, Op0); 2901 } 2902 if ((Subtarget->hasNEON())) { 2903 return fastEmitInst_r(ARM::VCVTs2fq, &ARM::QPRRegClass, Op0); 2904 } 2905 return 0; 2906} 2907 2908unsigned fastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0) { 2909 switch (VT.SimpleTy) { 2910 case MVT::v4i16: return fastEmit_ISD_SINT_TO_FP_MVT_v4i16_r(RetVT, Op0); 2911 case MVT::v8i16: return fastEmit_ISD_SINT_TO_FP_MVT_v8i16_r(RetVT, Op0); 2912 case MVT::v2i32: return fastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(RetVT, Op0); 2913 case MVT::v4i32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(RetVT, Op0); 2914 default: return 0; 2915 } 2916} 2917 2918// FastEmit functions for ISD::TRUNCATE. 2919 2920unsigned fastEmit_ISD_TRUNCATE_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 2921 if (RetVT.SimpleTy != MVT::v8i8) 2922 return 0; 2923 if ((Subtarget->hasNEON())) { 2924 return fastEmitInst_r(ARM::VMOVNv8i8, &ARM::DPRRegClass, Op0); 2925 } 2926 return 0; 2927} 2928 2929unsigned fastEmit_ISD_TRUNCATE_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 2930 if (RetVT.SimpleTy != MVT::v4i16) 2931 return 0; 2932 if ((Subtarget->hasNEON())) { 2933 return fastEmitInst_r(ARM::VMOVNv4i16, &ARM::DPRRegClass, Op0); 2934 } 2935 return 0; 2936} 2937 2938unsigned fastEmit_ISD_TRUNCATE_MVT_v2i64_r(MVT RetVT, unsigned Op0) { 2939 if (RetVT.SimpleTy != MVT::v2i32) 2940 return 0; 2941 if ((Subtarget->hasNEON())) { 2942 return fastEmitInst_r(ARM::VMOVNv2i32, &ARM::DPRRegClass, Op0); 2943 } 2944 return 0; 2945} 2946 2947unsigned fastEmit_ISD_TRUNCATE_r(MVT VT, MVT RetVT, unsigned Op0) { 2948 switch (VT.SimpleTy) { 2949 case MVT::v8i16: return fastEmit_ISD_TRUNCATE_MVT_v8i16_r(RetVT, Op0); 2950 case MVT::v4i32: return fastEmit_ISD_TRUNCATE_MVT_v4i32_r(RetVT, Op0); 2951 case MVT::v2i64: return fastEmit_ISD_TRUNCATE_MVT_v2i64_r(RetVT, Op0); 2952 default: return 0; 2953 } 2954} 2955 2956// FastEmit functions for ISD::UINT_TO_FP. 2957 2958unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 2959 if (RetVT.SimpleTy != MVT::v4f16) 2960 return 0; 2961 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2962 return fastEmitInst_r(ARM::VCVTu2hd, &ARM::DPRRegClass, Op0); 2963 } 2964 return 0; 2965} 2966 2967unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 2968 if (RetVT.SimpleTy != MVT::v8f16) 2969 return 0; 2970 if ((Subtarget->hasMVEFloatOps())) { 2971 return fastEmitInst_r(ARM::MVE_VCVTf16u16n, &ARM::MQPRRegClass, Op0); 2972 } 2973 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 2974 return fastEmitInst_r(ARM::VCVTu2hq, &ARM::QPRRegClass, Op0); 2975 } 2976 return 0; 2977} 2978 2979unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 2980 if (RetVT.SimpleTy != MVT::v2f32) 2981 return 0; 2982 if ((Subtarget->hasNEON())) { 2983 return fastEmitInst_r(ARM::VCVTu2fd, &ARM::DPRRegClass, Op0); 2984 } 2985 return 0; 2986} 2987 2988unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 2989 if (RetVT.SimpleTy != MVT::v4f32) 2990 return 0; 2991 if ((Subtarget->hasMVEFloatOps())) { 2992 return fastEmitInst_r(ARM::MVE_VCVTf32u32n, &ARM::MQPRRegClass, Op0); 2993 } 2994 if ((Subtarget->hasNEON())) { 2995 return fastEmitInst_r(ARM::VCVTu2fq, &ARM::QPRRegClass, Op0); 2996 } 2997 return 0; 2998} 2999 3000unsigned fastEmit_ISD_UINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0) { 3001 switch (VT.SimpleTy) { 3002 case MVT::v4i16: return fastEmit_ISD_UINT_TO_FP_MVT_v4i16_r(RetVT, Op0); 3003 case MVT::v8i16: return fastEmit_ISD_UINT_TO_FP_MVT_v8i16_r(RetVT, Op0); 3004 case MVT::v2i32: return fastEmit_ISD_UINT_TO_FP_MVT_v2i32_r(RetVT, Op0); 3005 case MVT::v4i32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(RetVT, Op0); 3006 default: return 0; 3007 } 3008} 3009 3010// FastEmit functions for ISD::VECREDUCE_ADD. 3011 3012unsigned fastEmit_ISD_VECREDUCE_ADD_MVT_v16i8_r(MVT RetVT, unsigned Op0) { 3013 if (RetVT.SimpleTy != MVT::i32) 3014 return 0; 3015 if ((Subtarget->hasMVEIntegerOps())) { 3016 return fastEmitInst_r(ARM::MVE_VADDVu8no_acc, &ARM::tGPREvenRegClass, Op0); 3017 } 3018 return 0; 3019} 3020 3021unsigned fastEmit_ISD_VECREDUCE_ADD_MVT_v8i16_r(MVT RetVT, unsigned Op0) { 3022 if (RetVT.SimpleTy != MVT::i32) 3023 return 0; 3024 if ((Subtarget->hasMVEIntegerOps())) { 3025 return fastEmitInst_r(ARM::MVE_VADDVu16no_acc, &ARM::tGPREvenRegClass, Op0); 3026 } 3027 return 0; 3028} 3029 3030unsigned fastEmit_ISD_VECREDUCE_ADD_MVT_v4i32_r(MVT RetVT, unsigned Op0) { 3031 if (RetVT.SimpleTy != MVT::i32) 3032 return 0; 3033 if ((Subtarget->hasMVEIntegerOps())) { 3034 return fastEmitInst_r(ARM::MVE_VADDVu32no_acc, &ARM::tGPREvenRegClass, Op0); 3035 } 3036 return 0; 3037} 3038 3039unsigned fastEmit_ISD_VECREDUCE_ADD_r(MVT VT, MVT RetVT, unsigned Op0) { 3040 switch (VT.SimpleTy) { 3041 case MVT::v16i8: return fastEmit_ISD_VECREDUCE_ADD_MVT_v16i8_r(RetVT, Op0); 3042 case MVT::v8i16: return fastEmit_ISD_VECREDUCE_ADD_MVT_v8i16_r(RetVT, Op0); 3043 case MVT::v4i32: return fastEmit_ISD_VECREDUCE_ADD_MVT_v4i32_r(RetVT, Op0); 3044 default: return 0; 3045 } 3046} 3047 3048// FastEmit functions for ISD::ZERO_EXTEND. 3049 3050unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v8i8_r(MVT RetVT, unsigned Op0) { 3051 if (RetVT.SimpleTy != MVT::v8i16) 3052 return 0; 3053 if ((Subtarget->hasNEON())) { 3054 return fastEmitInst_r(ARM::VMOVLuv8i16, &ARM::QPRRegClass, Op0); 3055 } 3056 return 0; 3057} 3058 3059unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v4i16_r(MVT RetVT, unsigned Op0) { 3060 if (RetVT.SimpleTy != MVT::v4i32) 3061 return 0; 3062 if ((Subtarget->hasNEON())) { 3063 return fastEmitInst_r(ARM::VMOVLuv4i32, &ARM::QPRRegClass, Op0); 3064 } 3065 return 0; 3066} 3067 3068unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v2i32_r(MVT RetVT, unsigned Op0) { 3069 if (RetVT.SimpleTy != MVT::v2i64) 3070 return 0; 3071 if ((Subtarget->hasNEON())) { 3072 return fastEmitInst_r(ARM::VMOVLuv2i64, &ARM::QPRRegClass, Op0); 3073 } 3074 return 0; 3075} 3076 3077unsigned fastEmit_ISD_ZERO_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) { 3078 switch (VT.SimpleTy) { 3079 case MVT::v8i8: return fastEmit_ISD_ZERO_EXTEND_MVT_v8i8_r(RetVT, Op0); 3080 case MVT::v4i16: return fastEmit_ISD_ZERO_EXTEND_MVT_v4i16_r(RetVT, Op0); 3081 case MVT::v2i32: return fastEmit_ISD_ZERO_EXTEND_MVT_v2i32_r(RetVT, Op0); 3082 default: return 0; 3083 } 3084} 3085 3086// Top-level FastEmit function. 3087 3088unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0) override { 3089 switch (Opcode) { 3090 case ARMISD::CALL: return fastEmit_ARMISD_CALL_r(VT, RetVT, Op0); 3091 case ARMISD::CALL_NOLINK: return fastEmit_ARMISD_CALL_NOLINK_r(VT, RetVT, Op0); 3092 case ARMISD::CALL_PRED: return fastEmit_ARMISD_CALL_PRED_r(VT, RetVT, Op0); 3093 case ARMISD::CMPFPEw0: return fastEmit_ARMISD_CMPFPEw0_r(VT, RetVT, Op0); 3094 case ARMISD::CMPFPw0: return fastEmit_ARMISD_CMPFPw0_r(VT, RetVT, Op0); 3095 case ARMISD::RRX: return fastEmit_ARMISD_RRX_r(VT, RetVT, Op0); 3096 case ARMISD::SRA_FLAG: return fastEmit_ARMISD_SRA_FLAG_r(VT, RetVT, Op0); 3097 case ARMISD::SRL_FLAG: return fastEmit_ARMISD_SRL_FLAG_r(VT, RetVT, Op0); 3098 case ARMISD::VADDVs: return fastEmit_ARMISD_VADDVs_r(VT, RetVT, Op0); 3099 case ARMISD::VADDVu: return fastEmit_ARMISD_VADDVu_r(VT, RetVT, Op0); 3100 case ARMISD::VDUP: return fastEmit_ARMISD_VDUP_r(VT, RetVT, Op0); 3101 case ARMISD::VMOVSR: return fastEmit_ARMISD_VMOVSR_r(VT, RetVT, Op0); 3102 case ARMISD::VMOVhr: return fastEmit_ARMISD_VMOVhr_r(VT, RetVT, Op0); 3103 case ARMISD::VMOVrh: return fastEmit_ARMISD_VMOVrh_r(VT, RetVT, Op0); 3104 case ARMISD::VREV16: return fastEmit_ARMISD_VREV16_r(VT, RetVT, Op0); 3105 case ARMISD::VREV32: return fastEmit_ARMISD_VREV32_r(VT, RetVT, Op0); 3106 case ARMISD::VREV64: return fastEmit_ARMISD_VREV64_r(VT, RetVT, Op0); 3107 case ARMISD::WIN__DBZCHK: return fastEmit_ARMISD_WIN__DBZCHK_r(VT, RetVT, Op0); 3108 case ARMISD::tSECALL: return fastEmit_ARMISD_tSECALL_r(VT, RetVT, Op0); 3109 case ISD::ABS: return fastEmit_ISD_ABS_r(VT, RetVT, Op0); 3110 case ISD::ANY_EXTEND: return fastEmit_ISD_ANY_EXTEND_r(VT, RetVT, Op0); 3111 case ISD::BITCAST: return fastEmit_ISD_BITCAST_r(VT, RetVT, Op0); 3112 case ISD::BITREVERSE: return fastEmit_ISD_BITREVERSE_r(VT, RetVT, Op0); 3113 case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0); 3114 case ISD::BSWAP: return fastEmit_ISD_BSWAP_r(VT, RetVT, Op0); 3115 case ISD::CTLZ: return fastEmit_ISD_CTLZ_r(VT, RetVT, Op0); 3116 case ISD::CTPOP: return fastEmit_ISD_CTPOP_r(VT, RetVT, Op0); 3117 case ISD::FABS: return fastEmit_ISD_FABS_r(VT, RetVT, Op0); 3118 case ISD::FCEIL: return fastEmit_ISD_FCEIL_r(VT, RetVT, Op0); 3119 case ISD::FFLOOR: return fastEmit_ISD_FFLOOR_r(VT, RetVT, Op0); 3120 case ISD::FNEARBYINT: return fastEmit_ISD_FNEARBYINT_r(VT, RetVT, Op0); 3121 case ISD::FNEG: return fastEmit_ISD_FNEG_r(VT, RetVT, Op0); 3122 case ISD::FP_EXTEND: return fastEmit_ISD_FP_EXTEND_r(VT, RetVT, Op0); 3123 case ISD::FP_ROUND: return fastEmit_ISD_FP_ROUND_r(VT, RetVT, Op0); 3124 case ISD::FP_TO_SINT: return fastEmit_ISD_FP_TO_SINT_r(VT, RetVT, Op0); 3125 case ISD::FP_TO_UINT: return fastEmit_ISD_FP_TO_UINT_r(VT, RetVT, Op0); 3126 case ISD::FRINT: return fastEmit_ISD_FRINT_r(VT, RetVT, Op0); 3127 case ISD::FROUND: return fastEmit_ISD_FROUND_r(VT, RetVT, Op0); 3128 case ISD::FSQRT: return fastEmit_ISD_FSQRT_r(VT, RetVT, Op0); 3129 case ISD::FTRUNC: return fastEmit_ISD_FTRUNC_r(VT, RetVT, Op0); 3130 case ISD::SIGN_EXTEND: return fastEmit_ISD_SIGN_EXTEND_r(VT, RetVT, Op0); 3131 case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0); 3132 case ISD::TRUNCATE: return fastEmit_ISD_TRUNCATE_r(VT, RetVT, Op0); 3133 case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0); 3134 case ISD::VECREDUCE_ADD: return fastEmit_ISD_VECREDUCE_ADD_r(VT, RetVT, Op0); 3135 case ISD::ZERO_EXTEND: return fastEmit_ISD_ZERO_EXTEND_r(VT, RetVT, Op0); 3136 default: return 0; 3137 } 3138} 3139 3140// FastEmit functions for ARMISD::CMP. 3141 3142unsigned fastEmit_ARMISD_CMP_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3143 if (RetVT.SimpleTy != MVT::isVoid) 3144 return 0; 3145 if ((Subtarget->isThumb2())) { 3146 return fastEmitInst_rr(ARM::t2CMPrr, &ARM::GPRnopcRegClass, Op0, Op1); 3147 } 3148 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 3149 return fastEmitInst_rr(ARM::tCMPr, &ARM::tGPRRegClass, Op0, Op1); 3150 } 3151 if ((!Subtarget->isThumb())) { 3152 return fastEmitInst_rr(ARM::CMPrr, &ARM::GPRRegClass, Op0, Op1); 3153 } 3154 return 0; 3155} 3156 3157unsigned fastEmit_ARMISD_CMP_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3158 switch (VT.SimpleTy) { 3159 case MVT::i32: return fastEmit_ARMISD_CMP_MVT_i32_rr(RetVT, Op0, Op1); 3160 default: return 0; 3161 } 3162} 3163 3164// FastEmit functions for ARMISD::CMPFP. 3165 3166unsigned fastEmit_ARMISD_CMPFP_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3167 if (RetVT.SimpleTy != MVT::isVoid) 3168 return 0; 3169 if ((Subtarget->hasFullFP16())) { 3170 return fastEmitInst_rr(ARM::VCMPH, &ARM::HPRRegClass, Op0, Op1); 3171 } 3172 return 0; 3173} 3174 3175unsigned fastEmit_ARMISD_CMPFP_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3176 if (RetVT.SimpleTy != MVT::isVoid) 3177 return 0; 3178 if ((Subtarget->hasVFP2Base())) { 3179 return fastEmitInst_rr(ARM::VCMPS, &ARM::SPRRegClass, Op0, Op1); 3180 } 3181 return 0; 3182} 3183 3184unsigned fastEmit_ARMISD_CMPFP_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3185 if (RetVT.SimpleTy != MVT::isVoid) 3186 return 0; 3187 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 3188 return fastEmitInst_rr(ARM::VCMPD, &ARM::DPRRegClass, Op0, Op1); 3189 } 3190 return 0; 3191} 3192 3193unsigned fastEmit_ARMISD_CMPFP_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3194 switch (VT.SimpleTy) { 3195 case MVT::f16: return fastEmit_ARMISD_CMPFP_MVT_f16_rr(RetVT, Op0, Op1); 3196 case MVT::f32: return fastEmit_ARMISD_CMPFP_MVT_f32_rr(RetVT, Op0, Op1); 3197 case MVT::f64: return fastEmit_ARMISD_CMPFP_MVT_f64_rr(RetVT, Op0, Op1); 3198 default: return 0; 3199 } 3200} 3201 3202// FastEmit functions for ARMISD::CMPFPE. 3203 3204unsigned fastEmit_ARMISD_CMPFPE_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3205 if (RetVT.SimpleTy != MVT::isVoid) 3206 return 0; 3207 if ((Subtarget->hasFullFP16())) { 3208 return fastEmitInst_rr(ARM::VCMPEH, &ARM::HPRRegClass, Op0, Op1); 3209 } 3210 return 0; 3211} 3212 3213unsigned fastEmit_ARMISD_CMPFPE_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3214 if (RetVT.SimpleTy != MVT::isVoid) 3215 return 0; 3216 if ((Subtarget->hasVFP2Base())) { 3217 return fastEmitInst_rr(ARM::VCMPES, &ARM::SPRRegClass, Op0, Op1); 3218 } 3219 return 0; 3220} 3221 3222unsigned fastEmit_ARMISD_CMPFPE_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3223 if (RetVT.SimpleTy != MVT::isVoid) 3224 return 0; 3225 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 3226 return fastEmitInst_rr(ARM::VCMPED, &ARM::DPRRegClass, Op0, Op1); 3227 } 3228 return 0; 3229} 3230 3231unsigned fastEmit_ARMISD_CMPFPE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3232 switch (VT.SimpleTy) { 3233 case MVT::f16: return fastEmit_ARMISD_CMPFPE_MVT_f16_rr(RetVT, Op0, Op1); 3234 case MVT::f32: return fastEmit_ARMISD_CMPFPE_MVT_f32_rr(RetVT, Op0, Op1); 3235 case MVT::f64: return fastEmit_ARMISD_CMPFPE_MVT_f64_rr(RetVT, Op0, Op1); 3236 default: return 0; 3237 } 3238} 3239 3240// FastEmit functions for ARMISD::CMPZ. 3241 3242unsigned fastEmit_ARMISD_CMPZ_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3243 if (RetVT.SimpleTy != MVT::isVoid) 3244 return 0; 3245 if ((Subtarget->isThumb2())) { 3246 return fastEmitInst_rr(ARM::t2CMPrr, &ARM::GPRnopcRegClass, Op0, Op1); 3247 } 3248 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 3249 return fastEmitInst_rr(ARM::tCMPr, &ARM::tGPRRegClass, Op0, Op1); 3250 } 3251 if ((!Subtarget->isThumb())) { 3252 return fastEmitInst_rr(ARM::CMPrr, &ARM::GPRRegClass, Op0, Op1); 3253 } 3254 return 0; 3255} 3256 3257unsigned fastEmit_ARMISD_CMPZ_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3258 switch (VT.SimpleTy) { 3259 case MVT::i32: return fastEmit_ARMISD_CMPZ_MVT_i32_rr(RetVT, Op0, Op1); 3260 default: return 0; 3261 } 3262} 3263 3264// FastEmit functions for ARMISD::EH_SJLJ_LONGJMP. 3265 3266unsigned fastEmit_ARMISD_EH_SJLJ_LONGJMP_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3267 if (RetVT.SimpleTy != MVT::isVoid) 3268 return 0; 3269 if ((Subtarget->isThumb()) && (Subtarget->isTargetWindows())) { 3270 return fastEmitInst_rr(ARM::tInt_WIN_eh_sjlj_longjmp, &ARM::GPRRegClass, Op0, Op1); 3271 } 3272 if ((!Subtarget->isTargetWindows()) && (Subtarget->isThumb())) { 3273 return fastEmitInst_rr(ARM::tInt_eh_sjlj_longjmp, &ARM::tGPRRegClass, Op0, Op1); 3274 } 3275 if ((!Subtarget->isThumb())) { 3276 return fastEmitInst_rr(ARM::Int_eh_sjlj_longjmp, &ARM::GPRRegClass, Op0, Op1); 3277 } 3278 return 0; 3279} 3280 3281unsigned fastEmit_ARMISD_EH_SJLJ_LONGJMP_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3282 switch (VT.SimpleTy) { 3283 case MVT::i32: return fastEmit_ARMISD_EH_SJLJ_LONGJMP_MVT_i32_rr(RetVT, Op0, Op1); 3284 default: return 0; 3285 } 3286} 3287 3288// FastEmit functions for ARMISD::EH_SJLJ_SETJMP. 3289 3290unsigned fastEmit_ARMISD_EH_SJLJ_SETJMP_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3291 if (RetVT.SimpleTy != MVT::i32) 3292 return 0; 3293 if ((Subtarget->isThumb2()) && (!Subtarget->hasVFP2Base())) { 3294 return fastEmitInst_rr(ARM::t2Int_eh_sjlj_setjmp_nofp, &ARM::tGPRRegClass, Op0, Op1); 3295 } 3296 if ((Subtarget->hasVFP2Base()) && (Subtarget->isThumb2())) { 3297 return fastEmitInst_rr(ARM::t2Int_eh_sjlj_setjmp, &ARM::tGPRRegClass, Op0, Op1); 3298 } 3299 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 3300 return fastEmitInst_rr(ARM::tInt_eh_sjlj_setjmp, &ARM::tGPRRegClass, Op0, Op1); 3301 } 3302 if ((!Subtarget->isThumb()) && (!Subtarget->hasVFP2Base())) { 3303 return fastEmitInst_rr(ARM::Int_eh_sjlj_setjmp_nofp, &ARM::GPRRegClass, Op0, Op1); 3304 } 3305 if ((Subtarget->hasVFP2Base()) && (!Subtarget->isThumb())) { 3306 return fastEmitInst_rr(ARM::Int_eh_sjlj_setjmp, &ARM::GPRRegClass, Op0, Op1); 3307 } 3308 return 0; 3309} 3310 3311unsigned fastEmit_ARMISD_EH_SJLJ_SETJMP_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3312 switch (VT.SimpleTy) { 3313 case MVT::i32: return fastEmit_ARMISD_EH_SJLJ_SETJMP_MVT_i32_rr(RetVT, Op0, Op1); 3314 default: return 0; 3315 } 3316} 3317 3318// FastEmit functions for ARMISD::QADD16b. 3319 3320unsigned fastEmit_ARMISD_QADD16b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3321 if (RetVT.SimpleTy != MVT::i32) 3322 return 0; 3323 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3324 return fastEmitInst_rr(ARM::t2QADD16, &ARM::rGPRRegClass, Op0, Op1); 3325 } 3326 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3327 return fastEmitInst_rr(ARM::QADD16, &ARM::GPRnopcRegClass, Op0, Op1); 3328 } 3329 return 0; 3330} 3331 3332unsigned fastEmit_ARMISD_QADD16b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3333 switch (VT.SimpleTy) { 3334 case MVT::i32: return fastEmit_ARMISD_QADD16b_MVT_i32_rr(RetVT, Op0, Op1); 3335 default: return 0; 3336 } 3337} 3338 3339// FastEmit functions for ARMISD::QADD8b. 3340 3341unsigned fastEmit_ARMISD_QADD8b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3342 if (RetVT.SimpleTy != MVT::i32) 3343 return 0; 3344 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3345 return fastEmitInst_rr(ARM::t2QADD8, &ARM::rGPRRegClass, Op0, Op1); 3346 } 3347 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3348 return fastEmitInst_rr(ARM::QADD8, &ARM::GPRnopcRegClass, Op0, Op1); 3349 } 3350 return 0; 3351} 3352 3353unsigned fastEmit_ARMISD_QADD8b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3354 switch (VT.SimpleTy) { 3355 case MVT::i32: return fastEmit_ARMISD_QADD8b_MVT_i32_rr(RetVT, Op0, Op1); 3356 default: return 0; 3357 } 3358} 3359 3360// FastEmit functions for ARMISD::QSUB16b. 3361 3362unsigned fastEmit_ARMISD_QSUB16b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3363 if (RetVT.SimpleTy != MVT::i32) 3364 return 0; 3365 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3366 return fastEmitInst_rr(ARM::t2QSUB16, &ARM::rGPRRegClass, Op0, Op1); 3367 } 3368 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3369 return fastEmitInst_rr(ARM::QSUB16, &ARM::GPRnopcRegClass, Op0, Op1); 3370 } 3371 return 0; 3372} 3373 3374unsigned fastEmit_ARMISD_QSUB16b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3375 switch (VT.SimpleTy) { 3376 case MVT::i32: return fastEmit_ARMISD_QSUB16b_MVT_i32_rr(RetVT, Op0, Op1); 3377 default: return 0; 3378 } 3379} 3380 3381// FastEmit functions for ARMISD::QSUB8b. 3382 3383unsigned fastEmit_ARMISD_QSUB8b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3384 if (RetVT.SimpleTy != MVT::i32) 3385 return 0; 3386 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3387 return fastEmitInst_rr(ARM::t2QSUB8, &ARM::rGPRRegClass, Op0, Op1); 3388 } 3389 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3390 return fastEmitInst_rr(ARM::QSUB8, &ARM::GPRnopcRegClass, Op0, Op1); 3391 } 3392 return 0; 3393} 3394 3395unsigned fastEmit_ARMISD_QSUB8b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3396 switch (VT.SimpleTy) { 3397 case MVT::i32: return fastEmit_ARMISD_QSUB8b_MVT_i32_rr(RetVT, Op0, Op1); 3398 default: return 0; 3399 } 3400} 3401 3402// FastEmit functions for ARMISD::SMULWB. 3403 3404unsigned fastEmit_ARMISD_SMULWB_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3405 if (RetVT.SimpleTy != MVT::i32) 3406 return 0; 3407 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3408 return fastEmitInst_rr(ARM::t2SMULWB, &ARM::rGPRRegClass, Op0, Op1); 3409 } 3410 if ((Subtarget->hasV5TEOps()) && (!Subtarget->isThumb())) { 3411 return fastEmitInst_rr(ARM::SMULWB, &ARM::GPRRegClass, Op0, Op1); 3412 } 3413 return 0; 3414} 3415 3416unsigned fastEmit_ARMISD_SMULWB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3417 switch (VT.SimpleTy) { 3418 case MVT::i32: return fastEmit_ARMISD_SMULWB_MVT_i32_rr(RetVT, Op0, Op1); 3419 default: return 0; 3420 } 3421} 3422 3423// FastEmit functions for ARMISD::SMULWT. 3424 3425unsigned fastEmit_ARMISD_SMULWT_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3426 if (RetVT.SimpleTy != MVT::i32) 3427 return 0; 3428 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3429 return fastEmitInst_rr(ARM::t2SMULWT, &ARM::rGPRRegClass, Op0, Op1); 3430 } 3431 if ((Subtarget->hasV5TEOps()) && (!Subtarget->isThumb())) { 3432 return fastEmitInst_rr(ARM::SMULWT, &ARM::GPRRegClass, Op0, Op1); 3433 } 3434 return 0; 3435} 3436 3437unsigned fastEmit_ARMISD_SMULWT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3438 switch (VT.SimpleTy) { 3439 case MVT::i32: return fastEmit_ARMISD_SMULWT_MVT_i32_rr(RetVT, Op0, Op1); 3440 default: return 0; 3441 } 3442} 3443 3444// FastEmit functions for ARMISD::SUBS. 3445 3446unsigned fastEmit_ARMISD_SUBS_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3447 if (RetVT.SimpleTy != MVT::i32) 3448 return 0; 3449 if ((Subtarget->isThumb2())) { 3450 return fastEmitInst_rr(ARM::t2SUBSrr, &ARM::rGPRRegClass, Op0, Op1); 3451 } 3452 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 3453 return fastEmitInst_rr(ARM::tSUBSrr, &ARM::tGPRRegClass, Op0, Op1); 3454 } 3455 if ((!Subtarget->isThumb())) { 3456 return fastEmitInst_rr(ARM::SUBSrr, &ARM::GPRRegClass, Op0, Op1); 3457 } 3458 return 0; 3459} 3460 3461unsigned fastEmit_ARMISD_SUBS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3462 switch (VT.SimpleTy) { 3463 case MVT::i32: return fastEmit_ARMISD_SUBS_MVT_i32_rr(RetVT, Op0, Op1); 3464 default: return 0; 3465 } 3466} 3467 3468// FastEmit functions for ARMISD::UQADD16b. 3469 3470unsigned fastEmit_ARMISD_UQADD16b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3471 if (RetVT.SimpleTy != MVT::i32) 3472 return 0; 3473 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3474 return fastEmitInst_rr(ARM::t2UQADD16, &ARM::rGPRRegClass, Op0, Op1); 3475 } 3476 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3477 return fastEmitInst_rr(ARM::UQADD16, &ARM::GPRnopcRegClass, Op0, Op1); 3478 } 3479 return 0; 3480} 3481 3482unsigned fastEmit_ARMISD_UQADD16b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3483 switch (VT.SimpleTy) { 3484 case MVT::i32: return fastEmit_ARMISD_UQADD16b_MVT_i32_rr(RetVT, Op0, Op1); 3485 default: return 0; 3486 } 3487} 3488 3489// FastEmit functions for ARMISD::UQADD8b. 3490 3491unsigned fastEmit_ARMISD_UQADD8b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3492 if (RetVT.SimpleTy != MVT::i32) 3493 return 0; 3494 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3495 return fastEmitInst_rr(ARM::t2UQADD8, &ARM::rGPRRegClass, Op0, Op1); 3496 } 3497 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3498 return fastEmitInst_rr(ARM::UQADD8, &ARM::GPRnopcRegClass, Op0, Op1); 3499 } 3500 return 0; 3501} 3502 3503unsigned fastEmit_ARMISD_UQADD8b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3504 switch (VT.SimpleTy) { 3505 case MVT::i32: return fastEmit_ARMISD_UQADD8b_MVT_i32_rr(RetVT, Op0, Op1); 3506 default: return 0; 3507 } 3508} 3509 3510// FastEmit functions for ARMISD::UQSUB16b. 3511 3512unsigned fastEmit_ARMISD_UQSUB16b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3513 if (RetVT.SimpleTy != MVT::i32) 3514 return 0; 3515 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3516 return fastEmitInst_rr(ARM::t2UQSUB16, &ARM::rGPRRegClass, Op0, Op1); 3517 } 3518 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3519 return fastEmitInst_rr(ARM::UQSUB16, &ARM::GPRnopcRegClass, Op0, Op1); 3520 } 3521 return 0; 3522} 3523 3524unsigned fastEmit_ARMISD_UQSUB16b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3525 switch (VT.SimpleTy) { 3526 case MVT::i32: return fastEmit_ARMISD_UQSUB16b_MVT_i32_rr(RetVT, Op0, Op1); 3527 default: return 0; 3528 } 3529} 3530 3531// FastEmit functions for ARMISD::UQSUB8b. 3532 3533unsigned fastEmit_ARMISD_UQSUB8b_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3534 if (RetVT.SimpleTy != MVT::i32) 3535 return 0; 3536 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 3537 return fastEmitInst_rr(ARM::t2UQSUB8, &ARM::rGPRRegClass, Op0, Op1); 3538 } 3539 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 3540 return fastEmitInst_rr(ARM::UQSUB8, &ARM::GPRnopcRegClass, Op0, Op1); 3541 } 3542 return 0; 3543} 3544 3545unsigned fastEmit_ARMISD_UQSUB8b_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3546 switch (VT.SimpleTy) { 3547 case MVT::i32: return fastEmit_ARMISD_UQSUB8b_MVT_i32_rr(RetVT, Op0, Op1); 3548 default: return 0; 3549 } 3550} 3551 3552// FastEmit functions for ARMISD::VMLAVs. 3553 3554unsigned fastEmit_ARMISD_VMLAVs_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3555 if (RetVT.SimpleTy != MVT::i32) 3556 return 0; 3557 if ((Subtarget->hasMVEIntegerOps())) { 3558 return fastEmitInst_rr(ARM::MVE_VMLADAVs8, &ARM::tGPREvenRegClass, Op0, Op1); 3559 } 3560 return 0; 3561} 3562 3563unsigned fastEmit_ARMISD_VMLAVs_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3564 if (RetVT.SimpleTy != MVT::i32) 3565 return 0; 3566 if ((Subtarget->hasMVEIntegerOps())) { 3567 return fastEmitInst_rr(ARM::MVE_VMLADAVs16, &ARM::tGPREvenRegClass, Op0, Op1); 3568 } 3569 return 0; 3570} 3571 3572unsigned fastEmit_ARMISD_VMLAVs_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3573 switch (VT.SimpleTy) { 3574 case MVT::v16i8: return fastEmit_ARMISD_VMLAVs_MVT_v16i8_rr(RetVT, Op0, Op1); 3575 case MVT::v8i16: return fastEmit_ARMISD_VMLAVs_MVT_v8i16_rr(RetVT, Op0, Op1); 3576 default: return 0; 3577 } 3578} 3579 3580// FastEmit functions for ARMISD::VMLAVu. 3581 3582unsigned fastEmit_ARMISD_VMLAVu_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3583 if (RetVT.SimpleTy != MVT::i32) 3584 return 0; 3585 if ((Subtarget->hasMVEIntegerOps())) { 3586 return fastEmitInst_rr(ARM::MVE_VMLADAVu8, &ARM::tGPREvenRegClass, Op0, Op1); 3587 } 3588 return 0; 3589} 3590 3591unsigned fastEmit_ARMISD_VMLAVu_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3592 if (RetVT.SimpleTy != MVT::i32) 3593 return 0; 3594 if ((Subtarget->hasMVEIntegerOps())) { 3595 return fastEmitInst_rr(ARM::MVE_VMLADAVu16, &ARM::tGPREvenRegClass, Op0, Op1); 3596 } 3597 return 0; 3598} 3599 3600unsigned fastEmit_ARMISD_VMLAVu_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3601 switch (VT.SimpleTy) { 3602 case MVT::v16i8: return fastEmit_ARMISD_VMLAVu_MVT_v16i8_rr(RetVT, Op0, Op1); 3603 case MVT::v8i16: return fastEmit_ARMISD_VMLAVu_MVT_v8i16_rr(RetVT, Op0, Op1); 3604 default: return 0; 3605 } 3606} 3607 3608// FastEmit functions for ARMISD::VMOVDRR. 3609 3610unsigned fastEmit_ARMISD_VMOVDRR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3611 if (RetVT.SimpleTy != MVT::f64) 3612 return 0; 3613 if ((Subtarget->hasFPRegs())) { 3614 return fastEmitInst_rr(ARM::VMOVDRR, &ARM::DPRRegClass, Op0, Op1); 3615 } 3616 return 0; 3617} 3618 3619unsigned fastEmit_ARMISD_VMOVDRR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3620 switch (VT.SimpleTy) { 3621 case MVT::i32: return fastEmit_ARMISD_VMOVDRR_MVT_i32_rr(RetVT, Op0, Op1); 3622 default: return 0; 3623 } 3624} 3625 3626// FastEmit functions for ARMISD::VMULLs. 3627 3628unsigned fastEmit_ARMISD_VMULLs_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3629 if (RetVT.SimpleTy != MVT::v8i16) 3630 return 0; 3631 if ((Subtarget->hasNEON())) { 3632 return fastEmitInst_rr(ARM::VMULLsv8i16, &ARM::QPRRegClass, Op0, Op1); 3633 } 3634 return 0; 3635} 3636 3637unsigned fastEmit_ARMISD_VMULLs_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3638 if (RetVT.SimpleTy != MVT::v4i32) 3639 return 0; 3640 if ((Subtarget->hasNEON())) { 3641 return fastEmitInst_rr(ARM::VMULLsv4i32, &ARM::QPRRegClass, Op0, Op1); 3642 } 3643 return 0; 3644} 3645 3646unsigned fastEmit_ARMISD_VMULLs_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3647 if (RetVT.SimpleTy != MVT::v2i64) 3648 return 0; 3649 if ((Subtarget->hasNEON())) { 3650 return fastEmitInst_rr(ARM::VMULLsv2i64, &ARM::QPRRegClass, Op0, Op1); 3651 } 3652 return 0; 3653} 3654 3655unsigned fastEmit_ARMISD_VMULLs_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3656 if (RetVT.SimpleTy != MVT::v2i64) 3657 return 0; 3658 if ((Subtarget->hasMVEIntegerOps())) { 3659 return fastEmitInst_rr(ARM::MVE_VMULLBs32, &ARM::MQPRRegClass, Op0, Op1); 3660 } 3661 return 0; 3662} 3663 3664unsigned fastEmit_ARMISD_VMULLs_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3665 switch (VT.SimpleTy) { 3666 case MVT::v8i8: return fastEmit_ARMISD_VMULLs_MVT_v8i8_rr(RetVT, Op0, Op1); 3667 case MVT::v4i16: return fastEmit_ARMISD_VMULLs_MVT_v4i16_rr(RetVT, Op0, Op1); 3668 case MVT::v2i32: return fastEmit_ARMISD_VMULLs_MVT_v2i32_rr(RetVT, Op0, Op1); 3669 case MVT::v4i32: return fastEmit_ARMISD_VMULLs_MVT_v4i32_rr(RetVT, Op0, Op1); 3670 default: return 0; 3671 } 3672} 3673 3674// FastEmit functions for ARMISD::VMULLu. 3675 3676unsigned fastEmit_ARMISD_VMULLu_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3677 if (RetVT.SimpleTy != MVT::v8i16) 3678 return 0; 3679 if ((Subtarget->hasNEON())) { 3680 return fastEmitInst_rr(ARM::VMULLuv8i16, &ARM::QPRRegClass, Op0, Op1); 3681 } 3682 return 0; 3683} 3684 3685unsigned fastEmit_ARMISD_VMULLu_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3686 if (RetVT.SimpleTy != MVT::v4i32) 3687 return 0; 3688 if ((Subtarget->hasNEON())) { 3689 return fastEmitInst_rr(ARM::VMULLuv4i32, &ARM::QPRRegClass, Op0, Op1); 3690 } 3691 return 0; 3692} 3693 3694unsigned fastEmit_ARMISD_VMULLu_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3695 if (RetVT.SimpleTy != MVT::v2i64) 3696 return 0; 3697 if ((Subtarget->hasNEON())) { 3698 return fastEmitInst_rr(ARM::VMULLuv2i64, &ARM::QPRRegClass, Op0, Op1); 3699 } 3700 return 0; 3701} 3702 3703unsigned fastEmit_ARMISD_VMULLu_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3704 if (RetVT.SimpleTy != MVT::v2i64) 3705 return 0; 3706 if ((Subtarget->hasMVEIntegerOps())) { 3707 return fastEmitInst_rr(ARM::MVE_VMULLBu32, &ARM::MQPRRegClass, Op0, Op1); 3708 } 3709 return 0; 3710} 3711 3712unsigned fastEmit_ARMISD_VMULLu_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3713 switch (VT.SimpleTy) { 3714 case MVT::v8i8: return fastEmit_ARMISD_VMULLu_MVT_v8i8_rr(RetVT, Op0, Op1); 3715 case MVT::v4i16: return fastEmit_ARMISD_VMULLu_MVT_v4i16_rr(RetVT, Op0, Op1); 3716 case MVT::v2i32: return fastEmit_ARMISD_VMULLu_MVT_v2i32_rr(RetVT, Op0, Op1); 3717 case MVT::v4i32: return fastEmit_ARMISD_VMULLu_MVT_v4i32_rr(RetVT, Op0, Op1); 3718 default: return 0; 3719 } 3720} 3721 3722// FastEmit functions for ARMISD::VQDMULH. 3723 3724unsigned fastEmit_ARMISD_VQDMULH_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3725 if (RetVT.SimpleTy != MVT::v16i8) 3726 return 0; 3727 if ((Subtarget->hasMVEIntegerOps())) { 3728 return fastEmitInst_rr(ARM::MVE_VQDMULHi8, &ARM::MQPRRegClass, Op0, Op1); 3729 } 3730 return 0; 3731} 3732 3733unsigned fastEmit_ARMISD_VQDMULH_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3734 if (RetVT.SimpleTy != MVT::v8i16) 3735 return 0; 3736 if ((Subtarget->hasMVEIntegerOps())) { 3737 return fastEmitInst_rr(ARM::MVE_VQDMULHi16, &ARM::MQPRRegClass, Op0, Op1); 3738 } 3739 return 0; 3740} 3741 3742unsigned fastEmit_ARMISD_VQDMULH_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3743 if (RetVT.SimpleTy != MVT::v4i32) 3744 return 0; 3745 if ((Subtarget->hasMVEIntegerOps())) { 3746 return fastEmitInst_rr(ARM::MVE_VQDMULHi32, &ARM::MQPRRegClass, Op0, Op1); 3747 } 3748 return 0; 3749} 3750 3751unsigned fastEmit_ARMISD_VQDMULH_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3752 switch (VT.SimpleTy) { 3753 case MVT::v16i8: return fastEmit_ARMISD_VQDMULH_MVT_v16i8_rr(RetVT, Op0, Op1); 3754 case MVT::v8i16: return fastEmit_ARMISD_VQDMULH_MVT_v8i16_rr(RetVT, Op0, Op1); 3755 case MVT::v4i32: return fastEmit_ARMISD_VQDMULH_MVT_v4i32_rr(RetVT, Op0, Op1); 3756 default: return 0; 3757 } 3758} 3759 3760// FastEmit functions for ARMISD::VSHLs. 3761 3762unsigned fastEmit_ARMISD_VSHLs_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3763 if (RetVT.SimpleTy != MVT::v8i8) 3764 return 0; 3765 if ((Subtarget->hasNEON())) { 3766 return fastEmitInst_rr(ARM::VSHLsv8i8, &ARM::DPRRegClass, Op0, Op1); 3767 } 3768 return 0; 3769} 3770 3771unsigned fastEmit_ARMISD_VSHLs_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3772 if (RetVT.SimpleTy != MVT::v16i8) 3773 return 0; 3774 if ((Subtarget->hasMVEIntegerOps())) { 3775 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecs8, &ARM::MQPRRegClass, Op0, Op1); 3776 } 3777 if ((Subtarget->hasNEON())) { 3778 return fastEmitInst_rr(ARM::VSHLsv16i8, &ARM::QPRRegClass, Op0, Op1); 3779 } 3780 return 0; 3781} 3782 3783unsigned fastEmit_ARMISD_VSHLs_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3784 if (RetVT.SimpleTy != MVT::v4i16) 3785 return 0; 3786 if ((Subtarget->hasNEON())) { 3787 return fastEmitInst_rr(ARM::VSHLsv4i16, &ARM::DPRRegClass, Op0, Op1); 3788 } 3789 return 0; 3790} 3791 3792unsigned fastEmit_ARMISD_VSHLs_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3793 if (RetVT.SimpleTy != MVT::v8i16) 3794 return 0; 3795 if ((Subtarget->hasMVEIntegerOps())) { 3796 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecs16, &ARM::MQPRRegClass, Op0, Op1); 3797 } 3798 if ((Subtarget->hasNEON())) { 3799 return fastEmitInst_rr(ARM::VSHLsv8i16, &ARM::QPRRegClass, Op0, Op1); 3800 } 3801 return 0; 3802} 3803 3804unsigned fastEmit_ARMISD_VSHLs_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3805 if (RetVT.SimpleTy != MVT::v2i32) 3806 return 0; 3807 if ((Subtarget->hasNEON())) { 3808 return fastEmitInst_rr(ARM::VSHLsv2i32, &ARM::DPRRegClass, Op0, Op1); 3809 } 3810 return 0; 3811} 3812 3813unsigned fastEmit_ARMISD_VSHLs_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3814 if (RetVT.SimpleTy != MVT::v4i32) 3815 return 0; 3816 if ((Subtarget->hasMVEIntegerOps())) { 3817 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecs32, &ARM::MQPRRegClass, Op0, Op1); 3818 } 3819 if ((Subtarget->hasNEON())) { 3820 return fastEmitInst_rr(ARM::VSHLsv4i32, &ARM::QPRRegClass, Op0, Op1); 3821 } 3822 return 0; 3823} 3824 3825unsigned fastEmit_ARMISD_VSHLs_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3826 if (RetVT.SimpleTy != MVT::v1i64) 3827 return 0; 3828 if ((Subtarget->hasNEON())) { 3829 return fastEmitInst_rr(ARM::VSHLsv1i64, &ARM::DPRRegClass, Op0, Op1); 3830 } 3831 return 0; 3832} 3833 3834unsigned fastEmit_ARMISD_VSHLs_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3835 if (RetVT.SimpleTy != MVT::v2i64) 3836 return 0; 3837 if ((Subtarget->hasNEON())) { 3838 return fastEmitInst_rr(ARM::VSHLsv2i64, &ARM::QPRRegClass, Op0, Op1); 3839 } 3840 return 0; 3841} 3842 3843unsigned fastEmit_ARMISD_VSHLs_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3844 switch (VT.SimpleTy) { 3845 case MVT::v8i8: return fastEmit_ARMISD_VSHLs_MVT_v8i8_rr(RetVT, Op0, Op1); 3846 case MVT::v16i8: return fastEmit_ARMISD_VSHLs_MVT_v16i8_rr(RetVT, Op0, Op1); 3847 case MVT::v4i16: return fastEmit_ARMISD_VSHLs_MVT_v4i16_rr(RetVT, Op0, Op1); 3848 case MVT::v8i16: return fastEmit_ARMISD_VSHLs_MVT_v8i16_rr(RetVT, Op0, Op1); 3849 case MVT::v2i32: return fastEmit_ARMISD_VSHLs_MVT_v2i32_rr(RetVT, Op0, Op1); 3850 case MVT::v4i32: return fastEmit_ARMISD_VSHLs_MVT_v4i32_rr(RetVT, Op0, Op1); 3851 case MVT::v1i64: return fastEmit_ARMISD_VSHLs_MVT_v1i64_rr(RetVT, Op0, Op1); 3852 case MVT::v2i64: return fastEmit_ARMISD_VSHLs_MVT_v2i64_rr(RetVT, Op0, Op1); 3853 default: return 0; 3854 } 3855} 3856 3857// FastEmit functions for ARMISD::VSHLu. 3858 3859unsigned fastEmit_ARMISD_VSHLu_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3860 if (RetVT.SimpleTy != MVT::v8i8) 3861 return 0; 3862 if ((Subtarget->hasNEON())) { 3863 return fastEmitInst_rr(ARM::VSHLuv8i8, &ARM::DPRRegClass, Op0, Op1); 3864 } 3865 return 0; 3866} 3867 3868unsigned fastEmit_ARMISD_VSHLu_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3869 if (RetVT.SimpleTy != MVT::v16i8) 3870 return 0; 3871 if ((Subtarget->hasMVEIntegerOps())) { 3872 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecu8, &ARM::MQPRRegClass, Op0, Op1); 3873 } 3874 if ((Subtarget->hasNEON())) { 3875 return fastEmitInst_rr(ARM::VSHLuv16i8, &ARM::QPRRegClass, Op0, Op1); 3876 } 3877 return 0; 3878} 3879 3880unsigned fastEmit_ARMISD_VSHLu_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3881 if (RetVT.SimpleTy != MVT::v4i16) 3882 return 0; 3883 if ((Subtarget->hasNEON())) { 3884 return fastEmitInst_rr(ARM::VSHLuv4i16, &ARM::DPRRegClass, Op0, Op1); 3885 } 3886 return 0; 3887} 3888 3889unsigned fastEmit_ARMISD_VSHLu_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3890 if (RetVT.SimpleTy != MVT::v8i16) 3891 return 0; 3892 if ((Subtarget->hasMVEIntegerOps())) { 3893 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecu16, &ARM::MQPRRegClass, Op0, Op1); 3894 } 3895 if ((Subtarget->hasNEON())) { 3896 return fastEmitInst_rr(ARM::VSHLuv8i16, &ARM::QPRRegClass, Op0, Op1); 3897 } 3898 return 0; 3899} 3900 3901unsigned fastEmit_ARMISD_VSHLu_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3902 if (RetVT.SimpleTy != MVT::v2i32) 3903 return 0; 3904 if ((Subtarget->hasNEON())) { 3905 return fastEmitInst_rr(ARM::VSHLuv2i32, &ARM::DPRRegClass, Op0, Op1); 3906 } 3907 return 0; 3908} 3909 3910unsigned fastEmit_ARMISD_VSHLu_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3911 if (RetVT.SimpleTy != MVT::v4i32) 3912 return 0; 3913 if ((Subtarget->hasMVEIntegerOps())) { 3914 return fastEmitInst_rr(ARM::MVE_VSHL_by_vecu32, &ARM::MQPRRegClass, Op0, Op1); 3915 } 3916 if ((Subtarget->hasNEON())) { 3917 return fastEmitInst_rr(ARM::VSHLuv4i32, &ARM::QPRRegClass, Op0, Op1); 3918 } 3919 return 0; 3920} 3921 3922unsigned fastEmit_ARMISD_VSHLu_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3923 if (RetVT.SimpleTy != MVT::v1i64) 3924 return 0; 3925 if ((Subtarget->hasNEON())) { 3926 return fastEmitInst_rr(ARM::VSHLuv1i64, &ARM::DPRRegClass, Op0, Op1); 3927 } 3928 return 0; 3929} 3930 3931unsigned fastEmit_ARMISD_VSHLu_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3932 if (RetVT.SimpleTy != MVT::v2i64) 3933 return 0; 3934 if ((Subtarget->hasNEON())) { 3935 return fastEmitInst_rr(ARM::VSHLuv2i64, &ARM::QPRRegClass, Op0, Op1); 3936 } 3937 return 0; 3938} 3939 3940unsigned fastEmit_ARMISD_VSHLu_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3941 switch (VT.SimpleTy) { 3942 case MVT::v8i8: return fastEmit_ARMISD_VSHLu_MVT_v8i8_rr(RetVT, Op0, Op1); 3943 case MVT::v16i8: return fastEmit_ARMISD_VSHLu_MVT_v16i8_rr(RetVT, Op0, Op1); 3944 case MVT::v4i16: return fastEmit_ARMISD_VSHLu_MVT_v4i16_rr(RetVT, Op0, Op1); 3945 case MVT::v8i16: return fastEmit_ARMISD_VSHLu_MVT_v8i16_rr(RetVT, Op0, Op1); 3946 case MVT::v2i32: return fastEmit_ARMISD_VSHLu_MVT_v2i32_rr(RetVT, Op0, Op1); 3947 case MVT::v4i32: return fastEmit_ARMISD_VSHLu_MVT_v4i32_rr(RetVT, Op0, Op1); 3948 case MVT::v1i64: return fastEmit_ARMISD_VSHLu_MVT_v1i64_rr(RetVT, Op0, Op1); 3949 case MVT::v2i64: return fastEmit_ARMISD_VSHLu_MVT_v2i64_rr(RetVT, Op0, Op1); 3950 default: return 0; 3951 } 3952} 3953 3954// FastEmit functions for ARMISD::VTBL1. 3955 3956unsigned fastEmit_ARMISD_VTBL1_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3957 if (RetVT.SimpleTy != MVT::v8i8) 3958 return 0; 3959 if ((Subtarget->hasNEON())) { 3960 return fastEmitInst_rr(ARM::VTBL1, &ARM::DPRRegClass, Op0, Op1); 3961 } 3962 return 0; 3963} 3964 3965unsigned fastEmit_ARMISD_VTBL1_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 3966 switch (VT.SimpleTy) { 3967 case MVT::v8i8: return fastEmit_ARMISD_VTBL1_MVT_v8i8_rr(RetVT, Op0, Op1); 3968 default: return 0; 3969 } 3970} 3971 3972// FastEmit functions for ARMISD::VTST. 3973 3974unsigned fastEmit_ARMISD_VTST_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3975 if (RetVT.SimpleTy != MVT::v8i8) 3976 return 0; 3977 if ((Subtarget->hasNEON())) { 3978 return fastEmitInst_rr(ARM::VTSTv8i8, &ARM::DPRRegClass, Op0, Op1); 3979 } 3980 return 0; 3981} 3982 3983unsigned fastEmit_ARMISD_VTST_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3984 if (RetVT.SimpleTy != MVT::v16i8) 3985 return 0; 3986 if ((Subtarget->hasNEON())) { 3987 return fastEmitInst_rr(ARM::VTSTv16i8, &ARM::QPRRegClass, Op0, Op1); 3988 } 3989 return 0; 3990} 3991 3992unsigned fastEmit_ARMISD_VTST_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 3993 if (RetVT.SimpleTy != MVT::v4i16) 3994 return 0; 3995 if ((Subtarget->hasNEON())) { 3996 return fastEmitInst_rr(ARM::VTSTv4i16, &ARM::DPRRegClass, Op0, Op1); 3997 } 3998 return 0; 3999} 4000 4001unsigned fastEmit_ARMISD_VTST_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4002 if (RetVT.SimpleTy != MVT::v8i16) 4003 return 0; 4004 if ((Subtarget->hasNEON())) { 4005 return fastEmitInst_rr(ARM::VTSTv8i16, &ARM::QPRRegClass, Op0, Op1); 4006 } 4007 return 0; 4008} 4009 4010unsigned fastEmit_ARMISD_VTST_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4011 if (RetVT.SimpleTy != MVT::v2i32) 4012 return 0; 4013 if ((Subtarget->hasNEON())) { 4014 return fastEmitInst_rr(ARM::VTSTv2i32, &ARM::DPRRegClass, Op0, Op1); 4015 } 4016 return 0; 4017} 4018 4019unsigned fastEmit_ARMISD_VTST_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4020 if (RetVT.SimpleTy != MVT::v4i32) 4021 return 0; 4022 if ((Subtarget->hasNEON())) { 4023 return fastEmitInst_rr(ARM::VTSTv4i32, &ARM::QPRRegClass, Op0, Op1); 4024 } 4025 return 0; 4026} 4027 4028unsigned fastEmit_ARMISD_VTST_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4029 switch (VT.SimpleTy) { 4030 case MVT::v8i8: return fastEmit_ARMISD_VTST_MVT_v8i8_rr(RetVT, Op0, Op1); 4031 case MVT::v16i8: return fastEmit_ARMISD_VTST_MVT_v16i8_rr(RetVT, Op0, Op1); 4032 case MVT::v4i16: return fastEmit_ARMISD_VTST_MVT_v4i16_rr(RetVT, Op0, Op1); 4033 case MVT::v8i16: return fastEmit_ARMISD_VTST_MVT_v8i16_rr(RetVT, Op0, Op1); 4034 case MVT::v2i32: return fastEmit_ARMISD_VTST_MVT_v2i32_rr(RetVT, Op0, Op1); 4035 case MVT::v4i32: return fastEmit_ARMISD_VTST_MVT_v4i32_rr(RetVT, Op0, Op1); 4036 default: return 0; 4037 } 4038} 4039 4040// FastEmit functions for ISD::ABDS. 4041 4042unsigned fastEmit_ISD_ABDS_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4043 if (RetVT.SimpleTy != MVT::v16i8) 4044 return 0; 4045 if ((Subtarget->hasMVEIntegerOps())) { 4046 return fastEmitInst_rr(ARM::MVE_VABDs8, &ARM::MQPRRegClass, Op0, Op1); 4047 } 4048 return 0; 4049} 4050 4051unsigned fastEmit_ISD_ABDS_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4052 if (RetVT.SimpleTy != MVT::v8i16) 4053 return 0; 4054 if ((Subtarget->hasMVEIntegerOps())) { 4055 return fastEmitInst_rr(ARM::MVE_VABDs16, &ARM::MQPRRegClass, Op0, Op1); 4056 } 4057 return 0; 4058} 4059 4060unsigned fastEmit_ISD_ABDS_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4061 if (RetVT.SimpleTy != MVT::v4i32) 4062 return 0; 4063 if ((Subtarget->hasMVEIntegerOps())) { 4064 return fastEmitInst_rr(ARM::MVE_VABDs32, &ARM::MQPRRegClass, Op0, Op1); 4065 } 4066 return 0; 4067} 4068 4069unsigned fastEmit_ISD_ABDS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4070 switch (VT.SimpleTy) { 4071 case MVT::v16i8: return fastEmit_ISD_ABDS_MVT_v16i8_rr(RetVT, Op0, Op1); 4072 case MVT::v8i16: return fastEmit_ISD_ABDS_MVT_v8i16_rr(RetVT, Op0, Op1); 4073 case MVT::v4i32: return fastEmit_ISD_ABDS_MVT_v4i32_rr(RetVT, Op0, Op1); 4074 default: return 0; 4075 } 4076} 4077 4078// FastEmit functions for ISD::ABDU. 4079 4080unsigned fastEmit_ISD_ABDU_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4081 if (RetVT.SimpleTy != MVT::v16i8) 4082 return 0; 4083 if ((Subtarget->hasMVEIntegerOps())) { 4084 return fastEmitInst_rr(ARM::MVE_VABDu8, &ARM::MQPRRegClass, Op0, Op1); 4085 } 4086 return 0; 4087} 4088 4089unsigned fastEmit_ISD_ABDU_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4090 if (RetVT.SimpleTy != MVT::v8i16) 4091 return 0; 4092 if ((Subtarget->hasMVEIntegerOps())) { 4093 return fastEmitInst_rr(ARM::MVE_VABDu16, &ARM::MQPRRegClass, Op0, Op1); 4094 } 4095 return 0; 4096} 4097 4098unsigned fastEmit_ISD_ABDU_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4099 if (RetVT.SimpleTy != MVT::v4i32) 4100 return 0; 4101 if ((Subtarget->hasMVEIntegerOps())) { 4102 return fastEmitInst_rr(ARM::MVE_VABDu32, &ARM::MQPRRegClass, Op0, Op1); 4103 } 4104 return 0; 4105} 4106 4107unsigned fastEmit_ISD_ABDU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4108 switch (VT.SimpleTy) { 4109 case MVT::v16i8: return fastEmit_ISD_ABDU_MVT_v16i8_rr(RetVT, Op0, Op1); 4110 case MVT::v8i16: return fastEmit_ISD_ABDU_MVT_v8i16_rr(RetVT, Op0, Op1); 4111 case MVT::v4i32: return fastEmit_ISD_ABDU_MVT_v4i32_rr(RetVT, Op0, Op1); 4112 default: return 0; 4113 } 4114} 4115 4116// FastEmit functions for ISD::ADD. 4117 4118unsigned fastEmit_ISD_ADD_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4119 if (RetVT.SimpleTy != MVT::i32) 4120 return 0; 4121 if ((Subtarget->isThumb2())) { 4122 return fastEmitInst_rr(ARM::t2ADDrr, &ARM::GPRnopcRegClass, Op0, Op1); 4123 } 4124 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 4125 return fastEmitInst_rr(ARM::tADDrr, &ARM::tGPRRegClass, Op0, Op1); 4126 } 4127 if ((!Subtarget->isThumb())) { 4128 return fastEmitInst_rr(ARM::ADDrr, &ARM::GPRRegClass, Op0, Op1); 4129 } 4130 return 0; 4131} 4132 4133unsigned fastEmit_ISD_ADD_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4134 if (RetVT.SimpleTy != MVT::v8i8) 4135 return 0; 4136 if ((Subtarget->hasNEON())) { 4137 return fastEmitInst_rr(ARM::VADDv8i8, &ARM::DPRRegClass, Op0, Op1); 4138 } 4139 return 0; 4140} 4141 4142unsigned fastEmit_ISD_ADD_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4143 if (RetVT.SimpleTy != MVT::v16i8) 4144 return 0; 4145 if ((Subtarget->hasMVEIntegerOps())) { 4146 return fastEmitInst_rr(ARM::MVE_VADDi8, &ARM::MQPRRegClass, Op0, Op1); 4147 } 4148 if ((Subtarget->hasNEON())) { 4149 return fastEmitInst_rr(ARM::VADDv16i8, &ARM::QPRRegClass, Op0, Op1); 4150 } 4151 return 0; 4152} 4153 4154unsigned fastEmit_ISD_ADD_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4155 if (RetVT.SimpleTy != MVT::v4i16) 4156 return 0; 4157 if ((Subtarget->hasNEON())) { 4158 return fastEmitInst_rr(ARM::VADDv4i16, &ARM::DPRRegClass, Op0, Op1); 4159 } 4160 return 0; 4161} 4162 4163unsigned fastEmit_ISD_ADD_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4164 if (RetVT.SimpleTy != MVT::v8i16) 4165 return 0; 4166 if ((Subtarget->hasMVEIntegerOps())) { 4167 return fastEmitInst_rr(ARM::MVE_VADDi16, &ARM::MQPRRegClass, Op0, Op1); 4168 } 4169 if ((Subtarget->hasNEON())) { 4170 return fastEmitInst_rr(ARM::VADDv8i16, &ARM::QPRRegClass, Op0, Op1); 4171 } 4172 return 0; 4173} 4174 4175unsigned fastEmit_ISD_ADD_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4176 if (RetVT.SimpleTy != MVT::v2i32) 4177 return 0; 4178 if ((Subtarget->hasNEON())) { 4179 return fastEmitInst_rr(ARM::VADDv2i32, &ARM::DPRRegClass, Op0, Op1); 4180 } 4181 return 0; 4182} 4183 4184unsigned fastEmit_ISD_ADD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4185 if (RetVT.SimpleTy != MVT::v4i32) 4186 return 0; 4187 if ((Subtarget->hasMVEIntegerOps())) { 4188 return fastEmitInst_rr(ARM::MVE_VADDi32, &ARM::MQPRRegClass, Op0, Op1); 4189 } 4190 if ((Subtarget->hasNEON())) { 4191 return fastEmitInst_rr(ARM::VADDv4i32, &ARM::QPRRegClass, Op0, Op1); 4192 } 4193 return 0; 4194} 4195 4196unsigned fastEmit_ISD_ADD_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4197 if (RetVT.SimpleTy != MVT::v1i64) 4198 return 0; 4199 if ((Subtarget->hasNEON())) { 4200 return fastEmitInst_rr(ARM::VADDv1i64, &ARM::DPRRegClass, Op0, Op1); 4201 } 4202 return 0; 4203} 4204 4205unsigned fastEmit_ISD_ADD_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4206 if (RetVT.SimpleTy != MVT::v2i64) 4207 return 0; 4208 if ((Subtarget->hasNEON())) { 4209 return fastEmitInst_rr(ARM::VADDv2i64, &ARM::QPRRegClass, Op0, Op1); 4210 } 4211 return 0; 4212} 4213 4214unsigned fastEmit_ISD_ADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4215 switch (VT.SimpleTy) { 4216 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_rr(RetVT, Op0, Op1); 4217 case MVT::v8i8: return fastEmit_ISD_ADD_MVT_v8i8_rr(RetVT, Op0, Op1); 4218 case MVT::v16i8: return fastEmit_ISD_ADD_MVT_v16i8_rr(RetVT, Op0, Op1); 4219 case MVT::v4i16: return fastEmit_ISD_ADD_MVT_v4i16_rr(RetVT, Op0, Op1); 4220 case MVT::v8i16: return fastEmit_ISD_ADD_MVT_v8i16_rr(RetVT, Op0, Op1); 4221 case MVT::v2i32: return fastEmit_ISD_ADD_MVT_v2i32_rr(RetVT, Op0, Op1); 4222 case MVT::v4i32: return fastEmit_ISD_ADD_MVT_v4i32_rr(RetVT, Op0, Op1); 4223 case MVT::v1i64: return fastEmit_ISD_ADD_MVT_v1i64_rr(RetVT, Op0, Op1); 4224 case MVT::v2i64: return fastEmit_ISD_ADD_MVT_v2i64_rr(RetVT, Op0, Op1); 4225 default: return 0; 4226 } 4227} 4228 4229// FastEmit functions for ISD::AND. 4230 4231unsigned fastEmit_ISD_AND_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4232 if (RetVT.SimpleTy != MVT::i32) 4233 return 0; 4234 if ((Subtarget->isThumb2())) { 4235 return fastEmitInst_rr(ARM::t2ANDrr, &ARM::rGPRRegClass, Op0, Op1); 4236 } 4237 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 4238 return fastEmitInst_rr(ARM::tAND, &ARM::tGPRRegClass, Op0, Op1); 4239 } 4240 if ((!Subtarget->isThumb())) { 4241 return fastEmitInst_rr(ARM::ANDrr, &ARM::GPRRegClass, Op0, Op1); 4242 } 4243 return 0; 4244} 4245 4246unsigned fastEmit_ISD_AND_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4247 if (RetVT.SimpleTy != MVT::v8i8) 4248 return 0; 4249 if ((Subtarget->hasNEON())) { 4250 return fastEmitInst_rr(ARM::VANDd, &ARM::DPRRegClass, Op0, Op1); 4251 } 4252 return 0; 4253} 4254 4255unsigned fastEmit_ISD_AND_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4256 if (RetVT.SimpleTy != MVT::v16i8) 4257 return 0; 4258 if ((Subtarget->hasMVEIntegerOps())) { 4259 return fastEmitInst_rr(ARM::MVE_VAND, &ARM::MQPRRegClass, Op0, Op1); 4260 } 4261 if ((Subtarget->hasNEON())) { 4262 return fastEmitInst_rr(ARM::VANDq, &ARM::QPRRegClass, Op0, Op1); 4263 } 4264 return 0; 4265} 4266 4267unsigned fastEmit_ISD_AND_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4268 if (RetVT.SimpleTy != MVT::v4i16) 4269 return 0; 4270 if ((Subtarget->hasNEON())) { 4271 return fastEmitInst_rr(ARM::VANDd, &ARM::DPRRegClass, Op0, Op1); 4272 } 4273 return 0; 4274} 4275 4276unsigned fastEmit_ISD_AND_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4277 if (RetVT.SimpleTy != MVT::v8i16) 4278 return 0; 4279 if ((Subtarget->hasMVEIntegerOps())) { 4280 return fastEmitInst_rr(ARM::MVE_VAND, &ARM::MQPRRegClass, Op0, Op1); 4281 } 4282 if ((Subtarget->hasNEON())) { 4283 return fastEmitInst_rr(ARM::VANDq, &ARM::QPRRegClass, Op0, Op1); 4284 } 4285 return 0; 4286} 4287 4288unsigned fastEmit_ISD_AND_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4289 if (RetVT.SimpleTy != MVT::v2i32) 4290 return 0; 4291 if ((Subtarget->hasNEON())) { 4292 return fastEmitInst_rr(ARM::VANDd, &ARM::DPRRegClass, Op0, Op1); 4293 } 4294 return 0; 4295} 4296 4297unsigned fastEmit_ISD_AND_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4298 if (RetVT.SimpleTy != MVT::v4i32) 4299 return 0; 4300 if ((Subtarget->hasMVEIntegerOps())) { 4301 return fastEmitInst_rr(ARM::MVE_VAND, &ARM::MQPRRegClass, Op0, Op1); 4302 } 4303 if ((Subtarget->hasNEON())) { 4304 return fastEmitInst_rr(ARM::VANDq, &ARM::QPRRegClass, Op0, Op1); 4305 } 4306 return 0; 4307} 4308 4309unsigned fastEmit_ISD_AND_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4310 if (RetVT.SimpleTy != MVT::v1i64) 4311 return 0; 4312 if ((Subtarget->hasNEON())) { 4313 return fastEmitInst_rr(ARM::VANDd, &ARM::DPRRegClass, Op0, Op1); 4314 } 4315 return 0; 4316} 4317 4318unsigned fastEmit_ISD_AND_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4319 if (RetVT.SimpleTy != MVT::v2i64) 4320 return 0; 4321 if ((Subtarget->hasMVEIntegerOps())) { 4322 return fastEmitInst_rr(ARM::MVE_VAND, &ARM::MQPRRegClass, Op0, Op1); 4323 } 4324 if ((Subtarget->hasNEON())) { 4325 return fastEmitInst_rr(ARM::VANDq, &ARM::QPRRegClass, Op0, Op1); 4326 } 4327 return 0; 4328} 4329 4330unsigned fastEmit_ISD_AND_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4331 switch (VT.SimpleTy) { 4332 case MVT::i32: return fastEmit_ISD_AND_MVT_i32_rr(RetVT, Op0, Op1); 4333 case MVT::v8i8: return fastEmit_ISD_AND_MVT_v8i8_rr(RetVT, Op0, Op1); 4334 case MVT::v16i8: return fastEmit_ISD_AND_MVT_v16i8_rr(RetVT, Op0, Op1); 4335 case MVT::v4i16: return fastEmit_ISD_AND_MVT_v4i16_rr(RetVT, Op0, Op1); 4336 case MVT::v8i16: return fastEmit_ISD_AND_MVT_v8i16_rr(RetVT, Op0, Op1); 4337 case MVT::v2i32: return fastEmit_ISD_AND_MVT_v2i32_rr(RetVT, Op0, Op1); 4338 case MVT::v4i32: return fastEmit_ISD_AND_MVT_v4i32_rr(RetVT, Op0, Op1); 4339 case MVT::v1i64: return fastEmit_ISD_AND_MVT_v1i64_rr(RetVT, Op0, Op1); 4340 case MVT::v2i64: return fastEmit_ISD_AND_MVT_v2i64_rr(RetVT, Op0, Op1); 4341 default: return 0; 4342 } 4343} 4344 4345// FastEmit functions for ISD::AVGCEILS. 4346 4347unsigned fastEmit_ISD_AVGCEILS_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4348 if (RetVT.SimpleTy != MVT::v16i8) 4349 return 0; 4350 return fastEmitInst_rr(ARM::MVE_VRHADDs8, &ARM::MQPRRegClass, Op0, Op1); 4351} 4352 4353unsigned fastEmit_ISD_AVGCEILS_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4354 if (RetVT.SimpleTy != MVT::v8i16) 4355 return 0; 4356 return fastEmitInst_rr(ARM::MVE_VRHADDs16, &ARM::MQPRRegClass, Op0, Op1); 4357} 4358 4359unsigned fastEmit_ISD_AVGCEILS_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4360 if (RetVT.SimpleTy != MVT::v4i32) 4361 return 0; 4362 return fastEmitInst_rr(ARM::MVE_VRHADDs32, &ARM::MQPRRegClass, Op0, Op1); 4363} 4364 4365unsigned fastEmit_ISD_AVGCEILS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4366 switch (VT.SimpleTy) { 4367 case MVT::v16i8: return fastEmit_ISD_AVGCEILS_MVT_v16i8_rr(RetVT, Op0, Op1); 4368 case MVT::v8i16: return fastEmit_ISD_AVGCEILS_MVT_v8i16_rr(RetVT, Op0, Op1); 4369 case MVT::v4i32: return fastEmit_ISD_AVGCEILS_MVT_v4i32_rr(RetVT, Op0, Op1); 4370 default: return 0; 4371 } 4372} 4373 4374// FastEmit functions for ISD::AVGCEILU. 4375 4376unsigned fastEmit_ISD_AVGCEILU_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4377 if (RetVT.SimpleTy != MVT::v16i8) 4378 return 0; 4379 return fastEmitInst_rr(ARM::MVE_VRHADDu8, &ARM::MQPRRegClass, Op0, Op1); 4380} 4381 4382unsigned fastEmit_ISD_AVGCEILU_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4383 if (RetVT.SimpleTy != MVT::v8i16) 4384 return 0; 4385 return fastEmitInst_rr(ARM::MVE_VRHADDu16, &ARM::MQPRRegClass, Op0, Op1); 4386} 4387 4388unsigned fastEmit_ISD_AVGCEILU_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4389 if (RetVT.SimpleTy != MVT::v4i32) 4390 return 0; 4391 return fastEmitInst_rr(ARM::MVE_VRHADDu32, &ARM::MQPRRegClass, Op0, Op1); 4392} 4393 4394unsigned fastEmit_ISD_AVGCEILU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4395 switch (VT.SimpleTy) { 4396 case MVT::v16i8: return fastEmit_ISD_AVGCEILU_MVT_v16i8_rr(RetVT, Op0, Op1); 4397 case MVT::v8i16: return fastEmit_ISD_AVGCEILU_MVT_v8i16_rr(RetVT, Op0, Op1); 4398 case MVT::v4i32: return fastEmit_ISD_AVGCEILU_MVT_v4i32_rr(RetVT, Op0, Op1); 4399 default: return 0; 4400 } 4401} 4402 4403// FastEmit functions for ISD::AVGFLOORS. 4404 4405unsigned fastEmit_ISD_AVGFLOORS_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4406 if (RetVT.SimpleTy != MVT::v16i8) 4407 return 0; 4408 return fastEmitInst_rr(ARM::MVE_VHADDs8, &ARM::MQPRRegClass, Op0, Op1); 4409} 4410 4411unsigned fastEmit_ISD_AVGFLOORS_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4412 if (RetVT.SimpleTy != MVT::v8i16) 4413 return 0; 4414 return fastEmitInst_rr(ARM::MVE_VHADDs16, &ARM::MQPRRegClass, Op0, Op1); 4415} 4416 4417unsigned fastEmit_ISD_AVGFLOORS_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4418 if (RetVT.SimpleTy != MVT::v4i32) 4419 return 0; 4420 return fastEmitInst_rr(ARM::MVE_VHADDs32, &ARM::MQPRRegClass, Op0, Op1); 4421} 4422 4423unsigned fastEmit_ISD_AVGFLOORS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4424 switch (VT.SimpleTy) { 4425 case MVT::v16i8: return fastEmit_ISD_AVGFLOORS_MVT_v16i8_rr(RetVT, Op0, Op1); 4426 case MVT::v8i16: return fastEmit_ISD_AVGFLOORS_MVT_v8i16_rr(RetVT, Op0, Op1); 4427 case MVT::v4i32: return fastEmit_ISD_AVGFLOORS_MVT_v4i32_rr(RetVT, Op0, Op1); 4428 default: return 0; 4429 } 4430} 4431 4432// FastEmit functions for ISD::AVGFLOORU. 4433 4434unsigned fastEmit_ISD_AVGFLOORU_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4435 if (RetVT.SimpleTy != MVT::v16i8) 4436 return 0; 4437 return fastEmitInst_rr(ARM::MVE_VHADDu8, &ARM::MQPRRegClass, Op0, Op1); 4438} 4439 4440unsigned fastEmit_ISD_AVGFLOORU_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4441 if (RetVT.SimpleTy != MVT::v8i16) 4442 return 0; 4443 return fastEmitInst_rr(ARM::MVE_VHADDu16, &ARM::MQPRRegClass, Op0, Op1); 4444} 4445 4446unsigned fastEmit_ISD_AVGFLOORU_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4447 if (RetVT.SimpleTy != MVT::v4i32) 4448 return 0; 4449 return fastEmitInst_rr(ARM::MVE_VHADDu32, &ARM::MQPRRegClass, Op0, Op1); 4450} 4451 4452unsigned fastEmit_ISD_AVGFLOORU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4453 switch (VT.SimpleTy) { 4454 case MVT::v16i8: return fastEmit_ISD_AVGFLOORU_MVT_v16i8_rr(RetVT, Op0, Op1); 4455 case MVT::v8i16: return fastEmit_ISD_AVGFLOORU_MVT_v8i16_rr(RetVT, Op0, Op1); 4456 case MVT::v4i32: return fastEmit_ISD_AVGFLOORU_MVT_v4i32_rr(RetVT, Op0, Op1); 4457 default: return 0; 4458 } 4459} 4460 4461// FastEmit functions for ISD::FADD. 4462 4463unsigned fastEmit_ISD_FADD_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4464 if (RetVT.SimpleTy != MVT::f16) 4465 return 0; 4466 if ((Subtarget->hasFullFP16())) { 4467 return fastEmitInst_rr(ARM::VADDH, &ARM::HPRRegClass, Op0, Op1); 4468 } 4469 return 0; 4470} 4471 4472unsigned fastEmit_ISD_FADD_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4473 if (RetVT.SimpleTy != MVT::f32) 4474 return 0; 4475 if ((!Subtarget->useNEONForSinglePrecisionFP()) && (Subtarget->hasVFP2Base())) { 4476 return fastEmitInst_rr(ARM::VADDS, &ARM::SPRRegClass, Op0, Op1); 4477 } 4478 return 0; 4479} 4480 4481unsigned fastEmit_ISD_FADD_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4482 if (RetVT.SimpleTy != MVT::f64) 4483 return 0; 4484 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 4485 return fastEmitInst_rr(ARM::VADDD, &ARM::DPRRegClass, Op0, Op1); 4486 } 4487 return 0; 4488} 4489 4490unsigned fastEmit_ISD_FADD_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4491 if (RetVT.SimpleTy != MVT::v4f16) 4492 return 0; 4493 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4494 return fastEmitInst_rr(ARM::VADDhd, &ARM::DPRRegClass, Op0, Op1); 4495 } 4496 return 0; 4497} 4498 4499unsigned fastEmit_ISD_FADD_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4500 if (RetVT.SimpleTy != MVT::v8f16) 4501 return 0; 4502 if ((Subtarget->hasMVEFloatOps())) { 4503 return fastEmitInst_rr(ARM::MVE_VADDf16, &ARM::MQPRRegClass, Op0, Op1); 4504 } 4505 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4506 return fastEmitInst_rr(ARM::VADDhq, &ARM::QPRRegClass, Op0, Op1); 4507 } 4508 return 0; 4509} 4510 4511unsigned fastEmit_ISD_FADD_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4512 if (RetVT.SimpleTy != MVT::v2f32) 4513 return 0; 4514 if ((Subtarget->hasNEON())) { 4515 return fastEmitInst_rr(ARM::VADDfd, &ARM::DPRRegClass, Op0, Op1); 4516 } 4517 return 0; 4518} 4519 4520unsigned fastEmit_ISD_FADD_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4521 if (RetVT.SimpleTy != MVT::v4f32) 4522 return 0; 4523 if ((Subtarget->hasMVEFloatOps())) { 4524 return fastEmitInst_rr(ARM::MVE_VADDf32, &ARM::MQPRRegClass, Op0, Op1); 4525 } 4526 if ((Subtarget->hasNEON())) { 4527 return fastEmitInst_rr(ARM::VADDfq, &ARM::QPRRegClass, Op0, Op1); 4528 } 4529 return 0; 4530} 4531 4532unsigned fastEmit_ISD_FADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4533 switch (VT.SimpleTy) { 4534 case MVT::f16: return fastEmit_ISD_FADD_MVT_f16_rr(RetVT, Op0, Op1); 4535 case MVT::f32: return fastEmit_ISD_FADD_MVT_f32_rr(RetVT, Op0, Op1); 4536 case MVT::f64: return fastEmit_ISD_FADD_MVT_f64_rr(RetVT, Op0, Op1); 4537 case MVT::v4f16: return fastEmit_ISD_FADD_MVT_v4f16_rr(RetVT, Op0, Op1); 4538 case MVT::v8f16: return fastEmit_ISD_FADD_MVT_v8f16_rr(RetVT, Op0, Op1); 4539 case MVT::v2f32: return fastEmit_ISD_FADD_MVT_v2f32_rr(RetVT, Op0, Op1); 4540 case MVT::v4f32: return fastEmit_ISD_FADD_MVT_v4f32_rr(RetVT, Op0, Op1); 4541 default: return 0; 4542 } 4543} 4544 4545// FastEmit functions for ISD::FDIV. 4546 4547unsigned fastEmit_ISD_FDIV_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4548 if (RetVT.SimpleTy != MVT::f16) 4549 return 0; 4550 if ((Subtarget->hasFullFP16())) { 4551 return fastEmitInst_rr(ARM::VDIVH, &ARM::HPRRegClass, Op0, Op1); 4552 } 4553 return 0; 4554} 4555 4556unsigned fastEmit_ISD_FDIV_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4557 if (RetVT.SimpleTy != MVT::f32) 4558 return 0; 4559 if ((Subtarget->hasVFP2Base())) { 4560 return fastEmitInst_rr(ARM::VDIVS, &ARM::SPRRegClass, Op0, Op1); 4561 } 4562 return 0; 4563} 4564 4565unsigned fastEmit_ISD_FDIV_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4566 if (RetVT.SimpleTy != MVT::f64) 4567 return 0; 4568 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 4569 return fastEmitInst_rr(ARM::VDIVD, &ARM::DPRRegClass, Op0, Op1); 4570 } 4571 return 0; 4572} 4573 4574unsigned fastEmit_ISD_FDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4575 switch (VT.SimpleTy) { 4576 case MVT::f16: return fastEmit_ISD_FDIV_MVT_f16_rr(RetVT, Op0, Op1); 4577 case MVT::f32: return fastEmit_ISD_FDIV_MVT_f32_rr(RetVT, Op0, Op1); 4578 case MVT::f64: return fastEmit_ISD_FDIV_MVT_f64_rr(RetVT, Op0, Op1); 4579 default: return 0; 4580 } 4581} 4582 4583// FastEmit functions for ISD::FMAXIMUM. 4584 4585unsigned fastEmit_ISD_FMAXIMUM_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4586 if (RetVT.SimpleTy != MVT::v4f16) 4587 return 0; 4588 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4589 return fastEmitInst_rr(ARM::VMAXhd, &ARM::DPRRegClass, Op0, Op1); 4590 } 4591 return 0; 4592} 4593 4594unsigned fastEmit_ISD_FMAXIMUM_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4595 if (RetVT.SimpleTy != MVT::v8f16) 4596 return 0; 4597 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4598 return fastEmitInst_rr(ARM::VMAXhq, &ARM::QPRRegClass, Op0, Op1); 4599 } 4600 return 0; 4601} 4602 4603unsigned fastEmit_ISD_FMAXIMUM_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4604 if (RetVT.SimpleTy != MVT::v2f32) 4605 return 0; 4606 if ((Subtarget->hasNEON())) { 4607 return fastEmitInst_rr(ARM::VMAXfd, &ARM::DPRRegClass, Op0, Op1); 4608 } 4609 return 0; 4610} 4611 4612unsigned fastEmit_ISD_FMAXIMUM_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4613 if (RetVT.SimpleTy != MVT::v4f32) 4614 return 0; 4615 if ((Subtarget->hasNEON())) { 4616 return fastEmitInst_rr(ARM::VMAXfq, &ARM::QPRRegClass, Op0, Op1); 4617 } 4618 return 0; 4619} 4620 4621unsigned fastEmit_ISD_FMAXIMUM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4622 switch (VT.SimpleTy) { 4623 case MVT::v4f16: return fastEmit_ISD_FMAXIMUM_MVT_v4f16_rr(RetVT, Op0, Op1); 4624 case MVT::v8f16: return fastEmit_ISD_FMAXIMUM_MVT_v8f16_rr(RetVT, Op0, Op1); 4625 case MVT::v2f32: return fastEmit_ISD_FMAXIMUM_MVT_v2f32_rr(RetVT, Op0, Op1); 4626 case MVT::v4f32: return fastEmit_ISD_FMAXIMUM_MVT_v4f32_rr(RetVT, Op0, Op1); 4627 default: return 0; 4628 } 4629} 4630 4631// FastEmit functions for ISD::FMAXNUM. 4632 4633unsigned fastEmit_ISD_FMAXNUM_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4634 if (RetVT.SimpleTy != MVT::f16) 4635 return 0; 4636 if ((Subtarget->hasFullFP16())) { 4637 return fastEmitInst_rr(ARM::VFP_VMAXNMH, &ARM::HPRRegClass, Op0, Op1); 4638 } 4639 return 0; 4640} 4641 4642unsigned fastEmit_ISD_FMAXNUM_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4643 if (RetVT.SimpleTy != MVT::f32) 4644 return 0; 4645 if ((Subtarget->hasFPARMv8Base())) { 4646 return fastEmitInst_rr(ARM::VFP_VMAXNMS, &ARM::SPRRegClass, Op0, Op1); 4647 } 4648 return 0; 4649} 4650 4651unsigned fastEmit_ISD_FMAXNUM_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4652 if (RetVT.SimpleTy != MVT::f64) 4653 return 0; 4654 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 4655 return fastEmitInst_rr(ARM::VFP_VMAXNMD, &ARM::DPRRegClass, Op0, Op1); 4656 } 4657 return 0; 4658} 4659 4660unsigned fastEmit_ISD_FMAXNUM_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4661 if (RetVT.SimpleTy != MVT::v4f16) 4662 return 0; 4663 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4664 return fastEmitInst_rr(ARM::NEON_VMAXNMNDh, &ARM::DPRRegClass, Op0, Op1); 4665 } 4666 return 0; 4667} 4668 4669unsigned fastEmit_ISD_FMAXNUM_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4670 if (RetVT.SimpleTy != MVT::v8f16) 4671 return 0; 4672 if ((Subtarget->hasMVEFloatOps())) { 4673 return fastEmitInst_rr(ARM::MVE_VMAXNMf16, &ARM::MQPRRegClass, Op0, Op1); 4674 } 4675 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4676 return fastEmitInst_rr(ARM::NEON_VMAXNMNQh, &ARM::QPRRegClass, Op0, Op1); 4677 } 4678 return 0; 4679} 4680 4681unsigned fastEmit_ISD_FMAXNUM_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4682 if (RetVT.SimpleTy != MVT::v2f32) 4683 return 0; 4684 if ((Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4685 return fastEmitInst_rr(ARM::NEON_VMAXNMNDf, &ARM::DPRRegClass, Op0, Op1); 4686 } 4687 return 0; 4688} 4689 4690unsigned fastEmit_ISD_FMAXNUM_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4691 if (RetVT.SimpleTy != MVT::v4f32) 4692 return 0; 4693 if ((Subtarget->hasMVEFloatOps())) { 4694 return fastEmitInst_rr(ARM::MVE_VMAXNMf32, &ARM::MQPRRegClass, Op0, Op1); 4695 } 4696 if ((Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4697 return fastEmitInst_rr(ARM::NEON_VMAXNMNQf, &ARM::QPRRegClass, Op0, Op1); 4698 } 4699 return 0; 4700} 4701 4702unsigned fastEmit_ISD_FMAXNUM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4703 switch (VT.SimpleTy) { 4704 case MVT::f16: return fastEmit_ISD_FMAXNUM_MVT_f16_rr(RetVT, Op0, Op1); 4705 case MVT::f32: return fastEmit_ISD_FMAXNUM_MVT_f32_rr(RetVT, Op0, Op1); 4706 case MVT::f64: return fastEmit_ISD_FMAXNUM_MVT_f64_rr(RetVT, Op0, Op1); 4707 case MVT::v4f16: return fastEmit_ISD_FMAXNUM_MVT_v4f16_rr(RetVT, Op0, Op1); 4708 case MVT::v8f16: return fastEmit_ISD_FMAXNUM_MVT_v8f16_rr(RetVT, Op0, Op1); 4709 case MVT::v2f32: return fastEmit_ISD_FMAXNUM_MVT_v2f32_rr(RetVT, Op0, Op1); 4710 case MVT::v4f32: return fastEmit_ISD_FMAXNUM_MVT_v4f32_rr(RetVT, Op0, Op1); 4711 default: return 0; 4712 } 4713} 4714 4715// FastEmit functions for ISD::FMINIMUM. 4716 4717unsigned fastEmit_ISD_FMINIMUM_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4718 if (RetVT.SimpleTy != MVT::v4f16) 4719 return 0; 4720 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4721 return fastEmitInst_rr(ARM::VMINhd, &ARM::DPRRegClass, Op0, Op1); 4722 } 4723 return 0; 4724} 4725 4726unsigned fastEmit_ISD_FMINIMUM_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4727 if (RetVT.SimpleTy != MVT::v8f16) 4728 return 0; 4729 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4730 return fastEmitInst_rr(ARM::VMINhq, &ARM::QPRRegClass, Op0, Op1); 4731 } 4732 return 0; 4733} 4734 4735unsigned fastEmit_ISD_FMINIMUM_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4736 if (RetVT.SimpleTy != MVT::v2f32) 4737 return 0; 4738 if ((Subtarget->hasNEON())) { 4739 return fastEmitInst_rr(ARM::VMINfd, &ARM::DPRRegClass, Op0, Op1); 4740 } 4741 return 0; 4742} 4743 4744unsigned fastEmit_ISD_FMINIMUM_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4745 if (RetVT.SimpleTy != MVT::v4f32) 4746 return 0; 4747 if ((Subtarget->hasNEON())) { 4748 return fastEmitInst_rr(ARM::VMINfq, &ARM::QPRRegClass, Op0, Op1); 4749 } 4750 return 0; 4751} 4752 4753unsigned fastEmit_ISD_FMINIMUM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4754 switch (VT.SimpleTy) { 4755 case MVT::v4f16: return fastEmit_ISD_FMINIMUM_MVT_v4f16_rr(RetVT, Op0, Op1); 4756 case MVT::v8f16: return fastEmit_ISD_FMINIMUM_MVT_v8f16_rr(RetVT, Op0, Op1); 4757 case MVT::v2f32: return fastEmit_ISD_FMINIMUM_MVT_v2f32_rr(RetVT, Op0, Op1); 4758 case MVT::v4f32: return fastEmit_ISD_FMINIMUM_MVT_v4f32_rr(RetVT, Op0, Op1); 4759 default: return 0; 4760 } 4761} 4762 4763// FastEmit functions for ISD::FMINNUM. 4764 4765unsigned fastEmit_ISD_FMINNUM_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4766 if (RetVT.SimpleTy != MVT::f16) 4767 return 0; 4768 if ((Subtarget->hasFullFP16())) { 4769 return fastEmitInst_rr(ARM::VFP_VMINNMH, &ARM::HPRRegClass, Op0, Op1); 4770 } 4771 return 0; 4772} 4773 4774unsigned fastEmit_ISD_FMINNUM_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4775 if (RetVT.SimpleTy != MVT::f32) 4776 return 0; 4777 if ((Subtarget->hasFPARMv8Base())) { 4778 return fastEmitInst_rr(ARM::VFP_VMINNMS, &ARM::SPRRegClass, Op0, Op1); 4779 } 4780 return 0; 4781} 4782 4783unsigned fastEmit_ISD_FMINNUM_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4784 if (RetVT.SimpleTy != MVT::f64) 4785 return 0; 4786 if ((Subtarget->hasFP64()) && (Subtarget->hasFPARMv8Base())) { 4787 return fastEmitInst_rr(ARM::VFP_VMINNMD, &ARM::DPRRegClass, Op0, Op1); 4788 } 4789 return 0; 4790} 4791 4792unsigned fastEmit_ISD_FMINNUM_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4793 if (RetVT.SimpleTy != MVT::v4f16) 4794 return 0; 4795 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4796 return fastEmitInst_rr(ARM::NEON_VMINNMNDh, &ARM::DPRRegClass, Op0, Op1); 4797 } 4798 return 0; 4799} 4800 4801unsigned fastEmit_ISD_FMINNUM_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4802 if (RetVT.SimpleTy != MVT::v8f16) 4803 return 0; 4804 if ((Subtarget->hasMVEFloatOps())) { 4805 return fastEmitInst_rr(ARM::MVE_VMINNMf16, &ARM::MQPRRegClass, Op0, Op1); 4806 } 4807 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4808 return fastEmitInst_rr(ARM::NEON_VMINNMNQh, &ARM::QPRRegClass, Op0, Op1); 4809 } 4810 return 0; 4811} 4812 4813unsigned fastEmit_ISD_FMINNUM_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4814 if (RetVT.SimpleTy != MVT::v2f32) 4815 return 0; 4816 if ((Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4817 return fastEmitInst_rr(ARM::NEON_VMINNMNDf, &ARM::DPRRegClass, Op0, Op1); 4818 } 4819 return 0; 4820} 4821 4822unsigned fastEmit_ISD_FMINNUM_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4823 if (RetVT.SimpleTy != MVT::v4f32) 4824 return 0; 4825 if ((Subtarget->hasMVEFloatOps())) { 4826 return fastEmitInst_rr(ARM::MVE_VMINNMf32, &ARM::MQPRRegClass, Op0, Op1); 4827 } 4828 if ((Subtarget->hasNEON()) && (Subtarget->hasV8Ops())) { 4829 return fastEmitInst_rr(ARM::NEON_VMINNMNQf, &ARM::QPRRegClass, Op0, Op1); 4830 } 4831 return 0; 4832} 4833 4834unsigned fastEmit_ISD_FMINNUM_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4835 switch (VT.SimpleTy) { 4836 case MVT::f16: return fastEmit_ISD_FMINNUM_MVT_f16_rr(RetVT, Op0, Op1); 4837 case MVT::f32: return fastEmit_ISD_FMINNUM_MVT_f32_rr(RetVT, Op0, Op1); 4838 case MVT::f64: return fastEmit_ISD_FMINNUM_MVT_f64_rr(RetVT, Op0, Op1); 4839 case MVT::v4f16: return fastEmit_ISD_FMINNUM_MVT_v4f16_rr(RetVT, Op0, Op1); 4840 case MVT::v8f16: return fastEmit_ISD_FMINNUM_MVT_v8f16_rr(RetVT, Op0, Op1); 4841 case MVT::v2f32: return fastEmit_ISD_FMINNUM_MVT_v2f32_rr(RetVT, Op0, Op1); 4842 case MVT::v4f32: return fastEmit_ISD_FMINNUM_MVT_v4f32_rr(RetVT, Op0, Op1); 4843 default: return 0; 4844 } 4845} 4846 4847// FastEmit functions for ISD::FMUL. 4848 4849unsigned fastEmit_ISD_FMUL_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4850 if (RetVT.SimpleTy != MVT::f16) 4851 return 0; 4852 if ((Subtarget->hasFullFP16())) { 4853 return fastEmitInst_rr(ARM::VMULH, &ARM::HPRRegClass, Op0, Op1); 4854 } 4855 return 0; 4856} 4857 4858unsigned fastEmit_ISD_FMUL_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4859 if (RetVT.SimpleTy != MVT::f32) 4860 return 0; 4861 if ((!Subtarget->useNEONForSinglePrecisionFP()) && (Subtarget->hasVFP2Base())) { 4862 return fastEmitInst_rr(ARM::VMULS, &ARM::SPRRegClass, Op0, Op1); 4863 } 4864 return 0; 4865} 4866 4867unsigned fastEmit_ISD_FMUL_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4868 if (RetVT.SimpleTy != MVT::f64) 4869 return 0; 4870 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 4871 return fastEmitInst_rr(ARM::VMULD, &ARM::DPRRegClass, Op0, Op1); 4872 } 4873 return 0; 4874} 4875 4876unsigned fastEmit_ISD_FMUL_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4877 if (RetVT.SimpleTy != MVT::v4f16) 4878 return 0; 4879 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4880 return fastEmitInst_rr(ARM::VMULhd, &ARM::DPRRegClass, Op0, Op1); 4881 } 4882 return 0; 4883} 4884 4885unsigned fastEmit_ISD_FMUL_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4886 if (RetVT.SimpleTy != MVT::v8f16) 4887 return 0; 4888 if ((Subtarget->hasMVEFloatOps())) { 4889 return fastEmitInst_rr(ARM::MVE_VMULf16, &ARM::MQPRRegClass, Op0, Op1); 4890 } 4891 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4892 return fastEmitInst_rr(ARM::VMULhq, &ARM::QPRRegClass, Op0, Op1); 4893 } 4894 return 0; 4895} 4896 4897unsigned fastEmit_ISD_FMUL_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4898 if (RetVT.SimpleTy != MVT::v2f32) 4899 return 0; 4900 if ((Subtarget->hasNEON())) { 4901 return fastEmitInst_rr(ARM::VMULfd, &ARM::DPRRegClass, Op0, Op1); 4902 } 4903 return 0; 4904} 4905 4906unsigned fastEmit_ISD_FMUL_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4907 if (RetVT.SimpleTy != MVT::v4f32) 4908 return 0; 4909 if ((Subtarget->hasMVEFloatOps())) { 4910 return fastEmitInst_rr(ARM::MVE_VMULf32, &ARM::MQPRRegClass, Op0, Op1); 4911 } 4912 if ((Subtarget->hasNEON())) { 4913 return fastEmitInst_rr(ARM::VMULfq, &ARM::QPRRegClass, Op0, Op1); 4914 } 4915 return 0; 4916} 4917 4918unsigned fastEmit_ISD_FMUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 4919 switch (VT.SimpleTy) { 4920 case MVT::f16: return fastEmit_ISD_FMUL_MVT_f16_rr(RetVT, Op0, Op1); 4921 case MVT::f32: return fastEmit_ISD_FMUL_MVT_f32_rr(RetVT, Op0, Op1); 4922 case MVT::f64: return fastEmit_ISD_FMUL_MVT_f64_rr(RetVT, Op0, Op1); 4923 case MVT::v4f16: return fastEmit_ISD_FMUL_MVT_v4f16_rr(RetVT, Op0, Op1); 4924 case MVT::v8f16: return fastEmit_ISD_FMUL_MVT_v8f16_rr(RetVT, Op0, Op1); 4925 case MVT::v2f32: return fastEmit_ISD_FMUL_MVT_v2f32_rr(RetVT, Op0, Op1); 4926 case MVT::v4f32: return fastEmit_ISD_FMUL_MVT_v4f32_rr(RetVT, Op0, Op1); 4927 default: return 0; 4928 } 4929} 4930 4931// FastEmit functions for ISD::FSUB. 4932 4933unsigned fastEmit_ISD_FSUB_MVT_f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4934 if (RetVT.SimpleTy != MVT::f16) 4935 return 0; 4936 if ((Subtarget->hasFullFP16())) { 4937 return fastEmitInst_rr(ARM::VSUBH, &ARM::HPRRegClass, Op0, Op1); 4938 } 4939 return 0; 4940} 4941 4942unsigned fastEmit_ISD_FSUB_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4943 if (RetVT.SimpleTy != MVT::f32) 4944 return 0; 4945 if ((!Subtarget->useNEONForSinglePrecisionFP()) && (Subtarget->hasVFP2Base())) { 4946 return fastEmitInst_rr(ARM::VSUBS, &ARM::SPRRegClass, Op0, Op1); 4947 } 4948 return 0; 4949} 4950 4951unsigned fastEmit_ISD_FSUB_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4952 if (RetVT.SimpleTy != MVT::f64) 4953 return 0; 4954 if ((Subtarget->hasFP64()) && (Subtarget->hasVFP2Base())) { 4955 return fastEmitInst_rr(ARM::VSUBD, &ARM::DPRRegClass, Op0, Op1); 4956 } 4957 return 0; 4958} 4959 4960unsigned fastEmit_ISD_FSUB_MVT_v4f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4961 if (RetVT.SimpleTy != MVT::v4f16) 4962 return 0; 4963 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4964 return fastEmitInst_rr(ARM::VSUBhd, &ARM::DPRRegClass, Op0, Op1); 4965 } 4966 return 0; 4967} 4968 4969unsigned fastEmit_ISD_FSUB_MVT_v8f16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4970 if (RetVT.SimpleTy != MVT::v8f16) 4971 return 0; 4972 if ((Subtarget->hasMVEFloatOps())) { 4973 return fastEmitInst_rr(ARM::MVE_VSUBf16, &ARM::MQPRRegClass, Op0, Op1); 4974 } 4975 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 4976 return fastEmitInst_rr(ARM::VSUBhq, &ARM::QPRRegClass, Op0, Op1); 4977 } 4978 return 0; 4979} 4980 4981unsigned fastEmit_ISD_FSUB_MVT_v2f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4982 if (RetVT.SimpleTy != MVT::v2f32) 4983 return 0; 4984 if ((Subtarget->hasNEON())) { 4985 return fastEmitInst_rr(ARM::VSUBfd, &ARM::DPRRegClass, Op0, Op1); 4986 } 4987 return 0; 4988} 4989 4990unsigned fastEmit_ISD_FSUB_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 4991 if (RetVT.SimpleTy != MVT::v4f32) 4992 return 0; 4993 if ((Subtarget->hasMVEFloatOps())) { 4994 return fastEmitInst_rr(ARM::MVE_VSUBf32, &ARM::MQPRRegClass, Op0, Op1); 4995 } 4996 if ((Subtarget->hasNEON())) { 4997 return fastEmitInst_rr(ARM::VSUBfq, &ARM::QPRRegClass, Op0, Op1); 4998 } 4999 return 0; 5000} 5001 5002unsigned fastEmit_ISD_FSUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5003 switch (VT.SimpleTy) { 5004 case MVT::f16: return fastEmit_ISD_FSUB_MVT_f16_rr(RetVT, Op0, Op1); 5005 case MVT::f32: return fastEmit_ISD_FSUB_MVT_f32_rr(RetVT, Op0, Op1); 5006 case MVT::f64: return fastEmit_ISD_FSUB_MVT_f64_rr(RetVT, Op0, Op1); 5007 case MVT::v4f16: return fastEmit_ISD_FSUB_MVT_v4f16_rr(RetVT, Op0, Op1); 5008 case MVT::v8f16: return fastEmit_ISD_FSUB_MVT_v8f16_rr(RetVT, Op0, Op1); 5009 case MVT::v2f32: return fastEmit_ISD_FSUB_MVT_v2f32_rr(RetVT, Op0, Op1); 5010 case MVT::v4f32: return fastEmit_ISD_FSUB_MVT_v4f32_rr(RetVT, Op0, Op1); 5011 default: return 0; 5012 } 5013} 5014 5015// FastEmit functions for ISD::MUL. 5016 5017unsigned fastEmit_ISD_MUL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5018 if (RetVT.SimpleTy != MVT::i32) 5019 return 0; 5020 if ((Subtarget->isThumb2())) { 5021 return fastEmitInst_rr(ARM::t2MUL, &ARM::rGPRRegClass, Op0, Op1); 5022 } 5023 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5024 return fastEmitInst_rr(ARM::tMUL, &ARM::tGPRRegClass, Op0, Op1); 5025 } 5026 if ((!Subtarget->isThumb()) && (!Subtarget->hasV6Ops()) && (Subtarget->useMulOps())) { 5027 return fastEmitInst_rr(ARM::MULv5, &ARM::GPRnopcRegClass, Op0, Op1); 5028 } 5029 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 5030 return fastEmitInst_rr(ARM::MUL, &ARM::GPRnopcRegClass, Op0, Op1); 5031 } 5032 return 0; 5033} 5034 5035unsigned fastEmit_ISD_MUL_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5036 if (RetVT.SimpleTy != MVT::v8i8) 5037 return 0; 5038 if ((Subtarget->hasNEON())) { 5039 return fastEmitInst_rr(ARM::VMULv8i8, &ARM::DPRRegClass, Op0, Op1); 5040 } 5041 return 0; 5042} 5043 5044unsigned fastEmit_ISD_MUL_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5045 if (RetVT.SimpleTy != MVT::v16i8) 5046 return 0; 5047 if ((Subtarget->hasMVEIntegerOps())) { 5048 return fastEmitInst_rr(ARM::MVE_VMULi8, &ARM::MQPRRegClass, Op0, Op1); 5049 } 5050 if ((Subtarget->hasNEON())) { 5051 return fastEmitInst_rr(ARM::VMULv16i8, &ARM::QPRRegClass, Op0, Op1); 5052 } 5053 return 0; 5054} 5055 5056unsigned fastEmit_ISD_MUL_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5057 if (RetVT.SimpleTy != MVT::v4i16) 5058 return 0; 5059 if ((Subtarget->hasNEON())) { 5060 return fastEmitInst_rr(ARM::VMULv4i16, &ARM::DPRRegClass, Op0, Op1); 5061 } 5062 return 0; 5063} 5064 5065unsigned fastEmit_ISD_MUL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5066 if (RetVT.SimpleTy != MVT::v8i16) 5067 return 0; 5068 if ((Subtarget->hasMVEIntegerOps())) { 5069 return fastEmitInst_rr(ARM::MVE_VMULi16, &ARM::MQPRRegClass, Op0, Op1); 5070 } 5071 if ((Subtarget->hasNEON())) { 5072 return fastEmitInst_rr(ARM::VMULv8i16, &ARM::QPRRegClass, Op0, Op1); 5073 } 5074 return 0; 5075} 5076 5077unsigned fastEmit_ISD_MUL_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5078 if (RetVT.SimpleTy != MVT::v2i32) 5079 return 0; 5080 if ((Subtarget->hasNEON())) { 5081 return fastEmitInst_rr(ARM::VMULv2i32, &ARM::DPRRegClass, Op0, Op1); 5082 } 5083 return 0; 5084} 5085 5086unsigned fastEmit_ISD_MUL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5087 if (RetVT.SimpleTy != MVT::v4i32) 5088 return 0; 5089 if ((Subtarget->hasMVEIntegerOps())) { 5090 return fastEmitInst_rr(ARM::MVE_VMULi32, &ARM::MQPRRegClass, Op0, Op1); 5091 } 5092 if ((Subtarget->hasNEON())) { 5093 return fastEmitInst_rr(ARM::VMULv4i32, &ARM::QPRRegClass, Op0, Op1); 5094 } 5095 return 0; 5096} 5097 5098unsigned fastEmit_ISD_MUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5099 switch (VT.SimpleTy) { 5100 case MVT::i32: return fastEmit_ISD_MUL_MVT_i32_rr(RetVT, Op0, Op1); 5101 case MVT::v8i8: return fastEmit_ISD_MUL_MVT_v8i8_rr(RetVT, Op0, Op1); 5102 case MVT::v16i8: return fastEmit_ISD_MUL_MVT_v16i8_rr(RetVT, Op0, Op1); 5103 case MVT::v4i16: return fastEmit_ISD_MUL_MVT_v4i16_rr(RetVT, Op0, Op1); 5104 case MVT::v8i16: return fastEmit_ISD_MUL_MVT_v8i16_rr(RetVT, Op0, Op1); 5105 case MVT::v2i32: return fastEmit_ISD_MUL_MVT_v2i32_rr(RetVT, Op0, Op1); 5106 case MVT::v4i32: return fastEmit_ISD_MUL_MVT_v4i32_rr(RetVT, Op0, Op1); 5107 default: return 0; 5108 } 5109} 5110 5111// FastEmit functions for ISD::MULHS. 5112 5113unsigned fastEmit_ISD_MULHS_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5114 if (RetVT.SimpleTy != MVT::i32) 5115 return 0; 5116 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 5117 return fastEmitInst_rr(ARM::t2SMMUL, &ARM::rGPRRegClass, Op0, Op1); 5118 } 5119 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 5120 return fastEmitInst_rr(ARM::SMMUL, &ARM::GPRRegClass, Op0, Op1); 5121 } 5122 return 0; 5123} 5124 5125unsigned fastEmit_ISD_MULHS_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5126 if (RetVT.SimpleTy != MVT::v16i8) 5127 return 0; 5128 if ((Subtarget->hasMVEIntegerOps())) { 5129 return fastEmitInst_rr(ARM::MVE_VMULHs8, &ARM::MQPRRegClass, Op0, Op1); 5130 } 5131 return 0; 5132} 5133 5134unsigned fastEmit_ISD_MULHS_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5135 if (RetVT.SimpleTy != MVT::v8i16) 5136 return 0; 5137 if ((Subtarget->hasMVEIntegerOps())) { 5138 return fastEmitInst_rr(ARM::MVE_VMULHs16, &ARM::MQPRRegClass, Op0, Op1); 5139 } 5140 return 0; 5141} 5142 5143unsigned fastEmit_ISD_MULHS_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5144 if (RetVT.SimpleTy != MVT::v4i32) 5145 return 0; 5146 if ((Subtarget->hasMVEIntegerOps())) { 5147 return fastEmitInst_rr(ARM::MVE_VMULHs32, &ARM::MQPRRegClass, Op0, Op1); 5148 } 5149 return 0; 5150} 5151 5152unsigned fastEmit_ISD_MULHS_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5153 switch (VT.SimpleTy) { 5154 case MVT::i32: return fastEmit_ISD_MULHS_MVT_i32_rr(RetVT, Op0, Op1); 5155 case MVT::v16i8: return fastEmit_ISD_MULHS_MVT_v16i8_rr(RetVT, Op0, Op1); 5156 case MVT::v8i16: return fastEmit_ISD_MULHS_MVT_v8i16_rr(RetVT, Op0, Op1); 5157 case MVT::v4i32: return fastEmit_ISD_MULHS_MVT_v4i32_rr(RetVT, Op0, Op1); 5158 default: return 0; 5159 } 5160} 5161 5162// FastEmit functions for ISD::MULHU. 5163 5164unsigned fastEmit_ISD_MULHU_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5165 if (RetVT.SimpleTy != MVT::v16i8) 5166 return 0; 5167 if ((Subtarget->hasMVEIntegerOps())) { 5168 return fastEmitInst_rr(ARM::MVE_VMULHu8, &ARM::MQPRRegClass, Op0, Op1); 5169 } 5170 return 0; 5171} 5172 5173unsigned fastEmit_ISD_MULHU_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5174 if (RetVT.SimpleTy != MVT::v8i16) 5175 return 0; 5176 if ((Subtarget->hasMVEIntegerOps())) { 5177 return fastEmitInst_rr(ARM::MVE_VMULHu16, &ARM::MQPRRegClass, Op0, Op1); 5178 } 5179 return 0; 5180} 5181 5182unsigned fastEmit_ISD_MULHU_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5183 if (RetVT.SimpleTy != MVT::v4i32) 5184 return 0; 5185 if ((Subtarget->hasMVEIntegerOps())) { 5186 return fastEmitInst_rr(ARM::MVE_VMULHu32, &ARM::MQPRRegClass, Op0, Op1); 5187 } 5188 return 0; 5189} 5190 5191unsigned fastEmit_ISD_MULHU_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5192 switch (VT.SimpleTy) { 5193 case MVT::v16i8: return fastEmit_ISD_MULHU_MVT_v16i8_rr(RetVT, Op0, Op1); 5194 case MVT::v8i16: return fastEmit_ISD_MULHU_MVT_v8i16_rr(RetVT, Op0, Op1); 5195 case MVT::v4i32: return fastEmit_ISD_MULHU_MVT_v4i32_rr(RetVT, Op0, Op1); 5196 default: return 0; 5197 } 5198} 5199 5200// FastEmit functions for ISD::OR. 5201 5202unsigned fastEmit_ISD_OR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5203 if (RetVT.SimpleTy != MVT::i32) 5204 return 0; 5205 if ((Subtarget->isThumb2())) { 5206 return fastEmitInst_rr(ARM::t2ORRrr, &ARM::rGPRRegClass, Op0, Op1); 5207 } 5208 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5209 return fastEmitInst_rr(ARM::tORR, &ARM::tGPRRegClass, Op0, Op1); 5210 } 5211 if ((!Subtarget->isThumb())) { 5212 return fastEmitInst_rr(ARM::ORRrr, &ARM::GPRRegClass, Op0, Op1); 5213 } 5214 return 0; 5215} 5216 5217unsigned fastEmit_ISD_OR_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5218 if (RetVT.SimpleTy != MVT::v8i8) 5219 return 0; 5220 if ((Subtarget->hasNEON())) { 5221 return fastEmitInst_rr(ARM::VORRd, &ARM::DPRRegClass, Op0, Op1); 5222 } 5223 return 0; 5224} 5225 5226unsigned fastEmit_ISD_OR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5227 if (RetVT.SimpleTy != MVT::v16i8) 5228 return 0; 5229 if ((Subtarget->hasMVEIntegerOps())) { 5230 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op1); 5231 } 5232 if ((Subtarget->hasNEON())) { 5233 return fastEmitInst_rr(ARM::VORRq, &ARM::QPRRegClass, Op0, Op1); 5234 } 5235 return 0; 5236} 5237 5238unsigned fastEmit_ISD_OR_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5239 if (RetVT.SimpleTy != MVT::v4i16) 5240 return 0; 5241 if ((Subtarget->hasNEON())) { 5242 return fastEmitInst_rr(ARM::VORRd, &ARM::DPRRegClass, Op0, Op1); 5243 } 5244 return 0; 5245} 5246 5247unsigned fastEmit_ISD_OR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5248 if (RetVT.SimpleTy != MVT::v8i16) 5249 return 0; 5250 if ((Subtarget->hasMVEIntegerOps())) { 5251 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op1); 5252 } 5253 if ((Subtarget->hasNEON())) { 5254 return fastEmitInst_rr(ARM::VORRq, &ARM::QPRRegClass, Op0, Op1); 5255 } 5256 return 0; 5257} 5258 5259unsigned fastEmit_ISD_OR_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5260 if (RetVT.SimpleTy != MVT::v2i32) 5261 return 0; 5262 if ((Subtarget->hasNEON())) { 5263 return fastEmitInst_rr(ARM::VORRd, &ARM::DPRRegClass, Op0, Op1); 5264 } 5265 return 0; 5266} 5267 5268unsigned fastEmit_ISD_OR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5269 if (RetVT.SimpleTy != MVT::v4i32) 5270 return 0; 5271 if ((Subtarget->hasMVEIntegerOps())) { 5272 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op1); 5273 } 5274 if ((Subtarget->hasNEON())) { 5275 return fastEmitInst_rr(ARM::VORRq, &ARM::QPRRegClass, Op0, Op1); 5276 } 5277 return 0; 5278} 5279 5280unsigned fastEmit_ISD_OR_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5281 if (RetVT.SimpleTy != MVT::v1i64) 5282 return 0; 5283 if ((Subtarget->hasNEON())) { 5284 return fastEmitInst_rr(ARM::VORRd, &ARM::DPRRegClass, Op0, Op1); 5285 } 5286 return 0; 5287} 5288 5289unsigned fastEmit_ISD_OR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5290 if (RetVT.SimpleTy != MVT::v2i64) 5291 return 0; 5292 if ((Subtarget->hasMVEIntegerOps())) { 5293 return fastEmitInst_rr(ARM::MVE_VORR, &ARM::MQPRRegClass, Op0, Op1); 5294 } 5295 if ((Subtarget->hasNEON())) { 5296 return fastEmitInst_rr(ARM::VORRq, &ARM::QPRRegClass, Op0, Op1); 5297 } 5298 return 0; 5299} 5300 5301unsigned fastEmit_ISD_OR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5302 switch (VT.SimpleTy) { 5303 case MVT::i32: return fastEmit_ISD_OR_MVT_i32_rr(RetVT, Op0, Op1); 5304 case MVT::v8i8: return fastEmit_ISD_OR_MVT_v8i8_rr(RetVT, Op0, Op1); 5305 case MVT::v16i8: return fastEmit_ISD_OR_MVT_v16i8_rr(RetVT, Op0, Op1); 5306 case MVT::v4i16: return fastEmit_ISD_OR_MVT_v4i16_rr(RetVT, Op0, Op1); 5307 case MVT::v8i16: return fastEmit_ISD_OR_MVT_v8i16_rr(RetVT, Op0, Op1); 5308 case MVT::v2i32: return fastEmit_ISD_OR_MVT_v2i32_rr(RetVT, Op0, Op1); 5309 case MVT::v4i32: return fastEmit_ISD_OR_MVT_v4i32_rr(RetVT, Op0, Op1); 5310 case MVT::v1i64: return fastEmit_ISD_OR_MVT_v1i64_rr(RetVT, Op0, Op1); 5311 case MVT::v2i64: return fastEmit_ISD_OR_MVT_v2i64_rr(RetVT, Op0, Op1); 5312 default: return 0; 5313 } 5314} 5315 5316// FastEmit functions for ISD::ROTR. 5317 5318unsigned fastEmit_ISD_ROTR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5319 if (RetVT.SimpleTy != MVT::i32) 5320 return 0; 5321 if ((Subtarget->isThumb2())) { 5322 return fastEmitInst_rr(ARM::t2RORrr, &ARM::rGPRRegClass, Op0, Op1); 5323 } 5324 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5325 return fastEmitInst_rr(ARM::tROR, &ARM::tGPRRegClass, Op0, Op1); 5326 } 5327 return 0; 5328} 5329 5330unsigned fastEmit_ISD_ROTR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5331 switch (VT.SimpleTy) { 5332 case MVT::i32: return fastEmit_ISD_ROTR_MVT_i32_rr(RetVT, Op0, Op1); 5333 default: return 0; 5334 } 5335} 5336 5337// FastEmit functions for ISD::SADDSAT. 5338 5339unsigned fastEmit_ISD_SADDSAT_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5340 if (RetVT.SimpleTy != MVT::i32) 5341 return 0; 5342 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 5343 return fastEmitInst_rr(ARM::t2QADD, &ARM::rGPRRegClass, Op0, Op1); 5344 } 5345 if ((Subtarget->hasV5TEOps()) && (!Subtarget->isThumb())) { 5346 return fastEmitInst_rr(ARM::QADD, &ARM::GPRnopcRegClass, Op0, Op1); 5347 } 5348 return 0; 5349} 5350 5351unsigned fastEmit_ISD_SADDSAT_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5352 if (RetVT.SimpleTy != MVT::v8i8) 5353 return 0; 5354 if ((Subtarget->hasNEON())) { 5355 return fastEmitInst_rr(ARM::VQADDsv8i8, &ARM::DPRRegClass, Op0, Op1); 5356 } 5357 return 0; 5358} 5359 5360unsigned fastEmit_ISD_SADDSAT_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5361 if (RetVT.SimpleTy != MVT::v16i8) 5362 return 0; 5363 if ((Subtarget->hasMVEIntegerOps())) { 5364 return fastEmitInst_rr(ARM::MVE_VQADDs8, &ARM::MQPRRegClass, Op0, Op1); 5365 } 5366 if ((Subtarget->hasNEON())) { 5367 return fastEmitInst_rr(ARM::VQADDsv16i8, &ARM::QPRRegClass, Op0, Op1); 5368 } 5369 return 0; 5370} 5371 5372unsigned fastEmit_ISD_SADDSAT_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5373 if (RetVT.SimpleTy != MVT::v4i16) 5374 return 0; 5375 if ((Subtarget->hasNEON())) { 5376 return fastEmitInst_rr(ARM::VQADDsv4i16, &ARM::DPRRegClass, Op0, Op1); 5377 } 5378 return 0; 5379} 5380 5381unsigned fastEmit_ISD_SADDSAT_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5382 if (RetVT.SimpleTy != MVT::v8i16) 5383 return 0; 5384 if ((Subtarget->hasMVEIntegerOps())) { 5385 return fastEmitInst_rr(ARM::MVE_VQADDs16, &ARM::MQPRRegClass, Op0, Op1); 5386 } 5387 if ((Subtarget->hasNEON())) { 5388 return fastEmitInst_rr(ARM::VQADDsv8i16, &ARM::QPRRegClass, Op0, Op1); 5389 } 5390 return 0; 5391} 5392 5393unsigned fastEmit_ISD_SADDSAT_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5394 if (RetVT.SimpleTy != MVT::v2i32) 5395 return 0; 5396 if ((Subtarget->hasNEON())) { 5397 return fastEmitInst_rr(ARM::VQADDsv2i32, &ARM::DPRRegClass, Op0, Op1); 5398 } 5399 return 0; 5400} 5401 5402unsigned fastEmit_ISD_SADDSAT_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5403 if (RetVT.SimpleTy != MVT::v4i32) 5404 return 0; 5405 if ((Subtarget->hasMVEIntegerOps())) { 5406 return fastEmitInst_rr(ARM::MVE_VQADDs32, &ARM::MQPRRegClass, Op0, Op1); 5407 } 5408 if ((Subtarget->hasNEON())) { 5409 return fastEmitInst_rr(ARM::VQADDsv4i32, &ARM::QPRRegClass, Op0, Op1); 5410 } 5411 return 0; 5412} 5413 5414unsigned fastEmit_ISD_SADDSAT_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5415 if (RetVT.SimpleTy != MVT::v1i64) 5416 return 0; 5417 if ((Subtarget->hasNEON())) { 5418 return fastEmitInst_rr(ARM::VQADDsv1i64, &ARM::DPRRegClass, Op0, Op1); 5419 } 5420 return 0; 5421} 5422 5423unsigned fastEmit_ISD_SADDSAT_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5424 if (RetVT.SimpleTy != MVT::v2i64) 5425 return 0; 5426 if ((Subtarget->hasNEON())) { 5427 return fastEmitInst_rr(ARM::VQADDsv2i64, &ARM::QPRRegClass, Op0, Op1); 5428 } 5429 return 0; 5430} 5431 5432unsigned fastEmit_ISD_SADDSAT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5433 switch (VT.SimpleTy) { 5434 case MVT::i32: return fastEmit_ISD_SADDSAT_MVT_i32_rr(RetVT, Op0, Op1); 5435 case MVT::v8i8: return fastEmit_ISD_SADDSAT_MVT_v8i8_rr(RetVT, Op0, Op1); 5436 case MVT::v16i8: return fastEmit_ISD_SADDSAT_MVT_v16i8_rr(RetVT, Op0, Op1); 5437 case MVT::v4i16: return fastEmit_ISD_SADDSAT_MVT_v4i16_rr(RetVT, Op0, Op1); 5438 case MVT::v8i16: return fastEmit_ISD_SADDSAT_MVT_v8i16_rr(RetVT, Op0, Op1); 5439 case MVT::v2i32: return fastEmit_ISD_SADDSAT_MVT_v2i32_rr(RetVT, Op0, Op1); 5440 case MVT::v4i32: return fastEmit_ISD_SADDSAT_MVT_v4i32_rr(RetVT, Op0, Op1); 5441 case MVT::v1i64: return fastEmit_ISD_SADDSAT_MVT_v1i64_rr(RetVT, Op0, Op1); 5442 case MVT::v2i64: return fastEmit_ISD_SADDSAT_MVT_v2i64_rr(RetVT, Op0, Op1); 5443 default: return 0; 5444 } 5445} 5446 5447// FastEmit functions for ISD::SDIV. 5448 5449unsigned fastEmit_ISD_SDIV_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5450 if (RetVT.SimpleTy != MVT::i32) 5451 return 0; 5452 if ((Subtarget->hasDivideInThumbMode()) && (Subtarget->hasV8MBaselineOps()) && (Subtarget->isThumb())) { 5453 return fastEmitInst_rr(ARM::t2SDIV, &ARM::rGPRRegClass, Op0, Op1); 5454 } 5455 if ((Subtarget->hasDivideInARMMode()) && (!Subtarget->isThumb())) { 5456 return fastEmitInst_rr(ARM::SDIV, &ARM::GPRRegClass, Op0, Op1); 5457 } 5458 return 0; 5459} 5460 5461unsigned fastEmit_ISD_SDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5462 switch (VT.SimpleTy) { 5463 case MVT::i32: return fastEmit_ISD_SDIV_MVT_i32_rr(RetVT, Op0, Op1); 5464 default: return 0; 5465 } 5466} 5467 5468// FastEmit functions for ISD::SHL. 5469 5470unsigned fastEmit_ISD_SHL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5471 if (RetVT.SimpleTy != MVT::i32) 5472 return 0; 5473 if ((Subtarget->isThumb2())) { 5474 return fastEmitInst_rr(ARM::t2LSLrr, &ARM::rGPRRegClass, Op0, Op1); 5475 } 5476 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5477 return fastEmitInst_rr(ARM::tLSLrr, &ARM::tGPRRegClass, Op0, Op1); 5478 } 5479 return 0; 5480} 5481 5482unsigned fastEmit_ISD_SHL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5483 switch (VT.SimpleTy) { 5484 case MVT::i32: return fastEmit_ISD_SHL_MVT_i32_rr(RetVT, Op0, Op1); 5485 default: return 0; 5486 } 5487} 5488 5489// FastEmit functions for ISD::SMAX. 5490 5491unsigned fastEmit_ISD_SMAX_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5492 if (RetVT.SimpleTy != MVT::v8i8) 5493 return 0; 5494 if ((Subtarget->hasNEON())) { 5495 return fastEmitInst_rr(ARM::VMAXsv8i8, &ARM::DPRRegClass, Op0, Op1); 5496 } 5497 return 0; 5498} 5499 5500unsigned fastEmit_ISD_SMAX_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5501 if (RetVT.SimpleTy != MVT::v16i8) 5502 return 0; 5503 if ((Subtarget->hasMVEIntegerOps())) { 5504 return fastEmitInst_rr(ARM::MVE_VMAXs8, &ARM::MQPRRegClass, Op0, Op1); 5505 } 5506 if ((Subtarget->hasNEON())) { 5507 return fastEmitInst_rr(ARM::VMAXsv16i8, &ARM::QPRRegClass, Op0, Op1); 5508 } 5509 return 0; 5510} 5511 5512unsigned fastEmit_ISD_SMAX_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5513 if (RetVT.SimpleTy != MVT::v4i16) 5514 return 0; 5515 if ((Subtarget->hasNEON())) { 5516 return fastEmitInst_rr(ARM::VMAXsv4i16, &ARM::DPRRegClass, Op0, Op1); 5517 } 5518 return 0; 5519} 5520 5521unsigned fastEmit_ISD_SMAX_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5522 if (RetVT.SimpleTy != MVT::v8i16) 5523 return 0; 5524 if ((Subtarget->hasMVEIntegerOps())) { 5525 return fastEmitInst_rr(ARM::MVE_VMAXs16, &ARM::MQPRRegClass, Op0, Op1); 5526 } 5527 if ((Subtarget->hasNEON())) { 5528 return fastEmitInst_rr(ARM::VMAXsv8i16, &ARM::QPRRegClass, Op0, Op1); 5529 } 5530 return 0; 5531} 5532 5533unsigned fastEmit_ISD_SMAX_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5534 if (RetVT.SimpleTy != MVT::v2i32) 5535 return 0; 5536 if ((Subtarget->hasNEON())) { 5537 return fastEmitInst_rr(ARM::VMAXsv2i32, &ARM::DPRRegClass, Op0, Op1); 5538 } 5539 return 0; 5540} 5541 5542unsigned fastEmit_ISD_SMAX_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5543 if (RetVT.SimpleTy != MVT::v4i32) 5544 return 0; 5545 if ((Subtarget->hasMVEIntegerOps())) { 5546 return fastEmitInst_rr(ARM::MVE_VMAXs32, &ARM::MQPRRegClass, Op0, Op1); 5547 } 5548 if ((Subtarget->hasNEON())) { 5549 return fastEmitInst_rr(ARM::VMAXsv4i32, &ARM::QPRRegClass, Op0, Op1); 5550 } 5551 return 0; 5552} 5553 5554unsigned fastEmit_ISD_SMAX_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5555 switch (VT.SimpleTy) { 5556 case MVT::v8i8: return fastEmit_ISD_SMAX_MVT_v8i8_rr(RetVT, Op0, Op1); 5557 case MVT::v16i8: return fastEmit_ISD_SMAX_MVT_v16i8_rr(RetVT, Op0, Op1); 5558 case MVT::v4i16: return fastEmit_ISD_SMAX_MVT_v4i16_rr(RetVT, Op0, Op1); 5559 case MVT::v8i16: return fastEmit_ISD_SMAX_MVT_v8i16_rr(RetVT, Op0, Op1); 5560 case MVT::v2i32: return fastEmit_ISD_SMAX_MVT_v2i32_rr(RetVT, Op0, Op1); 5561 case MVT::v4i32: return fastEmit_ISD_SMAX_MVT_v4i32_rr(RetVT, Op0, Op1); 5562 default: return 0; 5563 } 5564} 5565 5566// FastEmit functions for ISD::SMIN. 5567 5568unsigned fastEmit_ISD_SMIN_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5569 if (RetVT.SimpleTy != MVT::v8i8) 5570 return 0; 5571 if ((Subtarget->hasNEON())) { 5572 return fastEmitInst_rr(ARM::VMINsv8i8, &ARM::DPRRegClass, Op0, Op1); 5573 } 5574 return 0; 5575} 5576 5577unsigned fastEmit_ISD_SMIN_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5578 if (RetVT.SimpleTy != MVT::v16i8) 5579 return 0; 5580 if ((Subtarget->hasMVEIntegerOps())) { 5581 return fastEmitInst_rr(ARM::MVE_VMINs8, &ARM::MQPRRegClass, Op0, Op1); 5582 } 5583 if ((Subtarget->hasNEON())) { 5584 return fastEmitInst_rr(ARM::VMINsv16i8, &ARM::QPRRegClass, Op0, Op1); 5585 } 5586 return 0; 5587} 5588 5589unsigned fastEmit_ISD_SMIN_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5590 if (RetVT.SimpleTy != MVT::v4i16) 5591 return 0; 5592 if ((Subtarget->hasNEON())) { 5593 return fastEmitInst_rr(ARM::VMINsv4i16, &ARM::DPRRegClass, Op0, Op1); 5594 } 5595 return 0; 5596} 5597 5598unsigned fastEmit_ISD_SMIN_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5599 if (RetVT.SimpleTy != MVT::v8i16) 5600 return 0; 5601 if ((Subtarget->hasMVEIntegerOps())) { 5602 return fastEmitInst_rr(ARM::MVE_VMINs16, &ARM::MQPRRegClass, Op0, Op1); 5603 } 5604 if ((Subtarget->hasNEON())) { 5605 return fastEmitInst_rr(ARM::VMINsv8i16, &ARM::QPRRegClass, Op0, Op1); 5606 } 5607 return 0; 5608} 5609 5610unsigned fastEmit_ISD_SMIN_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5611 if (RetVT.SimpleTy != MVT::v2i32) 5612 return 0; 5613 if ((Subtarget->hasNEON())) { 5614 return fastEmitInst_rr(ARM::VMINsv2i32, &ARM::DPRRegClass, Op0, Op1); 5615 } 5616 return 0; 5617} 5618 5619unsigned fastEmit_ISD_SMIN_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5620 if (RetVT.SimpleTy != MVT::v4i32) 5621 return 0; 5622 if ((Subtarget->hasMVEIntegerOps())) { 5623 return fastEmitInst_rr(ARM::MVE_VMINs32, &ARM::MQPRRegClass, Op0, Op1); 5624 } 5625 if ((Subtarget->hasNEON())) { 5626 return fastEmitInst_rr(ARM::VMINsv4i32, &ARM::QPRRegClass, Op0, Op1); 5627 } 5628 return 0; 5629} 5630 5631unsigned fastEmit_ISD_SMIN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5632 switch (VT.SimpleTy) { 5633 case MVT::v8i8: return fastEmit_ISD_SMIN_MVT_v8i8_rr(RetVT, Op0, Op1); 5634 case MVT::v16i8: return fastEmit_ISD_SMIN_MVT_v16i8_rr(RetVT, Op0, Op1); 5635 case MVT::v4i16: return fastEmit_ISD_SMIN_MVT_v4i16_rr(RetVT, Op0, Op1); 5636 case MVT::v8i16: return fastEmit_ISD_SMIN_MVT_v8i16_rr(RetVT, Op0, Op1); 5637 case MVT::v2i32: return fastEmit_ISD_SMIN_MVT_v2i32_rr(RetVT, Op0, Op1); 5638 case MVT::v4i32: return fastEmit_ISD_SMIN_MVT_v4i32_rr(RetVT, Op0, Op1); 5639 default: return 0; 5640 } 5641} 5642 5643// FastEmit functions for ISD::SRA. 5644 5645unsigned fastEmit_ISD_SRA_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5646 if (RetVT.SimpleTy != MVT::i32) 5647 return 0; 5648 if ((Subtarget->isThumb2())) { 5649 return fastEmitInst_rr(ARM::t2ASRrr, &ARM::rGPRRegClass, Op0, Op1); 5650 } 5651 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5652 return fastEmitInst_rr(ARM::tASRrr, &ARM::tGPRRegClass, Op0, Op1); 5653 } 5654 return 0; 5655} 5656 5657unsigned fastEmit_ISD_SRA_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5658 switch (VT.SimpleTy) { 5659 case MVT::i32: return fastEmit_ISD_SRA_MVT_i32_rr(RetVT, Op0, Op1); 5660 default: return 0; 5661 } 5662} 5663 5664// FastEmit functions for ISD::SRL. 5665 5666unsigned fastEmit_ISD_SRL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5667 if (RetVT.SimpleTy != MVT::i32) 5668 return 0; 5669 if ((Subtarget->isThumb2())) { 5670 return fastEmitInst_rr(ARM::t2LSRrr, &ARM::rGPRRegClass, Op0, Op1); 5671 } 5672 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5673 return fastEmitInst_rr(ARM::tLSRrr, &ARM::tGPRRegClass, Op0, Op1); 5674 } 5675 return 0; 5676} 5677 5678unsigned fastEmit_ISD_SRL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5679 switch (VT.SimpleTy) { 5680 case MVT::i32: return fastEmit_ISD_SRL_MVT_i32_rr(RetVT, Op0, Op1); 5681 default: return 0; 5682 } 5683} 5684 5685// FastEmit functions for ISD::SSUBSAT. 5686 5687unsigned fastEmit_ISD_SSUBSAT_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5688 if (RetVT.SimpleTy != MVT::i32) 5689 return 0; 5690 if ((Subtarget->hasDSP()) && (Subtarget->isThumb2())) { 5691 return fastEmitInst_rr(ARM::t2QSUB, &ARM::rGPRRegClass, Op0, Op1); 5692 } 5693 if ((Subtarget->hasV5TEOps()) && (!Subtarget->isThumb())) { 5694 return fastEmitInst_rr(ARM::QSUB, &ARM::GPRnopcRegClass, Op0, Op1); 5695 } 5696 return 0; 5697} 5698 5699unsigned fastEmit_ISD_SSUBSAT_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5700 if (RetVT.SimpleTy != MVT::v8i8) 5701 return 0; 5702 if ((Subtarget->hasNEON())) { 5703 return fastEmitInst_rr(ARM::VQSUBsv8i8, &ARM::DPRRegClass, Op0, Op1); 5704 } 5705 return 0; 5706} 5707 5708unsigned fastEmit_ISD_SSUBSAT_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5709 if (RetVT.SimpleTy != MVT::v16i8) 5710 return 0; 5711 if ((Subtarget->hasMVEIntegerOps())) { 5712 return fastEmitInst_rr(ARM::MVE_VQSUBs8, &ARM::MQPRRegClass, Op0, Op1); 5713 } 5714 if ((Subtarget->hasNEON())) { 5715 return fastEmitInst_rr(ARM::VQSUBsv16i8, &ARM::QPRRegClass, Op0, Op1); 5716 } 5717 return 0; 5718} 5719 5720unsigned fastEmit_ISD_SSUBSAT_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5721 if (RetVT.SimpleTy != MVT::v4i16) 5722 return 0; 5723 if ((Subtarget->hasNEON())) { 5724 return fastEmitInst_rr(ARM::VQSUBsv4i16, &ARM::DPRRegClass, Op0, Op1); 5725 } 5726 return 0; 5727} 5728 5729unsigned fastEmit_ISD_SSUBSAT_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5730 if (RetVT.SimpleTy != MVT::v8i16) 5731 return 0; 5732 if ((Subtarget->hasMVEIntegerOps())) { 5733 return fastEmitInst_rr(ARM::MVE_VQSUBs16, &ARM::MQPRRegClass, Op0, Op1); 5734 } 5735 if ((Subtarget->hasNEON())) { 5736 return fastEmitInst_rr(ARM::VQSUBsv8i16, &ARM::QPRRegClass, Op0, Op1); 5737 } 5738 return 0; 5739} 5740 5741unsigned fastEmit_ISD_SSUBSAT_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5742 if (RetVT.SimpleTy != MVT::v2i32) 5743 return 0; 5744 if ((Subtarget->hasNEON())) { 5745 return fastEmitInst_rr(ARM::VQSUBsv2i32, &ARM::DPRRegClass, Op0, Op1); 5746 } 5747 return 0; 5748} 5749 5750unsigned fastEmit_ISD_SSUBSAT_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5751 if (RetVT.SimpleTy != MVT::v4i32) 5752 return 0; 5753 if ((Subtarget->hasMVEIntegerOps())) { 5754 return fastEmitInst_rr(ARM::MVE_VQSUBs32, &ARM::MQPRRegClass, Op0, Op1); 5755 } 5756 if ((Subtarget->hasNEON())) { 5757 return fastEmitInst_rr(ARM::VQSUBsv4i32, &ARM::QPRRegClass, Op0, Op1); 5758 } 5759 return 0; 5760} 5761 5762unsigned fastEmit_ISD_SSUBSAT_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5763 if (RetVT.SimpleTy != MVT::v1i64) 5764 return 0; 5765 if ((Subtarget->hasNEON())) { 5766 return fastEmitInst_rr(ARM::VQSUBsv1i64, &ARM::DPRRegClass, Op0, Op1); 5767 } 5768 return 0; 5769} 5770 5771unsigned fastEmit_ISD_SSUBSAT_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5772 if (RetVT.SimpleTy != MVT::v2i64) 5773 return 0; 5774 if ((Subtarget->hasNEON())) { 5775 return fastEmitInst_rr(ARM::VQSUBsv2i64, &ARM::QPRRegClass, Op0, Op1); 5776 } 5777 return 0; 5778} 5779 5780unsigned fastEmit_ISD_SSUBSAT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5781 switch (VT.SimpleTy) { 5782 case MVT::i32: return fastEmit_ISD_SSUBSAT_MVT_i32_rr(RetVT, Op0, Op1); 5783 case MVT::v8i8: return fastEmit_ISD_SSUBSAT_MVT_v8i8_rr(RetVT, Op0, Op1); 5784 case MVT::v16i8: return fastEmit_ISD_SSUBSAT_MVT_v16i8_rr(RetVT, Op0, Op1); 5785 case MVT::v4i16: return fastEmit_ISD_SSUBSAT_MVT_v4i16_rr(RetVT, Op0, Op1); 5786 case MVT::v8i16: return fastEmit_ISD_SSUBSAT_MVT_v8i16_rr(RetVT, Op0, Op1); 5787 case MVT::v2i32: return fastEmit_ISD_SSUBSAT_MVT_v2i32_rr(RetVT, Op0, Op1); 5788 case MVT::v4i32: return fastEmit_ISD_SSUBSAT_MVT_v4i32_rr(RetVT, Op0, Op1); 5789 case MVT::v1i64: return fastEmit_ISD_SSUBSAT_MVT_v1i64_rr(RetVT, Op0, Op1); 5790 case MVT::v2i64: return fastEmit_ISD_SSUBSAT_MVT_v2i64_rr(RetVT, Op0, Op1); 5791 default: return 0; 5792 } 5793} 5794 5795// FastEmit functions for ISD::SUB. 5796 5797unsigned fastEmit_ISD_SUB_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5798 if (RetVT.SimpleTy != MVT::i32) 5799 return 0; 5800 if ((Subtarget->isThumb2())) { 5801 return fastEmitInst_rr(ARM::t2SUBrr, &ARM::GPRnopcRegClass, Op0, Op1); 5802 } 5803 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 5804 return fastEmitInst_rr(ARM::tSUBrr, &ARM::tGPRRegClass, Op0, Op1); 5805 } 5806 if ((!Subtarget->isThumb())) { 5807 return fastEmitInst_rr(ARM::SUBrr, &ARM::GPRRegClass, Op0, Op1); 5808 } 5809 return 0; 5810} 5811 5812unsigned fastEmit_ISD_SUB_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5813 if (RetVT.SimpleTy != MVT::v8i8) 5814 return 0; 5815 if ((Subtarget->hasNEON())) { 5816 return fastEmitInst_rr(ARM::VSUBv8i8, &ARM::DPRRegClass, Op0, Op1); 5817 } 5818 return 0; 5819} 5820 5821unsigned fastEmit_ISD_SUB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5822 if (RetVT.SimpleTy != MVT::v16i8) 5823 return 0; 5824 if ((Subtarget->hasMVEIntegerOps())) { 5825 return fastEmitInst_rr(ARM::MVE_VSUBi8, &ARM::MQPRRegClass, Op0, Op1); 5826 } 5827 if ((Subtarget->hasNEON())) { 5828 return fastEmitInst_rr(ARM::VSUBv16i8, &ARM::QPRRegClass, Op0, Op1); 5829 } 5830 return 0; 5831} 5832 5833unsigned fastEmit_ISD_SUB_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5834 if (RetVT.SimpleTy != MVT::v4i16) 5835 return 0; 5836 if ((Subtarget->hasNEON())) { 5837 return fastEmitInst_rr(ARM::VSUBv4i16, &ARM::DPRRegClass, Op0, Op1); 5838 } 5839 return 0; 5840} 5841 5842unsigned fastEmit_ISD_SUB_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5843 if (RetVT.SimpleTy != MVT::v8i16) 5844 return 0; 5845 if ((Subtarget->hasMVEIntegerOps())) { 5846 return fastEmitInst_rr(ARM::MVE_VSUBi16, &ARM::MQPRRegClass, Op0, Op1); 5847 } 5848 if ((Subtarget->hasNEON())) { 5849 return fastEmitInst_rr(ARM::VSUBv8i16, &ARM::QPRRegClass, Op0, Op1); 5850 } 5851 return 0; 5852} 5853 5854unsigned fastEmit_ISD_SUB_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5855 if (RetVT.SimpleTy != MVT::v2i32) 5856 return 0; 5857 if ((Subtarget->hasNEON())) { 5858 return fastEmitInst_rr(ARM::VSUBv2i32, &ARM::DPRRegClass, Op0, Op1); 5859 } 5860 return 0; 5861} 5862 5863unsigned fastEmit_ISD_SUB_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5864 if (RetVT.SimpleTy != MVT::v4i32) 5865 return 0; 5866 if ((Subtarget->hasMVEIntegerOps())) { 5867 return fastEmitInst_rr(ARM::MVE_VSUBi32, &ARM::MQPRRegClass, Op0, Op1); 5868 } 5869 if ((Subtarget->hasNEON())) { 5870 return fastEmitInst_rr(ARM::VSUBv4i32, &ARM::QPRRegClass, Op0, Op1); 5871 } 5872 return 0; 5873} 5874 5875unsigned fastEmit_ISD_SUB_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5876 if (RetVT.SimpleTy != MVT::v1i64) 5877 return 0; 5878 if ((Subtarget->hasNEON())) { 5879 return fastEmitInst_rr(ARM::VSUBv1i64, &ARM::DPRRegClass, Op0, Op1); 5880 } 5881 return 0; 5882} 5883 5884unsigned fastEmit_ISD_SUB_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5885 if (RetVT.SimpleTy != MVT::v2i64) 5886 return 0; 5887 if ((Subtarget->hasNEON())) { 5888 return fastEmitInst_rr(ARM::VSUBv2i64, &ARM::QPRRegClass, Op0, Op1); 5889 } 5890 return 0; 5891} 5892 5893unsigned fastEmit_ISD_SUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5894 switch (VT.SimpleTy) { 5895 case MVT::i32: return fastEmit_ISD_SUB_MVT_i32_rr(RetVT, Op0, Op1); 5896 case MVT::v8i8: return fastEmit_ISD_SUB_MVT_v8i8_rr(RetVT, Op0, Op1); 5897 case MVT::v16i8: return fastEmit_ISD_SUB_MVT_v16i8_rr(RetVT, Op0, Op1); 5898 case MVT::v4i16: return fastEmit_ISD_SUB_MVT_v4i16_rr(RetVT, Op0, Op1); 5899 case MVT::v8i16: return fastEmit_ISD_SUB_MVT_v8i16_rr(RetVT, Op0, Op1); 5900 case MVT::v2i32: return fastEmit_ISD_SUB_MVT_v2i32_rr(RetVT, Op0, Op1); 5901 case MVT::v4i32: return fastEmit_ISD_SUB_MVT_v4i32_rr(RetVT, Op0, Op1); 5902 case MVT::v1i64: return fastEmit_ISD_SUB_MVT_v1i64_rr(RetVT, Op0, Op1); 5903 case MVT::v2i64: return fastEmit_ISD_SUB_MVT_v2i64_rr(RetVT, Op0, Op1); 5904 default: return 0; 5905 } 5906} 5907 5908// FastEmit functions for ISD::UADDSAT. 5909 5910unsigned fastEmit_ISD_UADDSAT_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5911 if (RetVT.SimpleTy != MVT::v8i8) 5912 return 0; 5913 if ((Subtarget->hasNEON())) { 5914 return fastEmitInst_rr(ARM::VQADDuv8i8, &ARM::DPRRegClass, Op0, Op1); 5915 } 5916 return 0; 5917} 5918 5919unsigned fastEmit_ISD_UADDSAT_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5920 if (RetVT.SimpleTy != MVT::v16i8) 5921 return 0; 5922 if ((Subtarget->hasMVEIntegerOps())) { 5923 return fastEmitInst_rr(ARM::MVE_VQADDu8, &ARM::MQPRRegClass, Op0, Op1); 5924 } 5925 if ((Subtarget->hasNEON())) { 5926 return fastEmitInst_rr(ARM::VQADDuv16i8, &ARM::QPRRegClass, Op0, Op1); 5927 } 5928 return 0; 5929} 5930 5931unsigned fastEmit_ISD_UADDSAT_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5932 if (RetVT.SimpleTy != MVT::v4i16) 5933 return 0; 5934 if ((Subtarget->hasNEON())) { 5935 return fastEmitInst_rr(ARM::VQADDuv4i16, &ARM::DPRRegClass, Op0, Op1); 5936 } 5937 return 0; 5938} 5939 5940unsigned fastEmit_ISD_UADDSAT_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5941 if (RetVT.SimpleTy != MVT::v8i16) 5942 return 0; 5943 if ((Subtarget->hasMVEIntegerOps())) { 5944 return fastEmitInst_rr(ARM::MVE_VQADDu16, &ARM::MQPRRegClass, Op0, Op1); 5945 } 5946 if ((Subtarget->hasNEON())) { 5947 return fastEmitInst_rr(ARM::VQADDuv8i16, &ARM::QPRRegClass, Op0, Op1); 5948 } 5949 return 0; 5950} 5951 5952unsigned fastEmit_ISD_UADDSAT_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5953 if (RetVT.SimpleTy != MVT::v2i32) 5954 return 0; 5955 if ((Subtarget->hasNEON())) { 5956 return fastEmitInst_rr(ARM::VQADDuv2i32, &ARM::DPRRegClass, Op0, Op1); 5957 } 5958 return 0; 5959} 5960 5961unsigned fastEmit_ISD_UADDSAT_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5962 if (RetVT.SimpleTy != MVT::v4i32) 5963 return 0; 5964 if ((Subtarget->hasMVEIntegerOps())) { 5965 return fastEmitInst_rr(ARM::MVE_VQADDu32, &ARM::MQPRRegClass, Op0, Op1); 5966 } 5967 if ((Subtarget->hasNEON())) { 5968 return fastEmitInst_rr(ARM::VQADDuv4i32, &ARM::QPRRegClass, Op0, Op1); 5969 } 5970 return 0; 5971} 5972 5973unsigned fastEmit_ISD_UADDSAT_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5974 if (RetVT.SimpleTy != MVT::v1i64) 5975 return 0; 5976 if ((Subtarget->hasNEON())) { 5977 return fastEmitInst_rr(ARM::VQADDuv1i64, &ARM::DPRRegClass, Op0, Op1); 5978 } 5979 return 0; 5980} 5981 5982unsigned fastEmit_ISD_UADDSAT_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 5983 if (RetVT.SimpleTy != MVT::v2i64) 5984 return 0; 5985 if ((Subtarget->hasNEON())) { 5986 return fastEmitInst_rr(ARM::VQADDuv2i64, &ARM::QPRRegClass, Op0, Op1); 5987 } 5988 return 0; 5989} 5990 5991unsigned fastEmit_ISD_UADDSAT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 5992 switch (VT.SimpleTy) { 5993 case MVT::v8i8: return fastEmit_ISD_UADDSAT_MVT_v8i8_rr(RetVT, Op0, Op1); 5994 case MVT::v16i8: return fastEmit_ISD_UADDSAT_MVT_v16i8_rr(RetVT, Op0, Op1); 5995 case MVT::v4i16: return fastEmit_ISD_UADDSAT_MVT_v4i16_rr(RetVT, Op0, Op1); 5996 case MVT::v8i16: return fastEmit_ISD_UADDSAT_MVT_v8i16_rr(RetVT, Op0, Op1); 5997 case MVT::v2i32: return fastEmit_ISD_UADDSAT_MVT_v2i32_rr(RetVT, Op0, Op1); 5998 case MVT::v4i32: return fastEmit_ISD_UADDSAT_MVT_v4i32_rr(RetVT, Op0, Op1); 5999 case MVT::v1i64: return fastEmit_ISD_UADDSAT_MVT_v1i64_rr(RetVT, Op0, Op1); 6000 case MVT::v2i64: return fastEmit_ISD_UADDSAT_MVT_v2i64_rr(RetVT, Op0, Op1); 6001 default: return 0; 6002 } 6003} 6004 6005// FastEmit functions for ISD::UDIV. 6006 6007unsigned fastEmit_ISD_UDIV_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6008 if (RetVT.SimpleTy != MVT::i32) 6009 return 0; 6010 if ((Subtarget->hasDivideInThumbMode()) && (Subtarget->hasV8MBaselineOps()) && (Subtarget->isThumb())) { 6011 return fastEmitInst_rr(ARM::t2UDIV, &ARM::rGPRRegClass, Op0, Op1); 6012 } 6013 if ((Subtarget->hasDivideInARMMode()) && (!Subtarget->isThumb())) { 6014 return fastEmitInst_rr(ARM::UDIV, &ARM::GPRRegClass, Op0, Op1); 6015 } 6016 return 0; 6017} 6018 6019unsigned fastEmit_ISD_UDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 6020 switch (VT.SimpleTy) { 6021 case MVT::i32: return fastEmit_ISD_UDIV_MVT_i32_rr(RetVT, Op0, Op1); 6022 default: return 0; 6023 } 6024} 6025 6026// FastEmit functions for ISD::UMAX. 6027 6028unsigned fastEmit_ISD_UMAX_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6029 if (RetVT.SimpleTy != MVT::v8i8) 6030 return 0; 6031 if ((Subtarget->hasNEON())) { 6032 return fastEmitInst_rr(ARM::VMAXuv8i8, &ARM::DPRRegClass, Op0, Op1); 6033 } 6034 return 0; 6035} 6036 6037unsigned fastEmit_ISD_UMAX_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6038 if (RetVT.SimpleTy != MVT::v16i8) 6039 return 0; 6040 if ((Subtarget->hasMVEIntegerOps())) { 6041 return fastEmitInst_rr(ARM::MVE_VMAXu8, &ARM::MQPRRegClass, Op0, Op1); 6042 } 6043 if ((Subtarget->hasNEON())) { 6044 return fastEmitInst_rr(ARM::VMAXuv16i8, &ARM::QPRRegClass, Op0, Op1); 6045 } 6046 return 0; 6047} 6048 6049unsigned fastEmit_ISD_UMAX_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6050 if (RetVT.SimpleTy != MVT::v4i16) 6051 return 0; 6052 if ((Subtarget->hasNEON())) { 6053 return fastEmitInst_rr(ARM::VMAXuv4i16, &ARM::DPRRegClass, Op0, Op1); 6054 } 6055 return 0; 6056} 6057 6058unsigned fastEmit_ISD_UMAX_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6059 if (RetVT.SimpleTy != MVT::v8i16) 6060 return 0; 6061 if ((Subtarget->hasMVEIntegerOps())) { 6062 return fastEmitInst_rr(ARM::MVE_VMAXu16, &ARM::MQPRRegClass, Op0, Op1); 6063 } 6064 if ((Subtarget->hasNEON())) { 6065 return fastEmitInst_rr(ARM::VMAXuv8i16, &ARM::QPRRegClass, Op0, Op1); 6066 } 6067 return 0; 6068} 6069 6070unsigned fastEmit_ISD_UMAX_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6071 if (RetVT.SimpleTy != MVT::v2i32) 6072 return 0; 6073 if ((Subtarget->hasNEON())) { 6074 return fastEmitInst_rr(ARM::VMAXuv2i32, &ARM::DPRRegClass, Op0, Op1); 6075 } 6076 return 0; 6077} 6078 6079unsigned fastEmit_ISD_UMAX_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6080 if (RetVT.SimpleTy != MVT::v4i32) 6081 return 0; 6082 if ((Subtarget->hasMVEIntegerOps())) { 6083 return fastEmitInst_rr(ARM::MVE_VMAXu32, &ARM::MQPRRegClass, Op0, Op1); 6084 } 6085 if ((Subtarget->hasNEON())) { 6086 return fastEmitInst_rr(ARM::VMAXuv4i32, &ARM::QPRRegClass, Op0, Op1); 6087 } 6088 return 0; 6089} 6090 6091unsigned fastEmit_ISD_UMAX_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 6092 switch (VT.SimpleTy) { 6093 case MVT::v8i8: return fastEmit_ISD_UMAX_MVT_v8i8_rr(RetVT, Op0, Op1); 6094 case MVT::v16i8: return fastEmit_ISD_UMAX_MVT_v16i8_rr(RetVT, Op0, Op1); 6095 case MVT::v4i16: return fastEmit_ISD_UMAX_MVT_v4i16_rr(RetVT, Op0, Op1); 6096 case MVT::v8i16: return fastEmit_ISD_UMAX_MVT_v8i16_rr(RetVT, Op0, Op1); 6097 case MVT::v2i32: return fastEmit_ISD_UMAX_MVT_v2i32_rr(RetVT, Op0, Op1); 6098 case MVT::v4i32: return fastEmit_ISD_UMAX_MVT_v4i32_rr(RetVT, Op0, Op1); 6099 default: return 0; 6100 } 6101} 6102 6103// FastEmit functions for ISD::UMIN. 6104 6105unsigned fastEmit_ISD_UMIN_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6106 if (RetVT.SimpleTy != MVT::v8i8) 6107 return 0; 6108 if ((Subtarget->hasNEON())) { 6109 return fastEmitInst_rr(ARM::VMINuv8i8, &ARM::DPRRegClass, Op0, Op1); 6110 } 6111 return 0; 6112} 6113 6114unsigned fastEmit_ISD_UMIN_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6115 if (RetVT.SimpleTy != MVT::v16i8) 6116 return 0; 6117 if ((Subtarget->hasMVEIntegerOps())) { 6118 return fastEmitInst_rr(ARM::MVE_VMINu8, &ARM::MQPRRegClass, Op0, Op1); 6119 } 6120 if ((Subtarget->hasNEON())) { 6121 return fastEmitInst_rr(ARM::VMINuv16i8, &ARM::QPRRegClass, Op0, Op1); 6122 } 6123 return 0; 6124} 6125 6126unsigned fastEmit_ISD_UMIN_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6127 if (RetVT.SimpleTy != MVT::v4i16) 6128 return 0; 6129 if ((Subtarget->hasNEON())) { 6130 return fastEmitInst_rr(ARM::VMINuv4i16, &ARM::DPRRegClass, Op0, Op1); 6131 } 6132 return 0; 6133} 6134 6135unsigned fastEmit_ISD_UMIN_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6136 if (RetVT.SimpleTy != MVT::v8i16) 6137 return 0; 6138 if ((Subtarget->hasMVEIntegerOps())) { 6139 return fastEmitInst_rr(ARM::MVE_VMINu16, &ARM::MQPRRegClass, Op0, Op1); 6140 } 6141 if ((Subtarget->hasNEON())) { 6142 return fastEmitInst_rr(ARM::VMINuv8i16, &ARM::QPRRegClass, Op0, Op1); 6143 } 6144 return 0; 6145} 6146 6147unsigned fastEmit_ISD_UMIN_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6148 if (RetVT.SimpleTy != MVT::v2i32) 6149 return 0; 6150 if ((Subtarget->hasNEON())) { 6151 return fastEmitInst_rr(ARM::VMINuv2i32, &ARM::DPRRegClass, Op0, Op1); 6152 } 6153 return 0; 6154} 6155 6156unsigned fastEmit_ISD_UMIN_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6157 if (RetVT.SimpleTy != MVT::v4i32) 6158 return 0; 6159 if ((Subtarget->hasMVEIntegerOps())) { 6160 return fastEmitInst_rr(ARM::MVE_VMINu32, &ARM::MQPRRegClass, Op0, Op1); 6161 } 6162 if ((Subtarget->hasNEON())) { 6163 return fastEmitInst_rr(ARM::VMINuv4i32, &ARM::QPRRegClass, Op0, Op1); 6164 } 6165 return 0; 6166} 6167 6168unsigned fastEmit_ISD_UMIN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 6169 switch (VT.SimpleTy) { 6170 case MVT::v8i8: return fastEmit_ISD_UMIN_MVT_v8i8_rr(RetVT, Op0, Op1); 6171 case MVT::v16i8: return fastEmit_ISD_UMIN_MVT_v16i8_rr(RetVT, Op0, Op1); 6172 case MVT::v4i16: return fastEmit_ISD_UMIN_MVT_v4i16_rr(RetVT, Op0, Op1); 6173 case MVT::v8i16: return fastEmit_ISD_UMIN_MVT_v8i16_rr(RetVT, Op0, Op1); 6174 case MVT::v2i32: return fastEmit_ISD_UMIN_MVT_v2i32_rr(RetVT, Op0, Op1); 6175 case MVT::v4i32: return fastEmit_ISD_UMIN_MVT_v4i32_rr(RetVT, Op0, Op1); 6176 default: return 0; 6177 } 6178} 6179 6180// FastEmit functions for ISD::USUBSAT. 6181 6182unsigned fastEmit_ISD_USUBSAT_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6183 if (RetVT.SimpleTy != MVT::v8i8) 6184 return 0; 6185 if ((Subtarget->hasNEON())) { 6186 return fastEmitInst_rr(ARM::VQSUBuv8i8, &ARM::DPRRegClass, Op0, Op1); 6187 } 6188 return 0; 6189} 6190 6191unsigned fastEmit_ISD_USUBSAT_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6192 if (RetVT.SimpleTy != MVT::v16i8) 6193 return 0; 6194 if ((Subtarget->hasMVEIntegerOps())) { 6195 return fastEmitInst_rr(ARM::MVE_VQSUBu8, &ARM::MQPRRegClass, Op0, Op1); 6196 } 6197 if ((Subtarget->hasNEON())) { 6198 return fastEmitInst_rr(ARM::VQSUBuv16i8, &ARM::QPRRegClass, Op0, Op1); 6199 } 6200 return 0; 6201} 6202 6203unsigned fastEmit_ISD_USUBSAT_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6204 if (RetVT.SimpleTy != MVT::v4i16) 6205 return 0; 6206 if ((Subtarget->hasNEON())) { 6207 return fastEmitInst_rr(ARM::VQSUBuv4i16, &ARM::DPRRegClass, Op0, Op1); 6208 } 6209 return 0; 6210} 6211 6212unsigned fastEmit_ISD_USUBSAT_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6213 if (RetVT.SimpleTy != MVT::v8i16) 6214 return 0; 6215 if ((Subtarget->hasMVEIntegerOps())) { 6216 return fastEmitInst_rr(ARM::MVE_VQSUBu16, &ARM::MQPRRegClass, Op0, Op1); 6217 } 6218 if ((Subtarget->hasNEON())) { 6219 return fastEmitInst_rr(ARM::VQSUBuv8i16, &ARM::QPRRegClass, Op0, Op1); 6220 } 6221 return 0; 6222} 6223 6224unsigned fastEmit_ISD_USUBSAT_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6225 if (RetVT.SimpleTy != MVT::v2i32) 6226 return 0; 6227 if ((Subtarget->hasNEON())) { 6228 return fastEmitInst_rr(ARM::VQSUBuv2i32, &ARM::DPRRegClass, Op0, Op1); 6229 } 6230 return 0; 6231} 6232 6233unsigned fastEmit_ISD_USUBSAT_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6234 if (RetVT.SimpleTy != MVT::v4i32) 6235 return 0; 6236 if ((Subtarget->hasMVEIntegerOps())) { 6237 return fastEmitInst_rr(ARM::MVE_VQSUBu32, &ARM::MQPRRegClass, Op0, Op1); 6238 } 6239 if ((Subtarget->hasNEON())) { 6240 return fastEmitInst_rr(ARM::VQSUBuv4i32, &ARM::QPRRegClass, Op0, Op1); 6241 } 6242 return 0; 6243} 6244 6245unsigned fastEmit_ISD_USUBSAT_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6246 if (RetVT.SimpleTy != MVT::v1i64) 6247 return 0; 6248 if ((Subtarget->hasNEON())) { 6249 return fastEmitInst_rr(ARM::VQSUBuv1i64, &ARM::DPRRegClass, Op0, Op1); 6250 } 6251 return 0; 6252} 6253 6254unsigned fastEmit_ISD_USUBSAT_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6255 if (RetVT.SimpleTy != MVT::v2i64) 6256 return 0; 6257 if ((Subtarget->hasNEON())) { 6258 return fastEmitInst_rr(ARM::VQSUBuv2i64, &ARM::QPRRegClass, Op0, Op1); 6259 } 6260 return 0; 6261} 6262 6263unsigned fastEmit_ISD_USUBSAT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 6264 switch (VT.SimpleTy) { 6265 case MVT::v8i8: return fastEmit_ISD_USUBSAT_MVT_v8i8_rr(RetVT, Op0, Op1); 6266 case MVT::v16i8: return fastEmit_ISD_USUBSAT_MVT_v16i8_rr(RetVT, Op0, Op1); 6267 case MVT::v4i16: return fastEmit_ISD_USUBSAT_MVT_v4i16_rr(RetVT, Op0, Op1); 6268 case MVT::v8i16: return fastEmit_ISD_USUBSAT_MVT_v8i16_rr(RetVT, Op0, Op1); 6269 case MVT::v2i32: return fastEmit_ISD_USUBSAT_MVT_v2i32_rr(RetVT, Op0, Op1); 6270 case MVT::v4i32: return fastEmit_ISD_USUBSAT_MVT_v4i32_rr(RetVT, Op0, Op1); 6271 case MVT::v1i64: return fastEmit_ISD_USUBSAT_MVT_v1i64_rr(RetVT, Op0, Op1); 6272 case MVT::v2i64: return fastEmit_ISD_USUBSAT_MVT_v2i64_rr(RetVT, Op0, Op1); 6273 default: return 0; 6274 } 6275} 6276 6277// FastEmit functions for ISD::XOR. 6278 6279unsigned fastEmit_ISD_XOR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6280 if (RetVT.SimpleTy != MVT::i32) 6281 return 0; 6282 if ((Subtarget->isThumb2())) { 6283 return fastEmitInst_rr(ARM::t2EORrr, &ARM::rGPRRegClass, Op0, Op1); 6284 } 6285 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 6286 return fastEmitInst_rr(ARM::tEOR, &ARM::tGPRRegClass, Op0, Op1); 6287 } 6288 if ((!Subtarget->isThumb())) { 6289 return fastEmitInst_rr(ARM::EORrr, &ARM::GPRRegClass, Op0, Op1); 6290 } 6291 return 0; 6292} 6293 6294unsigned fastEmit_ISD_XOR_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6295 if (RetVT.SimpleTy != MVT::v8i8) 6296 return 0; 6297 if ((Subtarget->hasNEON())) { 6298 return fastEmitInst_rr(ARM::VEORd, &ARM::DPRRegClass, Op0, Op1); 6299 } 6300 return 0; 6301} 6302 6303unsigned fastEmit_ISD_XOR_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6304 if (RetVT.SimpleTy != MVT::v16i8) 6305 return 0; 6306 if ((Subtarget->hasMVEIntegerOps())) { 6307 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op1); 6308 } 6309 if ((Subtarget->hasNEON())) { 6310 return fastEmitInst_rr(ARM::VEORq, &ARM::QPRRegClass, Op0, Op1); 6311 } 6312 return 0; 6313} 6314 6315unsigned fastEmit_ISD_XOR_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6316 if (RetVT.SimpleTy != MVT::v4i16) 6317 return 0; 6318 if ((Subtarget->hasNEON())) { 6319 return fastEmitInst_rr(ARM::VEORd, &ARM::DPRRegClass, Op0, Op1); 6320 } 6321 return 0; 6322} 6323 6324unsigned fastEmit_ISD_XOR_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6325 if (RetVT.SimpleTy != MVT::v8i16) 6326 return 0; 6327 if ((Subtarget->hasMVEIntegerOps())) { 6328 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op1); 6329 } 6330 if ((Subtarget->hasNEON())) { 6331 return fastEmitInst_rr(ARM::VEORq, &ARM::QPRRegClass, Op0, Op1); 6332 } 6333 return 0; 6334} 6335 6336unsigned fastEmit_ISD_XOR_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6337 if (RetVT.SimpleTy != MVT::v2i32) 6338 return 0; 6339 if ((Subtarget->hasNEON())) { 6340 return fastEmitInst_rr(ARM::VEORd, &ARM::DPRRegClass, Op0, Op1); 6341 } 6342 return 0; 6343} 6344 6345unsigned fastEmit_ISD_XOR_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6346 if (RetVT.SimpleTy != MVT::v4i32) 6347 return 0; 6348 if ((Subtarget->hasMVEIntegerOps())) { 6349 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op1); 6350 } 6351 if ((Subtarget->hasNEON())) { 6352 return fastEmitInst_rr(ARM::VEORq, &ARM::QPRRegClass, Op0, Op1); 6353 } 6354 return 0; 6355} 6356 6357unsigned fastEmit_ISD_XOR_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6358 if (RetVT.SimpleTy != MVT::v1i64) 6359 return 0; 6360 if ((Subtarget->hasNEON())) { 6361 return fastEmitInst_rr(ARM::VEORd, &ARM::DPRRegClass, Op0, Op1); 6362 } 6363 return 0; 6364} 6365 6366unsigned fastEmit_ISD_XOR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) { 6367 if (RetVT.SimpleTy != MVT::v2i64) 6368 return 0; 6369 if ((Subtarget->hasMVEIntegerOps())) { 6370 return fastEmitInst_rr(ARM::MVE_VEOR, &ARM::MQPRRegClass, Op0, Op1); 6371 } 6372 if ((Subtarget->hasNEON())) { 6373 return fastEmitInst_rr(ARM::VEORq, &ARM::QPRRegClass, Op0, Op1); 6374 } 6375 return 0; 6376} 6377 6378unsigned fastEmit_ISD_XOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) { 6379 switch (VT.SimpleTy) { 6380 case MVT::i32: return fastEmit_ISD_XOR_MVT_i32_rr(RetVT, Op0, Op1); 6381 case MVT::v8i8: return fastEmit_ISD_XOR_MVT_v8i8_rr(RetVT, Op0, Op1); 6382 case MVT::v16i8: return fastEmit_ISD_XOR_MVT_v16i8_rr(RetVT, Op0, Op1); 6383 case MVT::v4i16: return fastEmit_ISD_XOR_MVT_v4i16_rr(RetVT, Op0, Op1); 6384 case MVT::v8i16: return fastEmit_ISD_XOR_MVT_v8i16_rr(RetVT, Op0, Op1); 6385 case MVT::v2i32: return fastEmit_ISD_XOR_MVT_v2i32_rr(RetVT, Op0, Op1); 6386 case MVT::v4i32: return fastEmit_ISD_XOR_MVT_v4i32_rr(RetVT, Op0, Op1); 6387 case MVT::v1i64: return fastEmit_ISD_XOR_MVT_v1i64_rr(RetVT, Op0, Op1); 6388 case MVT::v2i64: return fastEmit_ISD_XOR_MVT_v2i64_rr(RetVT, Op0, Op1); 6389 default: return 0; 6390 } 6391} 6392 6393// Top-level FastEmit function. 6394 6395unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1) override { 6396 switch (Opcode) { 6397 case ARMISD::CMP: return fastEmit_ARMISD_CMP_rr(VT, RetVT, Op0, Op1); 6398 case ARMISD::CMPFP: return fastEmit_ARMISD_CMPFP_rr(VT, RetVT, Op0, Op1); 6399 case ARMISD::CMPFPE: return fastEmit_ARMISD_CMPFPE_rr(VT, RetVT, Op0, Op1); 6400 case ARMISD::CMPZ: return fastEmit_ARMISD_CMPZ_rr(VT, RetVT, Op0, Op1); 6401 case ARMISD::EH_SJLJ_LONGJMP: return fastEmit_ARMISD_EH_SJLJ_LONGJMP_rr(VT, RetVT, Op0, Op1); 6402 case ARMISD::EH_SJLJ_SETJMP: return fastEmit_ARMISD_EH_SJLJ_SETJMP_rr(VT, RetVT, Op0, Op1); 6403 case ARMISD::QADD16b: return fastEmit_ARMISD_QADD16b_rr(VT, RetVT, Op0, Op1); 6404 case ARMISD::QADD8b: return fastEmit_ARMISD_QADD8b_rr(VT, RetVT, Op0, Op1); 6405 case ARMISD::QSUB16b: return fastEmit_ARMISD_QSUB16b_rr(VT, RetVT, Op0, Op1); 6406 case ARMISD::QSUB8b: return fastEmit_ARMISD_QSUB8b_rr(VT, RetVT, Op0, Op1); 6407 case ARMISD::SMULWB: return fastEmit_ARMISD_SMULWB_rr(VT, RetVT, Op0, Op1); 6408 case ARMISD::SMULWT: return fastEmit_ARMISD_SMULWT_rr(VT, RetVT, Op0, Op1); 6409 case ARMISD::SUBS: return fastEmit_ARMISD_SUBS_rr(VT, RetVT, Op0, Op1); 6410 case ARMISD::UQADD16b: return fastEmit_ARMISD_UQADD16b_rr(VT, RetVT, Op0, Op1); 6411 case ARMISD::UQADD8b: return fastEmit_ARMISD_UQADD8b_rr(VT, RetVT, Op0, Op1); 6412 case ARMISD::UQSUB16b: return fastEmit_ARMISD_UQSUB16b_rr(VT, RetVT, Op0, Op1); 6413 case ARMISD::UQSUB8b: return fastEmit_ARMISD_UQSUB8b_rr(VT, RetVT, Op0, Op1); 6414 case ARMISD::VMLAVs: return fastEmit_ARMISD_VMLAVs_rr(VT, RetVT, Op0, Op1); 6415 case ARMISD::VMLAVu: return fastEmit_ARMISD_VMLAVu_rr(VT, RetVT, Op0, Op1); 6416 case ARMISD::VMOVDRR: return fastEmit_ARMISD_VMOVDRR_rr(VT, RetVT, Op0, Op1); 6417 case ARMISD::VMULLs: return fastEmit_ARMISD_VMULLs_rr(VT, RetVT, Op0, Op1); 6418 case ARMISD::VMULLu: return fastEmit_ARMISD_VMULLu_rr(VT, RetVT, Op0, Op1); 6419 case ARMISD::VQDMULH: return fastEmit_ARMISD_VQDMULH_rr(VT, RetVT, Op0, Op1); 6420 case ARMISD::VSHLs: return fastEmit_ARMISD_VSHLs_rr(VT, RetVT, Op0, Op1); 6421 case ARMISD::VSHLu: return fastEmit_ARMISD_VSHLu_rr(VT, RetVT, Op0, Op1); 6422 case ARMISD::VTBL1: return fastEmit_ARMISD_VTBL1_rr(VT, RetVT, Op0, Op1); 6423 case ARMISD::VTST: return fastEmit_ARMISD_VTST_rr(VT, RetVT, Op0, Op1); 6424 case ISD::ABDS: return fastEmit_ISD_ABDS_rr(VT, RetVT, Op0, Op1); 6425 case ISD::ABDU: return fastEmit_ISD_ABDU_rr(VT, RetVT, Op0, Op1); 6426 case ISD::ADD: return fastEmit_ISD_ADD_rr(VT, RetVT, Op0, Op1); 6427 case ISD::AND: return fastEmit_ISD_AND_rr(VT, RetVT, Op0, Op1); 6428 case ISD::AVGCEILS: return fastEmit_ISD_AVGCEILS_rr(VT, RetVT, Op0, Op1); 6429 case ISD::AVGCEILU: return fastEmit_ISD_AVGCEILU_rr(VT, RetVT, Op0, Op1); 6430 case ISD::AVGFLOORS: return fastEmit_ISD_AVGFLOORS_rr(VT, RetVT, Op0, Op1); 6431 case ISD::AVGFLOORU: return fastEmit_ISD_AVGFLOORU_rr(VT, RetVT, Op0, Op1); 6432 case ISD::FADD: return fastEmit_ISD_FADD_rr(VT, RetVT, Op0, Op1); 6433 case ISD::FDIV: return fastEmit_ISD_FDIV_rr(VT, RetVT, Op0, Op1); 6434 case ISD::FMAXIMUM: return fastEmit_ISD_FMAXIMUM_rr(VT, RetVT, Op0, Op1); 6435 case ISD::FMAXNUM: return fastEmit_ISD_FMAXNUM_rr(VT, RetVT, Op0, Op1); 6436 case ISD::FMINIMUM: return fastEmit_ISD_FMINIMUM_rr(VT, RetVT, Op0, Op1); 6437 case ISD::FMINNUM: return fastEmit_ISD_FMINNUM_rr(VT, RetVT, Op0, Op1); 6438 case ISD::FMUL: return fastEmit_ISD_FMUL_rr(VT, RetVT, Op0, Op1); 6439 case ISD::FSUB: return fastEmit_ISD_FSUB_rr(VT, RetVT, Op0, Op1); 6440 case ISD::MUL: return fastEmit_ISD_MUL_rr(VT, RetVT, Op0, Op1); 6441 case ISD::MULHS: return fastEmit_ISD_MULHS_rr(VT, RetVT, Op0, Op1); 6442 case ISD::MULHU: return fastEmit_ISD_MULHU_rr(VT, RetVT, Op0, Op1); 6443 case ISD::OR: return fastEmit_ISD_OR_rr(VT, RetVT, Op0, Op1); 6444 case ISD::ROTR: return fastEmit_ISD_ROTR_rr(VT, RetVT, Op0, Op1); 6445 case ISD::SADDSAT: return fastEmit_ISD_SADDSAT_rr(VT, RetVT, Op0, Op1); 6446 case ISD::SDIV: return fastEmit_ISD_SDIV_rr(VT, RetVT, Op0, Op1); 6447 case ISD::SHL: return fastEmit_ISD_SHL_rr(VT, RetVT, Op0, Op1); 6448 case ISD::SMAX: return fastEmit_ISD_SMAX_rr(VT, RetVT, Op0, Op1); 6449 case ISD::SMIN: return fastEmit_ISD_SMIN_rr(VT, RetVT, Op0, Op1); 6450 case ISD::SRA: return fastEmit_ISD_SRA_rr(VT, RetVT, Op0, Op1); 6451 case ISD::SRL: return fastEmit_ISD_SRL_rr(VT, RetVT, Op0, Op1); 6452 case ISD::SSUBSAT: return fastEmit_ISD_SSUBSAT_rr(VT, RetVT, Op0, Op1); 6453 case ISD::SUB: return fastEmit_ISD_SUB_rr(VT, RetVT, Op0, Op1); 6454 case ISD::UADDSAT: return fastEmit_ISD_UADDSAT_rr(VT, RetVT, Op0, Op1); 6455 case ISD::UDIV: return fastEmit_ISD_UDIV_rr(VT, RetVT, Op0, Op1); 6456 case ISD::UMAX: return fastEmit_ISD_UMAX_rr(VT, RetVT, Op0, Op1); 6457 case ISD::UMIN: return fastEmit_ISD_UMIN_rr(VT, RetVT, Op0, Op1); 6458 case ISD::USUBSAT: return fastEmit_ISD_USUBSAT_rr(VT, RetVT, Op0, Op1); 6459 case ISD::XOR: return fastEmit_ISD_XOR_rr(VT, RetVT, Op0, Op1); 6460 default: return 0; 6461 } 6462} 6463 6464// FastEmit functions for ARMISD::PIC_ADD. 6465 6466unsigned fastEmit_ARMISD_PIC_ADD_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6467 if (RetVT.SimpleTy != MVT::i32) 6468 return 0; 6469 if ((Subtarget->isThumb())) { 6470 return fastEmitInst_ri(ARM::tPICADD, &ARM::GPRRegClass, Op0, imm1); 6471 } 6472 if ((!Subtarget->isThumb())) { 6473 return fastEmitInst_ri(ARM::PICADD, &ARM::GPRRegClass, Op0, imm1); 6474 } 6475 return 0; 6476} 6477 6478unsigned fastEmit_ARMISD_PIC_ADD_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6479 switch (VT.SimpleTy) { 6480 case MVT::i32: return fastEmit_ARMISD_PIC_ADD_MVT_i32_ri(RetVT, Op0, imm1); 6481 default: return 0; 6482 } 6483} 6484 6485// FastEmit functions for ARMISD::VDUPLANE. 6486 6487unsigned fastEmit_ARMISD_VDUPLANE_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6488 if (RetVT.SimpleTy != MVT::v8i8) 6489 return 0; 6490 if ((Subtarget->hasNEON())) { 6491 return fastEmitInst_ri(ARM::VDUPLN8d, &ARM::DPRRegClass, Op0, imm1); 6492 } 6493 return 0; 6494} 6495 6496unsigned fastEmit_ARMISD_VDUPLANE_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6497 if (RetVT.SimpleTy != MVT::v4i16) 6498 return 0; 6499 if ((Subtarget->hasNEON())) { 6500 return fastEmitInst_ri(ARM::VDUPLN16d, &ARM::DPRRegClass, Op0, imm1); 6501 } 6502 return 0; 6503} 6504 6505unsigned fastEmit_ARMISD_VDUPLANE_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6506 if (RetVT.SimpleTy != MVT::v2i32) 6507 return 0; 6508 if ((Subtarget->hasNEON())) { 6509 return fastEmitInst_ri(ARM::VDUPLN32d, &ARM::DPRRegClass, Op0, imm1); 6510 } 6511 return 0; 6512} 6513 6514unsigned fastEmit_ARMISD_VDUPLANE_MVT_v4f16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6515 if (RetVT.SimpleTy != MVT::v4f16) 6516 return 0; 6517 if ((Subtarget->hasNEON())) { 6518 return fastEmitInst_ri(ARM::VDUPLN16d, &ARM::DPRRegClass, Op0, imm1); 6519 } 6520 return 0; 6521} 6522 6523unsigned fastEmit_ARMISD_VDUPLANE_MVT_v4bf16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6524 if (RetVT.SimpleTy != MVT::v4bf16) 6525 return 0; 6526 if ((Subtarget->hasBF16()) && (Subtarget->hasNEON())) { 6527 return fastEmitInst_ri(ARM::VDUPLN16d, &ARM::DPRRegClass, Op0, imm1); 6528 } 6529 return 0; 6530} 6531 6532unsigned fastEmit_ARMISD_VDUPLANE_MVT_v2f32_MVT_v2f32_ri(unsigned Op0, uint64_t imm1) { 6533 if ((Subtarget->hasNEON())) { 6534 return fastEmitInst_ri(ARM::VDUPLN32d, &ARM::DPRRegClass, Op0, imm1); 6535 } 6536 return 0; 6537} 6538 6539unsigned fastEmit_ARMISD_VDUPLANE_MVT_v2f32_MVT_v4f32_ri(unsigned Op0, uint64_t imm1) { 6540 if ((Subtarget->hasNEON())) { 6541 return fastEmitInst_ri(ARM::VDUPLN32q, &ARM::QPRRegClass, Op0, imm1); 6542 } 6543 return 0; 6544} 6545 6546unsigned fastEmit_ARMISD_VDUPLANE_MVT_v2f32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6547switch (RetVT.SimpleTy) { 6548 case MVT::v2f32: return fastEmit_ARMISD_VDUPLANE_MVT_v2f32_MVT_v2f32_ri(Op0, imm1); 6549 case MVT::v4f32: return fastEmit_ARMISD_VDUPLANE_MVT_v2f32_MVT_v4f32_ri(Op0, imm1); 6550 default: return 0; 6551} 6552} 6553 6554unsigned fastEmit_ARMISD_VDUPLANE_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6555 switch (VT.SimpleTy) { 6556 case MVT::v8i8: return fastEmit_ARMISD_VDUPLANE_MVT_v8i8_ri(RetVT, Op0, imm1); 6557 case MVT::v4i16: return fastEmit_ARMISD_VDUPLANE_MVT_v4i16_ri(RetVT, Op0, imm1); 6558 case MVT::v2i32: return fastEmit_ARMISD_VDUPLANE_MVT_v2i32_ri(RetVT, Op0, imm1); 6559 case MVT::v4f16: return fastEmit_ARMISD_VDUPLANE_MVT_v4f16_ri(RetVT, Op0, imm1); 6560 case MVT::v4bf16: return fastEmit_ARMISD_VDUPLANE_MVT_v4bf16_ri(RetVT, Op0, imm1); 6561 case MVT::v2f32: return fastEmit_ARMISD_VDUPLANE_MVT_v2f32_ri(RetVT, Op0, imm1); 6562 default: return 0; 6563 } 6564} 6565 6566// FastEmit functions for ARMISD::VGETLANEs. 6567 6568unsigned fastEmit_ARMISD_VGETLANEs_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6569 if (RetVT.SimpleTy != MVT::i32) 6570 return 0; 6571 if ((Subtarget->hasNEON())) { 6572 return fastEmitInst_ri(ARM::VGETLNs8, &ARM::GPRRegClass, Op0, imm1); 6573 } 6574 return 0; 6575} 6576 6577unsigned fastEmit_ARMISD_VGETLANEs_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6578 if (RetVT.SimpleTy != MVT::i32) 6579 return 0; 6580 if ((Subtarget->hasMVEIntegerOps())) { 6581 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_s8, &ARM::rGPRRegClass, Op0, imm1); 6582 } 6583 return 0; 6584} 6585 6586unsigned fastEmit_ARMISD_VGETLANEs_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6587 if (RetVT.SimpleTy != MVT::i32) 6588 return 0; 6589 if ((Subtarget->hasNEON())) { 6590 return fastEmitInst_ri(ARM::VGETLNs16, &ARM::GPRRegClass, Op0, imm1); 6591 } 6592 return 0; 6593} 6594 6595unsigned fastEmit_ARMISD_VGETLANEs_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6596 if (RetVT.SimpleTy != MVT::i32) 6597 return 0; 6598 if ((Subtarget->hasMVEIntegerOps())) { 6599 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_s16, &ARM::rGPRRegClass, Op0, imm1); 6600 } 6601 return 0; 6602} 6603 6604unsigned fastEmit_ARMISD_VGETLANEs_MVT_v8f16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6605 if (RetVT.SimpleTy != MVT::i32) 6606 return 0; 6607 if ((Subtarget->hasMVEIntegerOps())) { 6608 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_s16, &ARM::rGPRRegClass, Op0, imm1); 6609 } 6610 return 0; 6611} 6612 6613unsigned fastEmit_ARMISD_VGETLANEs_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6614 switch (VT.SimpleTy) { 6615 case MVT::v8i8: return fastEmit_ARMISD_VGETLANEs_MVT_v8i8_ri(RetVT, Op0, imm1); 6616 case MVT::v16i8: return fastEmit_ARMISD_VGETLANEs_MVT_v16i8_ri(RetVT, Op0, imm1); 6617 case MVT::v4i16: return fastEmit_ARMISD_VGETLANEs_MVT_v4i16_ri(RetVT, Op0, imm1); 6618 case MVT::v8i16: return fastEmit_ARMISD_VGETLANEs_MVT_v8i16_ri(RetVT, Op0, imm1); 6619 case MVT::v8f16: return fastEmit_ARMISD_VGETLANEs_MVT_v8f16_ri(RetVT, Op0, imm1); 6620 default: return 0; 6621 } 6622} 6623 6624// FastEmit functions for ARMISD::VGETLANEu. 6625 6626unsigned fastEmit_ARMISD_VGETLANEu_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6627 if (RetVT.SimpleTy != MVT::i32) 6628 return 0; 6629 if ((Subtarget->hasNEON())) { 6630 return fastEmitInst_ri(ARM::VGETLNu8, &ARM::GPRRegClass, Op0, imm1); 6631 } 6632 return 0; 6633} 6634 6635unsigned fastEmit_ARMISD_VGETLANEu_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6636 if (RetVT.SimpleTy != MVT::i32) 6637 return 0; 6638 if ((Subtarget->hasMVEIntegerOps())) { 6639 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_u8, &ARM::rGPRRegClass, Op0, imm1); 6640 } 6641 return 0; 6642} 6643 6644unsigned fastEmit_ARMISD_VGETLANEu_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6645 if (RetVT.SimpleTy != MVT::i32) 6646 return 0; 6647 if ((Subtarget->hasNEON())) { 6648 return fastEmitInst_ri(ARM::VGETLNu16, &ARM::GPRRegClass, Op0, imm1); 6649 } 6650 return 0; 6651} 6652 6653unsigned fastEmit_ARMISD_VGETLANEu_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6654 if (RetVT.SimpleTy != MVT::i32) 6655 return 0; 6656 if ((Subtarget->hasMVEIntegerOps())) { 6657 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_u16, &ARM::rGPRRegClass, Op0, imm1); 6658 } 6659 return 0; 6660} 6661 6662unsigned fastEmit_ARMISD_VGETLANEu_MVT_v4f16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6663 if (RetVT.SimpleTy != MVT::i32) 6664 return 0; 6665 if ((Subtarget->hasNEON())) { 6666 return fastEmitInst_ri(ARM::VGETLNu16, &ARM::GPRRegClass, Op0, imm1); 6667 } 6668 return 0; 6669} 6670 6671unsigned fastEmit_ARMISD_VGETLANEu_MVT_v8f16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6672 if (RetVT.SimpleTy != MVT::i32) 6673 return 0; 6674 if ((Subtarget->hasMVEIntegerOps())) { 6675 return fastEmitInst_ri(ARM::MVE_VMOV_from_lane_u16, &ARM::rGPRRegClass, Op0, imm1); 6676 } 6677 return 0; 6678} 6679 6680unsigned fastEmit_ARMISD_VGETLANEu_MVT_v4bf16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6681 if (RetVT.SimpleTy != MVT::i32) 6682 return 0; 6683 if ((Subtarget->hasNEON())) { 6684 return fastEmitInst_ri(ARM::VGETLNu16, &ARM::GPRRegClass, Op0, imm1); 6685 } 6686 return 0; 6687} 6688 6689unsigned fastEmit_ARMISD_VGETLANEu_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6690 switch (VT.SimpleTy) { 6691 case MVT::v8i8: return fastEmit_ARMISD_VGETLANEu_MVT_v8i8_ri(RetVT, Op0, imm1); 6692 case MVT::v16i8: return fastEmit_ARMISD_VGETLANEu_MVT_v16i8_ri(RetVT, Op0, imm1); 6693 case MVT::v4i16: return fastEmit_ARMISD_VGETLANEu_MVT_v4i16_ri(RetVT, Op0, imm1); 6694 case MVT::v8i16: return fastEmit_ARMISD_VGETLANEu_MVT_v8i16_ri(RetVT, Op0, imm1); 6695 case MVT::v4f16: return fastEmit_ARMISD_VGETLANEu_MVT_v4f16_ri(RetVT, Op0, imm1); 6696 case MVT::v8f16: return fastEmit_ARMISD_VGETLANEu_MVT_v8f16_ri(RetVT, Op0, imm1); 6697 case MVT::v4bf16: return fastEmit_ARMISD_VGETLANEu_MVT_v4bf16_ri(RetVT, Op0, imm1); 6698 default: return 0; 6699 } 6700} 6701 6702// FastEmit functions for ARMISD::VQSHLsIMM. 6703 6704unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6705 if (RetVT.SimpleTy != MVT::v8i8) 6706 return 0; 6707 if ((Subtarget->hasNEON())) { 6708 return fastEmitInst_ri(ARM::VQSHLsiv8i8, &ARM::DPRRegClass, Op0, imm1); 6709 } 6710 return 0; 6711} 6712 6713unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6714 if (RetVT.SimpleTy != MVT::v16i8) 6715 return 0; 6716 if ((Subtarget->hasNEON())) { 6717 return fastEmitInst_ri(ARM::VQSHLsiv16i8, &ARM::QPRRegClass, Op0, imm1); 6718 } 6719 return 0; 6720} 6721 6722unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6723 if (RetVT.SimpleTy != MVT::v4i16) 6724 return 0; 6725 if ((Subtarget->hasNEON())) { 6726 return fastEmitInst_ri(ARM::VQSHLsiv4i16, &ARM::DPRRegClass, Op0, imm1); 6727 } 6728 return 0; 6729} 6730 6731unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6732 if (RetVT.SimpleTy != MVT::v8i16) 6733 return 0; 6734 if ((Subtarget->hasNEON())) { 6735 return fastEmitInst_ri(ARM::VQSHLsiv8i16, &ARM::QPRRegClass, Op0, imm1); 6736 } 6737 return 0; 6738} 6739 6740unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6741 if (RetVT.SimpleTy != MVT::v2i32) 6742 return 0; 6743 if ((Subtarget->hasNEON())) { 6744 return fastEmitInst_ri(ARM::VQSHLsiv2i32, &ARM::DPRRegClass, Op0, imm1); 6745 } 6746 return 0; 6747} 6748 6749unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6750 if (RetVT.SimpleTy != MVT::v4i32) 6751 return 0; 6752 if ((Subtarget->hasNEON())) { 6753 return fastEmitInst_ri(ARM::VQSHLsiv4i32, &ARM::QPRRegClass, Op0, imm1); 6754 } 6755 return 0; 6756} 6757 6758unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6759 if (RetVT.SimpleTy != MVT::v1i64) 6760 return 0; 6761 if ((Subtarget->hasNEON())) { 6762 return fastEmitInst_ri(ARM::VQSHLsiv1i64, &ARM::DPRRegClass, Op0, imm1); 6763 } 6764 return 0; 6765} 6766 6767unsigned fastEmit_ARMISD_VQSHLsIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6768 if (RetVT.SimpleTy != MVT::v2i64) 6769 return 0; 6770 if ((Subtarget->hasNEON())) { 6771 return fastEmitInst_ri(ARM::VQSHLsiv2i64, &ARM::QPRRegClass, Op0, imm1); 6772 } 6773 return 0; 6774} 6775 6776unsigned fastEmit_ARMISD_VQSHLsIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6777 switch (VT.SimpleTy) { 6778 case MVT::v8i8: return fastEmit_ARMISD_VQSHLsIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 6779 case MVT::v16i8: return fastEmit_ARMISD_VQSHLsIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 6780 case MVT::v4i16: return fastEmit_ARMISD_VQSHLsIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 6781 case MVT::v8i16: return fastEmit_ARMISD_VQSHLsIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 6782 case MVT::v2i32: return fastEmit_ARMISD_VQSHLsIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 6783 case MVT::v4i32: return fastEmit_ARMISD_VQSHLsIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 6784 case MVT::v1i64: return fastEmit_ARMISD_VQSHLsIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 6785 case MVT::v2i64: return fastEmit_ARMISD_VQSHLsIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 6786 default: return 0; 6787 } 6788} 6789 6790// FastEmit functions for ARMISD::VQSHLsuIMM. 6791 6792unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6793 if (RetVT.SimpleTy != MVT::v8i8) 6794 return 0; 6795 if ((Subtarget->hasNEON())) { 6796 return fastEmitInst_ri(ARM::VQSHLsuv8i8, &ARM::DPRRegClass, Op0, imm1); 6797 } 6798 return 0; 6799} 6800 6801unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6802 if (RetVT.SimpleTy != MVT::v16i8) 6803 return 0; 6804 if ((Subtarget->hasNEON())) { 6805 return fastEmitInst_ri(ARM::VQSHLsuv16i8, &ARM::QPRRegClass, Op0, imm1); 6806 } 6807 return 0; 6808} 6809 6810unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6811 if (RetVT.SimpleTy != MVT::v4i16) 6812 return 0; 6813 if ((Subtarget->hasNEON())) { 6814 return fastEmitInst_ri(ARM::VQSHLsuv4i16, &ARM::DPRRegClass, Op0, imm1); 6815 } 6816 return 0; 6817} 6818 6819unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6820 if (RetVT.SimpleTy != MVT::v8i16) 6821 return 0; 6822 if ((Subtarget->hasNEON())) { 6823 return fastEmitInst_ri(ARM::VQSHLsuv8i16, &ARM::QPRRegClass, Op0, imm1); 6824 } 6825 return 0; 6826} 6827 6828unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6829 if (RetVT.SimpleTy != MVT::v2i32) 6830 return 0; 6831 if ((Subtarget->hasNEON())) { 6832 return fastEmitInst_ri(ARM::VQSHLsuv2i32, &ARM::DPRRegClass, Op0, imm1); 6833 } 6834 return 0; 6835} 6836 6837unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6838 if (RetVT.SimpleTy != MVT::v4i32) 6839 return 0; 6840 if ((Subtarget->hasNEON())) { 6841 return fastEmitInst_ri(ARM::VQSHLsuv4i32, &ARM::QPRRegClass, Op0, imm1); 6842 } 6843 return 0; 6844} 6845 6846unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6847 if (RetVT.SimpleTy != MVT::v1i64) 6848 return 0; 6849 if ((Subtarget->hasNEON())) { 6850 return fastEmitInst_ri(ARM::VQSHLsuv1i64, &ARM::DPRRegClass, Op0, imm1); 6851 } 6852 return 0; 6853} 6854 6855unsigned fastEmit_ARMISD_VQSHLsuIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6856 if (RetVT.SimpleTy != MVT::v2i64) 6857 return 0; 6858 if ((Subtarget->hasNEON())) { 6859 return fastEmitInst_ri(ARM::VQSHLsuv2i64, &ARM::QPRRegClass, Op0, imm1); 6860 } 6861 return 0; 6862} 6863 6864unsigned fastEmit_ARMISD_VQSHLsuIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6865 switch (VT.SimpleTy) { 6866 case MVT::v8i8: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 6867 case MVT::v16i8: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 6868 case MVT::v4i16: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 6869 case MVT::v8i16: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 6870 case MVT::v2i32: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 6871 case MVT::v4i32: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 6872 case MVT::v1i64: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 6873 case MVT::v2i64: return fastEmit_ARMISD_VQSHLsuIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 6874 default: return 0; 6875 } 6876} 6877 6878// FastEmit functions for ARMISD::VQSHLuIMM. 6879 6880unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6881 if (RetVT.SimpleTy != MVT::v8i8) 6882 return 0; 6883 if ((Subtarget->hasNEON())) { 6884 return fastEmitInst_ri(ARM::VQSHLuiv8i8, &ARM::DPRRegClass, Op0, imm1); 6885 } 6886 return 0; 6887} 6888 6889unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6890 if (RetVT.SimpleTy != MVT::v16i8) 6891 return 0; 6892 if ((Subtarget->hasNEON())) { 6893 return fastEmitInst_ri(ARM::VQSHLuiv16i8, &ARM::QPRRegClass, Op0, imm1); 6894 } 6895 return 0; 6896} 6897 6898unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6899 if (RetVT.SimpleTy != MVT::v4i16) 6900 return 0; 6901 if ((Subtarget->hasNEON())) { 6902 return fastEmitInst_ri(ARM::VQSHLuiv4i16, &ARM::DPRRegClass, Op0, imm1); 6903 } 6904 return 0; 6905} 6906 6907unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6908 if (RetVT.SimpleTy != MVT::v8i16) 6909 return 0; 6910 if ((Subtarget->hasNEON())) { 6911 return fastEmitInst_ri(ARM::VQSHLuiv8i16, &ARM::QPRRegClass, Op0, imm1); 6912 } 6913 return 0; 6914} 6915 6916unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6917 if (RetVT.SimpleTy != MVT::v2i32) 6918 return 0; 6919 if ((Subtarget->hasNEON())) { 6920 return fastEmitInst_ri(ARM::VQSHLuiv2i32, &ARM::DPRRegClass, Op0, imm1); 6921 } 6922 return 0; 6923} 6924 6925unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6926 if (RetVT.SimpleTy != MVT::v4i32) 6927 return 0; 6928 if ((Subtarget->hasNEON())) { 6929 return fastEmitInst_ri(ARM::VQSHLuiv4i32, &ARM::QPRRegClass, Op0, imm1); 6930 } 6931 return 0; 6932} 6933 6934unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6935 if (RetVT.SimpleTy != MVT::v1i64) 6936 return 0; 6937 if ((Subtarget->hasNEON())) { 6938 return fastEmitInst_ri(ARM::VQSHLuiv1i64, &ARM::DPRRegClass, Op0, imm1); 6939 } 6940 return 0; 6941} 6942 6943unsigned fastEmit_ARMISD_VQSHLuIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6944 if (RetVT.SimpleTy != MVT::v2i64) 6945 return 0; 6946 if ((Subtarget->hasNEON())) { 6947 return fastEmitInst_ri(ARM::VQSHLuiv2i64, &ARM::QPRRegClass, Op0, imm1); 6948 } 6949 return 0; 6950} 6951 6952unsigned fastEmit_ARMISD_VQSHLuIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 6953 switch (VT.SimpleTy) { 6954 case MVT::v8i8: return fastEmit_ARMISD_VQSHLuIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 6955 case MVT::v16i8: return fastEmit_ARMISD_VQSHLuIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 6956 case MVT::v4i16: return fastEmit_ARMISD_VQSHLuIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 6957 case MVT::v8i16: return fastEmit_ARMISD_VQSHLuIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 6958 case MVT::v2i32: return fastEmit_ARMISD_VQSHLuIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 6959 case MVT::v4i32: return fastEmit_ARMISD_VQSHLuIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 6960 case MVT::v1i64: return fastEmit_ARMISD_VQSHLuIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 6961 case MVT::v2i64: return fastEmit_ARMISD_VQSHLuIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 6962 default: return 0; 6963 } 6964} 6965 6966// FastEmit functions for ARMISD::VRSHRsIMM. 6967 6968unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6969 if (RetVT.SimpleTy != MVT::v8i8) 6970 return 0; 6971 if ((Subtarget->hasNEON())) { 6972 return fastEmitInst_ri(ARM::VRSHRsv8i8, &ARM::DPRRegClass, Op0, imm1); 6973 } 6974 return 0; 6975} 6976 6977unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6978 if (RetVT.SimpleTy != MVT::v16i8) 6979 return 0; 6980 if ((Subtarget->hasNEON())) { 6981 return fastEmitInst_ri(ARM::VRSHRsv16i8, &ARM::QPRRegClass, Op0, imm1); 6982 } 6983 return 0; 6984} 6985 6986unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6987 if (RetVT.SimpleTy != MVT::v4i16) 6988 return 0; 6989 if ((Subtarget->hasNEON())) { 6990 return fastEmitInst_ri(ARM::VRSHRsv4i16, &ARM::DPRRegClass, Op0, imm1); 6991 } 6992 return 0; 6993} 6994 6995unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 6996 if (RetVT.SimpleTy != MVT::v8i16) 6997 return 0; 6998 if ((Subtarget->hasNEON())) { 6999 return fastEmitInst_ri(ARM::VRSHRsv8i16, &ARM::QPRRegClass, Op0, imm1); 7000 } 7001 return 0; 7002} 7003 7004unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7005 if (RetVT.SimpleTy != MVT::v2i32) 7006 return 0; 7007 if ((Subtarget->hasNEON())) { 7008 return fastEmitInst_ri(ARM::VRSHRsv2i32, &ARM::DPRRegClass, Op0, imm1); 7009 } 7010 return 0; 7011} 7012 7013unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7014 if (RetVT.SimpleTy != MVT::v4i32) 7015 return 0; 7016 if ((Subtarget->hasNEON())) { 7017 return fastEmitInst_ri(ARM::VRSHRsv4i32, &ARM::QPRRegClass, Op0, imm1); 7018 } 7019 return 0; 7020} 7021 7022unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7023 if (RetVT.SimpleTy != MVT::v1i64) 7024 return 0; 7025 if ((Subtarget->hasNEON())) { 7026 return fastEmitInst_ri(ARM::VRSHRsv1i64, &ARM::DPRRegClass, Op0, imm1); 7027 } 7028 return 0; 7029} 7030 7031unsigned fastEmit_ARMISD_VRSHRsIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7032 if (RetVT.SimpleTy != MVT::v2i64) 7033 return 0; 7034 if ((Subtarget->hasNEON())) { 7035 return fastEmitInst_ri(ARM::VRSHRsv2i64, &ARM::QPRRegClass, Op0, imm1); 7036 } 7037 return 0; 7038} 7039 7040unsigned fastEmit_ARMISD_VRSHRsIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7041 switch (VT.SimpleTy) { 7042 case MVT::v8i8: return fastEmit_ARMISD_VRSHRsIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 7043 case MVT::v16i8: return fastEmit_ARMISD_VRSHRsIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 7044 case MVT::v4i16: return fastEmit_ARMISD_VRSHRsIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 7045 case MVT::v8i16: return fastEmit_ARMISD_VRSHRsIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 7046 case MVT::v2i32: return fastEmit_ARMISD_VRSHRsIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 7047 case MVT::v4i32: return fastEmit_ARMISD_VRSHRsIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 7048 case MVT::v1i64: return fastEmit_ARMISD_VRSHRsIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 7049 case MVT::v2i64: return fastEmit_ARMISD_VRSHRsIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 7050 default: return 0; 7051 } 7052} 7053 7054// FastEmit functions for ARMISD::VRSHRuIMM. 7055 7056unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7057 if (RetVT.SimpleTy != MVT::v8i8) 7058 return 0; 7059 if ((Subtarget->hasNEON())) { 7060 return fastEmitInst_ri(ARM::VRSHRuv8i8, &ARM::DPRRegClass, Op0, imm1); 7061 } 7062 return 0; 7063} 7064 7065unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7066 if (RetVT.SimpleTy != MVT::v16i8) 7067 return 0; 7068 if ((Subtarget->hasNEON())) { 7069 return fastEmitInst_ri(ARM::VRSHRuv16i8, &ARM::QPRRegClass, Op0, imm1); 7070 } 7071 return 0; 7072} 7073 7074unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7075 if (RetVT.SimpleTy != MVT::v4i16) 7076 return 0; 7077 if ((Subtarget->hasNEON())) { 7078 return fastEmitInst_ri(ARM::VRSHRuv4i16, &ARM::DPRRegClass, Op0, imm1); 7079 } 7080 return 0; 7081} 7082 7083unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7084 if (RetVT.SimpleTy != MVT::v8i16) 7085 return 0; 7086 if ((Subtarget->hasNEON())) { 7087 return fastEmitInst_ri(ARM::VRSHRuv8i16, &ARM::QPRRegClass, Op0, imm1); 7088 } 7089 return 0; 7090} 7091 7092unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7093 if (RetVT.SimpleTy != MVT::v2i32) 7094 return 0; 7095 if ((Subtarget->hasNEON())) { 7096 return fastEmitInst_ri(ARM::VRSHRuv2i32, &ARM::DPRRegClass, Op0, imm1); 7097 } 7098 return 0; 7099} 7100 7101unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7102 if (RetVT.SimpleTy != MVT::v4i32) 7103 return 0; 7104 if ((Subtarget->hasNEON())) { 7105 return fastEmitInst_ri(ARM::VRSHRuv4i32, &ARM::QPRRegClass, Op0, imm1); 7106 } 7107 return 0; 7108} 7109 7110unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7111 if (RetVT.SimpleTy != MVT::v1i64) 7112 return 0; 7113 if ((Subtarget->hasNEON())) { 7114 return fastEmitInst_ri(ARM::VRSHRuv1i64, &ARM::DPRRegClass, Op0, imm1); 7115 } 7116 return 0; 7117} 7118 7119unsigned fastEmit_ARMISD_VRSHRuIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7120 if (RetVT.SimpleTy != MVT::v2i64) 7121 return 0; 7122 if ((Subtarget->hasNEON())) { 7123 return fastEmitInst_ri(ARM::VRSHRuv2i64, &ARM::QPRRegClass, Op0, imm1); 7124 } 7125 return 0; 7126} 7127 7128unsigned fastEmit_ARMISD_VRSHRuIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7129 switch (VT.SimpleTy) { 7130 case MVT::v8i8: return fastEmit_ARMISD_VRSHRuIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 7131 case MVT::v16i8: return fastEmit_ARMISD_VRSHRuIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 7132 case MVT::v4i16: return fastEmit_ARMISD_VRSHRuIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 7133 case MVT::v8i16: return fastEmit_ARMISD_VRSHRuIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 7134 case MVT::v2i32: return fastEmit_ARMISD_VRSHRuIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 7135 case MVT::v4i32: return fastEmit_ARMISD_VRSHRuIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 7136 case MVT::v1i64: return fastEmit_ARMISD_VRSHRuIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 7137 case MVT::v2i64: return fastEmit_ARMISD_VRSHRuIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 7138 default: return 0; 7139 } 7140} 7141 7142// FastEmit functions for ARMISD::VSHLIMM. 7143 7144unsigned fastEmit_ARMISD_VSHLIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7145 if (RetVT.SimpleTy != MVT::v8i8) 7146 return 0; 7147 if ((Subtarget->hasNEON())) { 7148 return fastEmitInst_ri(ARM::VSHLiv8i8, &ARM::DPRRegClass, Op0, imm1); 7149 } 7150 return 0; 7151} 7152 7153unsigned fastEmit_ARMISD_VSHLIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7154 if (RetVT.SimpleTy != MVT::v16i8) 7155 return 0; 7156 if ((Subtarget->hasNEON())) { 7157 return fastEmitInst_ri(ARM::VSHLiv16i8, &ARM::QPRRegClass, Op0, imm1); 7158 } 7159 return 0; 7160} 7161 7162unsigned fastEmit_ARMISD_VSHLIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7163 if (RetVT.SimpleTy != MVT::v4i16) 7164 return 0; 7165 if ((Subtarget->hasNEON())) { 7166 return fastEmitInst_ri(ARM::VSHLiv4i16, &ARM::DPRRegClass, Op0, imm1); 7167 } 7168 return 0; 7169} 7170 7171unsigned fastEmit_ARMISD_VSHLIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7172 if (RetVT.SimpleTy != MVT::v8i16) 7173 return 0; 7174 if ((Subtarget->hasNEON())) { 7175 return fastEmitInst_ri(ARM::VSHLiv8i16, &ARM::QPRRegClass, Op0, imm1); 7176 } 7177 return 0; 7178} 7179 7180unsigned fastEmit_ARMISD_VSHLIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7181 if (RetVT.SimpleTy != MVT::v2i32) 7182 return 0; 7183 if ((Subtarget->hasNEON())) { 7184 return fastEmitInst_ri(ARM::VSHLiv2i32, &ARM::DPRRegClass, Op0, imm1); 7185 } 7186 return 0; 7187} 7188 7189unsigned fastEmit_ARMISD_VSHLIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7190 if (RetVT.SimpleTy != MVT::v4i32) 7191 return 0; 7192 if ((Subtarget->hasNEON())) { 7193 return fastEmitInst_ri(ARM::VSHLiv4i32, &ARM::QPRRegClass, Op0, imm1); 7194 } 7195 return 0; 7196} 7197 7198unsigned fastEmit_ARMISD_VSHLIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7199 if (RetVT.SimpleTy != MVT::v1i64) 7200 return 0; 7201 if ((Subtarget->hasNEON())) { 7202 return fastEmitInst_ri(ARM::VSHLiv1i64, &ARM::DPRRegClass, Op0, imm1); 7203 } 7204 return 0; 7205} 7206 7207unsigned fastEmit_ARMISD_VSHLIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7208 if (RetVT.SimpleTy != MVT::v2i64) 7209 return 0; 7210 if ((Subtarget->hasNEON())) { 7211 return fastEmitInst_ri(ARM::VSHLiv2i64, &ARM::QPRRegClass, Op0, imm1); 7212 } 7213 return 0; 7214} 7215 7216unsigned fastEmit_ARMISD_VSHLIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7217 switch (VT.SimpleTy) { 7218 case MVT::v8i8: return fastEmit_ARMISD_VSHLIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 7219 case MVT::v16i8: return fastEmit_ARMISD_VSHLIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 7220 case MVT::v4i16: return fastEmit_ARMISD_VSHLIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 7221 case MVT::v8i16: return fastEmit_ARMISD_VSHLIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 7222 case MVT::v2i32: return fastEmit_ARMISD_VSHLIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 7223 case MVT::v4i32: return fastEmit_ARMISD_VSHLIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 7224 case MVT::v1i64: return fastEmit_ARMISD_VSHLIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 7225 case MVT::v2i64: return fastEmit_ARMISD_VSHLIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 7226 default: return 0; 7227 } 7228} 7229 7230// FastEmit functions for ARMISD::VSHRsIMM. 7231 7232unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7233 if (RetVT.SimpleTy != MVT::v8i8) 7234 return 0; 7235 if ((Subtarget->hasNEON())) { 7236 return fastEmitInst_ri(ARM::VSHRsv8i8, &ARM::DPRRegClass, Op0, imm1); 7237 } 7238 return 0; 7239} 7240 7241unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7242 if (RetVT.SimpleTy != MVT::v16i8) 7243 return 0; 7244 if ((Subtarget->hasNEON())) { 7245 return fastEmitInst_ri(ARM::VSHRsv16i8, &ARM::QPRRegClass, Op0, imm1); 7246 } 7247 return 0; 7248} 7249 7250unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7251 if (RetVT.SimpleTy != MVT::v4i16) 7252 return 0; 7253 if ((Subtarget->hasNEON())) { 7254 return fastEmitInst_ri(ARM::VSHRsv4i16, &ARM::DPRRegClass, Op0, imm1); 7255 } 7256 return 0; 7257} 7258 7259unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7260 if (RetVT.SimpleTy != MVT::v8i16) 7261 return 0; 7262 if ((Subtarget->hasNEON())) { 7263 return fastEmitInst_ri(ARM::VSHRsv8i16, &ARM::QPRRegClass, Op0, imm1); 7264 } 7265 return 0; 7266} 7267 7268unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7269 if (RetVT.SimpleTy != MVT::v2i32) 7270 return 0; 7271 if ((Subtarget->hasNEON())) { 7272 return fastEmitInst_ri(ARM::VSHRsv2i32, &ARM::DPRRegClass, Op0, imm1); 7273 } 7274 return 0; 7275} 7276 7277unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7278 if (RetVT.SimpleTy != MVT::v4i32) 7279 return 0; 7280 if ((Subtarget->hasNEON())) { 7281 return fastEmitInst_ri(ARM::VSHRsv4i32, &ARM::QPRRegClass, Op0, imm1); 7282 } 7283 return 0; 7284} 7285 7286unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7287 if (RetVT.SimpleTy != MVT::v1i64) 7288 return 0; 7289 if ((Subtarget->hasNEON())) { 7290 return fastEmitInst_ri(ARM::VSHRsv1i64, &ARM::DPRRegClass, Op0, imm1); 7291 } 7292 return 0; 7293} 7294 7295unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7296 if (RetVT.SimpleTy != MVT::v2i64) 7297 return 0; 7298 if ((Subtarget->hasNEON())) { 7299 return fastEmitInst_ri(ARM::VSHRsv2i64, &ARM::QPRRegClass, Op0, imm1); 7300 } 7301 return 0; 7302} 7303 7304unsigned fastEmit_ARMISD_VSHRsIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7305 switch (VT.SimpleTy) { 7306 case MVT::v8i8: return fastEmit_ARMISD_VSHRsIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 7307 case MVT::v16i8: return fastEmit_ARMISD_VSHRsIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 7308 case MVT::v4i16: return fastEmit_ARMISD_VSHRsIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 7309 case MVT::v8i16: return fastEmit_ARMISD_VSHRsIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 7310 case MVT::v2i32: return fastEmit_ARMISD_VSHRsIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 7311 case MVT::v4i32: return fastEmit_ARMISD_VSHRsIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 7312 case MVT::v1i64: return fastEmit_ARMISD_VSHRsIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 7313 case MVT::v2i64: return fastEmit_ARMISD_VSHRsIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 7314 default: return 0; 7315 } 7316} 7317 7318// FastEmit functions for ARMISD::VSHRuIMM. 7319 7320unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v8i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7321 if (RetVT.SimpleTy != MVT::v8i8) 7322 return 0; 7323 if ((Subtarget->hasNEON())) { 7324 return fastEmitInst_ri(ARM::VSHRuv8i8, &ARM::DPRRegClass, Op0, imm1); 7325 } 7326 return 0; 7327} 7328 7329unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v16i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7330 if (RetVT.SimpleTy != MVT::v16i8) 7331 return 0; 7332 if ((Subtarget->hasNEON())) { 7333 return fastEmitInst_ri(ARM::VSHRuv16i8, &ARM::QPRRegClass, Op0, imm1); 7334 } 7335 return 0; 7336} 7337 7338unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v4i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7339 if (RetVT.SimpleTy != MVT::v4i16) 7340 return 0; 7341 if ((Subtarget->hasNEON())) { 7342 return fastEmitInst_ri(ARM::VSHRuv4i16, &ARM::DPRRegClass, Op0, imm1); 7343 } 7344 return 0; 7345} 7346 7347unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v8i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7348 if (RetVT.SimpleTy != MVT::v8i16) 7349 return 0; 7350 if ((Subtarget->hasNEON())) { 7351 return fastEmitInst_ri(ARM::VSHRuv8i16, &ARM::QPRRegClass, Op0, imm1); 7352 } 7353 return 0; 7354} 7355 7356unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7357 if (RetVT.SimpleTy != MVT::v2i32) 7358 return 0; 7359 if ((Subtarget->hasNEON())) { 7360 return fastEmitInst_ri(ARM::VSHRuv2i32, &ARM::DPRRegClass, Op0, imm1); 7361 } 7362 return 0; 7363} 7364 7365unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v4i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7366 if (RetVT.SimpleTy != MVT::v4i32) 7367 return 0; 7368 if ((Subtarget->hasNEON())) { 7369 return fastEmitInst_ri(ARM::VSHRuv4i32, &ARM::QPRRegClass, Op0, imm1); 7370 } 7371 return 0; 7372} 7373 7374unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v1i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7375 if (RetVT.SimpleTy != MVT::v1i64) 7376 return 0; 7377 if ((Subtarget->hasNEON())) { 7378 return fastEmitInst_ri(ARM::VSHRuv1i64, &ARM::DPRRegClass, Op0, imm1); 7379 } 7380 return 0; 7381} 7382 7383unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v2i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7384 if (RetVT.SimpleTy != MVT::v2i64) 7385 return 0; 7386 if ((Subtarget->hasNEON())) { 7387 return fastEmitInst_ri(ARM::VSHRuv2i64, &ARM::QPRRegClass, Op0, imm1); 7388 } 7389 return 0; 7390} 7391 7392unsigned fastEmit_ARMISD_VSHRuIMM_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7393 switch (VT.SimpleTy) { 7394 case MVT::v8i8: return fastEmit_ARMISD_VSHRuIMM_MVT_v8i8_ri(RetVT, Op0, imm1); 7395 case MVT::v16i8: return fastEmit_ARMISD_VSHRuIMM_MVT_v16i8_ri(RetVT, Op0, imm1); 7396 case MVT::v4i16: return fastEmit_ARMISD_VSHRuIMM_MVT_v4i16_ri(RetVT, Op0, imm1); 7397 case MVT::v8i16: return fastEmit_ARMISD_VSHRuIMM_MVT_v8i16_ri(RetVT, Op0, imm1); 7398 case MVT::v2i32: return fastEmit_ARMISD_VSHRuIMM_MVT_v2i32_ri(RetVT, Op0, imm1); 7399 case MVT::v4i32: return fastEmit_ARMISD_VSHRuIMM_MVT_v4i32_ri(RetVT, Op0, imm1); 7400 case MVT::v1i64: return fastEmit_ARMISD_VSHRuIMM_MVT_v1i64_ri(RetVT, Op0, imm1); 7401 case MVT::v2i64: return fastEmit_ARMISD_VSHRuIMM_MVT_v2i64_ri(RetVT, Op0, imm1); 7402 default: return 0; 7403 } 7404} 7405 7406// FastEmit functions for ISD::EXTRACT_VECTOR_ELT. 7407 7408unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_MVT_v2i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7409 if (RetVT.SimpleTy != MVT::i32) 7410 return 0; 7411 if ((Subtarget->hasFPRegs()) && (!Subtarget->hasSlowVGETLNi32())) { 7412 return fastEmitInst_ri(ARM::VGETLNi32, &ARM::GPRRegClass, Op0, imm1); 7413 } 7414 return 0; 7415} 7416 7417unsigned fastEmit_ISD_EXTRACT_VECTOR_ELT_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7418 switch (VT.SimpleTy) { 7419 case MVT::v2i32: return fastEmit_ISD_EXTRACT_VECTOR_ELT_MVT_v2i32_ri(RetVT, Op0, imm1); 7420 default: return 0; 7421 } 7422} 7423 7424// FastEmit functions for ISD::SHL. 7425 7426unsigned fastEmit_ISD_SHL_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) { 7427 if (RetVT.SimpleTy != MVT::i32) 7428 return 0; 7429 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7430 return fastEmitInst_ri(ARM::tLSLri, &ARM::tGPRRegClass, Op0, imm1); 7431 } 7432 return 0; 7433} 7434 7435unsigned fastEmit_ISD_SHL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7436 switch (VT.SimpleTy) { 7437 case MVT::i32: return fastEmit_ISD_SHL_MVT_i32_ri(RetVT, Op0, imm1); 7438 default: return 0; 7439 } 7440} 7441 7442// Top-level FastEmit function. 7443 7444unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) override { 7445 if (VT == MVT::i32 && Predicate_mod_imm(imm1)) 7446 if (unsigned Reg = fastEmit_ri_Predicate_mod_imm(VT, RetVT, Opcode, Op0, imm1)) 7447 return Reg; 7448 7449 if (VT == MVT::i32 && Predicate_imm0_7(imm1)) 7450 if (unsigned Reg = fastEmit_ri_Predicate_imm0_7(VT, RetVT, Opcode, Op0, imm1)) 7451 return Reg; 7452 7453 if (VT == MVT::i32 && Predicate_imm8_255(imm1)) 7454 if (unsigned Reg = fastEmit_ri_Predicate_imm8_255(VT, RetVT, Opcode, Op0, imm1)) 7455 return Reg; 7456 7457 if (VT == MVT::i32 && Predicate_imm0_255(imm1)) 7458 if (unsigned Reg = fastEmit_ri_Predicate_imm0_255(VT, RetVT, Opcode, Op0, imm1)) 7459 return Reg; 7460 7461 if (VT == MVT::i32 && Predicate_t2_so_imm(imm1)) 7462 if (unsigned Reg = fastEmit_ri_Predicate_t2_so_imm(VT, RetVT, Opcode, Op0, imm1)) 7463 return Reg; 7464 7465 if (VT == MVT::i32 && Predicate_imm0_4095(imm1)) 7466 if (unsigned Reg = fastEmit_ri_Predicate_imm0_4095(VT, RetVT, Opcode, Op0, imm1)) 7467 return Reg; 7468 7469 if (VT == MVT::i32 && Predicate_imm1_31(imm1)) 7470 if (unsigned Reg = fastEmit_ri_Predicate_imm1_31(VT, RetVT, Opcode, Op0, imm1)) 7471 return Reg; 7472 7473 if (VT == MVT::i32 && Predicate_shr_imm8(imm1)) 7474 if (unsigned Reg = fastEmit_ri_Predicate_shr_imm8(VT, RetVT, Opcode, Op0, imm1)) 7475 return Reg; 7476 7477 if (VT == MVT::i32 && Predicate_shr_imm16(imm1)) 7478 if (unsigned Reg = fastEmit_ri_Predicate_shr_imm16(VT, RetVT, Opcode, Op0, imm1)) 7479 return Reg; 7480 7481 if (VT == MVT::i32 && Predicate_shr_imm32(imm1)) 7482 if (unsigned Reg = fastEmit_ri_Predicate_shr_imm32(VT, RetVT, Opcode, Op0, imm1)) 7483 return Reg; 7484 7485 if (VT == MVT::i32 && Predicate_VectorIndex32(imm1)) 7486 if (unsigned Reg = fastEmit_ri_Predicate_VectorIndex32(VT, RetVT, Opcode, Op0, imm1)) 7487 return Reg; 7488 7489 if (VT == MVT::i32 && Predicate_imm0_31(imm1)) 7490 if (unsigned Reg = fastEmit_ri_Predicate_imm0_31(VT, RetVT, Opcode, Op0, imm1)) 7491 return Reg; 7492 7493 if (VT == MVT::i32 && Predicate_imm0_15(imm1)) 7494 if (unsigned Reg = fastEmit_ri_Predicate_imm0_15(VT, RetVT, Opcode, Op0, imm1)) 7495 return Reg; 7496 7497 switch (Opcode) { 7498 case ARMISD::PIC_ADD: return fastEmit_ARMISD_PIC_ADD_ri(VT, RetVT, Op0, imm1); 7499 case ARMISD::VDUPLANE: return fastEmit_ARMISD_VDUPLANE_ri(VT, RetVT, Op0, imm1); 7500 case ARMISD::VGETLANEs: return fastEmit_ARMISD_VGETLANEs_ri(VT, RetVT, Op0, imm1); 7501 case ARMISD::VGETLANEu: return fastEmit_ARMISD_VGETLANEu_ri(VT, RetVT, Op0, imm1); 7502 case ARMISD::VQSHLsIMM: return fastEmit_ARMISD_VQSHLsIMM_ri(VT, RetVT, Op0, imm1); 7503 case ARMISD::VQSHLsuIMM: return fastEmit_ARMISD_VQSHLsuIMM_ri(VT, RetVT, Op0, imm1); 7504 case ARMISD::VQSHLuIMM: return fastEmit_ARMISD_VQSHLuIMM_ri(VT, RetVT, Op0, imm1); 7505 case ARMISD::VRSHRsIMM: return fastEmit_ARMISD_VRSHRsIMM_ri(VT, RetVT, Op0, imm1); 7506 case ARMISD::VRSHRuIMM: return fastEmit_ARMISD_VRSHRuIMM_ri(VT, RetVT, Op0, imm1); 7507 case ARMISD::VSHLIMM: return fastEmit_ARMISD_VSHLIMM_ri(VT, RetVT, Op0, imm1); 7508 case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri(VT, RetVT, Op0, imm1); 7509 case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri(VT, RetVT, Op0, imm1); 7510 case ISD::EXTRACT_VECTOR_ELT: return fastEmit_ISD_EXTRACT_VECTOR_ELT_ri(VT, RetVT, Op0, imm1); 7511 case ISD::SHL: return fastEmit_ISD_SHL_ri(VT, RetVT, Op0, imm1); 7512 default: return 0; 7513 } 7514} 7515 7516// FastEmit functions for ARMISD::CMN. 7517 7518unsigned fastEmit_ARMISD_CMN_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7519 if (RetVT.SimpleTy != MVT::isVoid) 7520 return 0; 7521 if ((!Subtarget->isThumb())) { 7522 return fastEmitInst_ri(ARM::CMNri, &ARM::GPRRegClass, Op0, imm1); 7523 } 7524 return 0; 7525} 7526 7527unsigned fastEmit_ARMISD_CMN_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7528 switch (VT.SimpleTy) { 7529 case MVT::i32: return fastEmit_ARMISD_CMN_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7530 default: return 0; 7531 } 7532} 7533 7534// FastEmit functions for ARMISD::CMP. 7535 7536unsigned fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7537 if (RetVT.SimpleTy != MVT::isVoid) 7538 return 0; 7539 if ((!Subtarget->isThumb())) { 7540 return fastEmitInst_ri(ARM::CMPri, &ARM::GPRRegClass, Op0, imm1); 7541 } 7542 return 0; 7543} 7544 7545unsigned fastEmit_ARMISD_CMP_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7546 switch (VT.SimpleTy) { 7547 case MVT::i32: return fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7548 default: return 0; 7549 } 7550} 7551 7552// FastEmit functions for ARMISD::CMPZ. 7553 7554unsigned fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7555 if (RetVT.SimpleTy != MVT::isVoid) 7556 return 0; 7557 if ((!Subtarget->isThumb())) { 7558 return fastEmitInst_ri(ARM::CMPri, &ARM::GPRRegClass, Op0, imm1); 7559 } 7560 return 0; 7561} 7562 7563unsigned fastEmit_ARMISD_CMPZ_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7564 switch (VT.SimpleTy) { 7565 case MVT::i32: return fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7566 default: return 0; 7567 } 7568} 7569 7570// FastEmit functions for ARMISD::SUBS. 7571 7572unsigned fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7573 if (RetVT.SimpleTy != MVT::i32) 7574 return 0; 7575 if ((!Subtarget->isThumb())) { 7576 return fastEmitInst_ri(ARM::SUBSri, &ARM::GPRRegClass, Op0, imm1); 7577 } 7578 return 0; 7579} 7580 7581unsigned fastEmit_ARMISD_SUBS_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7582 switch (VT.SimpleTy) { 7583 case MVT::i32: return fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7584 default: return 0; 7585 } 7586} 7587 7588// FastEmit functions for ISD::ADD. 7589 7590unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7591 if (RetVT.SimpleTy != MVT::i32) 7592 return 0; 7593 if ((!Subtarget->isThumb())) { 7594 return fastEmitInst_ri(ARM::ADDri, &ARM::GPRRegClass, Op0, imm1); 7595 } 7596 return 0; 7597} 7598 7599unsigned fastEmit_ISD_ADD_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7600 switch (VT.SimpleTy) { 7601 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7602 default: return 0; 7603 } 7604} 7605 7606// FastEmit functions for ISD::AND. 7607 7608unsigned fastEmit_ISD_AND_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7609 if (RetVT.SimpleTy != MVT::i32) 7610 return 0; 7611 if ((!Subtarget->isThumb())) { 7612 return fastEmitInst_ri(ARM::ANDri, &ARM::GPRRegClass, Op0, imm1); 7613 } 7614 return 0; 7615} 7616 7617unsigned fastEmit_ISD_AND_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7618 switch (VT.SimpleTy) { 7619 case MVT::i32: return fastEmit_ISD_AND_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7620 default: return 0; 7621 } 7622} 7623 7624// FastEmit functions for ISD::OR. 7625 7626unsigned fastEmit_ISD_OR_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7627 if (RetVT.SimpleTy != MVT::i32) 7628 return 0; 7629 if ((!Subtarget->isThumb())) { 7630 return fastEmitInst_ri(ARM::ORRri, &ARM::GPRRegClass, Op0, imm1); 7631 } 7632 return 0; 7633} 7634 7635unsigned fastEmit_ISD_OR_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7636 switch (VT.SimpleTy) { 7637 case MVT::i32: return fastEmit_ISD_OR_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7638 default: return 0; 7639 } 7640} 7641 7642// FastEmit functions for ISD::SUB. 7643 7644unsigned fastEmit_ISD_SUB_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7645 if (RetVT.SimpleTy != MVT::i32) 7646 return 0; 7647 if ((!Subtarget->isThumb())) { 7648 return fastEmitInst_ri(ARM::SUBri, &ARM::GPRRegClass, Op0, imm1); 7649 } 7650 return 0; 7651} 7652 7653unsigned fastEmit_ISD_SUB_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7654 switch (VT.SimpleTy) { 7655 case MVT::i32: return fastEmit_ISD_SUB_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7656 default: return 0; 7657 } 7658} 7659 7660// FastEmit functions for ISD::XOR. 7661 7662unsigned fastEmit_ISD_XOR_MVT_i32_ri_Predicate_mod_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7663 if (RetVT.SimpleTy != MVT::i32) 7664 return 0; 7665 if ((!Subtarget->isThumb())) { 7666 return fastEmitInst_ri(ARM::EORri, &ARM::GPRRegClass, Op0, imm1); 7667 } 7668 return 0; 7669} 7670 7671unsigned fastEmit_ISD_XOR_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7672 switch (VT.SimpleTy) { 7673 case MVT::i32: return fastEmit_ISD_XOR_MVT_i32_ri_Predicate_mod_imm(RetVT, Op0, imm1); 7674 default: return 0; 7675 } 7676} 7677 7678// Top-level FastEmit function. 7679 7680unsigned fastEmit_ri_Predicate_mod_imm(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 7681 switch (Opcode) { 7682 case ARMISD::CMN: return fastEmit_ARMISD_CMN_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7683 case ARMISD::CMP: return fastEmit_ARMISD_CMP_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7684 case ARMISD::CMPZ: return fastEmit_ARMISD_CMPZ_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7685 case ARMISD::SUBS: return fastEmit_ARMISD_SUBS_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7686 case ISD::ADD: return fastEmit_ISD_ADD_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7687 case ISD::AND: return fastEmit_ISD_AND_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7688 case ISD::OR: return fastEmit_ISD_OR_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7689 case ISD::SUB: return fastEmit_ISD_SUB_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7690 case ISD::XOR: return fastEmit_ISD_XOR_ri_Predicate_mod_imm(VT, RetVT, Op0, imm1); 7691 default: return 0; 7692 } 7693} 7694 7695// FastEmit functions for ARMISD::SUBS. 7696 7697unsigned fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_imm0_7(MVT RetVT, unsigned Op0, uint64_t imm1) { 7698 if (RetVT.SimpleTy != MVT::i32) 7699 return 0; 7700 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7701 return fastEmitInst_ri(ARM::tSUBSi3, &ARM::tGPRRegClass, Op0, imm1); 7702 } 7703 return 0; 7704} 7705 7706unsigned fastEmit_ARMISD_SUBS_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7707 switch (VT.SimpleTy) { 7708 case MVT::i32: return fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_imm0_7(RetVT, Op0, imm1); 7709 default: return 0; 7710 } 7711} 7712 7713// FastEmit functions for ARMISD::VSHLIMM. 7714 7715unsigned fastEmit_ARMISD_VSHLIMM_MVT_v16i8_ri_Predicate_imm0_7(MVT RetVT, unsigned Op0, uint64_t imm1) { 7716 if (RetVT.SimpleTy != MVT::v16i8) 7717 return 0; 7718 if ((Subtarget->hasMVEIntegerOps())) { 7719 return fastEmitInst_ri(ARM::MVE_VSHL_immi8, &ARM::MQPRRegClass, Op0, imm1); 7720 } 7721 return 0; 7722} 7723 7724unsigned fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7725 switch (VT.SimpleTy) { 7726 case MVT::v16i8: return fastEmit_ARMISD_VSHLIMM_MVT_v16i8_ri_Predicate_imm0_7(RetVT, Op0, imm1); 7727 default: return 0; 7728 } 7729} 7730 7731// FastEmit functions for ARMISD::VSHRsIMM. 7732 7733unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v16i8_ri_Predicate_imm0_7(MVT RetVT, unsigned Op0, uint64_t imm1) { 7734 if (RetVT.SimpleTy != MVT::v16i8) 7735 return 0; 7736 if ((Subtarget->hasMVEIntegerOps())) { 7737 return fastEmitInst_ri(ARM::MVE_VSHR_imms8, &ARM::MQPRRegClass, Op0, imm1); 7738 } 7739 return 0; 7740} 7741 7742unsigned fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7743 switch (VT.SimpleTy) { 7744 case MVT::v16i8: return fastEmit_ARMISD_VSHRsIMM_MVT_v16i8_ri_Predicate_imm0_7(RetVT, Op0, imm1); 7745 default: return 0; 7746 } 7747} 7748 7749// FastEmit functions for ARMISD::VSHRuIMM. 7750 7751unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v16i8_ri_Predicate_imm0_7(MVT RetVT, unsigned Op0, uint64_t imm1) { 7752 if (RetVT.SimpleTy != MVT::v16i8) 7753 return 0; 7754 if ((Subtarget->hasMVEIntegerOps())) { 7755 return fastEmitInst_ri(ARM::MVE_VSHR_immu8, &ARM::MQPRRegClass, Op0, imm1); 7756 } 7757 return 0; 7758} 7759 7760unsigned fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7761 switch (VT.SimpleTy) { 7762 case MVT::v16i8: return fastEmit_ARMISD_VSHRuIMM_MVT_v16i8_ri_Predicate_imm0_7(RetVT, Op0, imm1); 7763 default: return 0; 7764 } 7765} 7766 7767// FastEmit functions for ISD::ADD. 7768 7769unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm0_7(MVT RetVT, unsigned Op0, uint64_t imm1) { 7770 if (RetVT.SimpleTy != MVT::i32) 7771 return 0; 7772 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7773 return fastEmitInst_ri(ARM::tADDi3, &ARM::tGPRRegClass, Op0, imm1); 7774 } 7775 return 0; 7776} 7777 7778unsigned fastEmit_ISD_ADD_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7779 switch (VT.SimpleTy) { 7780 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm0_7(RetVT, Op0, imm1); 7781 default: return 0; 7782 } 7783} 7784 7785// Top-level FastEmit function. 7786 7787unsigned fastEmit_ri_Predicate_imm0_7(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 7788 switch (Opcode) { 7789 case ARMISD::SUBS: return fastEmit_ARMISD_SUBS_ri_Predicate_imm0_7(VT, RetVT, Op0, imm1); 7790 case ARMISD::VSHLIMM: return fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_7(VT, RetVT, Op0, imm1); 7791 case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_7(VT, RetVT, Op0, imm1); 7792 case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_7(VT, RetVT, Op0, imm1); 7793 case ISD::ADD: return fastEmit_ISD_ADD_ri_Predicate_imm0_7(VT, RetVT, Op0, imm1); 7794 default: return 0; 7795 } 7796} 7797 7798// FastEmit functions for ISD::ADD. 7799 7800unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm8_255(MVT RetVT, unsigned Op0, uint64_t imm1) { 7801 if (RetVT.SimpleTy != MVT::i32) 7802 return 0; 7803 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7804 return fastEmitInst_ri(ARM::tADDi8, &ARM::tGPRRegClass, Op0, imm1); 7805 } 7806 return 0; 7807} 7808 7809unsigned fastEmit_ISD_ADD_ri_Predicate_imm8_255(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7810 switch (VT.SimpleTy) { 7811 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm8_255(RetVT, Op0, imm1); 7812 default: return 0; 7813 } 7814} 7815 7816// Top-level FastEmit function. 7817 7818unsigned fastEmit_ri_Predicate_imm8_255(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 7819 switch (Opcode) { 7820 case ISD::ADD: return fastEmit_ISD_ADD_ri_Predicate_imm8_255(VT, RetVT, Op0, imm1); 7821 default: return 0; 7822 } 7823} 7824 7825// FastEmit functions for ARMISD::CMP. 7826 7827unsigned fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_imm0_255(MVT RetVT, unsigned Op0, uint64_t imm1) { 7828 if (RetVT.SimpleTy != MVT::isVoid) 7829 return 0; 7830 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7831 return fastEmitInst_ri(ARM::tCMPi8, &ARM::tGPRRegClass, Op0, imm1); 7832 } 7833 return 0; 7834} 7835 7836unsigned fastEmit_ARMISD_CMP_ri_Predicate_imm0_255(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7837 switch (VT.SimpleTy) { 7838 case MVT::i32: return fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_imm0_255(RetVT, Op0, imm1); 7839 default: return 0; 7840 } 7841} 7842 7843// FastEmit functions for ARMISD::CMPZ. 7844 7845unsigned fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_imm0_255(MVT RetVT, unsigned Op0, uint64_t imm1) { 7846 if (RetVT.SimpleTy != MVT::isVoid) 7847 return 0; 7848 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7849 return fastEmitInst_ri(ARM::tCMPi8, &ARM::tGPRRegClass, Op0, imm1); 7850 } 7851 return 0; 7852} 7853 7854unsigned fastEmit_ARMISD_CMPZ_ri_Predicate_imm0_255(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7855 switch (VT.SimpleTy) { 7856 case MVT::i32: return fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_imm0_255(RetVT, Op0, imm1); 7857 default: return 0; 7858 } 7859} 7860 7861// FastEmit functions for ARMISD::SUBS. 7862 7863unsigned fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_imm0_255(MVT RetVT, unsigned Op0, uint64_t imm1) { 7864 if (RetVT.SimpleTy != MVT::i32) 7865 return 0; 7866 if ((Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 7867 return fastEmitInst_ri(ARM::tSUBSi8, &ARM::tGPRRegClass, Op0, imm1); 7868 } 7869 return 0; 7870} 7871 7872unsigned fastEmit_ARMISD_SUBS_ri_Predicate_imm0_255(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7873 switch (VT.SimpleTy) { 7874 case MVT::i32: return fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_imm0_255(RetVT, Op0, imm1); 7875 default: return 0; 7876 } 7877} 7878 7879// Top-level FastEmit function. 7880 7881unsigned fastEmit_ri_Predicate_imm0_255(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 7882 switch (Opcode) { 7883 case ARMISD::CMP: return fastEmit_ARMISD_CMP_ri_Predicate_imm0_255(VT, RetVT, Op0, imm1); 7884 case ARMISD::CMPZ: return fastEmit_ARMISD_CMPZ_ri_Predicate_imm0_255(VT, RetVT, Op0, imm1); 7885 case ARMISD::SUBS: return fastEmit_ARMISD_SUBS_ri_Predicate_imm0_255(VT, RetVT, Op0, imm1); 7886 default: return 0; 7887 } 7888} 7889 7890// FastEmit functions for ARMISD::CMP. 7891 7892unsigned fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7893 if (RetVT.SimpleTy != MVT::isVoid) 7894 return 0; 7895 if ((Subtarget->isThumb2())) { 7896 return fastEmitInst_ri(ARM::t2CMPri, &ARM::GPRnopcRegClass, Op0, imm1); 7897 } 7898 return 0; 7899} 7900 7901unsigned fastEmit_ARMISD_CMP_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7902 switch (VT.SimpleTy) { 7903 case MVT::i32: return fastEmit_ARMISD_CMP_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7904 default: return 0; 7905 } 7906} 7907 7908// FastEmit functions for ARMISD::CMPZ. 7909 7910unsigned fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7911 if (RetVT.SimpleTy != MVT::isVoid) 7912 return 0; 7913 if ((Subtarget->isThumb2())) { 7914 return fastEmitInst_ri(ARM::t2CMPri, &ARM::GPRnopcRegClass, Op0, imm1); 7915 } 7916 return 0; 7917} 7918 7919unsigned fastEmit_ARMISD_CMPZ_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7920 switch (VT.SimpleTy) { 7921 case MVT::i32: return fastEmit_ARMISD_CMPZ_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7922 default: return 0; 7923 } 7924} 7925 7926// FastEmit functions for ARMISD::SUBS. 7927 7928unsigned fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7929 if (RetVT.SimpleTy != MVT::i32) 7930 return 0; 7931 if ((Subtarget->isThumb2())) { 7932 return fastEmitInst_ri(ARM::t2SUBSri, &ARM::rGPRRegClass, Op0, imm1); 7933 } 7934 return 0; 7935} 7936 7937unsigned fastEmit_ARMISD_SUBS_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7938 switch (VT.SimpleTy) { 7939 case MVT::i32: return fastEmit_ARMISD_SUBS_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7940 default: return 0; 7941 } 7942} 7943 7944// FastEmit functions for ISD::ADD. 7945 7946unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7947 if (RetVT.SimpleTy != MVT::i32) 7948 return 0; 7949 if ((Subtarget->isThumb2())) { 7950 return fastEmitInst_ri(ARM::t2ADDri, &ARM::rGPRRegClass, Op0, imm1); 7951 } 7952 return 0; 7953} 7954 7955unsigned fastEmit_ISD_ADD_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7956 switch (VT.SimpleTy) { 7957 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7958 default: return 0; 7959 } 7960} 7961 7962// FastEmit functions for ISD::AND. 7963 7964unsigned fastEmit_ISD_AND_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7965 if (RetVT.SimpleTy != MVT::i32) 7966 return 0; 7967 if ((Subtarget->isThumb2())) { 7968 return fastEmitInst_ri(ARM::t2ANDri, &ARM::rGPRRegClass, Op0, imm1); 7969 } 7970 return 0; 7971} 7972 7973unsigned fastEmit_ISD_AND_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7974 switch (VT.SimpleTy) { 7975 case MVT::i32: return fastEmit_ISD_AND_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7976 default: return 0; 7977 } 7978} 7979 7980// FastEmit functions for ISD::OR. 7981 7982unsigned fastEmit_ISD_OR_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 7983 if (RetVT.SimpleTy != MVT::i32) 7984 return 0; 7985 if ((Subtarget->isThumb2())) { 7986 return fastEmitInst_ri(ARM::t2ORRri, &ARM::rGPRRegClass, Op0, imm1); 7987 } 7988 return 0; 7989} 7990 7991unsigned fastEmit_ISD_OR_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 7992 switch (VT.SimpleTy) { 7993 case MVT::i32: return fastEmit_ISD_OR_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 7994 default: return 0; 7995 } 7996} 7997 7998// FastEmit functions for ISD::SUB. 7999 8000unsigned fastEmit_ISD_SUB_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 8001 if (RetVT.SimpleTy != MVT::i32) 8002 return 0; 8003 if ((Subtarget->isThumb2())) { 8004 return fastEmitInst_ri(ARM::t2SUBri, &ARM::rGPRRegClass, Op0, imm1); 8005 } 8006 return 0; 8007} 8008 8009unsigned fastEmit_ISD_SUB_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8010 switch (VT.SimpleTy) { 8011 case MVT::i32: return fastEmit_ISD_SUB_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 8012 default: return 0; 8013 } 8014} 8015 8016// FastEmit functions for ISD::XOR. 8017 8018unsigned fastEmit_ISD_XOR_MVT_i32_ri_Predicate_t2_so_imm(MVT RetVT, unsigned Op0, uint64_t imm1) { 8019 if (RetVT.SimpleTy != MVT::i32) 8020 return 0; 8021 if ((Subtarget->isThumb2())) { 8022 return fastEmitInst_ri(ARM::t2EORri, &ARM::rGPRRegClass, Op0, imm1); 8023 } 8024 return 0; 8025} 8026 8027unsigned fastEmit_ISD_XOR_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8028 switch (VT.SimpleTy) { 8029 case MVT::i32: return fastEmit_ISD_XOR_MVT_i32_ri_Predicate_t2_so_imm(RetVT, Op0, imm1); 8030 default: return 0; 8031 } 8032} 8033 8034// Top-level FastEmit function. 8035 8036unsigned fastEmit_ri_Predicate_t2_so_imm(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8037 switch (Opcode) { 8038 case ARMISD::CMP: return fastEmit_ARMISD_CMP_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8039 case ARMISD::CMPZ: return fastEmit_ARMISD_CMPZ_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8040 case ARMISD::SUBS: return fastEmit_ARMISD_SUBS_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8041 case ISD::ADD: return fastEmit_ISD_ADD_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8042 case ISD::AND: return fastEmit_ISD_AND_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8043 case ISD::OR: return fastEmit_ISD_OR_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8044 case ISD::SUB: return fastEmit_ISD_SUB_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8045 case ISD::XOR: return fastEmit_ISD_XOR_ri_Predicate_t2_so_imm(VT, RetVT, Op0, imm1); 8046 default: return 0; 8047 } 8048} 8049 8050// FastEmit functions for ISD::ADD. 8051 8052unsigned fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm0_4095(MVT RetVT, unsigned Op0, uint64_t imm1) { 8053 if (RetVT.SimpleTy != MVT::i32) 8054 return 0; 8055 if ((Subtarget->isThumb2())) { 8056 return fastEmitInst_ri(ARM::t2ADDri12, &ARM::rGPRRegClass, Op0, imm1); 8057 } 8058 return 0; 8059} 8060 8061unsigned fastEmit_ISD_ADD_ri_Predicate_imm0_4095(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8062 switch (VT.SimpleTy) { 8063 case MVT::i32: return fastEmit_ISD_ADD_MVT_i32_ri_Predicate_imm0_4095(RetVT, Op0, imm1); 8064 default: return 0; 8065 } 8066} 8067 8068// FastEmit functions for ISD::SUB. 8069 8070unsigned fastEmit_ISD_SUB_MVT_i32_ri_Predicate_imm0_4095(MVT RetVT, unsigned Op0, uint64_t imm1) { 8071 if (RetVT.SimpleTy != MVT::i32) 8072 return 0; 8073 if ((Subtarget->isThumb2())) { 8074 return fastEmitInst_ri(ARM::t2SUBri12, &ARM::rGPRRegClass, Op0, imm1); 8075 } 8076 return 0; 8077} 8078 8079unsigned fastEmit_ISD_SUB_ri_Predicate_imm0_4095(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8080 switch (VT.SimpleTy) { 8081 case MVT::i32: return fastEmit_ISD_SUB_MVT_i32_ri_Predicate_imm0_4095(RetVT, Op0, imm1); 8082 default: return 0; 8083 } 8084} 8085 8086// Top-level FastEmit function. 8087 8088unsigned fastEmit_ri_Predicate_imm0_4095(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8089 switch (Opcode) { 8090 case ISD::ADD: return fastEmit_ISD_ADD_ri_Predicate_imm0_4095(VT, RetVT, Op0, imm1); 8091 case ISD::SUB: return fastEmit_ISD_SUB_ri_Predicate_imm0_4095(VT, RetVT, Op0, imm1); 8092 default: return 0; 8093 } 8094} 8095 8096// FastEmit functions for ISD::ROTR. 8097 8098unsigned fastEmit_ISD_ROTR_MVT_i32_ri_Predicate_imm1_31(MVT RetVT, unsigned Op0, uint64_t imm1) { 8099 if (RetVT.SimpleTy != MVT::i32) 8100 return 0; 8101 if ((Subtarget->isThumb2())) { 8102 return fastEmitInst_ri(ARM::t2RORri, &ARM::rGPRRegClass, Op0, imm1); 8103 } 8104 return 0; 8105} 8106 8107unsigned fastEmit_ISD_ROTR_ri_Predicate_imm1_31(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8108 switch (VT.SimpleTy) { 8109 case MVT::i32: return fastEmit_ISD_ROTR_MVT_i32_ri_Predicate_imm1_31(RetVT, Op0, imm1); 8110 default: return 0; 8111 } 8112} 8113 8114// FastEmit functions for ISD::SHL. 8115 8116unsigned fastEmit_ISD_SHL_MVT_i32_ri_Predicate_imm1_31(MVT RetVT, unsigned Op0, uint64_t imm1) { 8117 if (RetVT.SimpleTy != MVT::i32) 8118 return 0; 8119 if ((Subtarget->isThumb2())) { 8120 return fastEmitInst_ri(ARM::t2LSLri, &ARM::rGPRRegClass, Op0, imm1); 8121 } 8122 return 0; 8123} 8124 8125unsigned fastEmit_ISD_SHL_ri_Predicate_imm1_31(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8126 switch (VT.SimpleTy) { 8127 case MVT::i32: return fastEmit_ISD_SHL_MVT_i32_ri_Predicate_imm1_31(RetVT, Op0, imm1); 8128 default: return 0; 8129 } 8130} 8131 8132// Top-level FastEmit function. 8133 8134unsigned fastEmit_ri_Predicate_imm1_31(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8135 switch (Opcode) { 8136 case ISD::ROTR: return fastEmit_ISD_ROTR_ri_Predicate_imm1_31(VT, RetVT, Op0, imm1); 8137 case ISD::SHL: return fastEmit_ISD_SHL_ri_Predicate_imm1_31(VT, RetVT, Op0, imm1); 8138 default: return 0; 8139 } 8140} 8141 8142// FastEmit functions for ARMISD::VQRSHRNsIMM. 8143 8144unsigned fastEmit_ARMISD_VQRSHRNsIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8145 if (RetVT.SimpleTy != MVT::v8i8) 8146 return 0; 8147 if ((Subtarget->hasNEON())) { 8148 return fastEmitInst_ri(ARM::VQRSHRNsv8i8, &ARM::DPRRegClass, Op0, imm1); 8149 } 8150 return 0; 8151} 8152 8153unsigned fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8154 switch (VT.SimpleTy) { 8155 case MVT::v8i16: return fastEmit_ARMISD_VQRSHRNsIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8156 default: return 0; 8157 } 8158} 8159 8160// FastEmit functions for ARMISD::VQRSHRNsuIMM. 8161 8162unsigned fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8163 if (RetVT.SimpleTy != MVT::v8i8) 8164 return 0; 8165 if ((Subtarget->hasNEON())) { 8166 return fastEmitInst_ri(ARM::VQRSHRUNv8i8, &ARM::DPRRegClass, Op0, imm1); 8167 } 8168 return 0; 8169} 8170 8171unsigned fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8172 switch (VT.SimpleTy) { 8173 case MVT::v8i16: return fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8174 default: return 0; 8175 } 8176} 8177 8178// FastEmit functions for ARMISD::VQRSHRNuIMM. 8179 8180unsigned fastEmit_ARMISD_VQRSHRNuIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8181 if (RetVT.SimpleTy != MVT::v8i8) 8182 return 0; 8183 if ((Subtarget->hasNEON())) { 8184 return fastEmitInst_ri(ARM::VQRSHRNuv8i8, &ARM::DPRRegClass, Op0, imm1); 8185 } 8186 return 0; 8187} 8188 8189unsigned fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8190 switch (VT.SimpleTy) { 8191 case MVT::v8i16: return fastEmit_ARMISD_VQRSHRNuIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8192 default: return 0; 8193 } 8194} 8195 8196// FastEmit functions for ARMISD::VQSHRNsIMM. 8197 8198unsigned fastEmit_ARMISD_VQSHRNsIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8199 if (RetVT.SimpleTy != MVT::v8i8) 8200 return 0; 8201 if ((Subtarget->hasNEON())) { 8202 return fastEmitInst_ri(ARM::VQSHRNsv8i8, &ARM::DPRRegClass, Op0, imm1); 8203 } 8204 return 0; 8205} 8206 8207unsigned fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8208 switch (VT.SimpleTy) { 8209 case MVT::v8i16: return fastEmit_ARMISD_VQSHRNsIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8210 default: return 0; 8211 } 8212} 8213 8214// FastEmit functions for ARMISD::VQSHRNsuIMM. 8215 8216unsigned fastEmit_ARMISD_VQSHRNsuIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8217 if (RetVT.SimpleTy != MVT::v8i8) 8218 return 0; 8219 if ((Subtarget->hasNEON())) { 8220 return fastEmitInst_ri(ARM::VQSHRUNv8i8, &ARM::DPRRegClass, Op0, imm1); 8221 } 8222 return 0; 8223} 8224 8225unsigned fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8226 switch (VT.SimpleTy) { 8227 case MVT::v8i16: return fastEmit_ARMISD_VQSHRNsuIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8228 default: return 0; 8229 } 8230} 8231 8232// FastEmit functions for ARMISD::VQSHRNuIMM. 8233 8234unsigned fastEmit_ARMISD_VQSHRNuIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8235 if (RetVT.SimpleTy != MVT::v8i8) 8236 return 0; 8237 if ((Subtarget->hasNEON())) { 8238 return fastEmitInst_ri(ARM::VQSHRNuv8i8, &ARM::DPRRegClass, Op0, imm1); 8239 } 8240 return 0; 8241} 8242 8243unsigned fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8244 switch (VT.SimpleTy) { 8245 case MVT::v8i16: return fastEmit_ARMISD_VQSHRNuIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8246 default: return 0; 8247 } 8248} 8249 8250// FastEmit functions for ARMISD::VRSHRNIMM. 8251 8252unsigned fastEmit_ARMISD_VRSHRNIMM_MVT_v8i16_ri_Predicate_shr_imm8(MVT RetVT, unsigned Op0, uint64_t imm1) { 8253 if (RetVT.SimpleTy != MVT::v8i8) 8254 return 0; 8255 if ((Subtarget->hasNEON())) { 8256 return fastEmitInst_ri(ARM::VRSHRNv8i8, &ARM::DPRRegClass, Op0, imm1); 8257 } 8258 return 0; 8259} 8260 8261unsigned fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8262 switch (VT.SimpleTy) { 8263 case MVT::v8i16: return fastEmit_ARMISD_VRSHRNIMM_MVT_v8i16_ri_Predicate_shr_imm8(RetVT, Op0, imm1); 8264 default: return 0; 8265 } 8266} 8267 8268// Top-level FastEmit function. 8269 8270unsigned fastEmit_ri_Predicate_shr_imm8(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8271 switch (Opcode) { 8272 case ARMISD::VQRSHRNsIMM: return fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8273 case ARMISD::VQRSHRNsuIMM: return fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8274 case ARMISD::VQRSHRNuIMM: return fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8275 case ARMISD::VQSHRNsIMM: return fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8276 case ARMISD::VQSHRNsuIMM: return fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8277 case ARMISD::VQSHRNuIMM: return fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8278 case ARMISD::VRSHRNIMM: return fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm8(VT, RetVT, Op0, imm1); 8279 default: return 0; 8280 } 8281} 8282 8283// FastEmit functions for ARMISD::VQRSHRNsIMM. 8284 8285unsigned fastEmit_ARMISD_VQRSHRNsIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8286 if (RetVT.SimpleTy != MVT::v4i16) 8287 return 0; 8288 if ((Subtarget->hasNEON())) { 8289 return fastEmitInst_ri(ARM::VQRSHRNsv4i16, &ARM::DPRRegClass, Op0, imm1); 8290 } 8291 return 0; 8292} 8293 8294unsigned fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8295 switch (VT.SimpleTy) { 8296 case MVT::v4i32: return fastEmit_ARMISD_VQRSHRNsIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8297 default: return 0; 8298 } 8299} 8300 8301// FastEmit functions for ARMISD::VQRSHRNsuIMM. 8302 8303unsigned fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8304 if (RetVT.SimpleTy != MVT::v4i16) 8305 return 0; 8306 if ((Subtarget->hasNEON())) { 8307 return fastEmitInst_ri(ARM::VQRSHRUNv4i16, &ARM::DPRRegClass, Op0, imm1); 8308 } 8309 return 0; 8310} 8311 8312unsigned fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8313 switch (VT.SimpleTy) { 8314 case MVT::v4i32: return fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8315 default: return 0; 8316 } 8317} 8318 8319// FastEmit functions for ARMISD::VQRSHRNuIMM. 8320 8321unsigned fastEmit_ARMISD_VQRSHRNuIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8322 if (RetVT.SimpleTy != MVT::v4i16) 8323 return 0; 8324 if ((Subtarget->hasNEON())) { 8325 return fastEmitInst_ri(ARM::VQRSHRNuv4i16, &ARM::DPRRegClass, Op0, imm1); 8326 } 8327 return 0; 8328} 8329 8330unsigned fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8331 switch (VT.SimpleTy) { 8332 case MVT::v4i32: return fastEmit_ARMISD_VQRSHRNuIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8333 default: return 0; 8334 } 8335} 8336 8337// FastEmit functions for ARMISD::VQSHRNsIMM. 8338 8339unsigned fastEmit_ARMISD_VQSHRNsIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8340 if (RetVT.SimpleTy != MVT::v4i16) 8341 return 0; 8342 if ((Subtarget->hasNEON())) { 8343 return fastEmitInst_ri(ARM::VQSHRNsv4i16, &ARM::DPRRegClass, Op0, imm1); 8344 } 8345 return 0; 8346} 8347 8348unsigned fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8349 switch (VT.SimpleTy) { 8350 case MVT::v4i32: return fastEmit_ARMISD_VQSHRNsIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8351 default: return 0; 8352 } 8353} 8354 8355// FastEmit functions for ARMISD::VQSHRNsuIMM. 8356 8357unsigned fastEmit_ARMISD_VQSHRNsuIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8358 if (RetVT.SimpleTy != MVT::v4i16) 8359 return 0; 8360 if ((Subtarget->hasNEON())) { 8361 return fastEmitInst_ri(ARM::VQSHRUNv4i16, &ARM::DPRRegClass, Op0, imm1); 8362 } 8363 return 0; 8364} 8365 8366unsigned fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8367 switch (VT.SimpleTy) { 8368 case MVT::v4i32: return fastEmit_ARMISD_VQSHRNsuIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8369 default: return 0; 8370 } 8371} 8372 8373// FastEmit functions for ARMISD::VQSHRNuIMM. 8374 8375unsigned fastEmit_ARMISD_VQSHRNuIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8376 if (RetVT.SimpleTy != MVT::v4i16) 8377 return 0; 8378 if ((Subtarget->hasNEON())) { 8379 return fastEmitInst_ri(ARM::VQSHRNuv4i16, &ARM::DPRRegClass, Op0, imm1); 8380 } 8381 return 0; 8382} 8383 8384unsigned fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8385 switch (VT.SimpleTy) { 8386 case MVT::v4i32: return fastEmit_ARMISD_VQSHRNuIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8387 default: return 0; 8388 } 8389} 8390 8391// FastEmit functions for ARMISD::VRSHRNIMM. 8392 8393unsigned fastEmit_ARMISD_VRSHRNIMM_MVT_v4i32_ri_Predicate_shr_imm16(MVT RetVT, unsigned Op0, uint64_t imm1) { 8394 if (RetVT.SimpleTy != MVT::v4i16) 8395 return 0; 8396 if ((Subtarget->hasNEON())) { 8397 return fastEmitInst_ri(ARM::VRSHRNv4i16, &ARM::DPRRegClass, Op0, imm1); 8398 } 8399 return 0; 8400} 8401 8402unsigned fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8403 switch (VT.SimpleTy) { 8404 case MVT::v4i32: return fastEmit_ARMISD_VRSHRNIMM_MVT_v4i32_ri_Predicate_shr_imm16(RetVT, Op0, imm1); 8405 default: return 0; 8406 } 8407} 8408 8409// Top-level FastEmit function. 8410 8411unsigned fastEmit_ri_Predicate_shr_imm16(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8412 switch (Opcode) { 8413 case ARMISD::VQRSHRNsIMM: return fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8414 case ARMISD::VQRSHRNsuIMM: return fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8415 case ARMISD::VQRSHRNuIMM: return fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8416 case ARMISD::VQSHRNsIMM: return fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8417 case ARMISD::VQSHRNsuIMM: return fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8418 case ARMISD::VQSHRNuIMM: return fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8419 case ARMISD::VRSHRNIMM: return fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm16(VT, RetVT, Op0, imm1); 8420 default: return 0; 8421 } 8422} 8423 8424// FastEmit functions for ARMISD::VQRSHRNsIMM. 8425 8426unsigned fastEmit_ARMISD_VQRSHRNsIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8427 if (RetVT.SimpleTy != MVT::v2i32) 8428 return 0; 8429 if ((Subtarget->hasNEON())) { 8430 return fastEmitInst_ri(ARM::VQRSHRNsv2i32, &ARM::DPRRegClass, Op0, imm1); 8431 } 8432 return 0; 8433} 8434 8435unsigned fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8436 switch (VT.SimpleTy) { 8437 case MVT::v2i64: return fastEmit_ARMISD_VQRSHRNsIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8438 default: return 0; 8439 } 8440} 8441 8442// FastEmit functions for ARMISD::VQRSHRNsuIMM. 8443 8444unsigned fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8445 if (RetVT.SimpleTy != MVT::v2i32) 8446 return 0; 8447 if ((Subtarget->hasNEON())) { 8448 return fastEmitInst_ri(ARM::VQRSHRUNv2i32, &ARM::DPRRegClass, Op0, imm1); 8449 } 8450 return 0; 8451} 8452 8453unsigned fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8454 switch (VT.SimpleTy) { 8455 case MVT::v2i64: return fastEmit_ARMISD_VQRSHRNsuIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8456 default: return 0; 8457 } 8458} 8459 8460// FastEmit functions for ARMISD::VQRSHRNuIMM. 8461 8462unsigned fastEmit_ARMISD_VQRSHRNuIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8463 if (RetVT.SimpleTy != MVT::v2i32) 8464 return 0; 8465 if ((Subtarget->hasNEON())) { 8466 return fastEmitInst_ri(ARM::VQRSHRNuv2i32, &ARM::DPRRegClass, Op0, imm1); 8467 } 8468 return 0; 8469} 8470 8471unsigned fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8472 switch (VT.SimpleTy) { 8473 case MVT::v2i64: return fastEmit_ARMISD_VQRSHRNuIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8474 default: return 0; 8475 } 8476} 8477 8478// FastEmit functions for ARMISD::VQSHRNsIMM. 8479 8480unsigned fastEmit_ARMISD_VQSHRNsIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8481 if (RetVT.SimpleTy != MVT::v2i32) 8482 return 0; 8483 if ((Subtarget->hasNEON())) { 8484 return fastEmitInst_ri(ARM::VQSHRNsv2i32, &ARM::DPRRegClass, Op0, imm1); 8485 } 8486 return 0; 8487} 8488 8489unsigned fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8490 switch (VT.SimpleTy) { 8491 case MVT::v2i64: return fastEmit_ARMISD_VQSHRNsIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8492 default: return 0; 8493 } 8494} 8495 8496// FastEmit functions for ARMISD::VQSHRNsuIMM. 8497 8498unsigned fastEmit_ARMISD_VQSHRNsuIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8499 if (RetVT.SimpleTy != MVT::v2i32) 8500 return 0; 8501 if ((Subtarget->hasNEON())) { 8502 return fastEmitInst_ri(ARM::VQSHRUNv2i32, &ARM::DPRRegClass, Op0, imm1); 8503 } 8504 return 0; 8505} 8506 8507unsigned fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8508 switch (VT.SimpleTy) { 8509 case MVT::v2i64: return fastEmit_ARMISD_VQSHRNsuIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8510 default: return 0; 8511 } 8512} 8513 8514// FastEmit functions for ARMISD::VQSHRNuIMM. 8515 8516unsigned fastEmit_ARMISD_VQSHRNuIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8517 if (RetVT.SimpleTy != MVT::v2i32) 8518 return 0; 8519 if ((Subtarget->hasNEON())) { 8520 return fastEmitInst_ri(ARM::VQSHRNuv2i32, &ARM::DPRRegClass, Op0, imm1); 8521 } 8522 return 0; 8523} 8524 8525unsigned fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8526 switch (VT.SimpleTy) { 8527 case MVT::v2i64: return fastEmit_ARMISD_VQSHRNuIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8528 default: return 0; 8529 } 8530} 8531 8532// FastEmit functions for ARMISD::VRSHRNIMM. 8533 8534unsigned fastEmit_ARMISD_VRSHRNIMM_MVT_v2i64_ri_Predicate_shr_imm32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8535 if (RetVT.SimpleTy != MVT::v2i32) 8536 return 0; 8537 if ((Subtarget->hasNEON())) { 8538 return fastEmitInst_ri(ARM::VRSHRNv2i32, &ARM::DPRRegClass, Op0, imm1); 8539 } 8540 return 0; 8541} 8542 8543unsigned fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8544 switch (VT.SimpleTy) { 8545 case MVT::v2i64: return fastEmit_ARMISD_VRSHRNIMM_MVT_v2i64_ri_Predicate_shr_imm32(RetVT, Op0, imm1); 8546 default: return 0; 8547 } 8548} 8549 8550// Top-level FastEmit function. 8551 8552unsigned fastEmit_ri_Predicate_shr_imm32(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8553 switch (Opcode) { 8554 case ARMISD::VQRSHRNsIMM: return fastEmit_ARMISD_VQRSHRNsIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8555 case ARMISD::VQRSHRNsuIMM: return fastEmit_ARMISD_VQRSHRNsuIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8556 case ARMISD::VQRSHRNuIMM: return fastEmit_ARMISD_VQRSHRNuIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8557 case ARMISD::VQSHRNsIMM: return fastEmit_ARMISD_VQSHRNsIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8558 case ARMISD::VQSHRNsuIMM: return fastEmit_ARMISD_VQSHRNsuIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8559 case ARMISD::VQSHRNuIMM: return fastEmit_ARMISD_VQSHRNuIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8560 case ARMISD::VRSHRNIMM: return fastEmit_ARMISD_VRSHRNIMM_ri_Predicate_shr_imm32(VT, RetVT, Op0, imm1); 8561 default: return 0; 8562 } 8563} 8564 8565// FastEmit functions for ARMISD::VDUPLANE. 8566 8567unsigned fastEmit_ARMISD_VDUPLANE_MVT_v8i8_ri_Predicate_VectorIndex32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8568 if (RetVT.SimpleTy != MVT::v16i8) 8569 return 0; 8570 if ((Subtarget->hasNEON())) { 8571 return fastEmitInst_ri(ARM::VDUPLN8q, &ARM::QPRRegClass, Op0, imm1); 8572 } 8573 return 0; 8574} 8575 8576unsigned fastEmit_ARMISD_VDUPLANE_MVT_v4i16_ri_Predicate_VectorIndex32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8577 if (RetVT.SimpleTy != MVT::v8i16) 8578 return 0; 8579 if ((Subtarget->hasNEON())) { 8580 return fastEmitInst_ri(ARM::VDUPLN16q, &ARM::QPRRegClass, Op0, imm1); 8581 } 8582 return 0; 8583} 8584 8585unsigned fastEmit_ARMISD_VDUPLANE_MVT_v2i32_ri_Predicate_VectorIndex32(MVT RetVT, unsigned Op0, uint64_t imm1) { 8586 if (RetVT.SimpleTy != MVT::v4i32) 8587 return 0; 8588 if ((Subtarget->hasNEON())) { 8589 return fastEmitInst_ri(ARM::VDUPLN32q, &ARM::QPRRegClass, Op0, imm1); 8590 } 8591 return 0; 8592} 8593 8594unsigned fastEmit_ARMISD_VDUPLANE_ri_Predicate_VectorIndex32(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8595 switch (VT.SimpleTy) { 8596 case MVT::v8i8: return fastEmit_ARMISD_VDUPLANE_MVT_v8i8_ri_Predicate_VectorIndex32(RetVT, Op0, imm1); 8597 case MVT::v4i16: return fastEmit_ARMISD_VDUPLANE_MVT_v4i16_ri_Predicate_VectorIndex32(RetVT, Op0, imm1); 8598 case MVT::v2i32: return fastEmit_ARMISD_VDUPLANE_MVT_v2i32_ri_Predicate_VectorIndex32(RetVT, Op0, imm1); 8599 default: return 0; 8600 } 8601} 8602 8603// Top-level FastEmit function. 8604 8605unsigned fastEmit_ri_Predicate_VectorIndex32(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8606 switch (Opcode) { 8607 case ARMISD::VDUPLANE: return fastEmit_ARMISD_VDUPLANE_ri_Predicate_VectorIndex32(VT, RetVT, Op0, imm1); 8608 default: return 0; 8609 } 8610} 8611 8612// FastEmit functions for ARMISD::VSHLIMM. 8613 8614unsigned fastEmit_ARMISD_VSHLIMM_MVT_v4i32_ri_Predicate_imm0_31(MVT RetVT, unsigned Op0, uint64_t imm1) { 8615 if (RetVT.SimpleTy != MVT::v4i32) 8616 return 0; 8617 if ((Subtarget->hasMVEIntegerOps())) { 8618 return fastEmitInst_ri(ARM::MVE_VSHL_immi32, &ARM::MQPRRegClass, Op0, imm1); 8619 } 8620 return 0; 8621} 8622 8623unsigned fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_31(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8624 switch (VT.SimpleTy) { 8625 case MVT::v4i32: return fastEmit_ARMISD_VSHLIMM_MVT_v4i32_ri_Predicate_imm0_31(RetVT, Op0, imm1); 8626 default: return 0; 8627 } 8628} 8629 8630// FastEmit functions for ARMISD::VSHRsIMM. 8631 8632unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v4i32_ri_Predicate_imm0_31(MVT RetVT, unsigned Op0, uint64_t imm1) { 8633 if (RetVT.SimpleTy != MVT::v4i32) 8634 return 0; 8635 if ((Subtarget->hasMVEIntegerOps())) { 8636 return fastEmitInst_ri(ARM::MVE_VSHR_imms32, &ARM::MQPRRegClass, Op0, imm1); 8637 } 8638 return 0; 8639} 8640 8641unsigned fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_31(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8642 switch (VT.SimpleTy) { 8643 case MVT::v4i32: return fastEmit_ARMISD_VSHRsIMM_MVT_v4i32_ri_Predicate_imm0_31(RetVT, Op0, imm1); 8644 default: return 0; 8645 } 8646} 8647 8648// FastEmit functions for ARMISD::VSHRuIMM. 8649 8650unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v4i32_ri_Predicate_imm0_31(MVT RetVT, unsigned Op0, uint64_t imm1) { 8651 if (RetVT.SimpleTy != MVT::v4i32) 8652 return 0; 8653 if ((Subtarget->hasMVEIntegerOps())) { 8654 return fastEmitInst_ri(ARM::MVE_VSHR_immu32, &ARM::MQPRRegClass, Op0, imm1); 8655 } 8656 return 0; 8657} 8658 8659unsigned fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_31(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8660 switch (VT.SimpleTy) { 8661 case MVT::v4i32: return fastEmit_ARMISD_VSHRuIMM_MVT_v4i32_ri_Predicate_imm0_31(RetVT, Op0, imm1); 8662 default: return 0; 8663 } 8664} 8665 8666// Top-level FastEmit function. 8667 8668unsigned fastEmit_ri_Predicate_imm0_31(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8669 switch (Opcode) { 8670 case ARMISD::VSHLIMM: return fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_31(VT, RetVT, Op0, imm1); 8671 case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_31(VT, RetVT, Op0, imm1); 8672 case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_31(VT, RetVT, Op0, imm1); 8673 default: return 0; 8674 } 8675} 8676 8677// FastEmit functions for ARMISD::VSHLIMM. 8678 8679unsigned fastEmit_ARMISD_VSHLIMM_MVT_v8i16_ri_Predicate_imm0_15(MVT RetVT, unsigned Op0, uint64_t imm1) { 8680 if (RetVT.SimpleTy != MVT::v8i16) 8681 return 0; 8682 if ((Subtarget->hasMVEIntegerOps())) { 8683 return fastEmitInst_ri(ARM::MVE_VSHL_immi16, &ARM::MQPRRegClass, Op0, imm1); 8684 } 8685 return 0; 8686} 8687 8688unsigned fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_15(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8689 switch (VT.SimpleTy) { 8690 case MVT::v8i16: return fastEmit_ARMISD_VSHLIMM_MVT_v8i16_ri_Predicate_imm0_15(RetVT, Op0, imm1); 8691 default: return 0; 8692 } 8693} 8694 8695// FastEmit functions for ARMISD::VSHRsIMM. 8696 8697unsigned fastEmit_ARMISD_VSHRsIMM_MVT_v8i16_ri_Predicate_imm0_15(MVT RetVT, unsigned Op0, uint64_t imm1) { 8698 if (RetVT.SimpleTy != MVT::v8i16) 8699 return 0; 8700 if ((Subtarget->hasMVEIntegerOps())) { 8701 return fastEmitInst_ri(ARM::MVE_VSHR_imms16, &ARM::MQPRRegClass, Op0, imm1); 8702 } 8703 return 0; 8704} 8705 8706unsigned fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_15(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8707 switch (VT.SimpleTy) { 8708 case MVT::v8i16: return fastEmit_ARMISD_VSHRsIMM_MVT_v8i16_ri_Predicate_imm0_15(RetVT, Op0, imm1); 8709 default: return 0; 8710 } 8711} 8712 8713// FastEmit functions for ARMISD::VSHRuIMM. 8714 8715unsigned fastEmit_ARMISD_VSHRuIMM_MVT_v8i16_ri_Predicate_imm0_15(MVT RetVT, unsigned Op0, uint64_t imm1) { 8716 if (RetVT.SimpleTy != MVT::v8i16) 8717 return 0; 8718 if ((Subtarget->hasMVEIntegerOps())) { 8719 return fastEmitInst_ri(ARM::MVE_VSHR_immu16, &ARM::MQPRRegClass, Op0, imm1); 8720 } 8721 return 0; 8722} 8723 8724unsigned fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_15(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) { 8725 switch (VT.SimpleTy) { 8726 case MVT::v8i16: return fastEmit_ARMISD_VSHRuIMM_MVT_v8i16_ri_Predicate_imm0_15(RetVT, Op0, imm1); 8727 default: return 0; 8728 } 8729} 8730 8731// Top-level FastEmit function. 8732 8733unsigned fastEmit_ri_Predicate_imm0_15(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) { 8734 switch (Opcode) { 8735 case ARMISD::VSHLIMM: return fastEmit_ARMISD_VSHLIMM_ri_Predicate_imm0_15(VT, RetVT, Op0, imm1); 8736 case ARMISD::VSHRsIMM: return fastEmit_ARMISD_VSHRsIMM_ri_Predicate_imm0_15(VT, RetVT, Op0, imm1); 8737 case ARMISD::VSHRuIMM: return fastEmit_ARMISD_VSHRuIMM_ri_Predicate_imm0_15(VT, RetVT, Op0, imm1); 8738 default: return 0; 8739 } 8740} 8741 8742// FastEmit functions for ISD::Constant. 8743 8744unsigned fastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) { 8745 if (RetVT.SimpleTy != MVT::i32) 8746 return 0; 8747 if ((Subtarget->isThumb()) && (Subtarget->useMovt())) { 8748 return fastEmitInst_i(ARM::t2MOVi32imm, &ARM::rGPRRegClass, imm0); 8749 } 8750 return 0; 8751} 8752 8753unsigned fastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) { 8754 switch (VT.SimpleTy) { 8755 case MVT::i32: return fastEmit_ISD_Constant_MVT_i32_i(RetVT, imm0); 8756 default: return 0; 8757 } 8758} 8759 8760// Top-level FastEmit function. 8761 8762unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) override { 8763 switch (Opcode) { 8764 case ISD::Constant: return fastEmit_ISD_Constant_i(VT, RetVT, imm0); 8765 default: return 0; 8766 } 8767} 8768 8769