1 /*
2 * Copyright 2023-2024 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6 #include <lib/mmio.h>
7 #include <lib/utils_def.h>
8 #include <s32cc-mc-rgm.h>
9
10 #define MC_RGM_PRST(RGM, PER) ((RGM) + 0x40UL + ((PER) * 0x8UL))
11 #define MC_RGM_PRST_PERIPH_N_RST(PER) BIT_32(PER)
12 #define MC_RGM_PSTAT(RGM, PER) ((RGM) + 0x140UL + ((PER) * 0x8UL))
13 #define MC_RGM_PSTAT_PERIPH(PER) BIT_32(PER)
14
15 /* ERR051700
16 * Releasing more than one Software Resettable Domain (SRD)
17 * from reset simultaneously, by clearing the corresponding
18 * peripheral MC_RGM_PRSTn[PERIPH_x_RST] reset control may
19 * cause a false setting of the Fault Collection and
20 * Control Unit (FCCU) Non-Critical Fault (NCF) flag
21 * corresponding to a Memory-Test-Repair (MTR) Error
22 */
23 #if (ERRATA_S32_051700 == 1)
mc_rgm_periph_reset(uintptr_t rgm,uint32_t part,uint32_t value)24 void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value)
25 {
26 uint32_t current_bit_checked, i;
27 uint32_t current_regs, mask;
28 int bit_index;
29
30 current_regs = mmio_read_32(MC_RGM_PRST(rgm, part));
31 /* Create a mask with all changed bits */
32 mask = current_regs ^ value;
33
34 while (mask != 0U) {
35 bit_index = __builtin_ffs(mask);
36 if (bit_index < 1) {
37 break;
38 }
39
40 i = (uint32_t)bit_index - 1U;
41 current_bit_checked = BIT_32(i);
42
43 /* Check if we assert or de-assert.
44 * Also wait for completion.
45 */
46 if ((value & current_bit_checked) != 0U) {
47 mmio_setbits_32(MC_RGM_PRST(rgm, part),
48 current_bit_checked);
49 while ((mmio_read_32(MC_RGM_PRST(rgm, part)) &
50 current_bit_checked) == 0U)
51 ;
52 } else {
53 mmio_clrbits_32(MC_RGM_PRST(rgm, part),
54 current_bit_checked);
55 while ((mmio_read_32(MC_RGM_PRST(rgm, part)) &
56 current_bit_checked) != 0U)
57 ;
58 }
59
60 mask &= ~current_bit_checked;
61 }
62 }
63 #else /* ERRATA_S32_051700 */
mc_rgm_periph_reset(uintptr_t rgm,uint32_t part,uint32_t value)64 void mc_rgm_periph_reset(uintptr_t rgm, uint32_t part, uint32_t value)
65 {
66 mmio_write_32(MC_RGM_PRST(rgm, part), value);
67 }
68 #endif /* ERRATA_S32_051700 */
69
mc_rgm_release_part(uintptr_t rgm,uint32_t part)70 void mc_rgm_release_part(uintptr_t rgm, uint32_t part)
71 {
72 uint32_t reg;
73
74 reg = mmio_read_32(MC_RGM_PRST(rgm, part));
75 reg &= ~MC_RGM_PRST_PERIPH_N_RST(0);
76 mc_rgm_periph_reset(rgm, part, reg);
77 }
78
mc_rgm_wait_part_deassert(uintptr_t rgm,uint32_t part)79 void mc_rgm_wait_part_deassert(uintptr_t rgm, uint32_t part)
80 {
81 while ((mmio_read_32(MC_RGM_PSTAT(rgm, part)) &
82 MC_RGM_PSTAT_PERIPH(0)) != 0U) {
83 }
84 }
85