1/* 2 * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#ifndef CPU_MACROS_S 7#define CPU_MACROS_S 8 9#include <lib/cpus/cpu_ops.h> 10#include <lib/cpus/errata.h> 11 12 /* 13 * Write given expressions as words 14 * 15 * _count: 16 * Write at least _count words. If the given number of expressions 17 * is less than _count, repeat the last expression to fill _count 18 * words in total 19 * _rest: 20 * Optional list of expressions. _this is for parameter extraction 21 * only, and has no significance to the caller 22 * 23 * Invoked as: 24 * fill_constants 2, foo, bar, blah, ... 25 */ 26 .macro fill_constants _count:req, _this, _rest:vararg 27 .ifgt \_count 28 /* Write the current expression */ 29 .ifb \_this 30 .error "Nothing to fill" 31 .endif 32 .word \_this 33 34 /* Invoke recursively for remaining expressions */ 35 .ifnb \_rest 36 fill_constants \_count-1, \_rest 37 .else 38 fill_constants \_count-1, \_this 39 .endif 40 .endif 41 .endm 42 43 /* 44 * Declare CPU operations 45 * 46 * _name: 47 * Name of the CPU for which operations are being specified 48 * _midr: 49 * Numeric value expected to read from CPU's MIDR 50 * _resetfunc: 51 * Reset function for the CPU. If there's no CPU reset function, 52 * specify CPU_NO_RESET_FUNC 53 * _power_down_ops: 54 * Comma-separated list of functions to perform power-down 55 * operatios on the CPU. At least one, and up to 56 * CPU_MAX_PWR_DWN_OPS number of functions may be specified. 57 * Starting at power level 0, these functions shall handle power 58 * down at subsequent power levels. If there aren't exactly 59 * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be 60 * used to handle power down at subsequent levels 61 */ 62 .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ 63 _power_down_ops:vararg 64 .section .cpu_ops, "a" 65 .align 2 66 .type cpu_ops_\_name, %object 67 .word \_midr 68#if defined(IMAGE_AT_EL3) 69 .word \_resetfunc 70#endif 71#ifdef IMAGE_BL32 72 /* Insert list of functions */ 73 fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops 74#endif 75 76 /* 77 * It is possible (although unlikely) that a cpu may have no errata in 78 * code. In that case the start label will not be defined. The list is 79 * inteded to be used in a loop, so define it as zero-length for 80 * predictable behaviour. Since this macro is always called at the end 81 * of the cpu file (after all errata have been parsed) we can be sure 82 * that we are at the end of the list. Some cpus call the macro twice, 83 * so only do this once. 84 */ 85 .pushsection .rodata.errata_entries 86 .ifndef \_name\()_errata_list_start 87 \_name\()_errata_list_start: 88 .endif 89 /* some call this multiple times, so only do this once */ 90 .ifndef \_name\()_errata_list_end 91 \_name\()_errata_list_end: 92 .endif 93 .popsection 94 95 /* and now put them in cpu_ops */ 96 .word \_name\()_errata_list_start 97 .word \_name\()_errata_list_end 98 99#if REPORT_ERRATA 100 .ifndef \_name\()_cpu_str 101 /* 102 * Place errata reported flag, and the spinlock to arbitrate access to 103 * it in the data section. 104 */ 105 .pushsection .data 106 define_asm_spinlock \_name\()_errata_lock 107 \_name\()_errata_reported: 108 .word 0 109 .popsection 110 111 /* Place CPU string in rodata */ 112 .pushsection .rodata 113 \_name\()_cpu_str: 114 .asciz "\_name" 115 .popsection 116 .endif 117 118 .word \_name\()_cpu_str 119 120#ifdef IMAGE_BL32 121 /* Pointers to errata lock and reported flag */ 122 .word \_name\()_errata_lock 123 .word \_name\()_errata_reported 124#endif 125#endif 126 .endm 127 128 /* 129 * Helper macro that reads the part number of the current CPU and jumps 130 * to the given label if it matches the CPU MIDR provided. 131 * 132 * Clobbers: r0-r1 133 */ 134 .macro jump_if_cpu_midr _cpu_midr, _label 135 ldcopr r0, MIDR 136 ubfx r0, r0, #MIDR_PN_SHIFT, #12 137 ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK) 138 cmp r0, r1 139 beq \_label 140 .endm 141 142/* 143 * NOTE an erratum and CVE id could clash. However, both numbers are very large 144 * and the probablity is minuscule. Working around this makes code very 145 * complicated and extremely difficult to read so it is not considered. In the 146 * unlikely event that this does happen, prepending the CVE id with a 0 should 147 * resolve the conflict 148 */ 149 150/* 151 * Add an entry for this erratum to the errata framework 152 * 153 * _cpu: 154 * Name of cpu as given to declare_cpu_ops 155 * 156 * _cve: 157 * Whether erratum is a CVE. CVE year if yes, 0 otherwise 158 * 159 * _id: 160 * Erratum or CVE number. Please combine with the previous field with the 161 * ERRATUM or CVE macros 162 * 163 * _chosen: 164 * Compile time flag on whether the erratum is included 165 * 166 * _special: 167 * The special non-standard name of an erratum 168 */ 169.macro add_erratum_entry _cpu:req, _cve:req, _id:req, _chosen:req, _special 170 .pushsection .rodata.errata_entries 171 .align 2 172 .ifndef \_cpu\()_errata_list_start 173 \_cpu\()_errata_list_start: 174 .endif 175 176 /* unused on AArch32, maintain for portability */ 177 .word 0 178 /* TODO(errata ABI): this prevents all checker functions from 179 * being optimised away. Can be done away with unless the ABI 180 * needs them */ 181 .ifnb \_special 182 .word check_errata_\_special 183 .elseif \_cve 184 .word check_errata_cve_\_cve\()_\_id 185 .else 186 .word check_errata_\_id 187 .endif 188 /* Will fit CVEs with up to 10 character in the ID field */ 189 .word \_id 190 .hword \_cve 191 .byte \_chosen 192 /* TODO(errata ABI): mitigated field for known but unmitigated 193 * errata*/ 194 .byte 0x1 195 .popsection 196.endm 197 198#endif /* CPU_MACROS_S */ 199