1/* 2 * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <assert_macros.S> 10#include <cortex_a9.h> 11#include <cpu_macros.S> 12 13 .macro assert_cache_enabled 14#if ENABLE_ASSERTIONS 15 ldcopr r0, SCTLR 16 tst r0, #SCTLR_C_BIT 17 ASM_ASSERT(eq) 18#endif 19 .endm 20 21func cortex_a9_disable_smp 22 ldcopr r0, ACTLR 23 bic r0, #CORTEX_A9_ACTLR_SMP_BIT 24 stcopr r0, ACTLR 25 isb 26 dsb sy 27 bx lr 28endfunc cortex_a9_disable_smp 29 30func cortex_a9_enable_smp 31 ldcopr r0, ACTLR 32 orr r0, #CORTEX_A9_ACTLR_SMP_BIT 33 stcopr r0, ACTLR 34 isb 35 bx lr 36endfunc cortex_a9_enable_smp 37 38func check_errata_794073 39#if ERRATA_A9_794073 40 mov r0, #ERRATA_APPLIES 41#else 42 mov r0, #ERRATA_MISSING 43#endif 44 bx lr 45endfunc check_errata_794073 46 47add_erratum_entry cortex_a9, ERRATUM(794073), ERRATA_A9_794073 48 49func check_errata_cve_2017_5715 50#if WORKAROUND_CVE_2017_5715 51 mov r0, #ERRATA_APPLIES 52#else 53 mov r0, #ERRATA_MISSING 54#endif 55 bx lr 56endfunc check_errata_cve_2017_5715 57 58add_erratum_entry cortex_a9, CVE(2017, 5715), WORKAROUND_CVE_2017_5715 59 60func cortex_a9_reset_func 61#if IMAGE_BL32 && WORKAROUND_CVE_2017_5715 62 ldr r0, =wa_cve_2017_5715_bpiall_vbar 63 stcopr r0, VBAR 64 stcopr r0, MVBAR 65 /* isb will be applied in the course of the reset func */ 66#endif 67 b cortex_a9_enable_smp 68endfunc cortex_a9_reset_func 69 70func cortex_a9_core_pwr_dwn 71 push {r12, lr} 72 73 assert_cache_enabled 74 75 /* Flush L1 cache */ 76 mov r0, #DC_OP_CISW 77 bl dcsw_op_level1 78 79 /* Exit cluster coherency */ 80 pop {r12, lr} 81 b cortex_a9_disable_smp 82endfunc cortex_a9_core_pwr_dwn 83 84func cortex_a9_cluster_pwr_dwn 85 push {r12, lr} 86 87 assert_cache_enabled 88 89 /* Flush L1 caches */ 90 mov r0, #DC_OP_CISW 91 bl dcsw_op_level1 92 93 bl plat_disable_acp 94 95 /* Exit cluster coherency */ 96 pop {r12, lr} 97 b cortex_a9_disable_smp 98endfunc cortex_a9_cluster_pwr_dwn 99 100declare_cpu_ops cortex_a9, CORTEX_A9_MIDR, \ 101 cortex_a9_reset_func, \ 102 cortex_a9_core_pwr_dwn, \ 103 cortex_a9_cluster_pwr_dwn 104