1 /*
2 * Copyright (c) 2021-2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch.h>
8 #include <arch_features.h>
9 #include <arch_helpers.h>
10 #include <lib/el3_runtime/pubsub.h>
11 #include <lib/extensions/trbe.h>
12
tsb_csync(void)13 static void tsb_csync(void)
14 {
15 /*
16 * The assembler does not yet understand the tsb csync mnemonic
17 * so use the equivalent hint instruction.
18 */
19 __asm__ volatile("hint #18");
20 }
21
trbe_enable(cpu_context_t * ctx)22 void trbe_enable(cpu_context_t *ctx)
23 {
24 el3_state_t *state = get_el3state_ctx(ctx);
25 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
26
27 /*
28 * MDCR_EL3.NSTBE = 0b0
29 * Trace Buffer owning Security state is Non-secure state. If FEAT_RME
30 * is not implemented, this field is RES0.
31 *
32 * MDCR_EL3.NSTB = 0b11
33 * Allow access of trace buffer control registers from NS-EL1 and
34 * NS-EL2, tracing is prohibited in Secure and Realm state (if
35 * implemented).
36 */
37 mdcr_el3_val |= MDCR_NSTB(MDCR_NSTB_EL1);
38 mdcr_el3_val &= ~(MDCR_NSTBE_BIT);
39 write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
40 }
41
trbe_disable(cpu_context_t * ctx)42 void trbe_disable(cpu_context_t *ctx)
43 {
44 el3_state_t *state = get_el3state_ctx(ctx);
45 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3);
46
47 /*
48 * MDCR_EL3.NSTBE = 0b0
49 * Trace Buffer owning Security state is secure state. If FEAT_RME
50 * is not implemented, this field is RES0.
51 *
52 * MDCR_EL3.NSTB = 0b00
53 * Clear these bits to disable access of trace buffer control registers
54 * from lower ELs in any security state.
55 */
56 mdcr_el3_val &= ~(MDCR_NSTB(MDCR_NSTB_EL1));
57 mdcr_el3_val &= ~(MDCR_NSTBE_BIT);
58 write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val);
59 }
60
trbe_init_el2_unused(void)61 void trbe_init_el2_unused(void)
62 {
63 /*
64 * MDCR_EL2.E2TB: Set to zero so that the trace Buffer
65 * owning exception level is NS-EL1 and, tracing is
66 * prohibited at NS-EL2. These bits are RES0 when
67 * FEAT_TRBE is not implemented.
68 */
69 write_mdcr_el2(read_mdcr_el2() & ~MDCR_EL2_E2TB(MDCR_EL2_E2TB_EL1));
70 }
71
trbe_drain_trace_buffers_hook(const void * arg __unused)72 static void *trbe_drain_trace_buffers_hook(const void *arg __unused)
73 {
74 if (is_feat_trbe_supported()) {
75 /*
76 * Before switching from normal world to secure world
77 * the trace buffers need to be drained out to memory. This is
78 * required to avoid an invalid memory access when TTBR is switched
79 * for entry to S-EL1.
80 */
81 tsb_csync();
82 dsbnsh();
83 }
84
85 return (void *)0;
86 }
87
88 SUBSCRIBE_TO_EVENT(cm_entering_secure_world, trbe_drain_trace_buffers_hook);
89