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1#
2# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8include lib/libfdt/libfdt.mk
9
10RESET_TO_BL31 := 1
11ifeq (${RESET_TO_BL31}, 0)
12$(error "This is a BL31-only port; RESET_TO_BL31 must be enabled")
13endif
14
15ifeq (${ENABLE_PIE}, 1)
16override SEPARATE_CODE_AND_RODATA := 1
17endif
18
19CTX_INCLUDE_AARCH32_REGS := 0
20ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
21$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
22endif
23
24ifeq (${TRUSTED_BOARD_BOOT}, 1)
25$(error "TRUSTED_BOARD_BOOT must be disabled")
26endif
27
28PRELOADED_BL33_BASE := 0x80080000
29
30FPGA_PRELOADED_DTB_BASE := 0x80070000
31$(eval $(call add_define,FPGA_PRELOADED_DTB_BASE))
32
33FPGA_PRELOADED_CMD_LINE := 0x1000
34$(eval $(call add_define,FPGA_PRELOADED_CMD_LINE))
35
36ENABLE_BRBE_FOR_NS		:= 2
37ENABLE_TRBE_FOR_NS		:= 2
38ENABLE_FEAT_AMU			:= 2
39ENABLE_FEAT_AMUv1p1		:= 2
40ENABLE_FEAT_CSV2_2		:= 2
41ENABLE_FEAT_ECV			:= 2
42ENABLE_FEAT_FGT			:= 2
43ENABLE_FEAT_HCX			:= 2
44ENABLE_FEAT_MTE2		:= 2
45ENABLE_FEAT_TCR2		:= 2
46ENABLE_SYS_REG_TRACE_FOR_NS	:= 2
47ENABLE_TRF_FOR_NS		:= 2
48ENABLE_SME_FOR_NS		:= 2
49ENABLE_SME2_FOR_NS		:= 2
50ENABLE_FEAT_LS64_ACCDATA	:= 2
51
52# Treating this as a memory-constrained port for now
53USE_COHERENT_MEM	:=	0
54
55# This can be overridden depending on CPU(s) used in the FPGA image
56HW_ASSISTED_COHERENCY	:=	1
57
58PL011_GENERIC_UART	:=	1
59
60SUPPORT_UNKNOWN_MPID	?=	1
61
62FPGA_CPU_LIBS	:=	lib/cpus/${ARCH}/aem_generic.S
63
64# select a different set of CPU files, depending on whether we compile for
65# hardware assisted coherency cores or not
66ifeq (${HW_ASSISTED_COHERENCY}, 0)
67# Cores used without DSU
68	FPGA_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a35.S	\
69				lib/cpus/aarch64/cortex_a53.S	\
70				lib/cpus/aarch64/cortex_a57.S	\
71				lib/cpus/aarch64/cortex_a72.S	\
72				lib/cpus/aarch64/cortex_a73.S
73else
74# AArch64-only cores
75	FPGA_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a510.S			\
76				lib/cpus/aarch64/cortex_a520.S			\
77				lib/cpus/aarch64/cortex_a715.S			\
78				lib/cpus/aarch64/cortex_a720.S			\
79				lib/cpus/aarch64/cortex_x3.S 			\
80				lib/cpus/aarch64/cortex_x4.S			\
81				lib/cpus/aarch64/neoverse_n_common.S		\
82				lib/cpus/aarch64/neoverse_n1.S			\
83				lib/cpus/aarch64/neoverse_n2.S			\
84				lib/cpus/aarch64/neoverse_v1.S			\
85				lib/cpus/aarch64/cortex_a725.S		\
86				lib/cpus/aarch64/cortex_x925.S
87
88# AArch64/AArch32 cores
89	FPGA_CPU_LIBS	+=	lib/cpus/aarch64/cortex_a55.S	\
90				lib/cpus/aarch64/cortex_a75.S
91endif
92
93ifeq (${SUPPORT_UNKNOWN_MPID}, 1)
94# Add support for unknown/invalid MPIDs (aarch64 only)
95$(eval $(call add_define,SUPPORT_UNKNOWN_MPID))
96	FPGA_CPU_LIBS	+=	lib/cpus/aarch64/generic.S
97endif
98
99# Allow detection of GIC-600
100GICV3_SUPPORT_GIC600	:=	1
101
102GIC_ENABLE_V4_EXTN	:=	1
103
104# Include GICv3 driver files
105include drivers/arm/gic/v3/gicv3.mk
106
107FPGA_GIC_SOURCES	:=	${GICV3_SOURCES}			\
108				plat/common/plat_gicv3.c		\
109				plat/arm/board/arm_fpga/fpga_gicv3.c
110
111FDT_SOURCES		:=	fdts/arm_fpga.dts
112
113PLAT_INCLUDES		:=	-Iplat/arm/board/arm_fpga/include
114
115PLAT_BL_COMMON_SOURCES	:=	plat/arm/board/arm_fpga/${ARCH}/fpga_helpers.S
116
117BL31_SOURCES		+=	common/fdt_fixup.c				\
118				drivers/delay_timer/delay_timer.c		\
119				drivers/delay_timer/generic_delay_timer.c	\
120				drivers/arm/pl011/${ARCH}/pl011_console.S	\
121				plat/common/plat_psci_common.c			\
122				plat/arm/board/arm_fpga/fpga_pm.c			\
123				plat/arm/board/arm_fpga/fpga_topology.c		\
124				plat/arm/board/arm_fpga/fpga_console.c		\
125				plat/arm/board/arm_fpga/fpga_bl31_setup.c		\
126				${FPGA_CPU_LIBS}				\
127				${FPGA_GIC_SOURCES}
128
129BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
130
131$(eval $(call MAKE_S,$(BUILD_PLAT),plat/arm/board/arm_fpga/rom_trampoline.S,bl31,BL31))
132$(eval $(call MAKE_S,$(BUILD_PLAT),plat/arm/board/arm_fpga/kernel_trampoline.S,bl31,BL31))
133$(eval $(call MAKE_LD,$(BUILD_PLAT)/build_axf.ld,plat/arm/board/arm_fpga/build_axf.ld.S,bl31,BL31))
134
135ifeq ($($(ARCH)-ld-id),gnu-gcc)
136        AXF_LDFLAGS	+=	-Wl,--build-id=none -mno-fix-cortex-a53-843419
137else
138        AXF_LDFLAGS	+=	--build-id=none
139endif
140
141AXF_LDFLAGS += -nostdlib -no-pie
142
143bl31.axf: bl31 dtbs ${BUILD_PLAT}/rom_trampoline.o ${BUILD_PLAT}/kernel_trampoline.o ${BUILD_PLAT}/build_axf.ld
144	$(s)echo "  LD      $@"
145	$(q)$($(ARCH)-ld) -T ${BUILD_PLAT}/build_axf.ld -L ${BUILD_PLAT} ${AXF_LDFLAGS} -s -n -o ${BUILD_PLAT}/bl31.axf
146
147all: bl31.axf
148