1# 2# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Extra partitions used to find FIP, contains: 8# metadata (2) and the FIP partitions (default is 2). 9STM32_EXTRA_PARTS := 4 10 11include plat/st/common/common.mk 12 13ARM_CORTEX_A7 := yes 14ARM_WITH_NEON := yes 15USE_COHERENT_MEM := 0 16 17# Default Device tree 18DTB_FILE_NAME ?= stm32mp157c-ev1.dtb 19 20STM32MP13 ?= 0 21STM32MP15 ?= 0 22 23ifeq ($(STM32MP13),1) 24ifeq ($(STM32MP15),1) 25$(error Cannot enable both flags STM32MP13 and STM32MP15) 26endif 27STM32MP13 := 1 28STM32MP15 := 0 29else ifeq ($(STM32MP15),1) 30STM32MP13 := 0 31STM32MP15 := 1 32else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),) 33STM32MP13 := 1 34STM32MP15 := 0 35else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),) 36STM32MP13 := 0 37STM32MP15 := 1 38endif 39 40ifeq ($(STM32MP13),1) 41# Will use SRAM2 as mbedtls heap 42STM32MP_USE_EXTERNAL_HEAP := 1 43 44# DDR controller with single AXI port and 16-bit interface 45STM32MP_DDR_DUAL_AXI_PORT:= 0 46STM32MP_DDR_32BIT_INTERFACE:= 0 47 48ifeq (${TRUSTED_BOARD_BOOT},1) 49# PKA algo to include 50PKA_USE_NIST_P256 := 1 51PKA_USE_BRAINPOOL_P256T1:= 1 52endif 53 54# STM32 image header version v2.0 55STM32_HEADER_VERSION_MAJOR:= 2 56STM32_HEADER_VERSION_MINOR:= 0 57endif 58 59ifeq ($(STM32MP15),1) 60# DDR controller with dual AXI port and 32-bit interface 61STM32MP_DDR_DUAL_AXI_PORT:= 1 62STM32MP_DDR_32BIT_INTERFACE:= 1 63 64# STM32 image header version v1.0 65STM32_HEADER_VERSION_MAJOR:= 1 66STM32_HEADER_VERSION_MINOR:= 0 67STM32MP_CRYPTO_ROM_LIB := 1 68 69# Decryption support 70ifneq ($(DECRYPTION_SUPPORT),none) 71$(error "DECRYPTION_SUPPORT not supported on STM32MP15") 72endif 73endif 74 75PKA_USE_NIST_P256 ?= 0 76PKA_USE_BRAINPOOL_P256T1 ?= 0 77 78ifeq ($(AARCH32_SP),sp_min) 79# Disable Neon support: sp_min runtime may conflict with non-secure world 80TF_CFLAGS += -mfloat-abi=soft 81endif 82 83# Not needed for Cortex-A7 84WORKAROUND_CVE_2017_5715:= 0 85WORKAROUND_CVE_2022_23960:= 0 86 87ifeq ($(STM32MP13),1) 88STM32_HASH_VER := 4 89STM32_RNG_VER := 4 90else # Assuming STM32MP15 91STM32_HASH_VER := 2 92STM32_RNG_VER := 2 93endif 94 95# Download load address for serial boot devices 96DWL_BUFFER_BASE ?= 0xC7000000 97 98# Device tree 99ifeq ($(STM32MP13),1) 100BL2_DTSI := stm32mp13-bl2.dtsi 101FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 102else 103BL2_DTSI := stm32mp15-bl2.dtsi 104FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME))) 105ifeq ($(AARCH32_SP),sp_min) 106BL32_DTSI := stm32mp15-bl32.dtsi 107FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME))) 108endif 109endif 110 111# Macros and rules to build TF binary 112STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME))) 113STM32_LD_FILE := plat/st/stm32mp1/stm32mp1.ld.S 114STM32_BINARY_MAPPING := plat/st/stm32mp1/stm32mp1.S 115 116ifeq ($(AARCH32_SP),sp_min) 117# BL32 is built only if using SP_MIN 118BL32_DEP := bl32 119ASFLAGS += -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\" 120endif 121 122STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME)) 123STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME) 124ifneq (${AARCH32_SP},none) 125FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME))) 126endif 127# Add the FW_CONFIG to FIP and specify the same to certtool 128$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config)) 129ifeq ($(GENERATE_COT),1) 130STM32MP_CFG_CERT := $(BUILD_PLAT)/stm32mp_cfg_cert.crt 131# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool 132$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert)) 133endif 134ifeq ($(AARCH32_SP),sp_min) 135STM32MP_TOS_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME))) 136$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config)) 137endif 138 139# Enable flags for C files 140$(eval $(call assert_booleans,\ 141 $(sort \ 142 PKA_USE_BRAINPOOL_P256T1 \ 143 PKA_USE_NIST_P256 \ 144 STM32MP_CRYPTO_ROM_LIB \ 145 STM32MP_DDR_32BIT_INTERFACE \ 146 STM32MP_DDR_DUAL_AXI_PORT \ 147 STM32MP_USE_EXTERNAL_HEAP \ 148 STM32MP13 \ 149 STM32MP15 \ 150))) 151 152$(eval $(call assert_numerics,\ 153 $(sort \ 154 PLAT_PARTITION_MAX_ENTRIES \ 155 STM32_HASH_VER \ 156 STM32_HEADER_VERSION_MAJOR \ 157 STM32_RNG_VER \ 158 STM32_TF_A_COPIES \ 159))) 160 161$(eval $(call add_defines,\ 162 $(sort \ 163 DWL_BUFFER_BASE \ 164 PKA_USE_BRAINPOOL_P256T1 \ 165 PKA_USE_NIST_P256 \ 166 PLAT_PARTITION_MAX_ENTRIES \ 167 PLAT_TBBR_IMG_DEF \ 168 STM32_HASH_VER \ 169 STM32_HEADER_VERSION_MAJOR \ 170 STM32_RNG_VER \ 171 STM32_TF_A_COPIES \ 172 STM32MP_CRYPTO_ROM_LIB \ 173 STM32MP_DDR_32BIT_INTERFACE \ 174 STM32MP_DDR_DUAL_AXI_PORT \ 175 STM32MP_USE_EXTERNAL_HEAP \ 176 STM32MP13 \ 177 STM32MP15 \ 178))) 179 180# Include paths and source files 181PLAT_INCLUDES += -Iplat/st/stm32mp1/include/ 182 183PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_private.c 184 185PLAT_BL_COMMON_SOURCES += drivers/st/uart/aarch32/stm32_console.S 186 187ifneq (${ENABLE_STACK_PROTECTOR},0) 188PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_stack_protector.c 189endif 190 191PLAT_BL_COMMON_SOURCES += lib/cpus/aarch32/cortex_a7.S 192 193PLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \ 194 drivers/st/bsec/bsec2.c \ 195 drivers/st/ddr/stm32mp1_ddr_helpers.c \ 196 drivers/st/i2c/stm32_i2c.c \ 197 drivers/st/iwdg/stm32_iwdg.c \ 198 drivers/st/pmic/stm32mp_pmic.c \ 199 drivers/st/pmic/stpmic1.c \ 200 drivers/st/reset/stm32mp1_reset.c \ 201 plat/st/stm32mp1/stm32mp1_dbgmcu.c \ 202 plat/st/stm32mp1/stm32mp1_helper.S \ 203 plat/st/stm32mp1/stm32mp1_syscfg.c 204 205ifeq ($(STM32MP13),1) 206PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \ 207 drivers/st/clk/clk-stm32mp13.c \ 208 drivers/st/crypto/stm32_rng.c 209else 210PLAT_BL_COMMON_SOURCES += drivers/st/clk/stm32mp1_clk.c 211endif 212 213BL2_SOURCES += plat/st/stm32mp1/plat_bl2_mem_params_desc.c \ 214 plat/st/stm32mp1/stm32mp1_fconf_firewall.c 215 216BL2_SOURCES += drivers/st/crypto/stm32_hash.c \ 217 plat/st/stm32mp1/bl2_plat_setup.c 218 219ifeq (${TRUSTED_BOARD_BOOT},1) 220ifeq ($(STM32MP13),1) 221BL2_SOURCES += drivers/st/crypto/stm32_pka.c 222BL2_SOURCES += drivers/st/crypto/stm32_saes.c 223endif 224endif 225 226ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),) 227BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c 228endif 229 230ifeq (${STM32MP_RAW_NAND},1) 231BL2_SOURCES += drivers/st/fmc/stm32_fmc2_nand.c 232endif 233 234ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 235BL2_SOURCES += drivers/st/spi/stm32_qspi.c 236endif 237 238ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),) 239BL2_SOURCES += plat/st/stm32mp1/stm32mp1_boot_device.c 240endif 241 242ifeq (${STM32MP_UART_PROGRAMMER},1) 243BL2_SOURCES += drivers/st/uart/stm32_uart.c 244endif 245 246ifeq (${STM32MP_USB_PROGRAMMER},1) 247#The DFU stack uses only one end point, reduce the USB stack footprint 248$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U)) 249BL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \ 250 plat/st/stm32mp1/stm32mp1_usb_dfu.c 251endif 252 253BL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \ 254 drivers/st/ddr/stm32mp1_ram.c 255 256BL2_SOURCES += plat/st/stm32mp1/plat_ddr.c 257 258ifeq ($(AARCH32_SP),sp_min) 259# Create DTB file for BL32 260${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | $$(@D)/ 261 $(q)echo '#include "$(patsubst fdts/%,%,$<)"' > $@ 262 $(q)echo '#include "${BL32_DTSI}"' >> $@ 263 264${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts | $$(@D)/ 265endif 266 267include plat/st/common/common_rules.mk 268