1 /*
2 * Copyright (c) 2013-2018, Arm Limited and Contributors. All rights reserved.
3 * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /*
9 * APU specific definition of processors in the subsystem as well as functions
10 * for getting information about and changing state of the APU.
11 */
12
13 #include <assert.h>
14 #include <string.h>
15
16 #include <common/bl_common.h>
17 #include <drivers/arm/gic_common.h>
18 #include <drivers/arm/gicv2.h>
19 #include <lib/bakery_lock.h>
20 #include <lib/mmio.h>
21 #include <lib/utils.h>
22
23 #include <plat_ipi.h>
24 #include "pm_client.h"
25 #include "pm_ipi.h"
26 #include <zynqmp_def.h>
27 #include "zynqmp_pm_api_sys.h"
28
29 #define IRQ_MAX 84U
30 #define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U)
31 #define UNDEFINED_CPUID (~0U)
32
33 #define PM_SUSPEND_MODE_STD 0U
34 #define PM_SUSPEND_MODE_POWER_OFF 1U
35
36 DEFINE_BAKERY_LOCK(pm_client_secure_lock);
37
38 static const struct pm_ipi apu_ipi = {
39 .local_ipi_id = IPI_LOCAL_ID,
40 .remote_ipi_id = IPI_REMOTE_ID,
41 .buffer_base = IPI_BUFFER_LOCAL_BASE,
42 };
43
44 static uint32_t suspend_mode = PM_SUSPEND_MODE_STD;
45
46 /* Order in pm_procs_all array must match cpu ids */
47 static const struct pm_proc pm_procs_all[] = {
48 {
49 .node_id = NODE_APU_0,
50 .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK,
51 .ipi = &apu_ipi,
52 },
53 {
54 .node_id = NODE_APU_1,
55 .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK,
56 .ipi = &apu_ipi,
57 },
58 {
59 .node_id = NODE_APU_2,
60 .pwrdn_mask = APU_2_PWRCTL_CPUPWRDWNREQ_MASK,
61 .ipi = &apu_ipi,
62 },
63 {
64 .node_id = NODE_APU_3,
65 .pwrdn_mask = APU_3_PWRCTL_CPUPWRDWNREQ_MASK,
66 .ipi = &apu_ipi,
67 },
68 };
69
70 /* Interrupt to PM node ID map */
71 static enum pm_node_id irq_node_map[IRQ_MAX + 1U] = {
72 NODE_UNKNOWN,
73 NODE_UNKNOWN,
74 NODE_UNKNOWN,
75 NODE_UNKNOWN, /* 3 */
76 NODE_UNKNOWN,
77 NODE_UNKNOWN,
78 NODE_UNKNOWN,
79 NODE_UNKNOWN, /* 7 */
80 NODE_UNKNOWN,
81 NODE_UNKNOWN,
82 NODE_UNKNOWN,
83 NODE_UNKNOWN, /* 11 */
84 NODE_UNKNOWN,
85 NODE_UNKNOWN,
86 NODE_NAND,
87 NODE_QSPI, /* 15 */
88 NODE_GPIO,
89 NODE_I2C_0,
90 NODE_I2C_1,
91 NODE_SPI_0, /* 19 */
92 NODE_SPI_1,
93 NODE_UART_0,
94 NODE_UART_1,
95 NODE_CAN_0, /* 23 */
96 NODE_CAN_1,
97 NODE_UNKNOWN,
98 NODE_RTC,
99 NODE_RTC, /* 27 */
100 NODE_UNKNOWN,
101 NODE_UNKNOWN,
102 NODE_UNKNOWN,
103 NODE_UNKNOWN, /* 31 */
104 NODE_UNKNOWN,
105 NODE_UNKNOWN,
106 NODE_UNKNOWN,
107 NODE_UNKNOWN, /* 35, NODE_IPI_APU */
108 NODE_TTC_0,
109 NODE_TTC_0,
110 NODE_TTC_0,
111 NODE_TTC_1, /* 39 */
112 NODE_TTC_1,
113 NODE_TTC_1,
114 NODE_TTC_2,
115 NODE_TTC_2, /* 43 */
116 NODE_TTC_2,
117 NODE_TTC_3,
118 NODE_TTC_3,
119 NODE_TTC_3, /* 47 */
120 NODE_SD_0,
121 NODE_SD_1,
122 NODE_SD_0,
123 NODE_SD_1, /* 51 */
124 NODE_UNKNOWN,
125 NODE_UNKNOWN,
126 NODE_UNKNOWN,
127 NODE_UNKNOWN, /* 55 */
128 NODE_UNKNOWN,
129 NODE_ETH_0,
130 NODE_ETH_0,
131 NODE_ETH_1, /* 59 */
132 NODE_ETH_1,
133 NODE_ETH_2,
134 NODE_ETH_2,
135 NODE_ETH_3, /* 63 */
136 NODE_ETH_3,
137 NODE_USB_0,
138 NODE_USB_0,
139 NODE_USB_0, /* 67 */
140 NODE_USB_0,
141 NODE_USB_0,
142 NODE_USB_1,
143 NODE_USB_1, /* 71 */
144 NODE_USB_1,
145 NODE_USB_1,
146 NODE_USB_1,
147 NODE_USB_0, /* 75 */
148 NODE_USB_0,
149 NODE_ADMA,
150 NODE_ADMA,
151 NODE_ADMA, /* 79 */
152 NODE_ADMA,
153 NODE_ADMA,
154 NODE_ADMA,
155 NODE_ADMA, /* 83 */
156 NODE_ADMA,
157 };
158
159 /**
160 * irq_to_pm_node - Get PM node ID corresponding to the interrupt number.
161 * @irq: Interrupt number.
162 *
163 * Return: PM node ID corresponding to the specified interrupt.
164 *
165 */
irq_to_pm_node(uint32_t irq)166 static enum pm_node_id irq_to_pm_node(uint32_t irq)
167 {
168 assert(irq <= IRQ_MAX);
169 return irq_node_map[irq];
170 }
171
172 /**
173 * pm_client_set_wakeup_sources - Set all slaves with enabled interrupts as wake
174 * sources in the PMU firmware.
175 *
176 */
pm_client_set_wakeup_sources(void)177 static void pm_client_set_wakeup_sources(void)
178 {
179 uint32_t reg_num;
180 uint8_t pm_wakeup_nodes_set[NODE_MAX] = { 0 };
181 uintptr_t isenabler1 = BASE_GICD_BASE + GICD_ISENABLER + 4U;
182
183 /* In case of power-off suspend, only NODE_EXTERN must be set */
184 if (suspend_mode == PM_SUSPEND_MODE_POWER_OFF) {
185 enum pm_ret_status ret;
186
187 ret = pm_set_wakeup_source(NODE_APU, NODE_EXTERN, 1U);
188 /**
189 * If NODE_EXTERN could not be set as wake source, proceed with
190 * standard suspend (no one will wake the system otherwise)
191 */
192 if (ret == PM_RET_SUCCESS) {
193 return;
194 }
195 }
196
197 zeromem(&pm_wakeup_nodes_set, sizeof(pm_wakeup_nodes_set));
198
199 for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) {
200 uint32_t base_irq = reg_num << ISENABLER_SHIFT;
201 uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2U));
202
203 if (reg == 0) {
204 continue;
205 }
206
207 while (reg != 0U) {
208 enum pm_node_id node;
209 uint32_t idx, ret, irq, lowest_set = reg & (-reg);
210
211 idx = __builtin_ctz(lowest_set);
212 irq = base_irq + idx;
213
214 if (irq > IRQ_MAX) {
215 break;
216 }
217
218 node = irq_to_pm_node(irq);
219 reg &= ~lowest_set;
220
221 if ((node > NODE_UNKNOWN) && (node < NODE_MAX)) {
222 if (pm_wakeup_nodes_set[node] == 0U) {
223 ret = pm_set_wakeup_source(NODE_APU, node, 1U);
224 pm_wakeup_nodes_set[node] = (ret == PM_RET_SUCCESS) ? 1U : 0U;
225 }
226 }
227 }
228 }
229 }
230
231 /**
232 * pm_get_proc() - returns pointer to the proc structure.
233 * @cpuid: id of the cpu whose proc struct pointer should be returned.
234 *
235 * Return: pointer to a proc structure if proc is found, otherwise NULL.
236 *
237 */
pm_get_proc(uint32_t cpuid)238 const struct pm_proc *pm_get_proc(uint32_t cpuid)
239 {
240 if (cpuid < ARRAY_SIZE(pm_procs_all)) {
241 return &pm_procs_all[cpuid];
242 }
243
244 return NULL;
245 }
246
247 /**
248 * pm_get_cpuid() - get the local cpu ID for a global node ID.
249 * @nid: node id of the processor.
250 *
251 * Return: the cpu ID (starting from 0) for the subsystem.
252 *
253 */
pm_get_cpuid(enum pm_node_id nid)254 static uint32_t pm_get_cpuid(enum pm_node_id nid)
255 {
256 for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) {
257 if (pm_procs_all[i].node_id == nid) {
258 return i;
259 }
260 }
261 return UNDEFINED_CPUID;
262 }
263
264 const struct pm_proc *primary_proc = &pm_procs_all[0];
265
266 /**
267 * pm_client_suspend() - Client-specific suspend actions.
268 * @proc: processor which need to suspend.
269 * @state: desired suspend state.
270 *
271 * This function should contain any PU-specific actions
272 * required prior to sending suspend request to PMU
273 * Actions taken depend on the state system is suspending to.
274 *
275 */
pm_client_suspend(const struct pm_proc * proc,uint32_t state)276 void pm_client_suspend(const struct pm_proc *proc, uint32_t state)
277 {
278 bakery_lock_get(&pm_client_secure_lock);
279
280 if (state == PM_STATE_SUSPEND_TO_RAM) {
281 pm_client_set_wakeup_sources();
282 }
283
284 /* Set powerdown request */
285 mmio_write_32(APU_PWRCTL, mmio_read_32(APU_PWRCTL) | proc->pwrdn_mask);
286
287 bakery_lock_release(&pm_client_secure_lock);
288 }
289
290
291 /**
292 * pm_client_abort_suspend() - Client-specific abort-suspend actions.
293 *
294 * This function should contain any PU-specific actions
295 * required for aborting a prior suspend request.
296 *
297 */
pm_client_abort_suspend(void)298 void pm_client_abort_suspend(void)
299 {
300 /* Enable interrupts at processor level (for current cpu) */
301 gicv2_cpuif_enable();
302
303 bakery_lock_get(&pm_client_secure_lock);
304
305 /* Clear powerdown request */
306 mmio_write_32(APU_PWRCTL,
307 mmio_read_32(APU_PWRCTL) & ~primary_proc->pwrdn_mask);
308
309 bakery_lock_release(&pm_client_secure_lock);
310 }
311
312 /**
313 * pm_client_wakeup() - Client-specific wakeup actions.
314 * @proc: Processor which need to wakeup.
315 *
316 * This function should contain any PU-specific actions
317 * required for waking up another APU core.
318 *
319 */
pm_client_wakeup(const struct pm_proc * proc)320 void pm_client_wakeup(const struct pm_proc *proc)
321 {
322 uint32_t cpuid = pm_get_cpuid(proc->node_id);
323
324 if (cpuid == UNDEFINED_CPUID) {
325 return;
326 }
327
328 bakery_lock_get(&pm_client_secure_lock);
329
330 /* clear powerdown bit for affected cpu */
331 uint32_t val = mmio_read_32(APU_PWRCTL);
332 val &= ~(proc->pwrdn_mask);
333 mmio_write_32(APU_PWRCTL, val);
334
335 bakery_lock_release(&pm_client_secure_lock);
336 }
337
pm_set_suspend_mode(uint32_t mode)338 enum pm_ret_status pm_set_suspend_mode(uint32_t mode)
339 {
340 if ((mode != PM_SUSPEND_MODE_STD) &&
341 (mode != PM_SUSPEND_MODE_POWER_OFF)) {
342 return PM_RET_ERROR_ARGS;
343 }
344
345 suspend_mode = mode;
346 return PM_RET_SUCCESS;
347 }
348