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1OUTPUT_FORMAT("elf64-littleaarch64", "elf64-bigaarch64", "elf64-littleaarch64")
2OUTPUT_ARCH(aarch64)
3
4_start_phys = _start - %KERNEL_BASE% + %MEMBASE%;
5ENTRY(_start_phys)
6
7SECTIONS
8{
9    . = %KERNEL_BASE% + %KERNEL_LOAD_OFFSET%;
10
11    /*
12     * LLVM introduced a static constructor, init_have_lse_atomics, to
13     * compiler-rt that we don't want and that breaks our build. Until we compile
14     * our own compiler-rt and either provide getauxval and enable CFI, or remove
15     * this function, we can remove it during linking here
16     *
17     * LLVM 19 added init_aarch64_has_sme
18     */
19    /DISCARD/ : {
20        *libclang_rt.builtins-aarch64-android.a:cpu_model.c.o(
21            .text.init_cpu_features
22            .text.init_have_lse_atomics
23            .init_array*
24        )
25
26        *libclang_rt.builtins-aarch64-android.a:aarch64.c.o(
27            .text.__init_cpu_features
28            .text.init_have_lse_atomics
29            .init_array*
30        )
31
32        *libclang_rt.builtins-aarch64-android.a:sme-abi-init.c.o(
33            .text.init_aarch64_has_sme
34            .init_array*
35        )
36    }
37
38    /* text/read-only data */
39    /* set the load address to physical MEMBASE */
40    .text : AT(%MEMBASE% + %KERNEL_LOAD_OFFSET%) {
41        __code_start = .;
42        KEEP(*(.text.boot))
43        KEEP(*(.text.boot.early.vectab))
44        KEEP(*(.text.boot.vectab))
45        *(.text* .sram.text.glue_7* .gnu.linkonce.t.*)
46    }
47
48    .interp : { *(.interp) }
49    .hash : { *(.hash) }
50    .dynsym : { *(.dynsym) }
51    .dynstr : { *(.dynstr) }
52    .init : { *(.init) } =0x9090
53    .plt : { *(.plt) }
54
55    /*
56     * .plt needs to be empty because its entries might call into the dynamic
57     * loader, which doesn't exist for Trusty (or any kernel).
58     */
59    ASSERT(SIZEOF(.plt) == 0, ".plt section should be empty")
60
61    /* .ARM.exidx is sorted, so has to go in its own output section.  */
62    __exidx_start = .;
63    .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
64    __exidx_end = .;
65
66    .fake_post_text : {
67	    __code_end = .;
68    }
69
70    .rodata : ALIGN(4096) {
71        __rodata_start = .;
72        __fault_handler_table_start = .;
73        KEEP(*(.rodata.fault_handler_table))
74        __fault_handler_table_end = .;
75        *(.rodata .rodata.* .gnu.linkonce.r.*)
76    }
77
78    .rel.dyn : {
79        *(.rel.text) *(.rel.gnu.linkonce.t*)
80        *(.rel.init)
81        *(.rel.plt)
82        *(.rel.rodata) *(.rel.gnu.linkonce.r*)
83        *(.rel.lk_init)
84        *(.rel.apps)
85        *(.rel.drivers)
86        *(.rel.data) *(.rel.gnu.linkonce.d*)
87        *(.rel.devices)
88        *(.rel.ctors)
89        *(.rel.dtors)
90        *(.rel.got)
91        *(.rel.bss) *(.rel.bss.*) *(.rel.gnu.linkonce.b*)
92    }
93
94    .rela.dyn : {
95        *(.rela.text) *(.rela.gnu.linkonce.t*)
96        *(.rela.init)
97        *(.rela.plt)
98        *(.rela.rodata) *(.rela.gnu.linkonce.r*)
99        *(.rela.lk_init)
100        *(.rela.apps)
101        *(.rela.drivers)
102        *(.rela.data) *(.rela.gnu.linkonce.d*)
103        *(.rela.devices)
104        *(.rela.ctors)
105        *(.rela.dtors)
106        *(.rela.got)
107        *(.rela.bss) *(.rela.bss.*) *(.rela.gnu.linkonce.b*)
108    }
109
110    /*
111     * Non-RELR dynamic relocations are not implemented yet.
112     * .rel.dyn should not ever appear on AArch64 anyway.
113     */
114    ASSERT(SIZEOF(.rel.dyn) == 0, "Found non-RELR relocations in .rel.dyn")
115    ASSERT(SIZEOF(.rela.dyn) == 0, "Found non-RELR relocations in .rel.dyn")
116
117    .relr.dyn : ALIGN(8) {
118        __relr_start = .;
119        *(.relr.dyn)
120        __relr_end = .;
121    }
122
123    .ctors : ALIGN(8) {
124        __ctor_list = .;
125        KEEP(*(.ctors .init_array))
126        __ctor_end = .;
127    }
128    .dtors : ALIGN(8) {
129        __dtor_list = .;
130        KEEP(*(.dtors .fini_array))
131        __dtor_end = .;
132    }
133
134    /*
135     * .got and .dynamic need to follow .ctors and .dtors because the linker
136     * puts them all in the RELRO segment and wants them contiguous
137     */
138    .dynamic : { *(.dynamic) }
139    .got : { *(.got.plt) *(.got) }
140
141    /*
142     * extra linker scripts tend to insert sections just after .rodata,
143     * so we want to make sure this symbol comes after anything inserted above,
144     * but not aligned to the next section necessarily.
145     */
146    .fake_post_rodata : {
147        __rodata_end = .;
148    }
149
150    .data : ALIGN(4096) {
151        /* writable data  */
152        __data_start_rom = .;
153        /* in one segment binaries, the rom data address is on top of the ram data address */
154        __data_start = .;
155        *(.data .data.* .gnu.linkonce.d.*)
156    }
157
158    /*
159     * extra linker scripts tend to insert sections just after .data,
160     * so we want to make sure this symbol comes after anything inserted above,
161     * but not aligned to the next section necessarily.
162     */
163    .fake_post_data : {
164        __data_end = .;
165    }
166
167    /* unintialized data (in same segment as writable data) */
168    .bss : ALIGN(4096) {
169        __bss_start = .;
170        KEEP(*(.bss.prebss.*))
171        . = ALIGN(8);
172        __post_prebss_bss_start = .;
173        *(.bss .bss.*)
174        *(.gnu.linkonce.b.*)
175        *(COMMON)
176        . = ALIGN(8);
177        __bss_end = .;
178    }
179
180    /* Align the end to ensure anything after the kernel ends up on its own pages */
181    . = ALIGN(4096);
182    _end = .;
183
184    . = %KERNEL_BASE% + %MEMSIZE%;
185    _end_of_ram = .;
186
187    /* Strip unnecessary stuff */
188    /DISCARD/ : { *(.comment .note .eh_frame) }
189}
190