1############################################################################### 2#Board Varaints and Versions are defined below: 3#BOARD_VARIANT_NXPREF 0x01 4#BOARD_NXPREF_VERSIONS(0x01, 0x02) 5 6#BOARD_VARIANT_CUSTREF1 0x2A 7#BOARD_CUSTREF1_VERSIONS(0x01,0x02,0x03) 8 9UWB_BOARD_VARIANT_CONFIG=0x01 10UWB_BOARD_VARIANT_VERSION=0x01 11 12############################################################################### 13# Extended CofigID 14#DELAY_CALIBRATION_VALUE E400 15#AOA_CALIBRATION_CTRL E401 16#DPD_WAKEUP_SRC E402 17#DPD_ENTRY_TIMEOUT E404 18#GPIO_USAGE_CONFIG E408 19 ##Note: Configure the GPIO for multiple purposes depending on usecase ID 20 ## config(E4, 08, 03, 00, 00, 00) 21 ## Length and number of parameter accordingly in the header part. 22#CLK_CONFIG_CTRL E430 23 ##Note: Config for clock source selection and refer UCI specification 24 ## for more information. 25# Refer the NXP UCI specification for below configs 26#ANTENNA_RX_IDX_DEFINE E460 27#ANTENNA_TX_IDX_DEFINE E461 28#ANTENNAS_CONFIGURATION_RX E465 29 30UWB_CORE_EXT_DEVICE_DEFAULT_CONFIG={05, 31 E4, 03, 01, b4, 32 E4, 04, 02, f4, 01, 33 E4, 60, 07, 01, 01, 02, 01, 00, 01, 00, 34 E4, 61, 06, 01, 01, 01, 00, 00, 00, 35 E4, 65, 06, 01, 03, 03, 00, 01, 01 36} 37 38# This config enable/disable the dpd entry prevention ntf config during init 39# 00 for disable 40# 01 for enable 41UWB_DPD_ENTRY_PREVENTION_NTF_CONFIG=0x01 42 43#This config call's suspend to kernel driver on idle 44#This is only activated when AUTO_SUSPEND_ENABLED=1 45#0=disable 46#1=enable 47AUTO_SUSPEND_ENABLE=0 48#This config defines duration to resume the device before sending any commands 49AUTO_SUSPEND_TIMEOUT_MS=100 50 51##Note: Below configs are applicable in User_Mode FW only 52#WIFI_COEX_FEATURE_ALL_CH 0xF0 53##Note: WIFI_COEX_FEATURE_ALL_CH is disabled by default. 54 ## Octet[0]: Enable/Disable WiFi CoEx feature 55 ## 0x00: Disable (default) 56 ## • b[3:0]: Enable/Disable functionality CoEx 57 ## – 0x1 : Enable CoEx Interface without Debug and without Warning Verbose 58 ## – 0x2 : Enable CoEx Interface with Debug Verbose only 59 ## – 0x3 : Enable CoEx Interface with Warnings Verbose only 60 ## – 0x4 : Enable CoEx Interface with both Debug and Warning Verbose 61 ## • b[7:4]: CoEx Interface (GPIO) selection: 62 ## – 0x0 : GPIO Interface 63 ## – Rest of the values are Reserved 64 ## Octect[1]: Number of channels N Shall be >= 1 (0 will be rejected by UWBS) 65 ## N*4 octets to follow 66 ## Octet[2]: Channel ID 67 ## Octet[3]: MIN_GUARD_DURATION 68 ## Octet[4]: MAX_GRANT_DURATION 69 ## Octet[5]: ADVANCED GRANT DURATION 70 ## Based on requirement add the below configs: 71 ## Enable CH5 - (F0, 06, 01, 01, 05, 3C, 1E, 1E) 72 ## Enable CH9 - (F0, 06, 01, 01, 09, 3C, 1E, 1E) 73 ## Enable both CH5 and CH9 - (F0, 0A, 01, 02, 05, 3C, 1E, 1E, 09, 3C, 1E, 1E) 74 ## 75 ## Update the length and number of parameter accordingly in 76 ## the header part. 77 ## WIFI COEX feature supports only in user binary. 78#GPIO_USAGE_CONFIG E4 08 79 ## Customer need to set the DPD_WAKEUP_SOURCE as 02 (GPIO1) before applying 80 ## the GPIO_USAGE_CONFIG command to enable time sync notification feature 81UWB_USER_FW_BOOT_MODE_CONFIG={20, 04, 00, 13, 02, 82 F0, 06, 00, 01, 05, 3C, 1E, 1E, 83 E4, 02, 01, 00, 84 E4, 08, 03, 00, 00, 00 85} 86 87# Set system time uncertainty value in microsec for CCC ranging 88UWB_INITIATION_TIME_DELTA=200000 89 90#LIST OF UWB CAPABILITY INFO NOT RECEIVED FROM UWBS 91# mapping device caps according to Fira 2.0 92# TODO: Remove once FW support available 93UWB_VENDOR_CAPABILITY={A8, 04, 05, 00, 00, 00, 94 E3, 01, 01, 95 E4, 04, 64, 00, 00, 00, 96 E5, 04, 03, 00, 00, 00, 97 E6, 01, 01, 98 E7, 01, 01, 99 E8, 04, B0, 04, 00, 00, 100 E9, 04, 05, 00, 00, 00, 101 EA, 02, 09, 00, 102 AB, 02, 64, 00, 103 EB, 04, 05, 00, 00, 00 104} 105 106############################################################################### 107# Helios PROD Mode FW version 108# Make sure you push the Production FW while using this Macro 109NXP_UWB_PROD_FW_FILENAME="libsr100t_prod_fw.bin" 110 111# Helios Dev Mode FW version 112# Make sure you push the Dev Mode FW while using this Macro 113NXP_UWB_DEV_FW_FILENAME="libsr100t_dev_fw.bin" 114############################################################################### 115 116############################################################################### 117#enable or disable fw download logging 118UWB_FW_DOWNLOAD_LOG=0x00 119############################################################################### 120 121############################################################################### 122# Enable or disable delete ursk for ccc session 123DELETE_URSK_FOR_CCC_SESSION=0x00 124 125# Enable or disable delete ursk for aliro session 126DELETE_URSK_FOR_ALIRO_SESSION=0x00 127 128############################################################################### 129#enable or disable sts index overriding for ccc session 130OVERRIDE_STS_INDEX_FOR_CCC_SESSION=0x01 131############################################################################### 132 133############################################################################### 134# set Crystal calibration settings 135# byte[0] No Of registers 136# byte[2-1] 38.4 MHz XTAL CAP1 137# byte[4-3] 38.4 MHz XTAL CAP2 138# byte[6-5] 38.4 MHz XTAL GM 139 140# NXP_UWB_XTAL_38MHZ_CONFIG={2F, 21, 00, 0A, 05, 01, 07, 03, 0F, 00, 0F, 00, 21, 00} 141 142############################################################################### 143# This config enable/disable the Vendor extended notifications 144# 00 for disable 145# 01 for enable 146NXP_UWB_EXTENDED_NTF_CONFIG={20, 04, 00, 05, 01, E4, 33, 01, 01} 147 148############################################################################### 149############################################################################### 150# Core Device configurations 151# Below sections needs to be updated with the correct values for needed core device configurations 152 153#NXP_CORE_CONF_BLK_1={} 154 155#NXP_CORE_CONF_BLK_2={} 156 157#NXP_CORE_CONF_BLK_3={} 158 159#NXP_CORE_CONF_BLK_4={} 160 161#NXP_CORE_CONF_BLK_5={} 162 163#NXP_CORE_CONF_BLK_6={} 164 165#NXP_CORE_CONF_BLK_7={} 166 167#NXP_CORE_CONF_BLK_8={} 168 169#NXP_CORE_CONF_BLK_9={} 170 171#NXP_CORE_CONF_BLK_10={} 172 173 174NXP_LOG_JNI_LOGLEVEL=0x05 175NXP_LOG_UCI_CORE_LOGLEVEL=0x05 176NXP_LOG_UCIHAL_LOGLEVEL=0x05 177NXP_LOG_FWDNLD_LOGLEVEL=0x05 178NXP_LOG_TML_LOGLEVEL=0x05 179NXP_LOG_UCIX_LOGLEVEL=0x05 180NXP_LOG_UCIR_LOGLEVEL=0x05 181