1 /** 2 * This file is part of the mingw-w64 runtime package. 3 * No warranty is given; refer to the file DISCLAIMER within this package. 4 */ 5 6 #ifndef _WINHVAPIDEFS_H_ 7 #define _WINHVAPIDEFS_H_ 8 9 typedef enum WHV_CAPABILITY_CODE { 10 WHvCapabilityCodeHypervisorPresent = 0x00000000, 11 WHvCapabilityCodeFeatures = 0x00000001, 12 WHvCapabilityCodeExtendedVmExits = 0x00000002, 13 WHvCapabilityCodeExceptionExitBitmap = 0x00000003, 14 WHvCapabilityCodeProcessorVendor = 0x00001000, 15 WHvCapabilityCodeProcessorFeatures = 0x00001001, 16 WHvCapabilityCodeProcessorClFlushSize = 0x00001002, 17 WHvCapabilityCodeProcessorXsaveFeatures = 0x00001003 18 } WHV_CAPABILITY_CODE; 19 20 typedef union WHV_CAPABILITY_FEATURES { 21 __C89_NAMELESS struct { 22 UINT64 PartialUnmap : 1; 23 UINT64 LocalApicEmulation : 1; 24 UINT64 Xsave : 1; 25 UINT64 DirtyPageTracking : 1; 26 UINT64 SpeculationControl : 1; 27 UINT64 Reserved : 59; 28 }; 29 UINT64 AsUINT64; 30 } WHV_CAPABILITY_FEATURES; 31 32 C_ASSERT(sizeof(WHV_CAPABILITY_FEATURES) == sizeof(UINT64)); 33 34 typedef union WHV_EXTENDED_VM_EXITS { 35 __C89_NAMELESS struct { 36 UINT64 X64CpuidExit : 1; 37 UINT64 X64MsrExit : 1; 38 UINT64 ExceptionExit : 1; 39 UINT64 Reserved : 61; 40 }; 41 UINT64 AsUINT64; 42 } WHV_EXTENDED_VM_EXITS; 43 44 C_ASSERT(sizeof(WHV_EXTENDED_VM_EXITS) == sizeof(UINT64)); 45 46 typedef enum WHV_PROCESSOR_VENDOR { 47 WHvProcessorVendorAmd = 0x0000, 48 WHvProcessorVendorIntel = 0x0001, 49 WHvProcessorVendorHygon = 0x0002 50 } WHV_PROCESSOR_VENDOR; 51 52 typedef union WHV_PROCESSOR_FEATURES { 53 __C89_NAMELESS struct { 54 UINT64 Sse3Support : 1; 55 UINT64 LahfSahfSupport : 1; 56 UINT64 Ssse3Support : 1; 57 UINT64 Sse4_1Support : 1; 58 UINT64 Sse4_2Support : 1; 59 UINT64 Sse4aSupport : 1; 60 UINT64 XopSupport : 1; 61 UINT64 PopCntSupport : 1; 62 UINT64 Cmpxchg16bSupport : 1; 63 UINT64 Altmovcr8Support : 1; 64 UINT64 LzcntSupport : 1; 65 UINT64 MisAlignSseSupport : 1; 66 UINT64 MmxExtSupport : 1; 67 UINT64 Amd3DNowSupport : 1; 68 UINT64 ExtendedAmd3DNowSupport : 1; 69 UINT64 Page1GbSupport : 1; 70 UINT64 AesSupport : 1; 71 UINT64 PclmulqdqSupport : 1; 72 UINT64 PcidSupport : 1; 73 UINT64 Fma4Support : 1; 74 UINT64 F16CSupport : 1; 75 UINT64 RdRandSupport : 1; 76 UINT64 RdWrFsGsSupport : 1; 77 UINT64 SmepSupport : 1; 78 UINT64 EnhancedFastStringSupport : 1; 79 UINT64 Bmi1Support : 1; 80 UINT64 Bmi2Support : 1; 81 UINT64 Reserved1 : 2; 82 UINT64 MovbeSupport : 1; 83 UINT64 Npiep1Support : 1; 84 UINT64 DepX87FPUSaveSupport : 1; 85 UINT64 RdSeedSupport : 1; 86 UINT64 AdxSupport : 1; 87 UINT64 IntelPrefetchSupport : 1; 88 UINT64 SmapSupport : 1; 89 UINT64 HleSupport : 1; 90 UINT64 RtmSupport : 1; 91 UINT64 RdtscpSupport : 1; 92 UINT64 ClflushoptSupport : 1; 93 UINT64 ClwbSupport : 1; 94 UINT64 ShaSupport : 1; 95 UINT64 X87PointersSavedSupport : 1; 96 UINT64 InvpcidSupport : 1; 97 UINT64 IbrsSupport : 1; 98 UINT64 StibpSupport : 1; 99 UINT64 IbpbSupport : 1; 100 UINT64 Reserved2 : 1; 101 UINT64 SsbdSupport : 1; 102 UINT64 FastShortRepMovSupport : 1; 103 UINT64 Reserved3 : 1; 104 UINT64 RdclNo : 1; 105 UINT64 IbrsAllSupport : 1; 106 UINT64 Reserved4 : 1; 107 UINT64 SsbNo : 1; 108 UINT64 RsbANo : 1; 109 UINT64 Reserved5 : 8; 110 }; 111 UINT64 AsUINT64; 112 } WHV_PROCESSOR_FEATURES; 113 114 C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES) == sizeof(UINT64)); 115 116 typedef union _WHV_PROCESSOR_XSAVE_FEATURES { 117 __C89_NAMELESS struct { 118 UINT64 XsaveSupport : 1; 119 UINT64 XsaveoptSupport : 1; 120 UINT64 AvxSupport : 1; 121 UINT64 Avx2Support : 1; 122 UINT64 FmaSupport : 1; 123 UINT64 MpxSupport : 1; 124 UINT64 Avx512Support : 1; 125 UINT64 Avx512DQSupport : 1; 126 UINT64 Avx512CDSupport : 1; 127 UINT64 Avx512BWSupport : 1; 128 UINT64 Avx512VLSupport : 1; 129 UINT64 XsaveCompSupport : 1; 130 UINT64 XsaveSupervisorSupport : 1; 131 UINT64 Xcr1Support : 1; 132 UINT64 Avx512BitalgSupport : 1; 133 UINT64 Avx512IfmaSupport : 1; 134 UINT64 Avx512VBmiSupport : 1; 135 UINT64 Avx512VBmi2Support : 1; 136 UINT64 Avx512VnniSupport : 1; 137 UINT64 GfniSupport : 1; 138 UINT64 VaesSupport : 1; 139 UINT64 Avx512VPopcntdqSupport : 1; 140 UINT64 VpclmulqdqSupport : 1; 141 UINT64 Reserved : 41; 142 }; 143 UINT64 AsUINT64; 144 } WHV_PROCESSOR_XSAVE_FEATURES, *PWHV_PROCESSOR_XSAVE_FEATURES; 145 146 C_ASSERT(sizeof(WHV_PROCESSOR_XSAVE_FEATURES) == sizeof(UINT64)); 147 148 typedef union WHV_CAPABILITY { 149 WINBOOL HypervisorPresent; 150 WHV_CAPABILITY_FEATURES Features; 151 WHV_EXTENDED_VM_EXITS ExtendedVmExits; 152 WHV_PROCESSOR_VENDOR ProcessorVendor; 153 WHV_PROCESSOR_FEATURES ProcessorFeatures; 154 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures; 155 UINT8 ProcessorClFlushSize; 156 UINT64 ExceptionExitBitmap; 157 } WHV_CAPABILITY; 158 159 typedef VOID* WHV_PARTITION_HANDLE; 160 161 typedef enum WHV_PARTITION_PROPERTY_CODE { 162 WHvPartitionPropertyCodeExtendedVmExits = 0x00000001, 163 WHvPartitionPropertyCodeExceptionExitBitmap = 0x00000002, 164 WHvPartitionPropertyCodeSeparateSecurityDomain = 0x00000003, 165 WHvPartitionPropertyCodeProcessorFeatures = 0x00001001, 166 WHvPartitionPropertyCodeProcessorClFlushSize = 0x00001002, 167 WHvPartitionPropertyCodeCpuidExitList = 0x00001003, 168 WHvPartitionPropertyCodeCpuidResultList = 0x00001004, 169 WHvPartitionPropertyCodeLocalApicEmulationMode = 0x00001005, 170 WHvPartitionPropertyCodeProcessorXsaveFeatures = 0x00001006, 171 WHvPartitionPropertyCodeProcessorCount = 0x00001fff 172 } WHV_PARTITION_PROPERTY_CODE; 173 174 typedef struct WHV_X64_CPUID_RESULT { 175 UINT32 Function; 176 UINT32 Reserved[3]; 177 UINT32 Eax; 178 UINT32 Ebx; 179 UINT32 Ecx; 180 UINT32 Edx; 181 } WHV_X64_CPUID_RESULT; 182 183 typedef enum WHV_EXCEPTION_TYPE { 184 WHvX64ExceptionTypeDivideErrorFault = 0x0, 185 WHvX64ExceptionTypeDebugTrapOrFault = 0x1, 186 WHvX64ExceptionTypeBreakpointTrap = 0x3, 187 WHvX64ExceptionTypeOverflowTrap = 0x4, 188 WHvX64ExceptionTypeBoundRangeFault = 0x5, 189 WHvX64ExceptionTypeInvalidOpcodeFault = 0x6, 190 WHvX64ExceptionTypeDeviceNotAvailableFault = 0x7, 191 WHvX64ExceptionTypeDoubleFaultAbort = 0x8, 192 WHvX64ExceptionTypeInvalidTaskStateSegmentFault = 0x0A, 193 WHvX64ExceptionTypeSegmentNotPresentFault = 0x0B, 194 WHvX64ExceptionTypeStackFault = 0x0C, 195 WHvX64ExceptionTypeGeneralProtectionFault = 0x0D, 196 WHvX64ExceptionTypePageFault = 0x0E, 197 WHvX64ExceptionTypeFloatingPointErrorFault = 0x10, 198 WHvX64ExceptionTypeAlignmentCheckFault = 0x11, 199 WHvX64ExceptionTypeMachineCheckAbort = 0x12, 200 WHvX64ExceptionTypeSimdFloatingPointFault = 0x13 201 } WHV_EXCEPTION_TYPE; 202 203 typedef enum WHV_X64_LOCAL_APIC_EMULATION_MODE { 204 WHvX64LocalApicEmulationModeNone, 205 WHvX64LocalApicEmulationModeXApic 206 } WHV_X64_LOCAL_APIC_EMULATION_MODE; 207 208 typedef union WHV_PARTITION_PROPERTY { 209 WHV_EXTENDED_VM_EXITS ExtendedVmExits; 210 WHV_PROCESSOR_FEATURES ProcessorFeatures; 211 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures; 212 UINT8 ProcessorClFlushSize; 213 UINT32 ProcessorCount; 214 UINT32 CpuidExitList[1]; 215 WHV_X64_CPUID_RESULT CpuidResultList[1]; 216 UINT64 ExceptionExitBitmap; 217 WHV_X64_LOCAL_APIC_EMULATION_MODE LocalApicEmulationMode; 218 WINBOOL SeparateSecurityDomain; 219 } WHV_PARTITION_PROPERTY; 220 221 typedef UINT64 WHV_GUEST_PHYSICAL_ADDRESS; 222 typedef UINT64 WHV_GUEST_VIRTUAL_ADDRESS; 223 224 typedef enum WHV_MAP_GPA_RANGE_FLAGS { 225 WHvMapGpaRangeFlagNone = 0x00000000, 226 WHvMapGpaRangeFlagRead = 0x00000001, 227 WHvMapGpaRangeFlagWrite = 0x00000002, 228 WHvMapGpaRangeFlagExecute = 0x00000004, 229 WHvMapGpaRangeFlagTrackDirtyPages = 0x00000008 230 } WHV_MAP_GPA_RANGE_FLAGS; 231 232 DEFINE_ENUM_FLAG_OPERATORS(WHV_MAP_GPA_RANGE_FLAGS); 233 234 typedef enum WHV_TRANSLATE_GVA_FLAGS { 235 WHvTranslateGvaFlagNone = 0x00000000, 236 WHvTranslateGvaFlagValidateRead = 0x00000001, 237 WHvTranslateGvaFlagValidateWrite = 0x00000002, 238 WHvTranslateGvaFlagValidateExecute = 0x00000004, 239 WHvTranslateGvaFlagPrivilegeExempt = 0x00000008, 240 WHvTranslateGvaFlagSetPageTableBits = 0x00000010 241 } WHV_TRANSLATE_GVA_FLAGS; 242 243 DEFINE_ENUM_FLAG_OPERATORS(WHV_TRANSLATE_GVA_FLAGS); 244 245 typedef enum WHV_TRANSLATE_GVA_RESULT_CODE { 246 WHvTranslateGvaResultSuccess = 0, 247 WHvTranslateGvaResultPageNotPresent = 1, 248 WHvTranslateGvaResultPrivilegeViolation = 2, 249 WHvTranslateGvaResultInvalidPageTableFlags = 3, 250 WHvTranslateGvaResultGpaUnmapped = 4, 251 WHvTranslateGvaResultGpaNoReadAccess = 5, 252 WHvTranslateGvaResultGpaNoWriteAccess = 6, 253 WHvTranslateGvaResultGpaIllegalOverlayAccess = 7, 254 WHvTranslateGvaResultIntercept = 8 255 } WHV_TRANSLATE_GVA_RESULT_CODE; 256 257 typedef struct WHV_TRANSLATE_GVA_RESULT { 258 WHV_TRANSLATE_GVA_RESULT_CODE ResultCode; 259 UINT32 Reserved; 260 } WHV_TRANSLATE_GVA_RESULT; 261 262 typedef enum WHV_REGISTER_NAME { 263 WHvX64RegisterRax = 0x00000000, 264 WHvX64RegisterRcx = 0x00000001, 265 WHvX64RegisterRdx = 0x00000002, 266 WHvX64RegisterRbx = 0x00000003, 267 WHvX64RegisterRsp = 0x00000004, 268 WHvX64RegisterRbp = 0x00000005, 269 WHvX64RegisterRsi = 0x00000006, 270 WHvX64RegisterRdi = 0x00000007, 271 WHvX64RegisterR8 = 0x00000008, 272 WHvX64RegisterR9 = 0x00000009, 273 WHvX64RegisterR10 = 0x0000000A, 274 WHvX64RegisterR11 = 0x0000000B, 275 WHvX64RegisterR12 = 0x0000000C, 276 WHvX64RegisterR13 = 0x0000000D, 277 WHvX64RegisterR14 = 0x0000000E, 278 WHvX64RegisterR15 = 0x0000000F, 279 WHvX64RegisterRip = 0x00000010, 280 WHvX64RegisterRflags = 0x00000011, 281 WHvX64RegisterEs = 0x00000012, 282 WHvX64RegisterCs = 0x00000013, 283 WHvX64RegisterSs = 0x00000014, 284 WHvX64RegisterDs = 0x00000015, 285 WHvX64RegisterFs = 0x00000016, 286 WHvX64RegisterGs = 0x00000017, 287 WHvX64RegisterLdtr = 0x00000018, 288 WHvX64RegisterTr = 0x00000019, 289 WHvX64RegisterIdtr = 0x0000001A, 290 WHvX64RegisterGdtr = 0x0000001B, 291 WHvX64RegisterCr0 = 0x0000001C, 292 WHvX64RegisterCr2 = 0x0000001D, 293 WHvX64RegisterCr3 = 0x0000001E, 294 WHvX64RegisterCr4 = 0x0000001F, 295 WHvX64RegisterCr8 = 0x00000020, 296 WHvX64RegisterDr0 = 0x00000021, 297 WHvX64RegisterDr1 = 0x00000022, 298 WHvX64RegisterDr2 = 0x00000023, 299 WHvX64RegisterDr3 = 0x00000024, 300 WHvX64RegisterDr6 = 0x00000025, 301 WHvX64RegisterDr7 = 0x00000026, 302 WHvX64RegisterXCr0 = 0x00000027, 303 WHvX64RegisterXmm0 = 0x00001000, 304 WHvX64RegisterXmm1 = 0x00001001, 305 WHvX64RegisterXmm2 = 0x00001002, 306 WHvX64RegisterXmm3 = 0x00001003, 307 WHvX64RegisterXmm4 = 0x00001004, 308 WHvX64RegisterXmm5 = 0x00001005, 309 WHvX64RegisterXmm6 = 0x00001006, 310 WHvX64RegisterXmm7 = 0x00001007, 311 WHvX64RegisterXmm8 = 0x00001008, 312 WHvX64RegisterXmm9 = 0x00001009, 313 WHvX64RegisterXmm10 = 0x0000100A, 314 WHvX64RegisterXmm11 = 0x0000100B, 315 WHvX64RegisterXmm12 = 0x0000100C, 316 WHvX64RegisterXmm13 = 0x0000100D, 317 WHvX64RegisterXmm14 = 0x0000100E, 318 WHvX64RegisterXmm15 = 0x0000100F, 319 WHvX64RegisterFpMmx0 = 0x00001010, 320 WHvX64RegisterFpMmx1 = 0x00001011, 321 WHvX64RegisterFpMmx2 = 0x00001012, 322 WHvX64RegisterFpMmx3 = 0x00001013, 323 WHvX64RegisterFpMmx4 = 0x00001014, 324 WHvX64RegisterFpMmx5 = 0x00001015, 325 WHvX64RegisterFpMmx6 = 0x00001016, 326 WHvX64RegisterFpMmx7 = 0x00001017, 327 WHvX64RegisterFpControlStatus = 0x00001018, 328 WHvX64RegisterXmmControlStatus = 0x00001019, 329 WHvX64RegisterTsc = 0x00002000, 330 WHvX64RegisterEfer = 0x00002001, 331 WHvX64RegisterKernelGsBase = 0x00002002, 332 WHvX64RegisterApicBase = 0x00002003, 333 WHvX64RegisterPat = 0x00002004, 334 WHvX64RegisterSysenterCs = 0x00002005, 335 WHvX64RegisterSysenterEip = 0x00002006, 336 WHvX64RegisterSysenterEsp = 0x00002007, 337 WHvX64RegisterStar = 0x00002008, 338 WHvX64RegisterLstar = 0x00002009, 339 WHvX64RegisterCstar = 0x0000200A, 340 WHvX64RegisterSfmask = 0x0000200B, 341 WHvX64RegisterMsrMtrrCap = 0x0000200D, 342 WHvX64RegisterMsrMtrrDefType = 0x0000200E, 343 WHvX64RegisterMsrMtrrPhysBase0 = 0x00002010, 344 WHvX64RegisterMsrMtrrPhysBase1 = 0x00002011, 345 WHvX64RegisterMsrMtrrPhysBase2 = 0x00002012, 346 WHvX64RegisterMsrMtrrPhysBase3 = 0x00002013, 347 WHvX64RegisterMsrMtrrPhysBase4 = 0x00002014, 348 WHvX64RegisterMsrMtrrPhysBase5 = 0x00002015, 349 WHvX64RegisterMsrMtrrPhysBase6 = 0x00002016, 350 WHvX64RegisterMsrMtrrPhysBase7 = 0x00002017, 351 WHvX64RegisterMsrMtrrPhysBase8 = 0x00002018, 352 WHvX64RegisterMsrMtrrPhysBase9 = 0x00002019, 353 WHvX64RegisterMsrMtrrPhysBaseA = 0x0000201A, 354 WHvX64RegisterMsrMtrrPhysBaseB = 0x0000201B, 355 WHvX64RegisterMsrMtrrPhysBaseC = 0x0000201C, 356 WHvX64RegisterMsrMtrrPhysBaseD = 0x0000201D, 357 WHvX64RegisterMsrMtrrPhysBaseE = 0x0000201E, 358 WHvX64RegisterMsrMtrrPhysBaseF = 0x0000201F, 359 WHvX64RegisterMsrMtrrPhysMask0 = 0x00002040, 360 WHvX64RegisterMsrMtrrPhysMask1 = 0x00002041, 361 WHvX64RegisterMsrMtrrPhysMask2 = 0x00002042, 362 WHvX64RegisterMsrMtrrPhysMask3 = 0x00002043, 363 WHvX64RegisterMsrMtrrPhysMask4 = 0x00002044, 364 WHvX64RegisterMsrMtrrPhysMask5 = 0x00002045, 365 WHvX64RegisterMsrMtrrPhysMask6 = 0x00002046, 366 WHvX64RegisterMsrMtrrPhysMask7 = 0x00002047, 367 WHvX64RegisterMsrMtrrPhysMask8 = 0x00002048, 368 WHvX64RegisterMsrMtrrPhysMask9 = 0x00002049, 369 WHvX64RegisterMsrMtrrPhysMaskA = 0x0000204A, 370 WHvX64RegisterMsrMtrrPhysMaskB = 0x0000204B, 371 WHvX64RegisterMsrMtrrPhysMaskC = 0x0000204C, 372 WHvX64RegisterMsrMtrrPhysMaskD = 0x0000204D, 373 WHvX64RegisterMsrMtrrPhysMaskE = 0x0000204E, 374 WHvX64RegisterMsrMtrrPhysMaskF = 0x0000204F, 375 WHvX64RegisterMsrMtrrFix64k00000 = 0x00002070, 376 WHvX64RegisterMsrMtrrFix16k80000 = 0x00002071, 377 WHvX64RegisterMsrMtrrFix16kA0000 = 0x00002072, 378 WHvX64RegisterMsrMtrrFix4kC0000 = 0x00002073, 379 WHvX64RegisterMsrMtrrFix4kC8000 = 0x00002074, 380 WHvX64RegisterMsrMtrrFix4kD0000 = 0x00002075, 381 WHvX64RegisterMsrMtrrFix4kD8000 = 0x00002076, 382 WHvX64RegisterMsrMtrrFix4kE0000 = 0x00002077, 383 WHvX64RegisterMsrMtrrFix4kE8000 = 0x00002078, 384 WHvX64RegisterMsrMtrrFix4kF0000 = 0x00002079, 385 WHvX64RegisterMsrMtrrFix4kF8000 = 0x0000207A, 386 WHvX64RegisterTscAux = 0x0000207B, 387 WHvX64RegisterSpecCtrl = 0x00002084, 388 WHvX64RegisterPredCmd = 0x00002085, 389 WHvX64RegisterApicId = 0x00003002, 390 WHvX64RegisterApicVersion = 0x00003003, 391 WHvRegisterPendingInterruption = 0x80000000, 392 WHvRegisterInterruptState = 0x80000001, 393 WHvRegisterPendingEvent = 0x80000002, 394 WHvX64RegisterDeliverabilityNotifications = 0x80000004, 395 WHvRegisterInternalActivityState = 0x80000005 396 } WHV_REGISTER_NAME; 397 398 typedef union DECLSPEC_ALIGN(16) WHV_UINT128 { 399 __C89_NAMELESS struct { 400 UINT64 Low64; 401 UINT64 High64; 402 }; 403 UINT32 Dword[4]; 404 } WHV_UINT128; 405 406 typedef union WHV_X64_FP_REGISTER { 407 __C89_NAMELESS struct { 408 UINT64 Mantissa; 409 UINT64 BiasedExponent:15; 410 UINT64 Sign:1; 411 UINT64 Reserved:48; 412 }; 413 WHV_UINT128 AsUINT128; 414 } WHV_X64_FP_REGISTER; 415 416 typedef union WHV_X64_FP_CONTROL_STATUS_REGISTER { 417 __C89_NAMELESS struct { 418 UINT16 FpControl; 419 UINT16 FpStatus; 420 UINT8 FpTag; 421 UINT8 Reserved; 422 UINT16 LastFpOp; 423 __C89_NAMELESS union { 424 UINT64 LastFpRip; 425 __C89_NAMELESS struct { 426 UINT32 LastFpEip; 427 UINT16 LastFpCs; 428 UINT16 Reserved2; 429 }; 430 }; 431 }; 432 WHV_UINT128 AsUINT128; 433 } WHV_X64_FP_CONTROL_STATUS_REGISTER; 434 435 typedef union WHV_X64_XMM_CONTROL_STATUS_REGISTER { 436 __C89_NAMELESS struct { 437 __C89_NAMELESS union { 438 UINT64 LastFpRdp; 439 __C89_NAMELESS struct { 440 UINT32 LastFpDp; 441 UINT16 LastFpDs; 442 UINT16 Reserved; 443 }; 444 }; 445 UINT32 XmmStatusControl; 446 UINT32 XmmStatusControlMask; 447 }; 448 WHV_UINT128 AsUINT128; 449 } WHV_X64_XMM_CONTROL_STATUS_REGISTER; 450 451 typedef struct WHV_X64_SEGMENT_REGISTER { 452 UINT64 Base; 453 UINT32 Limit; 454 UINT16 Selector; 455 __C89_NAMELESS union { 456 __C89_NAMELESS struct { 457 UINT16 SegmentType:4; 458 UINT16 NonSystemSegment:1; 459 UINT16 DescriptorPrivilegeLevel:2; 460 UINT16 Present:1; 461 UINT16 Reserved:4; 462 UINT16 Available:1; 463 UINT16 Long:1; 464 UINT16 Default:1; 465 UINT16 Granularity:1; 466 }; 467 UINT16 Attributes; 468 }; 469 } WHV_X64_SEGMENT_REGISTER; 470 471 typedef struct WHV_X64_TABLE_REGISTER { 472 UINT16 Pad[3]; 473 UINT16 Limit; 474 UINT64 Base; 475 } WHV_X64_TABLE_REGISTER; 476 477 typedef union WHV_X64_INTERRUPT_STATE_REGISTER { 478 __C89_NAMELESS struct { 479 UINT64 InterruptShadow:1; 480 UINT64 NmiMasked:1; 481 UINT64 Reserved:62; 482 }; 483 UINT64 AsUINT64; 484 } WHV_X64_INTERRUPT_STATE_REGISTER; 485 486 typedef union WHV_X64_PENDING_INTERRUPTION_REGISTER { 487 __C89_NAMELESS struct { 488 UINT32 InterruptionPending:1; 489 UINT32 InterruptionType:3; 490 UINT32 DeliverErrorCode:1; 491 UINT32 InstructionLength:4; 492 UINT32 NestedEvent:1; 493 UINT32 Reserved:6; 494 UINT32 InterruptionVector:16; 495 UINT32 ErrorCode; 496 }; 497 UINT64 AsUINT64; 498 } WHV_X64_PENDING_INTERRUPTION_REGISTER; 499 500 C_ASSERT(sizeof(WHV_X64_PENDING_INTERRUPTION_REGISTER) == sizeof(UINT64)); 501 502 typedef union WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER { 503 __C89_NAMELESS struct { 504 UINT64 NmiNotification:1; 505 UINT64 InterruptNotification:1; 506 UINT64 InterruptPriority:4; 507 UINT64 Reserved:58; 508 }; 509 UINT64 AsUINT64; 510 } WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER; 511 512 C_ASSERT(sizeof(WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER) == sizeof(UINT64)); 513 514 515 typedef enum WHV_X64_PENDING_EVENT_TYPE { 516 WHvX64PendingEventException = 0, 517 WHvX64PendingEventExtInt = 5 518 } WHV_X64_PENDING_EVENT_TYPE; 519 520 typedef union WHV_X64_PENDING_EXCEPTION_EVENT { 521 __C89_NAMELESS struct { 522 UINT32 EventPending : 1; 523 UINT32 EventType : 3; 524 UINT32 Reserved0 : 4; 525 UINT32 DeliverErrorCode : 1; 526 UINT32 Reserved1 : 7; 527 UINT32 Vector : 16; 528 UINT32 ErrorCode; 529 UINT64 ExceptionParameter; 530 }; 531 WHV_UINT128 AsUINT128; 532 } WHV_X64_PENDING_EXCEPTION_EVENT; 533 534 C_ASSERT(sizeof(WHV_X64_PENDING_EXCEPTION_EVENT) == sizeof(WHV_UINT128)); 535 536 typedef union WHV_X64_PENDING_EXT_INT_EVENT { 537 __C89_NAMELESS struct { 538 UINT64 EventPending : 1; 539 UINT64 EventType : 3; 540 UINT64 Reserved0 : 4; 541 UINT64 Vector : 8; 542 UINT64 Reserved1 : 48; 543 UINT64 Reserved2; 544 }; 545 WHV_UINT128 AsUINT128; 546 } WHV_X64_PENDING_EXT_INT_EVENT; 547 548 C_ASSERT(sizeof(WHV_X64_PENDING_EXT_INT_EVENT) == sizeof(WHV_UINT128)); 549 550 typedef union WHV_REGISTER_VALUE { 551 WHV_UINT128 Reg128; 552 UINT64 Reg64; 553 UINT32 Reg32; 554 UINT16 Reg16; 555 UINT8 Reg8; 556 WHV_X64_FP_REGISTER Fp; 557 WHV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus; 558 WHV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus; 559 WHV_X64_SEGMENT_REGISTER Segment; 560 WHV_X64_TABLE_REGISTER Table; 561 WHV_X64_INTERRUPT_STATE_REGISTER InterruptState; 562 WHV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption; 563 WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications; 564 WHV_X64_PENDING_EXCEPTION_EVENT ExceptionEvent; 565 WHV_X64_PENDING_EXT_INT_EVENT ExtIntEvent; 566 } WHV_REGISTER_VALUE; 567 568 typedef enum WHV_RUN_VP_EXIT_REASON { 569 WHvRunVpExitReasonNone = 0x00000000, 570 WHvRunVpExitReasonMemoryAccess = 0x00000001, 571 WHvRunVpExitReasonX64IoPortAccess = 0x00000002, 572 WHvRunVpExitReasonUnrecoverableException = 0x00000004, 573 WHvRunVpExitReasonInvalidVpRegisterValue = 0x00000005, 574 WHvRunVpExitReasonUnsupportedFeature = 0x00000006, 575 WHvRunVpExitReasonX64InterruptWindow = 0x00000007, 576 WHvRunVpExitReasonX64Halt = 0x00000008, 577 WHvRunVpExitReasonX64ApicEoi = 0x00000009, 578 WHvRunVpExitReasonX64MsrAccess = 0x00001000, 579 WHvRunVpExitReasonX64Cpuid = 0x00001001, 580 WHvRunVpExitReasonException = 0x00001002, 581 WHvRunVpExitReasonCanceled = 0x00002001 582 } WHV_RUN_VP_EXIT_REASON; 583 584 typedef union WHV_X64_VP_EXECUTION_STATE { 585 __C89_NAMELESS struct { 586 UINT16 Cpl : 2; 587 UINT16 Cr0Pe : 1; 588 UINT16 Cr0Am : 1; 589 UINT16 EferLma : 1; 590 UINT16 DebugActive : 1; 591 UINT16 InterruptionPending : 1; 592 UINT16 Reserved0 : 5; 593 UINT16 InterruptShadow : 1; 594 UINT16 Reserved1 : 3; 595 }; 596 UINT16 AsUINT16; 597 } WHV_X64_VP_EXECUTION_STATE; 598 599 C_ASSERT(sizeof(WHV_X64_VP_EXECUTION_STATE) == sizeof(UINT16)); 600 601 typedef struct WHV_VP_EXIT_CONTEXT { 602 WHV_X64_VP_EXECUTION_STATE ExecutionState; 603 UINT8 InstructionLength : 4; 604 UINT8 Cr8 : 4; 605 UINT8 Reserved; 606 UINT32 Reserved2; 607 WHV_X64_SEGMENT_REGISTER Cs; 608 UINT64 Rip; 609 UINT64 Rflags; 610 } WHV_VP_EXIT_CONTEXT; 611 612 typedef enum WHV_MEMORY_ACCESS_TYPE { 613 WHvMemoryAccessRead = 0, 614 WHvMemoryAccessWrite = 1, 615 WHvMemoryAccessExecute = 2 616 } WHV_MEMORY_ACCESS_TYPE; 617 618 typedef union WHV_MEMORY_ACCESS_INFO { 619 __C89_NAMELESS struct { 620 UINT32 AccessType : 2; 621 UINT32 GpaUnmapped : 1; 622 UINT32 GvaValid : 1; 623 UINT32 Reserved : 28; 624 }; 625 UINT32 AsUINT32; 626 } WHV_MEMORY_ACCESS_INFO; 627 628 typedef struct WHV_MEMORY_ACCESS_CONTEXT { 629 UINT8 InstructionByteCount; 630 UINT8 Reserved[3]; 631 UINT8 InstructionBytes[16]; 632 WHV_MEMORY_ACCESS_INFO AccessInfo; 633 WHV_GUEST_PHYSICAL_ADDRESS Gpa; 634 WHV_GUEST_VIRTUAL_ADDRESS Gva; 635 } WHV_MEMORY_ACCESS_CONTEXT; 636 637 typedef union WHV_X64_IO_PORT_ACCESS_INFO { 638 __C89_NAMELESS struct { 639 UINT32 IsWrite : 1; 640 UINT32 AccessSize: 3; 641 UINT32 StringOp : 1; 642 UINT32 RepPrefix : 1; 643 UINT32 Reserved : 26; 644 }; 645 UINT32 AsUINT32; 646 } WHV_X64_IO_PORT_ACCESS_INFO; 647 648 C_ASSERT(sizeof(WHV_X64_IO_PORT_ACCESS_INFO) == sizeof(UINT32)); 649 650 typedef struct WHV_X64_IO_PORT_ACCESS_CONTEXT { 651 UINT8 InstructionByteCount; 652 UINT8 Reserved[3]; 653 UINT8 InstructionBytes[16]; 654 WHV_X64_IO_PORT_ACCESS_INFO AccessInfo; 655 UINT16 PortNumber; 656 UINT16 Reserved2[3]; 657 UINT64 Rax; 658 UINT64 Rcx; 659 UINT64 Rsi; 660 UINT64 Rdi; 661 WHV_X64_SEGMENT_REGISTER Ds; 662 WHV_X64_SEGMENT_REGISTER Es; 663 } WHV_X64_IO_PORT_ACCESS_CONTEXT; 664 665 typedef union WHV_X64_MSR_ACCESS_INFO { 666 __C89_NAMELESS struct { 667 UINT32 IsWrite : 1; 668 UINT32 Reserved : 31; 669 }; 670 UINT32 AsUINT32; 671 } WHV_X64_MSR_ACCESS_INFO; 672 673 C_ASSERT(sizeof(WHV_X64_MSR_ACCESS_INFO) == sizeof(UINT32)); 674 675 typedef struct WHV_X64_MSR_ACCESS_CONTEXT { 676 WHV_X64_MSR_ACCESS_INFO AccessInfo; 677 UINT32 MsrNumber; 678 UINT64 Rax; 679 UINT64 Rdx; 680 } WHV_X64_MSR_ACCESS_CONTEXT; 681 682 typedef struct WHV_X64_CPUID_ACCESS_CONTEXT { 683 UINT64 Rax; 684 UINT64 Rcx; 685 UINT64 Rdx; 686 UINT64 Rbx; 687 UINT64 DefaultResultRax; 688 UINT64 DefaultResultRcx; 689 UINT64 DefaultResultRdx; 690 UINT64 DefaultResultRbx; 691 } WHV_X64_CPUID_ACCESS_CONTEXT; 692 693 typedef union WHV_VP_EXCEPTION_INFO { 694 __C89_NAMELESS struct { 695 UINT32 ErrorCodeValid : 1; 696 UINT32 SoftwareException : 1; 697 UINT32 Reserved : 30; 698 }; 699 UINT32 AsUINT32; 700 } WHV_VP_EXCEPTION_INFO; 701 702 C_ASSERT(sizeof(WHV_VP_EXCEPTION_INFO) == sizeof(UINT32)); 703 704 typedef struct WHV_VP_EXCEPTION_CONTEXT { 705 UINT8 InstructionByteCount; 706 UINT8 Reserved[3]; 707 UINT8 InstructionBytes[16]; 708 WHV_VP_EXCEPTION_INFO ExceptionInfo; 709 UINT8 ExceptionType; 710 UINT8 Reserved2[3]; 711 UINT32 ErrorCode; 712 UINT64 ExceptionParameter; 713 } WHV_VP_EXCEPTION_CONTEXT; 714 715 typedef enum WHV_X64_UNSUPPORTED_FEATURE_CODE { 716 WHvUnsupportedFeatureIntercept = 1, 717 WHvUnsupportedFeatureTaskSwitchTss = 2 718 } WHV_X64_UNSUPPORTED_FEATURE_CODE; 719 720 typedef struct WHV_X64_UNSUPPORTED_FEATURE_CONTEXT { 721 WHV_X64_UNSUPPORTED_FEATURE_CODE FeatureCode; 722 UINT32 Reserved; 723 UINT64 FeatureParameter; 724 } WHV_X64_UNSUPPORTED_FEATURE_CONTEXT; 725 726 typedef enum WHV_RUN_VP_CANCEL_REASON { 727 WhvRunVpCancelReasonUser = 0 728 } WHV_RUN_VP_CANCEL_REASON; 729 730 typedef struct WHV_RUN_VP_CANCELED_CONTEXT { 731 WHV_RUN_VP_CANCEL_REASON CancelReason; 732 } WHV_RUN_VP_CANCELED_CONTEXT; 733 734 typedef enum WHV_X64_PENDING_INTERRUPTION_TYPE { 735 WHvX64PendingInterrupt = 0, 736 WHvX64PendingNmi = 2, 737 WHvX64PendingException = 3 738 } WHV_X64_PENDING_INTERRUPTION_TYPE, *PWHV_X64_PENDING_INTERRUPTION_TYPE; 739 740 typedef struct WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT { 741 WHV_X64_PENDING_INTERRUPTION_TYPE DeliverableType; 742 } WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT, *PWHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT; 743 744 typedef struct WHV_X64_APIC_EOI_CONTEXT { 745 UINT32 InterruptVector; 746 } WHV_X64_APIC_EOI_CONTEXT; 747 748 typedef struct WHV_RUN_VP_EXIT_CONTEXT { 749 WHV_RUN_VP_EXIT_REASON ExitReason; 750 UINT32 Reserved; 751 WHV_VP_EXIT_CONTEXT VpContext; 752 __C89_NAMELESS union { 753 WHV_MEMORY_ACCESS_CONTEXT MemoryAccess; 754 WHV_X64_IO_PORT_ACCESS_CONTEXT IoPortAccess; 755 WHV_X64_MSR_ACCESS_CONTEXT MsrAccess; 756 WHV_X64_CPUID_ACCESS_CONTEXT CpuidAccess; 757 WHV_VP_EXCEPTION_CONTEXT VpException; 758 WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT InterruptWindow; 759 WHV_X64_UNSUPPORTED_FEATURE_CONTEXT UnsupportedFeature; 760 WHV_RUN_VP_CANCELED_CONTEXT CancelReason; 761 WHV_X64_APIC_EOI_CONTEXT ApicEoi; 762 }; 763 } WHV_RUN_VP_EXIT_CONTEXT; 764 765 typedef enum WHV_INTERRUPT_TYPE { 766 WHvX64InterruptTypeFixed = 0, 767 WHvX64InterruptTypeLowestPriority = 1, 768 WHvX64InterruptTypeNmi = 4, 769 WHvX64InterruptTypeInit = 5, 770 WHvX64InterruptTypeSipi = 6, 771 WHvX64InterruptTypeLocalInt1 = 9 772 } WHV_INTERRUPT_TYPE; 773 774 typedef enum WHV_INTERRUPT_DESTINATION_MODE { 775 WHvX64InterruptDestinationModePhysical, 776 WHvX64InterruptDestinationModeLogical 777 } WHV_INTERRUPT_DESTINATION_MODE; 778 779 typedef enum WHV_INTERRUPT_TRIGGER_MODE { 780 WHvX64InterruptTriggerModeEdge, 781 WHvX64InterruptTriggerModeLevel 782 } WHV_INTERRUPT_TRIGGER_MODE; 783 784 typedef struct WHV_INTERRUPT_CONTROL { 785 UINT64 Type : 8; 786 UINT64 DestinationMode : 4; 787 UINT64 TriggerMode : 4; 788 UINT64 Reserved : 48; 789 UINT32 Destination; 790 UINT32 Vector; 791 } WHV_INTERRUPT_CONTROL; 792 793 typedef enum WHV_PARTITION_COUNTER_SET { 794 WHvPartitionCounterSetMemory 795 } WHV_PARTITION_COUNTER_SET; 796 797 typedef struct WHV_PARTITION_MEMORY_COUNTERS { 798 UINT64 Mapped4KPageCount; 799 UINT64 Mapped2MPageCount; 800 UINT64 Mapped1GPageCount; 801 } WHV_PARTITION_MEMORY_COUNTERS; 802 803 typedef enum WHV_PROCESSOR_COUNTER_SET { 804 WHvProcessorCounterSetRuntime, 805 WHvProcessorCounterSetIntercepts, 806 WHvProcessorCounterSetEvents, 807 WHvProcessorCounterSetApic 808 } WHV_PROCESSOR_COUNTER_SET; 809 810 typedef struct WHV_PROCESSOR_RUNTIME_COUNTERS { 811 UINT64 TotalRuntime100ns; 812 UINT64 HypervisorRuntime100ns; 813 } WHV_PROCESSOR_RUNTIME_COUNTERS; 814 815 typedef struct WHV_PROCESSOR_INTERCEPT_COUNTER { 816 UINT64 Count; 817 UINT64 Time100ns; 818 } WHV_PROCESSOR_INTERCEPT_COUNTER; 819 820 typedef struct WHV_PROCESSOR_INTERCEPT_COUNTERS { 821 WHV_PROCESSOR_INTERCEPT_COUNTER PageInvalidations; 822 WHV_PROCESSOR_INTERCEPT_COUNTER ControlRegisterAccesses; 823 WHV_PROCESSOR_INTERCEPT_COUNTER IoInstructions; 824 WHV_PROCESSOR_INTERCEPT_COUNTER HaltInstructions; 825 WHV_PROCESSOR_INTERCEPT_COUNTER CpuidInstructions; 826 WHV_PROCESSOR_INTERCEPT_COUNTER MsrAccesses; 827 WHV_PROCESSOR_INTERCEPT_COUNTER OtherIntercepts; 828 WHV_PROCESSOR_INTERCEPT_COUNTER PendingInterrupts; 829 WHV_PROCESSOR_INTERCEPT_COUNTER EmulatedInstructions; 830 WHV_PROCESSOR_INTERCEPT_COUNTER DebugRegisterAccesses; 831 WHV_PROCESSOR_INTERCEPT_COUNTER PageFaultIntercepts; 832 } WHV_PROCESSOR_ACTIVITY_COUNTERS; 833 834 typedef struct WHV_PROCESSOR_EVENT_COUNTERS { 835 UINT64 PageFaultCount; 836 UINT64 ExceptionCount; 837 UINT64 InterruptCount; 838 } WHV_PROCESSOR_GUEST_EVENT_COUNTERS; 839 840 typedef struct WHV_PROCESSOR_APIC_COUNTERS { 841 UINT64 MmioAccessCount; 842 UINT64 EoiAccessCount; 843 UINT64 TprAccessCount; 844 UINT64 SentIpiCount; 845 UINT64 SelfIpiCount; 846 } WHV_PROCESSOR_APIC_COUNTERS; 847 848 #endif 849