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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _UAPI_LINUX_ETHTOOL_H
20 #define _UAPI_LINUX_ETHTOOL_H
21 #include <linux/const.h>
22 #include <linux/types.h>
23 #include <linux/if_ether.h>
24 #include <limits.h>
25 struct ethtool_cmd {
26   __u32 cmd;
27   __u32 supported;
28   __u32 advertising;
29   __u16 speed;
30   __u8 duplex;
31   __u8 port;
32   __u8 phy_address;
33   __u8 transceiver;
34   __u8 autoneg;
35   __u8 mdio_support;
36   __u32 maxtxpkt;
37   __u32 maxrxpkt;
38   __u16 speed_hi;
39   __u8 eth_tp_mdix;
40   __u8 eth_tp_mdix_ctrl;
41   __u32 lp_advertising;
42   __u32 reserved[2];
43 };
44 #define ETH_MDIO_SUPPORTS_C22 1
45 #define ETH_MDIO_SUPPORTS_C45 2
46 #define ETHTOOL_FWVERS_LEN 32
47 #define ETHTOOL_BUSINFO_LEN 32
48 #define ETHTOOL_EROMVERS_LEN 32
49 struct ethtool_drvinfo {
50   __u32 cmd;
51   char driver[32];
52   char version[32];
53   char fw_version[ETHTOOL_FWVERS_LEN];
54   char bus_info[ETHTOOL_BUSINFO_LEN];
55   char erom_version[ETHTOOL_EROMVERS_LEN];
56   char reserved2[12];
57   __u32 n_priv_flags;
58   __u32 n_stats;
59   __u32 testinfo_len;
60   __u32 eedump_len;
61   __u32 regdump_len;
62 };
63 #define SOPASS_MAX 6
64 struct ethtool_wolinfo {
65   __u32 cmd;
66   __u32 supported;
67   __u32 wolopts;
68   __u8 sopass[SOPASS_MAX];
69 };
70 struct ethtool_value {
71   __u32 cmd;
72   __u32 data;
73 };
74 #define PFC_STORM_PREVENTION_AUTO 0xffff
75 #define PFC_STORM_PREVENTION_DISABLE 0
76 enum tunable_id {
77   ETHTOOL_ID_UNSPEC,
78   ETHTOOL_RX_COPYBREAK,
79   ETHTOOL_TX_COPYBREAK,
80   ETHTOOL_PFC_PREVENTION_TOUT,
81   ETHTOOL_TX_COPYBREAK_BUF_SIZE,
82   __ETHTOOL_TUNABLE_COUNT,
83 };
84 enum tunable_type_id {
85   ETHTOOL_TUNABLE_UNSPEC,
86   ETHTOOL_TUNABLE_U8,
87   ETHTOOL_TUNABLE_U16,
88   ETHTOOL_TUNABLE_U32,
89   ETHTOOL_TUNABLE_U64,
90   ETHTOOL_TUNABLE_STRING,
91   ETHTOOL_TUNABLE_S8,
92   ETHTOOL_TUNABLE_S16,
93   ETHTOOL_TUNABLE_S32,
94   ETHTOOL_TUNABLE_S64,
95 };
96 struct ethtool_tunable {
97   __u32 cmd;
98   __u32 id;
99   __u32 type_id;
100   __u32 len;
101   void * data[0];
102 };
103 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff
104 #define DOWNSHIFT_DEV_DISABLE 0
105 #define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0
106 #define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff
107 #define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff
108 #define ETHTOOL_PHY_EDPD_NO_TX 0xfffe
109 #define ETHTOOL_PHY_EDPD_DISABLE 0
110 enum phy_tunable_id {
111   ETHTOOL_PHY_ID_UNSPEC,
112   ETHTOOL_PHY_DOWNSHIFT,
113   ETHTOOL_PHY_FAST_LINK_DOWN,
114   ETHTOOL_PHY_EDPD,
115   __ETHTOOL_PHY_TUNABLE_COUNT,
116 };
117 struct ethtool_regs {
118   __u32 cmd;
119   __u32 version;
120   __u32 len;
121   __u8 data[0];
122 };
123 struct ethtool_eeprom {
124   __u32 cmd;
125   __u32 magic;
126   __u32 offset;
127   __u32 len;
128   __u8 data[0];
129 };
130 struct ethtool_eee {
131   __u32 cmd;
132   __u32 supported;
133   __u32 advertised;
134   __u32 lp_advertised;
135   __u32 eee_active;
136   __u32 eee_enabled;
137   __u32 tx_lpi_enabled;
138   __u32 tx_lpi_timer;
139   __u32 reserved[2];
140 };
141 struct ethtool_modinfo {
142   __u32 cmd;
143   __u32 type;
144   __u32 eeprom_len;
145   __u32 reserved[8];
146 };
147 struct ethtool_coalesce {
148   __u32 cmd;
149   __u32 rx_coalesce_usecs;
150   __u32 rx_max_coalesced_frames;
151   __u32 rx_coalesce_usecs_irq;
152   __u32 rx_max_coalesced_frames_irq;
153   __u32 tx_coalesce_usecs;
154   __u32 tx_max_coalesced_frames;
155   __u32 tx_coalesce_usecs_irq;
156   __u32 tx_max_coalesced_frames_irq;
157   __u32 stats_block_coalesce_usecs;
158   __u32 use_adaptive_rx_coalesce;
159   __u32 use_adaptive_tx_coalesce;
160   __u32 pkt_rate_low;
161   __u32 rx_coalesce_usecs_low;
162   __u32 rx_max_coalesced_frames_low;
163   __u32 tx_coalesce_usecs_low;
164   __u32 tx_max_coalesced_frames_low;
165   __u32 pkt_rate_high;
166   __u32 rx_coalesce_usecs_high;
167   __u32 rx_max_coalesced_frames_high;
168   __u32 tx_coalesce_usecs_high;
169   __u32 tx_max_coalesced_frames_high;
170   __u32 rate_sample_interval;
171 };
172 struct ethtool_ringparam {
173   __u32 cmd;
174   __u32 rx_max_pending;
175   __u32 rx_mini_max_pending;
176   __u32 rx_jumbo_max_pending;
177   __u32 tx_max_pending;
178   __u32 rx_pending;
179   __u32 rx_mini_pending;
180   __u32 rx_jumbo_pending;
181   __u32 tx_pending;
182 };
183 struct ethtool_channels {
184   __u32 cmd;
185   __u32 max_rx;
186   __u32 max_tx;
187   __u32 max_other;
188   __u32 max_combined;
189   __u32 rx_count;
190   __u32 tx_count;
191   __u32 other_count;
192   __u32 combined_count;
193 };
194 struct ethtool_pauseparam {
195   __u32 cmd;
196   __u32 autoneg;
197   __u32 rx_pause;
198   __u32 tx_pause;
199 };
200 enum ethtool_link_ext_state {
201   ETHTOOL_LINK_EXT_STATE_AUTONEG,
202   ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
203   ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
204   ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
205   ETHTOOL_LINK_EXT_STATE_NO_CABLE,
206   ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
207   ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE,
208   ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE,
209   ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED,
210   ETHTOOL_LINK_EXT_STATE_OVERHEAT,
211   ETHTOOL_LINK_EXT_STATE_MODULE,
212 };
213 enum ethtool_link_ext_substate_autoneg {
214   ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED = 1,
215   ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED,
216   ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED,
217   ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE,
218   ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE,
219   ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD,
220 };
221 enum ethtool_link_ext_substate_link_training {
222   ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED = 1,
223   ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT,
224   ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY,
225   ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT,
226 };
227 enum ethtool_link_ext_substate_link_logical_mismatch {
228   ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK = 1,
229   ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK,
230   ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS,
231   ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED,
232   ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED,
233 };
234 enum ethtool_link_ext_substate_bad_signal_integrity {
235   ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1,
236   ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE,
237   ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_REFERENCE_CLOCK_LOST,
238   ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_ALOS,
239 };
240 enum ethtool_link_ext_substate_cable_issue {
241   ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE = 1,
242   ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE,
243 };
244 enum ethtool_link_ext_substate_module {
245   ETHTOOL_LINK_EXT_SUBSTATE_MODULE_CMIS_NOT_READY = 1,
246 };
247 #define ETH_GSTRING_LEN 32
248 enum ethtool_stringset {
249   ETH_SS_TEST = 0,
250   ETH_SS_STATS,
251   ETH_SS_PRIV_FLAGS,
252   ETH_SS_NTUPLE_FILTERS,
253   ETH_SS_FEATURES,
254   ETH_SS_RSS_HASH_FUNCS,
255   ETH_SS_TUNABLES,
256   ETH_SS_PHY_STATS,
257   ETH_SS_PHY_TUNABLES,
258   ETH_SS_LINK_MODES,
259   ETH_SS_MSG_CLASSES,
260   ETH_SS_WOL_MODES,
261   ETH_SS_SOF_TIMESTAMPING,
262   ETH_SS_TS_TX_TYPES,
263   ETH_SS_TS_RX_FILTERS,
264   ETH_SS_UDP_TUNNEL_TYPES,
265   ETH_SS_STATS_STD,
266   ETH_SS_STATS_ETH_PHY,
267   ETH_SS_STATS_ETH_MAC,
268   ETH_SS_STATS_ETH_CTRL,
269   ETH_SS_STATS_RMON,
270   ETH_SS_COUNT
271 };
272 enum ethtool_module_power_mode_policy {
273   ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH = 1,
274   ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO,
275 };
276 enum ethtool_module_power_mode {
277   ETHTOOL_MODULE_POWER_MODE_LOW = 1,
278   ETHTOOL_MODULE_POWER_MODE_HIGH,
279 };
280 struct ethtool_gstrings {
281   __u32 cmd;
282   __u32 string_set;
283   __u32 len;
284   __u8 data[0];
285 };
286 struct ethtool_sset_info {
287   __u32 cmd;
288   __u32 reserved;
289   __u64 sset_mask;
290   __u32 data[0];
291 };
292 enum ethtool_test_flags {
293   ETH_TEST_FL_OFFLINE = (1 << 0),
294   ETH_TEST_FL_FAILED = (1 << 1),
295   ETH_TEST_FL_EXTERNAL_LB = (1 << 2),
296   ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3),
297 };
298 struct ethtool_test {
299   __u32 cmd;
300   __u32 flags;
301   __u32 reserved;
302   __u32 len;
303   __u64 data[0];
304 };
305 struct ethtool_stats {
306   __u32 cmd;
307   __u32 n_stats;
308   __u64 data[0];
309 };
310 struct ethtool_perm_addr {
311   __u32 cmd;
312   __u32 size;
313   __u8 data[0];
314 };
315 enum ethtool_flags {
316   ETH_FLAG_TXVLAN = (1 << 7),
317   ETH_FLAG_RXVLAN = (1 << 8),
318   ETH_FLAG_LRO = (1 << 15),
319   ETH_FLAG_NTUPLE = (1 << 27),
320   ETH_FLAG_RXHASH = (1 << 28),
321 };
322 struct ethtool_tcpip4_spec {
323   __be32 ip4src;
324   __be32 ip4dst;
325   __be16 psrc;
326   __be16 pdst;
327   __u8 tos;
328 };
329 struct ethtool_ah_espip4_spec {
330   __be32 ip4src;
331   __be32 ip4dst;
332   __be32 spi;
333   __u8 tos;
334 };
335 #define ETH_RX_NFC_IP4 1
336 struct ethtool_usrip4_spec {
337   __be32 ip4src;
338   __be32 ip4dst;
339   __be32 l4_4_bytes;
340   __u8 tos;
341   __u8 ip_ver;
342   __u8 proto;
343 };
344 struct ethtool_tcpip6_spec {
345   __be32 ip6src[4];
346   __be32 ip6dst[4];
347   __be16 psrc;
348   __be16 pdst;
349   __u8 tclass;
350 };
351 struct ethtool_ah_espip6_spec {
352   __be32 ip6src[4];
353   __be32 ip6dst[4];
354   __be32 spi;
355   __u8 tclass;
356 };
357 struct ethtool_usrip6_spec {
358   __be32 ip6src[4];
359   __be32 ip6dst[4];
360   __be32 l4_4_bytes;
361   __u8 tclass;
362   __u8 l4_proto;
363 };
364 union ethtool_flow_union {
365   struct ethtool_tcpip4_spec tcp_ip4_spec;
366   struct ethtool_tcpip4_spec udp_ip4_spec;
367   struct ethtool_tcpip4_spec sctp_ip4_spec;
368   struct ethtool_ah_espip4_spec ah_ip4_spec;
369   struct ethtool_ah_espip4_spec esp_ip4_spec;
370   struct ethtool_usrip4_spec usr_ip4_spec;
371   struct ethtool_tcpip6_spec tcp_ip6_spec;
372   struct ethtool_tcpip6_spec udp_ip6_spec;
373   struct ethtool_tcpip6_spec sctp_ip6_spec;
374   struct ethtool_ah_espip6_spec ah_ip6_spec;
375   struct ethtool_ah_espip6_spec esp_ip6_spec;
376   struct ethtool_usrip6_spec usr_ip6_spec;
377   struct ethhdr ether_spec;
378   __u8 hdata[52];
379 };
380 struct ethtool_flow_ext {
381   __u8 padding[2];
382   unsigned char h_dest[ETH_ALEN];
383   __be16 vlan_etype;
384   __be16 vlan_tci;
385   __be32 data[2];
386 };
387 struct ethtool_rx_flow_spec {
388   __u32 flow_type;
389   union ethtool_flow_union h_u;
390   struct ethtool_flow_ext h_ext;
391   union ethtool_flow_union m_u;
392   struct ethtool_flow_ext m_ext;
393   __u64 ring_cookie;
394   __u32 location;
395 };
396 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL
397 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL
398 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32
399 struct ethtool_rxnfc {
400   __u32 cmd;
401   __u32 flow_type;
402   __u64 data;
403   struct ethtool_rx_flow_spec fs;
404   union {
405     __u32 rule_cnt;
406     __u32 rss_context;
407   };
408   __u32 rule_locs[0];
409 };
410 struct ethtool_rxfh_indir {
411   __u32 cmd;
412   __u32 size;
413   __u32 ring_index[0];
414 };
415 struct ethtool_rxfh {
416   __u32 cmd;
417   __u32 rss_context;
418   __u32 indir_size;
419   __u32 key_size;
420   __u8 hfunc;
421   __u8 rsvd8[3];
422   __u32 rsvd32;
423   __u32 rss_config[0];
424 };
425 #define ETH_RXFH_CONTEXT_ALLOC 0xffffffff
426 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff
427 struct ethtool_rx_ntuple_flow_spec {
428   __u32 flow_type;
429   union {
430     struct ethtool_tcpip4_spec tcp_ip4_spec;
431     struct ethtool_tcpip4_spec udp_ip4_spec;
432     struct ethtool_tcpip4_spec sctp_ip4_spec;
433     struct ethtool_ah_espip4_spec ah_ip4_spec;
434     struct ethtool_ah_espip4_spec esp_ip4_spec;
435     struct ethtool_usrip4_spec usr_ip4_spec;
436     struct ethhdr ether_spec;
437     __u8 hdata[72];
438   } h_u, m_u;
439   __u16 vlan_tag;
440   __u16 vlan_tag_mask;
441   __u64 data;
442   __u64 data_mask;
443   __s32 action;
444 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1)
445 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2)
446 };
447 struct ethtool_rx_ntuple {
448   __u32 cmd;
449   struct ethtool_rx_ntuple_flow_spec fs;
450 };
451 #define ETHTOOL_FLASH_MAX_FILENAME 128
452 enum ethtool_flash_op_type {
453   ETHTOOL_FLASH_ALL_REGIONS = 0,
454 };
455 struct ethtool_flash {
456   __u32 cmd;
457   __u32 region;
458   char data[ETHTOOL_FLASH_MAX_FILENAME];
459 };
460 struct ethtool_dump {
461   __u32 cmd;
462   __u32 version;
463   __u32 flag;
464   __u32 len;
465   __u8 data[0];
466 };
467 #define ETH_FW_DUMP_DISABLE 0
468 struct ethtool_get_features_block {
469   __u32 available;
470   __u32 requested;
471   __u32 active;
472   __u32 never_changed;
473 };
474 struct ethtool_gfeatures {
475   __u32 cmd;
476   __u32 size;
477   struct ethtool_get_features_block features[0];
478 };
479 struct ethtool_set_features_block {
480   __u32 valid;
481   __u32 requested;
482 };
483 struct ethtool_sfeatures {
484   __u32 cmd;
485   __u32 size;
486   struct ethtool_set_features_block features[0];
487 };
488 struct ethtool_ts_info {
489   __u32 cmd;
490   __u32 so_timestamping;
491   __s32 phc_index;
492   __u32 tx_types;
493   __u32 tx_reserved[3];
494   __u32 rx_filters;
495   __u32 rx_reserved[3];
496 };
497 enum ethtool_sfeatures_retval_bits {
498   ETHTOOL_F_UNSUPPORTED__BIT,
499   ETHTOOL_F_WISH__BIT,
500   ETHTOOL_F_COMPAT__BIT,
501 };
502 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT)
503 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT)
504 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT)
505 #define MAX_NUM_QUEUE 4096
506 struct ethtool_per_queue_op {
507   __u32 cmd;
508   __u32 sub_command;
509   __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)];
510   char data[];
511 };
512 struct ethtool_fecparam {
513   __u32 cmd;
514   __u32 active_fec;
515   __u32 fec;
516   __u32 reserved;
517 };
518 enum ethtool_fec_config_bits {
519   ETHTOOL_FEC_NONE_BIT,
520   ETHTOOL_FEC_AUTO_BIT,
521   ETHTOOL_FEC_OFF_BIT,
522   ETHTOOL_FEC_RS_BIT,
523   ETHTOOL_FEC_BASER_BIT,
524   ETHTOOL_FEC_LLRS_BIT,
525 };
526 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT)
527 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT)
528 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT)
529 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT)
530 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT)
531 #define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT)
532 #define ETHTOOL_GSET 0x00000001
533 #define ETHTOOL_SSET 0x00000002
534 #define ETHTOOL_GDRVINFO 0x00000003
535 #define ETHTOOL_GREGS 0x00000004
536 #define ETHTOOL_GWOL 0x00000005
537 #define ETHTOOL_SWOL 0x00000006
538 #define ETHTOOL_GMSGLVL 0x00000007
539 #define ETHTOOL_SMSGLVL 0x00000008
540 #define ETHTOOL_NWAY_RST 0x00000009
541 #define ETHTOOL_GLINK 0x0000000a
542 #define ETHTOOL_GEEPROM 0x0000000b
543 #define ETHTOOL_SEEPROM 0x0000000c
544 #define ETHTOOL_GCOALESCE 0x0000000e
545 #define ETHTOOL_SCOALESCE 0x0000000f
546 #define ETHTOOL_GRINGPARAM 0x00000010
547 #define ETHTOOL_SRINGPARAM 0x00000011
548 #define ETHTOOL_GPAUSEPARAM 0x00000012
549 #define ETHTOOL_SPAUSEPARAM 0x00000013
550 #define ETHTOOL_GRXCSUM 0x00000014
551 #define ETHTOOL_SRXCSUM 0x00000015
552 #define ETHTOOL_GTXCSUM 0x00000016
553 #define ETHTOOL_STXCSUM 0x00000017
554 #define ETHTOOL_GSG 0x00000018
555 #define ETHTOOL_SSG 0x00000019
556 #define ETHTOOL_TEST 0x0000001a
557 #define ETHTOOL_GSTRINGS 0x0000001b
558 #define ETHTOOL_PHYS_ID 0x0000001c
559 #define ETHTOOL_GSTATS 0x0000001d
560 #define ETHTOOL_GTSO 0x0000001e
561 #define ETHTOOL_STSO 0x0000001f
562 #define ETHTOOL_GPERMADDR 0x00000020
563 #define ETHTOOL_GUFO 0x00000021
564 #define ETHTOOL_SUFO 0x00000022
565 #define ETHTOOL_GGSO 0x00000023
566 #define ETHTOOL_SGSO 0x00000024
567 #define ETHTOOL_GFLAGS 0x00000025
568 #define ETHTOOL_SFLAGS 0x00000026
569 #define ETHTOOL_GPFLAGS 0x00000027
570 #define ETHTOOL_SPFLAGS 0x00000028
571 #define ETHTOOL_GRXFH 0x00000029
572 #define ETHTOOL_SRXFH 0x0000002a
573 #define ETHTOOL_GGRO 0x0000002b
574 #define ETHTOOL_SGRO 0x0000002c
575 #define ETHTOOL_GRXRINGS 0x0000002d
576 #define ETHTOOL_GRXCLSRLCNT 0x0000002e
577 #define ETHTOOL_GRXCLSRULE 0x0000002f
578 #define ETHTOOL_GRXCLSRLALL 0x00000030
579 #define ETHTOOL_SRXCLSRLDEL 0x00000031
580 #define ETHTOOL_SRXCLSRLINS 0x00000032
581 #define ETHTOOL_FLASHDEV 0x00000033
582 #define ETHTOOL_RESET 0x00000034
583 #define ETHTOOL_SRXNTUPLE 0x00000035
584 #define ETHTOOL_GRXNTUPLE 0x00000036
585 #define ETHTOOL_GSSET_INFO 0x00000037
586 #define ETHTOOL_GRXFHINDIR 0x00000038
587 #define ETHTOOL_SRXFHINDIR 0x00000039
588 #define ETHTOOL_GFEATURES 0x0000003a
589 #define ETHTOOL_SFEATURES 0x0000003b
590 #define ETHTOOL_GCHANNELS 0x0000003c
591 #define ETHTOOL_SCHANNELS 0x0000003d
592 #define ETHTOOL_SET_DUMP 0x0000003e
593 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f
594 #define ETHTOOL_GET_DUMP_DATA 0x00000040
595 #define ETHTOOL_GET_TS_INFO 0x00000041
596 #define ETHTOOL_GMODULEINFO 0x00000042
597 #define ETHTOOL_GMODULEEEPROM 0x00000043
598 #define ETHTOOL_GEEE 0x00000044
599 #define ETHTOOL_SEEE 0x00000045
600 #define ETHTOOL_GRSSH 0x00000046
601 #define ETHTOOL_SRSSH 0x00000047
602 #define ETHTOOL_GTUNABLE 0x00000048
603 #define ETHTOOL_STUNABLE 0x00000049
604 #define ETHTOOL_GPHYSTATS 0x0000004a
605 #define ETHTOOL_PERQUEUE 0x0000004b
606 #define ETHTOOL_GLINKSETTINGS 0x0000004c
607 #define ETHTOOL_SLINKSETTINGS 0x0000004d
608 #define ETHTOOL_PHY_GTUNABLE 0x0000004e
609 #define ETHTOOL_PHY_STUNABLE 0x0000004f
610 #define ETHTOOL_GFECPARAM 0x00000050
611 #define ETHTOOL_SFECPARAM 0x00000051
612 #define SPARC_ETH_GSET ETHTOOL_GSET
613 #define SPARC_ETH_SSET ETHTOOL_SSET
614 enum ethtool_link_mode_bit_indices {
615   ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0,
616   ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1,
617   ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2,
618   ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3,
619   ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4,
620   ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5,
621   ETHTOOL_LINK_MODE_Autoneg_BIT = 6,
622   ETHTOOL_LINK_MODE_TP_BIT = 7,
623   ETHTOOL_LINK_MODE_AUI_BIT = 8,
624   ETHTOOL_LINK_MODE_MII_BIT = 9,
625   ETHTOOL_LINK_MODE_FIBRE_BIT = 10,
626   ETHTOOL_LINK_MODE_BNC_BIT = 11,
627   ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12,
628   ETHTOOL_LINK_MODE_Pause_BIT = 13,
629   ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14,
630   ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15,
631   ETHTOOL_LINK_MODE_Backplane_BIT = 16,
632   ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17,
633   ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18,
634   ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19,
635   ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20,
636   ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21,
637   ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22,
638   ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23,
639   ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24,
640   ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25,
641   ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26,
642   ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27,
643   ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28,
644   ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29,
645   ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30,
646   ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31,
647   ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32,
648   ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33,
649   ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34,
650   ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35,
651   ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36,
652   ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37,
653   ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38,
654   ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39,
655   ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40,
656   ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41,
657   ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42,
658   ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43,
659   ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44,
660   ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45,
661   ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46,
662   ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47,
663   ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48,
664   ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49,
665   ETHTOOL_LINK_MODE_FEC_RS_BIT = 50,
666   ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51,
667   ETHTOOL_LINK_MODE_50000baseKR_Full_BIT = 52,
668   ETHTOOL_LINK_MODE_50000baseSR_Full_BIT = 53,
669   ETHTOOL_LINK_MODE_50000baseCR_Full_BIT = 54,
670   ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55,
671   ETHTOOL_LINK_MODE_50000baseDR_Full_BIT = 56,
672   ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT = 57,
673   ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT = 58,
674   ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT = 59,
675   ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60,
676   ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT = 61,
677   ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT = 62,
678   ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT = 63,
679   ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64,
680   ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65,
681   ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66,
682   ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67,
683   ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68,
684   ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT = 69,
685   ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT = 70,
686   ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
687   ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72,
688   ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73,
689   ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74,
690   ETHTOOL_LINK_MODE_100000baseKR_Full_BIT = 75,
691   ETHTOOL_LINK_MODE_100000baseSR_Full_BIT = 76,
692   ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT = 77,
693   ETHTOOL_LINK_MODE_100000baseCR_Full_BIT = 78,
694   ETHTOOL_LINK_MODE_100000baseDR_Full_BIT = 79,
695   ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT = 80,
696   ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT = 81,
697   ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82,
698   ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT = 83,
699   ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT = 84,
700   ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT = 85,
701   ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT = 86,
702   ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87,
703   ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT = 88,
704   ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
705   ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90,
706   ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91,
707   __ETHTOOL_LINK_MODE_MASK_NBITS
708 };
709 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT))
710 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half)
711 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full)
712 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half)
713 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full)
714 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half)
715 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full)
716 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg)
717 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP)
718 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI)
719 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII)
720 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE)
721 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC)
722 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full)
723 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause)
724 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause)
725 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full)
726 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane)
727 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full)
728 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full)
729 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full)
730 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC)
731 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full)
732 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full)
733 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full)
734 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full)
735 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full)
736 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full)
737 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full)
738 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full)
739 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full)
740 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full)
741 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half)
742 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full)
743 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half)
744 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full)
745 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half)
746 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full)
747 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg)
748 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP)
749 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI)
750 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII)
751 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE)
752 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC)
753 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full)
754 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause)
755 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause)
756 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full)
757 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane)
758 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full)
759 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full)
760 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full)
761 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC)
762 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full)
763 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full)
764 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full)
765 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full)
766 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full)
767 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full)
768 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full)
769 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full)
770 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full)
771 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full)
772 #define SPEED_10 10
773 #define SPEED_100 100
774 #define SPEED_1000 1000
775 #define SPEED_2500 2500
776 #define SPEED_5000 5000
777 #define SPEED_10000 10000
778 #define SPEED_14000 14000
779 #define SPEED_20000 20000
780 #define SPEED_25000 25000
781 #define SPEED_40000 40000
782 #define SPEED_50000 50000
783 #define SPEED_56000 56000
784 #define SPEED_100000 100000
785 #define SPEED_200000 200000
786 #define SPEED_400000 400000
787 #define SPEED_UNKNOWN - 1
788 #define DUPLEX_HALF 0x00
789 #define DUPLEX_FULL 0x01
790 #define DUPLEX_UNKNOWN 0xff
791 #define MASTER_SLAVE_CFG_UNSUPPORTED 0
792 #define MASTER_SLAVE_CFG_UNKNOWN 1
793 #define MASTER_SLAVE_CFG_MASTER_PREFERRED 2
794 #define MASTER_SLAVE_CFG_SLAVE_PREFERRED 3
795 #define MASTER_SLAVE_CFG_MASTER_FORCE 4
796 #define MASTER_SLAVE_CFG_SLAVE_FORCE 5
797 #define MASTER_SLAVE_STATE_UNSUPPORTED 0
798 #define MASTER_SLAVE_STATE_UNKNOWN 1
799 #define MASTER_SLAVE_STATE_MASTER 2
800 #define MASTER_SLAVE_STATE_SLAVE 3
801 #define MASTER_SLAVE_STATE_ERR 4
802 #define PORT_TP 0x00
803 #define PORT_AUI 0x01
804 #define PORT_MII 0x02
805 #define PORT_FIBRE 0x03
806 #define PORT_BNC 0x04
807 #define PORT_DA 0x05
808 #define PORT_NONE 0xef
809 #define PORT_OTHER 0xff
810 #define XCVR_INTERNAL 0x00
811 #define XCVR_EXTERNAL 0x01
812 #define XCVR_DUMMY1 0x02
813 #define XCVR_DUMMY2 0x03
814 #define XCVR_DUMMY3 0x04
815 #define AUTONEG_DISABLE 0x00
816 #define AUTONEG_ENABLE 0x01
817 #define ETH_TP_MDI_INVALID 0x00
818 #define ETH_TP_MDI 0x01
819 #define ETH_TP_MDI_X 0x02
820 #define ETH_TP_MDI_AUTO 0x03
821 #define WAKE_PHY (1 << 0)
822 #define WAKE_UCAST (1 << 1)
823 #define WAKE_MCAST (1 << 2)
824 #define WAKE_BCAST (1 << 3)
825 #define WAKE_ARP (1 << 4)
826 #define WAKE_MAGIC (1 << 5)
827 #define WAKE_MAGICSECURE (1 << 6)
828 #define WAKE_FILTER (1 << 7)
829 #define WOL_MODE_COUNT 8
830 #define TCP_V4_FLOW 0x01
831 #define UDP_V4_FLOW 0x02
832 #define SCTP_V4_FLOW 0x03
833 #define AH_ESP_V4_FLOW 0x04
834 #define TCP_V6_FLOW 0x05
835 #define UDP_V6_FLOW 0x06
836 #define SCTP_V6_FLOW 0x07
837 #define AH_ESP_V6_FLOW 0x08
838 #define AH_V4_FLOW 0x09
839 #define ESP_V4_FLOW 0x0a
840 #define AH_V6_FLOW 0x0b
841 #define ESP_V6_FLOW 0x0c
842 #define IPV4_USER_FLOW 0x0d
843 #define IP_USER_FLOW IPV4_USER_FLOW
844 #define IPV6_USER_FLOW 0x0e
845 #define IPV4_FLOW 0x10
846 #define IPV6_FLOW 0x11
847 #define ETHER_FLOW 0x12
848 #define FLOW_EXT 0x80000000
849 #define FLOW_MAC_EXT 0x40000000
850 #define FLOW_RSS 0x20000000
851 #define RXH_L2DA (1 << 1)
852 #define RXH_VLAN (1 << 2)
853 #define RXH_L3_PROTO (1 << 3)
854 #define RXH_IP_SRC (1 << 4)
855 #define RXH_IP_DST (1 << 5)
856 #define RXH_L4_B_0_1 (1 << 6)
857 #define RXH_L4_B_2_3 (1 << 7)
858 #define RXH_DISCARD (1 << 31)
859 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL
860 #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL
861 #define RX_CLS_LOC_SPECIAL 0x80000000
862 #define RX_CLS_LOC_ANY 0xffffffff
863 #define RX_CLS_LOC_FIRST 0xfffffffe
864 #define RX_CLS_LOC_LAST 0xfffffffd
865 #define ETH_MODULE_SFF_8079 0x1
866 #define ETH_MODULE_SFF_8079_LEN 256
867 #define ETH_MODULE_SFF_8472 0x2
868 #define ETH_MODULE_SFF_8472_LEN 512
869 #define ETH_MODULE_SFF_8636 0x3
870 #define ETH_MODULE_SFF_8636_LEN 256
871 #define ETH_MODULE_SFF_8436 0x4
872 #define ETH_MODULE_SFF_8436_LEN 256
873 #define ETH_MODULE_SFF_8636_MAX_LEN 640
874 #define ETH_MODULE_SFF_8436_MAX_LEN 640
875 enum ethtool_reset_flags {
876   ETH_RESET_MGMT = 1 << 0,
877   ETH_RESET_IRQ = 1 << 1,
878   ETH_RESET_DMA = 1 << 2,
879   ETH_RESET_FILTER = 1 << 3,
880   ETH_RESET_OFFLOAD = 1 << 4,
881   ETH_RESET_MAC = 1 << 5,
882   ETH_RESET_PHY = 1 << 6,
883   ETH_RESET_RAM = 1 << 7,
884   ETH_RESET_AP = 1 << 8,
885   ETH_RESET_DEDICATED = 0x0000ffff,
886   ETH_RESET_ALL = 0xffffffff,
887 };
888 #define ETH_RESET_SHARED_SHIFT 16
889 struct ethtool_link_settings {
890   __u32 cmd;
891   __u32 speed;
892   __u8 duplex;
893   __u8 port;
894   __u8 phy_address;
895   __u8 autoneg;
896   __u8 mdio_support;
897   __u8 eth_tp_mdix;
898   __u8 eth_tp_mdix_ctrl;
899   __s8 link_mode_masks_nwords;
900   __u8 transceiver;
901   __u8 master_slave_cfg;
902   __u8 master_slave_state;
903   __u8 reserved1[1];
904   __u32 reserved[7];
905   __u32 link_mode_masks[0];
906 };
907 #endif
908