1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_ETHTOOL_H 20 #define _UAPI_LINUX_ETHTOOL_H 21 #include <linux/const.h> 22 #include <linux/types.h> 23 #include <linux/if_ether.h> 24 #include <limits.h> 25 struct ethtool_cmd { 26 __u32 cmd; 27 __u32 supported; 28 __u32 advertising; 29 __u16 speed; 30 __u8 duplex; 31 __u8 port; 32 __u8 phy_address; 33 __u8 transceiver; 34 __u8 autoneg; 35 __u8 mdio_support; 36 __u32 maxtxpkt; 37 __u32 maxrxpkt; 38 __u16 speed_hi; 39 __u8 eth_tp_mdix; 40 __u8 eth_tp_mdix_ctrl; 41 __u32 lp_advertising; 42 __u32 reserved[2]; 43 }; 44 #define ETH_MDIO_SUPPORTS_C22 1 45 #define ETH_MDIO_SUPPORTS_C45 2 46 #define ETHTOOL_FWVERS_LEN 32 47 #define ETHTOOL_BUSINFO_LEN 32 48 #define ETHTOOL_EROMVERS_LEN 32 49 struct ethtool_drvinfo { 50 __u32 cmd; 51 char driver[32]; 52 char version[32]; 53 char fw_version[ETHTOOL_FWVERS_LEN]; 54 char bus_info[ETHTOOL_BUSINFO_LEN]; 55 char erom_version[ETHTOOL_EROMVERS_LEN]; 56 char reserved2[12]; 57 __u32 n_priv_flags; 58 __u32 n_stats; 59 __u32 testinfo_len; 60 __u32 eedump_len; 61 __u32 regdump_len; 62 }; 63 #define SOPASS_MAX 6 64 struct ethtool_wolinfo { 65 __u32 cmd; 66 __u32 supported; 67 __u32 wolopts; 68 __u8 sopass[SOPASS_MAX]; 69 }; 70 struct ethtool_value { 71 __u32 cmd; 72 __u32 data; 73 }; 74 #define PFC_STORM_PREVENTION_AUTO 0xffff 75 #define PFC_STORM_PREVENTION_DISABLE 0 76 enum tunable_id { 77 ETHTOOL_ID_UNSPEC, 78 ETHTOOL_RX_COPYBREAK, 79 ETHTOOL_TX_COPYBREAK, 80 ETHTOOL_PFC_PREVENTION_TOUT, 81 ETHTOOL_TX_COPYBREAK_BUF_SIZE, 82 __ETHTOOL_TUNABLE_COUNT, 83 }; 84 enum tunable_type_id { 85 ETHTOOL_TUNABLE_UNSPEC, 86 ETHTOOL_TUNABLE_U8, 87 ETHTOOL_TUNABLE_U16, 88 ETHTOOL_TUNABLE_U32, 89 ETHTOOL_TUNABLE_U64, 90 ETHTOOL_TUNABLE_STRING, 91 ETHTOOL_TUNABLE_S8, 92 ETHTOOL_TUNABLE_S16, 93 ETHTOOL_TUNABLE_S32, 94 ETHTOOL_TUNABLE_S64, 95 }; 96 struct ethtool_tunable { 97 __u32 cmd; 98 __u32 id; 99 __u32 type_id; 100 __u32 len; 101 void * data[]; 102 }; 103 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff 104 #define DOWNSHIFT_DEV_DISABLE 0 105 #define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0 106 #define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff 107 #define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff 108 #define ETHTOOL_PHY_EDPD_NO_TX 0xfffe 109 #define ETHTOOL_PHY_EDPD_DISABLE 0 110 enum phy_tunable_id { 111 ETHTOOL_PHY_ID_UNSPEC, 112 ETHTOOL_PHY_DOWNSHIFT, 113 ETHTOOL_PHY_FAST_LINK_DOWN, 114 ETHTOOL_PHY_EDPD, 115 __ETHTOOL_PHY_TUNABLE_COUNT, 116 }; 117 struct ethtool_regs { 118 __u32 cmd; 119 __u32 version; 120 __u32 len; 121 __u8 data[]; 122 }; 123 struct ethtool_eeprom { 124 __u32 cmd; 125 __u32 magic; 126 __u32 offset; 127 __u32 len; 128 __u8 data[]; 129 }; 130 struct ethtool_eee { 131 __u32 cmd; 132 __u32 supported; 133 __u32 advertised; 134 __u32 lp_advertised; 135 __u32 eee_active; 136 __u32 eee_enabled; 137 __u32 tx_lpi_enabled; 138 __u32 tx_lpi_timer; 139 __u32 reserved[2]; 140 }; 141 struct ethtool_modinfo { 142 __u32 cmd; 143 __u32 type; 144 __u32 eeprom_len; 145 __u32 reserved[8]; 146 }; 147 struct ethtool_coalesce { 148 __u32 cmd; 149 __u32 rx_coalesce_usecs; 150 __u32 rx_max_coalesced_frames; 151 __u32 rx_coalesce_usecs_irq; 152 __u32 rx_max_coalesced_frames_irq; 153 __u32 tx_coalesce_usecs; 154 __u32 tx_max_coalesced_frames; 155 __u32 tx_coalesce_usecs_irq; 156 __u32 tx_max_coalesced_frames_irq; 157 __u32 stats_block_coalesce_usecs; 158 __u32 use_adaptive_rx_coalesce; 159 __u32 use_adaptive_tx_coalesce; 160 __u32 pkt_rate_low; 161 __u32 rx_coalesce_usecs_low; 162 __u32 rx_max_coalesced_frames_low; 163 __u32 tx_coalesce_usecs_low; 164 __u32 tx_max_coalesced_frames_low; 165 __u32 pkt_rate_high; 166 __u32 rx_coalesce_usecs_high; 167 __u32 rx_max_coalesced_frames_high; 168 __u32 tx_coalesce_usecs_high; 169 __u32 tx_max_coalesced_frames_high; 170 __u32 rate_sample_interval; 171 }; 172 struct ethtool_ringparam { 173 __u32 cmd; 174 __u32 rx_max_pending; 175 __u32 rx_mini_max_pending; 176 __u32 rx_jumbo_max_pending; 177 __u32 tx_max_pending; 178 __u32 rx_pending; 179 __u32 rx_mini_pending; 180 __u32 rx_jumbo_pending; 181 __u32 tx_pending; 182 }; 183 struct ethtool_channels { 184 __u32 cmd; 185 __u32 max_rx; 186 __u32 max_tx; 187 __u32 max_other; 188 __u32 max_combined; 189 __u32 rx_count; 190 __u32 tx_count; 191 __u32 other_count; 192 __u32 combined_count; 193 }; 194 struct ethtool_pauseparam { 195 __u32 cmd; 196 __u32 autoneg; 197 __u32 rx_pause; 198 __u32 tx_pause; 199 }; 200 enum ethtool_link_ext_state { 201 ETHTOOL_LINK_EXT_STATE_AUTONEG, 202 ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE, 203 ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH, 204 ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY, 205 ETHTOOL_LINK_EXT_STATE_NO_CABLE, 206 ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE, 207 ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE, 208 ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE, 209 ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED, 210 ETHTOOL_LINK_EXT_STATE_OVERHEAT, 211 ETHTOOL_LINK_EXT_STATE_MODULE, 212 }; 213 enum ethtool_link_ext_substate_autoneg { 214 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED = 1, 215 ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED, 216 ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED, 217 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE, 218 ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE, 219 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD, 220 }; 221 enum ethtool_link_ext_substate_link_training { 222 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED = 1, 223 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT, 224 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY, 225 ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT, 226 }; 227 enum ethtool_link_ext_substate_link_logical_mismatch { 228 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK = 1, 229 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK, 230 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS, 231 ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED, 232 ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED, 233 }; 234 enum ethtool_link_ext_substate_bad_signal_integrity { 235 ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1, 236 ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE, 237 ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_REFERENCE_CLOCK_LOST, 238 ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_ALOS, 239 }; 240 enum ethtool_link_ext_substate_cable_issue { 241 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE = 1, 242 ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE, 243 }; 244 enum ethtool_link_ext_substate_module { 245 ETHTOOL_LINK_EXT_SUBSTATE_MODULE_CMIS_NOT_READY = 1, 246 }; 247 #define ETH_GSTRING_LEN 32 248 enum ethtool_stringset { 249 ETH_SS_TEST = 0, 250 ETH_SS_STATS, 251 ETH_SS_PRIV_FLAGS, 252 ETH_SS_NTUPLE_FILTERS, 253 ETH_SS_FEATURES, 254 ETH_SS_RSS_HASH_FUNCS, 255 ETH_SS_TUNABLES, 256 ETH_SS_PHY_STATS, 257 ETH_SS_PHY_TUNABLES, 258 ETH_SS_LINK_MODES, 259 ETH_SS_MSG_CLASSES, 260 ETH_SS_WOL_MODES, 261 ETH_SS_SOF_TIMESTAMPING, 262 ETH_SS_TS_TX_TYPES, 263 ETH_SS_TS_RX_FILTERS, 264 ETH_SS_UDP_TUNNEL_TYPES, 265 ETH_SS_STATS_STD, 266 ETH_SS_STATS_ETH_PHY, 267 ETH_SS_STATS_ETH_MAC, 268 ETH_SS_STATS_ETH_CTRL, 269 ETH_SS_STATS_RMON, 270 ETH_SS_COUNT 271 }; 272 enum ethtool_module_power_mode_policy { 273 ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH = 1, 274 ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO, 275 }; 276 enum ethtool_module_power_mode { 277 ETHTOOL_MODULE_POWER_MODE_LOW = 1, 278 ETHTOOL_MODULE_POWER_MODE_HIGH, 279 }; 280 enum ethtool_podl_pse_admin_state { 281 ETHTOOL_PODL_PSE_ADMIN_STATE_UNKNOWN = 1, 282 ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED, 283 ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED, 284 }; 285 enum ethtool_podl_pse_pw_d_status { 286 ETHTOOL_PODL_PSE_PW_D_STATUS_UNKNOWN = 1, 287 ETHTOOL_PODL_PSE_PW_D_STATUS_DISABLED, 288 ETHTOOL_PODL_PSE_PW_D_STATUS_SEARCHING, 289 ETHTOOL_PODL_PSE_PW_D_STATUS_DELIVERING, 290 ETHTOOL_PODL_PSE_PW_D_STATUS_SLEEP, 291 ETHTOOL_PODL_PSE_PW_D_STATUS_IDLE, 292 ETHTOOL_PODL_PSE_PW_D_STATUS_ERROR, 293 }; 294 struct ethtool_gstrings { 295 __u32 cmd; 296 __u32 string_set; 297 __u32 len; 298 __u8 data[]; 299 }; 300 struct ethtool_sset_info { 301 __u32 cmd; 302 __u32 reserved; 303 __u64 sset_mask; 304 __u32 data[]; 305 }; 306 enum ethtool_test_flags { 307 ETH_TEST_FL_OFFLINE = (1 << 0), 308 ETH_TEST_FL_FAILED = (1 << 1), 309 ETH_TEST_FL_EXTERNAL_LB = (1 << 2), 310 ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3), 311 }; 312 struct ethtool_test { 313 __u32 cmd; 314 __u32 flags; 315 __u32 reserved; 316 __u32 len; 317 __u64 data[]; 318 }; 319 struct ethtool_stats { 320 __u32 cmd; 321 __u32 n_stats; 322 __u64 data[]; 323 }; 324 struct ethtool_perm_addr { 325 __u32 cmd; 326 __u32 size; 327 __u8 data[]; 328 }; 329 enum ethtool_flags { 330 ETH_FLAG_TXVLAN = (1 << 7), 331 ETH_FLAG_RXVLAN = (1 << 8), 332 ETH_FLAG_LRO = (1 << 15), 333 ETH_FLAG_NTUPLE = (1 << 27), 334 ETH_FLAG_RXHASH = (1 << 28), 335 }; 336 struct ethtool_tcpip4_spec { 337 __be32 ip4src; 338 __be32 ip4dst; 339 __be16 psrc; 340 __be16 pdst; 341 __u8 tos; 342 }; 343 struct ethtool_ah_espip4_spec { 344 __be32 ip4src; 345 __be32 ip4dst; 346 __be32 spi; 347 __u8 tos; 348 }; 349 #define ETH_RX_NFC_IP4 1 350 struct ethtool_usrip4_spec { 351 __be32 ip4src; 352 __be32 ip4dst; 353 __be32 l4_4_bytes; 354 __u8 tos; 355 __u8 ip_ver; 356 __u8 proto; 357 }; 358 struct ethtool_tcpip6_spec { 359 __be32 ip6src[4]; 360 __be32 ip6dst[4]; 361 __be16 psrc; 362 __be16 pdst; 363 __u8 tclass; 364 }; 365 struct ethtool_ah_espip6_spec { 366 __be32 ip6src[4]; 367 __be32 ip6dst[4]; 368 __be32 spi; 369 __u8 tclass; 370 }; 371 struct ethtool_usrip6_spec { 372 __be32 ip6src[4]; 373 __be32 ip6dst[4]; 374 __be32 l4_4_bytes; 375 __u8 tclass; 376 __u8 l4_proto; 377 }; 378 union ethtool_flow_union { 379 struct ethtool_tcpip4_spec tcp_ip4_spec; 380 struct ethtool_tcpip4_spec udp_ip4_spec; 381 struct ethtool_tcpip4_spec sctp_ip4_spec; 382 struct ethtool_ah_espip4_spec ah_ip4_spec; 383 struct ethtool_ah_espip4_spec esp_ip4_spec; 384 struct ethtool_usrip4_spec usr_ip4_spec; 385 struct ethtool_tcpip6_spec tcp_ip6_spec; 386 struct ethtool_tcpip6_spec udp_ip6_spec; 387 struct ethtool_tcpip6_spec sctp_ip6_spec; 388 struct ethtool_ah_espip6_spec ah_ip6_spec; 389 struct ethtool_ah_espip6_spec esp_ip6_spec; 390 struct ethtool_usrip6_spec usr_ip6_spec; 391 struct ethhdr ether_spec; 392 __u8 hdata[52]; 393 }; 394 struct ethtool_flow_ext { 395 __u8 padding[2]; 396 unsigned char h_dest[ETH_ALEN]; 397 __be16 vlan_etype; 398 __be16 vlan_tci; 399 __be32 data[2]; 400 }; 401 struct ethtool_rx_flow_spec { 402 __u32 flow_type; 403 union ethtool_flow_union h_u; 404 struct ethtool_flow_ext h_ext; 405 union ethtool_flow_union m_u; 406 struct ethtool_flow_ext m_ext; 407 __u64 ring_cookie; 408 __u32 location; 409 }; 410 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL 411 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL 412 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 413 struct ethtool_rxnfc { 414 __u32 cmd; 415 __u32 flow_type; 416 __u64 data; 417 struct ethtool_rx_flow_spec fs; 418 union { 419 __u32 rule_cnt; 420 __u32 rss_context; 421 }; 422 __u32 rule_locs[0]; 423 }; 424 struct ethtool_rxfh_indir { 425 __u32 cmd; 426 __u32 size; 427 __u32 ring_index[]; 428 }; 429 struct ethtool_rxfh { 430 __u32 cmd; 431 __u32 rss_context; 432 __u32 indir_size; 433 __u32 key_size; 434 __u8 hfunc; 435 __u8 rsvd8[3]; 436 __u32 rsvd32; 437 __u32 rss_config[]; 438 }; 439 #define ETH_RXFH_CONTEXT_ALLOC 0xffffffff 440 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff 441 struct ethtool_rx_ntuple_flow_spec { 442 __u32 flow_type; 443 union { 444 struct ethtool_tcpip4_spec tcp_ip4_spec; 445 struct ethtool_tcpip4_spec udp_ip4_spec; 446 struct ethtool_tcpip4_spec sctp_ip4_spec; 447 struct ethtool_ah_espip4_spec ah_ip4_spec; 448 struct ethtool_ah_espip4_spec esp_ip4_spec; 449 struct ethtool_usrip4_spec usr_ip4_spec; 450 struct ethhdr ether_spec; 451 __u8 hdata[72]; 452 } h_u, m_u; 453 __u16 vlan_tag; 454 __u16 vlan_tag_mask; 455 __u64 data; 456 __u64 data_mask; 457 __s32 action; 458 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1) 459 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2) 460 }; 461 struct ethtool_rx_ntuple { 462 __u32 cmd; 463 struct ethtool_rx_ntuple_flow_spec fs; 464 }; 465 #define ETHTOOL_FLASH_MAX_FILENAME 128 466 enum ethtool_flash_op_type { 467 ETHTOOL_FLASH_ALL_REGIONS = 0, 468 }; 469 struct ethtool_flash { 470 __u32 cmd; 471 __u32 region; 472 char data[ETHTOOL_FLASH_MAX_FILENAME]; 473 }; 474 struct ethtool_dump { 475 __u32 cmd; 476 __u32 version; 477 __u32 flag; 478 __u32 len; 479 __u8 data[]; 480 }; 481 #define ETH_FW_DUMP_DISABLE 0 482 struct ethtool_get_features_block { 483 __u32 available; 484 __u32 requested; 485 __u32 active; 486 __u32 never_changed; 487 }; 488 struct ethtool_gfeatures { 489 __u32 cmd; 490 __u32 size; 491 struct ethtool_get_features_block features[]; 492 }; 493 struct ethtool_set_features_block { 494 __u32 valid; 495 __u32 requested; 496 }; 497 struct ethtool_sfeatures { 498 __u32 cmd; 499 __u32 size; 500 struct ethtool_set_features_block features[]; 501 }; 502 struct ethtool_ts_info { 503 __u32 cmd; 504 __u32 so_timestamping; 505 __s32 phc_index; 506 __u32 tx_types; 507 __u32 tx_reserved[3]; 508 __u32 rx_filters; 509 __u32 rx_reserved[3]; 510 }; 511 enum ethtool_sfeatures_retval_bits { 512 ETHTOOL_F_UNSUPPORTED__BIT, 513 ETHTOOL_F_WISH__BIT, 514 ETHTOOL_F_COMPAT__BIT, 515 }; 516 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT) 517 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT) 518 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT) 519 #define MAX_NUM_QUEUE 4096 520 struct ethtool_per_queue_op { 521 __u32 cmd; 522 __u32 sub_command; 523 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; 524 char data[]; 525 }; 526 struct ethtool_fecparam { 527 __u32 cmd; 528 __u32 active_fec; 529 __u32 fec; 530 __u32 reserved; 531 }; 532 enum ethtool_fec_config_bits { 533 ETHTOOL_FEC_NONE_BIT, 534 ETHTOOL_FEC_AUTO_BIT, 535 ETHTOOL_FEC_OFF_BIT, 536 ETHTOOL_FEC_RS_BIT, 537 ETHTOOL_FEC_BASER_BIT, 538 ETHTOOL_FEC_LLRS_BIT, 539 }; 540 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) 541 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT) 542 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) 543 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) 544 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) 545 #define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT) 546 #define ETHTOOL_GSET 0x00000001 547 #define ETHTOOL_SSET 0x00000002 548 #define ETHTOOL_GDRVINFO 0x00000003 549 #define ETHTOOL_GREGS 0x00000004 550 #define ETHTOOL_GWOL 0x00000005 551 #define ETHTOOL_SWOL 0x00000006 552 #define ETHTOOL_GMSGLVL 0x00000007 553 #define ETHTOOL_SMSGLVL 0x00000008 554 #define ETHTOOL_NWAY_RST 0x00000009 555 #define ETHTOOL_GLINK 0x0000000a 556 #define ETHTOOL_GEEPROM 0x0000000b 557 #define ETHTOOL_SEEPROM 0x0000000c 558 #define ETHTOOL_GCOALESCE 0x0000000e 559 #define ETHTOOL_SCOALESCE 0x0000000f 560 #define ETHTOOL_GRINGPARAM 0x00000010 561 #define ETHTOOL_SRINGPARAM 0x00000011 562 #define ETHTOOL_GPAUSEPARAM 0x00000012 563 #define ETHTOOL_SPAUSEPARAM 0x00000013 564 #define ETHTOOL_GRXCSUM 0x00000014 565 #define ETHTOOL_SRXCSUM 0x00000015 566 #define ETHTOOL_GTXCSUM 0x00000016 567 #define ETHTOOL_STXCSUM 0x00000017 568 #define ETHTOOL_GSG 0x00000018 569 #define ETHTOOL_SSG 0x00000019 570 #define ETHTOOL_TEST 0x0000001a 571 #define ETHTOOL_GSTRINGS 0x0000001b 572 #define ETHTOOL_PHYS_ID 0x0000001c 573 #define ETHTOOL_GSTATS 0x0000001d 574 #define ETHTOOL_GTSO 0x0000001e 575 #define ETHTOOL_STSO 0x0000001f 576 #define ETHTOOL_GPERMADDR 0x00000020 577 #define ETHTOOL_GUFO 0x00000021 578 #define ETHTOOL_SUFO 0x00000022 579 #define ETHTOOL_GGSO 0x00000023 580 #define ETHTOOL_SGSO 0x00000024 581 #define ETHTOOL_GFLAGS 0x00000025 582 #define ETHTOOL_SFLAGS 0x00000026 583 #define ETHTOOL_GPFLAGS 0x00000027 584 #define ETHTOOL_SPFLAGS 0x00000028 585 #define ETHTOOL_GRXFH 0x00000029 586 #define ETHTOOL_SRXFH 0x0000002a 587 #define ETHTOOL_GGRO 0x0000002b 588 #define ETHTOOL_SGRO 0x0000002c 589 #define ETHTOOL_GRXRINGS 0x0000002d 590 #define ETHTOOL_GRXCLSRLCNT 0x0000002e 591 #define ETHTOOL_GRXCLSRULE 0x0000002f 592 #define ETHTOOL_GRXCLSRLALL 0x00000030 593 #define ETHTOOL_SRXCLSRLDEL 0x00000031 594 #define ETHTOOL_SRXCLSRLINS 0x00000032 595 #define ETHTOOL_FLASHDEV 0x00000033 596 #define ETHTOOL_RESET 0x00000034 597 #define ETHTOOL_SRXNTUPLE 0x00000035 598 #define ETHTOOL_GRXNTUPLE 0x00000036 599 #define ETHTOOL_GSSET_INFO 0x00000037 600 #define ETHTOOL_GRXFHINDIR 0x00000038 601 #define ETHTOOL_SRXFHINDIR 0x00000039 602 #define ETHTOOL_GFEATURES 0x0000003a 603 #define ETHTOOL_SFEATURES 0x0000003b 604 #define ETHTOOL_GCHANNELS 0x0000003c 605 #define ETHTOOL_SCHANNELS 0x0000003d 606 #define ETHTOOL_SET_DUMP 0x0000003e 607 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f 608 #define ETHTOOL_GET_DUMP_DATA 0x00000040 609 #define ETHTOOL_GET_TS_INFO 0x00000041 610 #define ETHTOOL_GMODULEINFO 0x00000042 611 #define ETHTOOL_GMODULEEEPROM 0x00000043 612 #define ETHTOOL_GEEE 0x00000044 613 #define ETHTOOL_SEEE 0x00000045 614 #define ETHTOOL_GRSSH 0x00000046 615 #define ETHTOOL_SRSSH 0x00000047 616 #define ETHTOOL_GTUNABLE 0x00000048 617 #define ETHTOOL_STUNABLE 0x00000049 618 #define ETHTOOL_GPHYSTATS 0x0000004a 619 #define ETHTOOL_PERQUEUE 0x0000004b 620 #define ETHTOOL_GLINKSETTINGS 0x0000004c 621 #define ETHTOOL_SLINKSETTINGS 0x0000004d 622 #define ETHTOOL_PHY_GTUNABLE 0x0000004e 623 #define ETHTOOL_PHY_STUNABLE 0x0000004f 624 #define ETHTOOL_GFECPARAM 0x00000050 625 #define ETHTOOL_SFECPARAM 0x00000051 626 #define SPARC_ETH_GSET ETHTOOL_GSET 627 #define SPARC_ETH_SSET ETHTOOL_SSET 628 enum ethtool_link_mode_bit_indices { 629 ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, 630 ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, 631 ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, 632 ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, 633 ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, 634 ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, 635 ETHTOOL_LINK_MODE_Autoneg_BIT = 6, 636 ETHTOOL_LINK_MODE_TP_BIT = 7, 637 ETHTOOL_LINK_MODE_AUI_BIT = 8, 638 ETHTOOL_LINK_MODE_MII_BIT = 9, 639 ETHTOOL_LINK_MODE_FIBRE_BIT = 10, 640 ETHTOOL_LINK_MODE_BNC_BIT = 11, 641 ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, 642 ETHTOOL_LINK_MODE_Pause_BIT = 13, 643 ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, 644 ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, 645 ETHTOOL_LINK_MODE_Backplane_BIT = 16, 646 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, 647 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, 648 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, 649 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, 650 ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, 651 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, 652 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, 653 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, 654 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, 655 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, 656 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, 657 ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, 658 ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, 659 ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, 660 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, 661 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, 662 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, 663 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, 664 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, 665 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, 666 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, 667 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, 668 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, 669 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, 670 ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, 671 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, 672 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, 673 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, 674 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, 675 ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, 676 ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, 677 ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, 678 ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, 679 ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, 680 ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, 681 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT = 52, 682 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT = 53, 683 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT = 54, 684 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55, 685 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT = 56, 686 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT = 57, 687 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT = 58, 688 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT = 59, 689 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60, 690 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT = 61, 691 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT = 62, 692 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT = 63, 693 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64, 694 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65, 695 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66, 696 ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67, 697 ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68, 698 ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT = 69, 699 ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT = 70, 700 ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71, 701 ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72, 702 ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73, 703 ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74, 704 ETHTOOL_LINK_MODE_100000baseKR_Full_BIT = 75, 705 ETHTOOL_LINK_MODE_100000baseSR_Full_BIT = 76, 706 ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT = 77, 707 ETHTOOL_LINK_MODE_100000baseCR_Full_BIT = 78, 708 ETHTOOL_LINK_MODE_100000baseDR_Full_BIT = 79, 709 ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT = 80, 710 ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT = 81, 711 ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82, 712 ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT = 83, 713 ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT = 84, 714 ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT = 85, 715 ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT = 86, 716 ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87, 717 ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT = 88, 718 ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89, 719 ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90, 720 ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91, 721 ETHTOOL_LINK_MODE_10baseT1L_Full_BIT = 92, 722 ETHTOOL_LINK_MODE_800000baseCR8_Full_BIT = 93, 723 ETHTOOL_LINK_MODE_800000baseKR8_Full_BIT = 94, 724 ETHTOOL_LINK_MODE_800000baseDR8_Full_BIT = 95, 725 ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT = 96, 726 ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT = 97, 727 ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT = 98, 728 __ETHTOOL_LINK_MODE_MASK_NBITS 729 }; 730 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT)) 731 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 732 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 733 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 734 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 735 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 736 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 737 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 738 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 739 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 740 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 741 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 742 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 743 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 744 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 745 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 746 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 747 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 748 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 749 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 750 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 751 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 752 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 753 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 754 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 755 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 756 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 757 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 758 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 759 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 760 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 761 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 762 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 763 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 764 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 765 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 766 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 767 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 768 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 769 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 770 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 771 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 772 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 773 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 774 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 775 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 776 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 777 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 778 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 779 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 780 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 781 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 782 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 783 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 784 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 785 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 786 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 787 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 788 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 789 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 790 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 791 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 792 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 793 #define SPEED_10 10 794 #define SPEED_100 100 795 #define SPEED_1000 1000 796 #define SPEED_2500 2500 797 #define SPEED_5000 5000 798 #define SPEED_10000 10000 799 #define SPEED_14000 14000 800 #define SPEED_20000 20000 801 #define SPEED_25000 25000 802 #define SPEED_40000 40000 803 #define SPEED_50000 50000 804 #define SPEED_56000 56000 805 #define SPEED_100000 100000 806 #define SPEED_200000 200000 807 #define SPEED_400000 400000 808 #define SPEED_800000 800000 809 #define SPEED_UNKNOWN - 1 810 #define DUPLEX_HALF 0x00 811 #define DUPLEX_FULL 0x01 812 #define DUPLEX_UNKNOWN 0xff 813 #define MASTER_SLAVE_CFG_UNSUPPORTED 0 814 #define MASTER_SLAVE_CFG_UNKNOWN 1 815 #define MASTER_SLAVE_CFG_MASTER_PREFERRED 2 816 #define MASTER_SLAVE_CFG_SLAVE_PREFERRED 3 817 #define MASTER_SLAVE_CFG_MASTER_FORCE 4 818 #define MASTER_SLAVE_CFG_SLAVE_FORCE 5 819 #define MASTER_SLAVE_STATE_UNSUPPORTED 0 820 #define MASTER_SLAVE_STATE_UNKNOWN 1 821 #define MASTER_SLAVE_STATE_MASTER 2 822 #define MASTER_SLAVE_STATE_SLAVE 3 823 #define MASTER_SLAVE_STATE_ERR 4 824 #define RATE_MATCH_NONE 0 825 #define RATE_MATCH_PAUSE 1 826 #define RATE_MATCH_CRS 2 827 #define RATE_MATCH_OPEN_LOOP 3 828 #define PORT_TP 0x00 829 #define PORT_AUI 0x01 830 #define PORT_MII 0x02 831 #define PORT_FIBRE 0x03 832 #define PORT_BNC 0x04 833 #define PORT_DA 0x05 834 #define PORT_NONE 0xef 835 #define PORT_OTHER 0xff 836 #define XCVR_INTERNAL 0x00 837 #define XCVR_EXTERNAL 0x01 838 #define XCVR_DUMMY1 0x02 839 #define XCVR_DUMMY2 0x03 840 #define XCVR_DUMMY3 0x04 841 #define AUTONEG_DISABLE 0x00 842 #define AUTONEG_ENABLE 0x01 843 #define ETH_TP_MDI_INVALID 0x00 844 #define ETH_TP_MDI 0x01 845 #define ETH_TP_MDI_X 0x02 846 #define ETH_TP_MDI_AUTO 0x03 847 #define WAKE_PHY (1 << 0) 848 #define WAKE_UCAST (1 << 1) 849 #define WAKE_MCAST (1 << 2) 850 #define WAKE_BCAST (1 << 3) 851 #define WAKE_ARP (1 << 4) 852 #define WAKE_MAGIC (1 << 5) 853 #define WAKE_MAGICSECURE (1 << 6) 854 #define WAKE_FILTER (1 << 7) 855 #define WOL_MODE_COUNT 8 856 #define TCP_V4_FLOW 0x01 857 #define UDP_V4_FLOW 0x02 858 #define SCTP_V4_FLOW 0x03 859 #define AH_ESP_V4_FLOW 0x04 860 #define TCP_V6_FLOW 0x05 861 #define UDP_V6_FLOW 0x06 862 #define SCTP_V6_FLOW 0x07 863 #define AH_ESP_V6_FLOW 0x08 864 #define AH_V4_FLOW 0x09 865 #define ESP_V4_FLOW 0x0a 866 #define AH_V6_FLOW 0x0b 867 #define ESP_V6_FLOW 0x0c 868 #define IPV4_USER_FLOW 0x0d 869 #define IP_USER_FLOW IPV4_USER_FLOW 870 #define IPV6_USER_FLOW 0x0e 871 #define IPV4_FLOW 0x10 872 #define IPV6_FLOW 0x11 873 #define ETHER_FLOW 0x12 874 #define FLOW_EXT 0x80000000 875 #define FLOW_MAC_EXT 0x40000000 876 #define FLOW_RSS 0x20000000 877 #define RXH_L2DA (1 << 1) 878 #define RXH_VLAN (1 << 2) 879 #define RXH_L3_PROTO (1 << 3) 880 #define RXH_IP_SRC (1 << 4) 881 #define RXH_IP_DST (1 << 5) 882 #define RXH_L4_B_0_1 (1 << 6) 883 #define RXH_L4_B_2_3 (1 << 7) 884 #define RXH_DISCARD (1 << 31) 885 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL 886 #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL 887 #define RX_CLS_LOC_SPECIAL 0x80000000 888 #define RX_CLS_LOC_ANY 0xffffffff 889 #define RX_CLS_LOC_FIRST 0xfffffffe 890 #define RX_CLS_LOC_LAST 0xfffffffd 891 #define ETH_MODULE_SFF_8079 0x1 892 #define ETH_MODULE_SFF_8079_LEN 256 893 #define ETH_MODULE_SFF_8472 0x2 894 #define ETH_MODULE_SFF_8472_LEN 512 895 #define ETH_MODULE_SFF_8636 0x3 896 #define ETH_MODULE_SFF_8636_LEN 256 897 #define ETH_MODULE_SFF_8436 0x4 898 #define ETH_MODULE_SFF_8436_LEN 256 899 #define ETH_MODULE_SFF_8636_MAX_LEN 640 900 #define ETH_MODULE_SFF_8436_MAX_LEN 640 901 enum ethtool_reset_flags { 902 ETH_RESET_MGMT = 1 << 0, 903 ETH_RESET_IRQ = 1 << 1, 904 ETH_RESET_DMA = 1 << 2, 905 ETH_RESET_FILTER = 1 << 3, 906 ETH_RESET_OFFLOAD = 1 << 4, 907 ETH_RESET_MAC = 1 << 5, 908 ETH_RESET_PHY = 1 << 6, 909 ETH_RESET_RAM = 1 << 7, 910 ETH_RESET_AP = 1 << 8, 911 ETH_RESET_DEDICATED = 0x0000ffff, 912 ETH_RESET_ALL = 0xffffffff, 913 }; 914 #define ETH_RESET_SHARED_SHIFT 16 915 struct ethtool_link_settings { 916 __u32 cmd; 917 __u32 speed; 918 __u8 duplex; 919 __u8 port; 920 __u8 phy_address; 921 __u8 autoneg; 922 __u8 mdio_support; 923 __u8 eth_tp_mdix; 924 __u8 eth_tp_mdix_ctrl; 925 __s8 link_mode_masks_nwords; 926 __u8 transceiver; 927 __u8 master_slave_cfg; 928 __u8 master_slave_state; 929 __u8 rate_matching; 930 __u32 reserved[7]; 931 __u32 link_mode_masks[]; 932 }; 933 #endif 934