1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef HNS_ABI_USER_H 20 #define HNS_ABI_USER_H 21 #include <linux/types.h> 22 struct hns_roce_ib_create_cq { 23 __aligned_u64 buf_addr; 24 __aligned_u64 db_addr; 25 __u32 cqe_size; 26 __u32 reserved; 27 }; 28 enum hns_roce_cq_cap_flags { 29 HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0, 30 }; 31 struct hns_roce_ib_create_cq_resp { 32 __aligned_u64 cqn; 33 __aligned_u64 cap_flags; 34 }; 35 struct hns_roce_ib_create_srq { 36 __aligned_u64 buf_addr; 37 __aligned_u64 db_addr; 38 __aligned_u64 que_addr; 39 }; 40 struct hns_roce_ib_create_srq_resp { 41 __u32 srqn; 42 __u32 reserved; 43 }; 44 struct hns_roce_ib_create_qp { 45 __aligned_u64 buf_addr; 46 __aligned_u64 db_addr; 47 __u8 log_sq_bb_count; 48 __u8 log_sq_stride; 49 __u8 sq_no_prefetch; 50 __u8 reserved[5]; 51 __aligned_u64 sdb_addr; 52 }; 53 enum hns_roce_qp_cap_flags { 54 HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0, 55 HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1, 56 HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2, 57 HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5, 58 }; 59 struct hns_roce_ib_create_qp_resp { 60 __aligned_u64 cap_flags; 61 __aligned_u64 dwqe_mmap_key; 62 }; 63 enum { 64 HNS_ROCE_EXSGE_FLAGS = 1 << 0, 65 }; 66 enum { 67 HNS_ROCE_RSP_EXSGE_FLAGS = 1 << 0, 68 }; 69 struct hns_roce_ib_alloc_ucontext_resp { 70 __u32 qp_tab_size; 71 __u32 cqe_size; 72 __u32 srq_tab_size; 73 __u32 reserved; 74 __u32 config; 75 __u32 max_inline_data; 76 }; 77 struct hns_roce_ib_alloc_ucontext { 78 __u32 config; 79 __u32 reserved; 80 }; 81 struct hns_roce_ib_alloc_pd_resp { 82 __u32 pdn; 83 }; 84 #endif 85