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Searched refs:CPUARMState (Results 1 – 5 of 5) sorted by relevance

/external/qemu/target-arm/
Dcpu.h27 #define CPUState struct CPUARMState
73 typedef struct CPUARMState { struct
167 int (*get_irq_vector)(struct CPUARMState *); argument
207 } CPUARMState; argument
209 CPUARMState *cpu_arm_init(const char *cpu_model);
211 int cpu_arm_exec(CPUARMState *s);
212 void cpu_arm_close(CPUARMState *s);
213 void do_interrupt(CPUARMState *);
214 void switch_mode(CPUARMState *, int);
215 uint32_t do_arm_semihosting(CPUARMState *env);
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Dmachine.c7 CPUARMState *env = (CPUARMState *)opaque; in cpu_save()
98 CPUARMState *env = (CPUARMState *)opaque; in cpu_load()
Dhelper.c34 static inline void set_feature(CPUARMState *env, int feature) in set_feature()
39 static void cpu_reset_model_id(CPUARMState *env, uint32_t id) in cpu_reset_model_id()
162 void cpu_reset(CPUARMState *env) in cpu_reset()
172 memset(env, 0, offsetof(CPUARMState, breakpoints)); in cpu_reset()
244 CPUARMState *cpu_arm_init(const char *cpu_model) in cpu_arm_init()
246 CPUARMState *env; in cpu_arm_init()
253 env = qemu_mallocz(sizeof(CPUARMState)); in cpu_arm_init()
334 void cpu_arm_close(CPUARMState *env) in cpu_arm_close()
339 uint32_t cpsr_read(CPUARMState *env) in cpsr_read()
350 void cpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) in cpsr_write()
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Dexec.h23 register struct CPUARMState *env asm(AREG0);
Dtranslate.c1154 return offsetof(CPUARMState, vfp.regs[reg]); in vfp_reg_offset()
1156 return offsetof(CPUARMState, vfp.regs[reg >> 1]) in vfp_reg_offset()
1159 return offsetof(CPUARMState, vfp.regs[reg >> 1]) in vfp_reg_offset()
3624 offset = offsetof(CPUARMState, vfp.scratch[scratch]); in gen_neon_movl_scratch_T0()
3633 offset = offsetof(CPUARMState, vfp.scratch[scratch]); in gen_neon_movl_scratch_T1()
3642 offset = offsetof(CPUARMState, vfp.scratch[scratch]); in gen_neon_movl_T0_scratch()
3651 offset = offsetof(CPUARMState, vfp.scratch[scratch]); in gen_neon_movl_T1_scratch()