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1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
2
3<html>
4
5<head>
6<title>binop/2addr</title>
7<link rel=stylesheet href="opcode.css">
8</head>
9
10<body>
11
12<h1>binop/2addr</h1>
13
14<h2>Purpose</h2>
15
16<p>
17Perform the identified binary operation on the two source registers, storing the
18result in the first source register.
19</p>
20
21<h2>Details</h2>
22
23<table class="instruc">
24<thead>
25<tr>
26  <th>Op &amp; Format</th>
27  <th>Mnemonic / Syntax</th>
28  <th>Arguments</th>
29</tr>
30</thead>
31<tbody>
32<tr>
33  <td>b0..cf 12x</td>
34  <td><i>binop</i>/2addr vA, vB<br/>
35    b0: add-int/2addr<br/>
36    b1: sub-int/2addr<br/>
37    b2: mul-int/2addr<br/>
38    b3: div-int/2addr<br/>
39    b4: rem-int/2addr<br/>
40    b5: and-int/2addr<br/>
41    b6: or-int/2addr<br/>
42    b7: xor-int/2addr<br/>
43    b8: shl-int/2addr<br/>
44    b9: shr-int/2addr<br/>
45    ba: ushr-int/2addr<br/>
46    bb: add-long/2addr<br/>
47    bc: sub-long/2addr<br/>
48    bd: mul-long/2addr<br/>
49    be: div-long/2addr<br/>
50    bf: rem-long/2addr<br/>
51    c0: and-long/2addr<br/>
52    c1: or-long/2addr<br/>
53    c2: xor-long/2addr<br/>
54    c3: shl-long/2addr<br/>
55    c4: shr-long/2addr<br/>
56    c5: ushr-long/2addr<br/>
57    c6: add-float/2addr<br/>
58    c7: sub-float/2addr<br/>
59    c8: mul-float/2addr<br/>
60    c9: div-float/2addr<br/>
61    ca: rem-float/2addr<br/>
62    cb: add-double/2addr<br/>
63    cc: sub-double/2addr<br/>
64    cd: mul-double/2addr<br/>
65    ce: div-double/2addr<br/>
66    cf: rem-double/2addr
67  </td>
68  <td><code>A:</code> destination and first source register or pair
69      (4 bits)<br/>
70    <code>B:</code> second source register or pair (4 bits)</td>
71</tr>
72</tbody>
73</table>
74
75<h2>Constraints</h2>
76
77<ul>
78  <li>
79    Both A and B must be valid register indices in the current stackframe.
80  </li>
81  <li>
82    For the -long and -double variants, also A+1 and B+1 must be valid register
83    indices.
84  </li>
85  <li>
86    Registers vA and vB must be defined. They must both contain values that
87    match the variant of the instruction (it's probably better to split this up
88    into multiple pages again).
89  </li>
90</ul>
91
92<h2>Behavior</h2>
93
94<ul>
95  <li>
96    The given operation &lt;binop&gt; is performed according to the semantics
97    specified in table XXX.
98  </li>
99  <li>
100    The result is stored in register vA, that is, vA'=vA &lt;binop&gt; vB.
101  </li>
102  <li>
103    For the -double and -long variants, (vA+1) is also affected.
104  </li>
105  <li>
106    As usual, neighboring registers might get undefined, if vA (and vA+1) were
107    part of a register pair originally.
108  </li>
109</ul>
110
111<h2>Exceptions</h2>
112
113<ul>
114  <li>
115    ArithmeticException if an error occurs during the instruction.
116  </li>
117</ul>
118
119</body>
120</html>
121