1%verify "executed" 2 /* 3 * Array put, 64 bits. vBB[vCC] <- vAA. 4 */ 5 /* aput-wide vAA, vBB, vCC */ 6 FETCH(r0, 1) @ r0<- CCBB 7 mov r9, rINST, lsr #8 @ r9<- AA 8 and r2, r0, #255 @ r2<- BB 9 mov r3, r0, lsr #8 @ r3<- CC 10 GET_VREG(r0, r2) @ r0<- vBB (array object) 11 GET_VREG(r1, r3) @ r1<- vCC (requested index) 12 cmp r0, #0 @ null array object? 13 beq common_errNullObject @ yes, bail 14 ldr r3, [r0, #offArrayObject_length] @ r3<- arrayObj->length 15 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width 16 cmp r1, r3 @ compare unsigned index, length 17 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA] 18 bcc .L${opcode}_finish @ okay, continue below 19 b common_errArrayIndex @ index >= length, bail 20 @ May want to swap the order of these two branches depending on how the 21 @ branch prediction (if any) handles conditional forward branches vs. 22 @ unconditional forward branches. 23%break 24 25.L${opcode}_finish: 26 FETCH_ADVANCE_INST(2) @ advance rPC, load rINST 27 ldmia r9, {r2-r3} @ r2/r3<- vAA/vAA+1 28 GET_INST_OPCODE(ip) @ extract opcode from rINST 29 add r0, #offArrayObject_contents 30 stmia r0, {r2-r3} @ vBB[vCC] <- r2/r3 31 GOTO_OPCODE(ip) @ jump to next instruction 32