| /dalvik/vm/compiler/codegen/ |
| D | CodegenFactory.cpp | 91 genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg); in loadValueDirectWide()
191 loadValueDirectWide(cUnit, rlSrc, rlSrc.lowReg, rlSrc.highReg); in loadValueWide()
194 dvmCompilerMarkLive(cUnit, rlSrc.highReg, in loadValueWide()
199 rlSrc.lowReg, rlSrc.highReg, INVALID_SREG); in loadValueWide()
202 dvmCompilerClobber(cUnit, rlSrc.highReg); in loadValueWide()
212 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg)); in storeValueWide()
218 dvmCompilerIsLive(cUnit, rlSrc.highReg) || in storeValueWide()
222 genRegCopyWide(cUnit, rlDest.lowReg, rlDest.highReg, in storeValueWide()
223 rlSrc.lowReg, rlSrc.highReg); in storeValueWide()
227 rlDest.highReg = rlSrc.highReg; in storeValueWide()
[all …]
|
| D | RallocUtil.cpp | 486 dvmCompilerResetDef(cUnit, rl.highReg); // Only track low of pair in dvmCompilerMarkDefWide()
497 RegisterInfo *infoHi = getRegInfo(cUnit, rl.highReg); in dvmCompilerWideToNarrow()
545 dvmCompilerResetDef(cUnit, rl.highReg); in dvmCompilerResetDefLocWide()
632 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) in dvmCompilerMarkPair() argument
635 RegisterInfo *infoHi = getRegInfo(cUnit, highReg); in dvmCompilerMarkPair()
637 infoLo->partner = highReg; in dvmCompilerMarkPair()
724 loc.highReg = infoHi->reg; in dvmCompilerUpdateLocWide()
726 dvmCompilerMarkPair(cUnit, loc.lowReg, loc.highReg); in dvmCompilerUpdateLocWide()
752 int highReg; in evalLocWide() local
758 assert(FPREG(loc.lowReg) == FPREG(loc.highReg)); in evalLocWide()
[all …]
|
| D | Ralloc.h | 99 int highReg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| D | Ralloc.cpp | 35 int highReg; in dvmCompilerAllocTypedTempPair() local
45 highReg = lowReg + 1; in dvmCompilerAllocTypedTempPair()
48 highReg = dvmCompilerAllocTemp(cUnit); in dvmCompilerAllocTypedTempPair()
50 res = (lowReg & 0xff) | ((highReg & 0xff) << 8); in dvmCompilerAllocTypedTempPair()
|
| D | Gen.cpp | 92 newLIR2(cUnit, kThumb2Vnegd, S2D(rlResult.lowReg, rlResult.highReg), in genNegDouble()
93 S2D(rlSrc.lowReg, rlSrc.highReg)); in genNegDouble()
113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg); in genMulLong()
115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1); in genMulLong()
121 rlResult.highReg = resHi; in genMulLong()
134 opRegRegReg(cUnit, secondOp, rlResult.highReg, rlSrc1.highReg, in genLong3Addr()
135 rlSrc2.highReg); in genLong3Addr()
381 opRegReg(cUnit, kOpCmp, rlSrc1.highReg, rlSrc2.highReg); in genCmpLong()
423 newLIR2(cUnit, kThumb2Vabsd, S2D(rlResult.lowReg, rlResult.highReg), in genInlinedAbsDouble()
424 S2D(rlSrc.lowReg, rlSrc.highReg)); in genInlinedAbsDouble()
|
| D | Factory.cpp | 1118 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) in storePair() argument
1120 storeBaseDispWide(cUnit, base, 0, lowReg, highReg); in storePair()
1123 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) in loadPair() argument
1125 loadBaseDispWide(cUnit, NULL, base, 0, lowReg, highReg, INVALID_SREG); in loadPair()
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| D | Ralloc.cpp | 32 int highReg; in dvmCompilerAllocTypedTempPair() local
36 highReg = dvmCompilerAllocTemp(cUnit); in dvmCompilerAllocTypedTempPair()
37 res = (lowReg & 0xff) | ((highReg & 0xff) << 8); in dvmCompilerAllocTypedTempPair()
|
| D | Gen.cpp | 102 opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg, in genNegDouble()
139 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg); in genLong3Addr()
146 opRegReg(cUnit, secondOp, rlSrc1.highReg, rlResult.highReg); in genLong3Addr()
149 dvmCompilerClobber(cUnit, rlResult.highReg); in genLong3Addr()
151 dvmCompilerClobber(cUnit, rlSrc1.highReg); in genLong3Addr()
161 rlResult.highReg); in genLong3Addr()
164 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg); in genLong3Addr()
236 int reghi = regSrc.highReg; in genInlinedAbsDouble()
|
| D | Factory.cpp | 28 int highReg);
29 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg);
819 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) in storePair() argument
821 if (lowReg < highReg) { in storePair()
822 storeMultiple(cUnit, base, (1 << lowReg) | (1 << highReg)); in storePair()
825 storeWordDisp(cUnit, base, 4, highReg); in storePair()
829 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) in loadPair() argument
831 if (lowReg < highReg) { in loadPair()
832 loadMultiple(cUnit, base, (1 << lowReg) | (1 << highReg)); in loadPair()
835 loadWordDisp(cUnit, base, 4 , highReg); in loadPair()
|
| /dalvik/vm/compiler/codegen/arm/FP/ |
| D | Thumb2VFP.cpp | 104 newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), in genArithOpDouble()
105 S2D(rlSrc1.lowReg, rlSrc1.highReg), in genArithOpDouble()
106 S2D(rlSrc2.lowReg, rlSrc2.highReg)); in genArithOpDouble()
164 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg); in genConversion()
173 newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), in genConversion()
192 newLIR2(cUnit, kThumb2Vsqrtd, S2D(rlResult.lowReg, rlResult.highReg), in genInlineSqrt()
193 S2D(rlSrc.lowReg, rlSrc.highReg)); in genInlineSqrt()
194 newLIR2(cUnit, kThumb2Vcmpd, S2D(rlResult.lowReg, rlResult.highReg), in genInlineSqrt()
195 S2D(rlResult.lowReg, rlResult.highReg)); in genInlineSqrt()
200 newLIR3(cUnit, kThumb2Fmrrd, r0, r1, S2D(rlSrc.lowReg, rlSrc.highReg)); in genInlineSqrt()
[all …]
|
| D | ThumbVFP.cpp | 34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg); in loadValueAddressDirect()
149 dvmCompilerClobber(cUnit, rlDest.highReg); in genArithOpDouble()
218 dvmCompilerClobber(cUnit, rlDest.highReg); in genConversion()
|
| /dalvik/vm/compiler/codegen/arm/ |
| D | ArmRallocUtil.cpp | 83 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg); in dvmCompilerGetReturnWide()
91 res.highReg = r3; in dvmCompilerGetReturnWideAlt()
96 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg); in dvmCompilerGetReturnWideAlt()
|
| D | CodegenDriver.cpp | 317 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg); in genIGetWide()
338 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg); in genIPutWide()
452 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg); in genArrayGet()
530 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg); in genArrayPut()
681 opRegReg(cUnit, kOpMvn, rlResult.highReg, rlSrc2.highReg); in genArithOpLong()
735 opRegReg(cUnit, kOpSbc, tReg, rlSrc2.highReg); in genArithOpLong()
736 genRegCopy(cUnit, rlResult.highReg, tReg); in genArithOpLong()
1530 opRegRegImm(cUnit, kOpAsr, rlResult.highReg, in handleFmt11n_Fmt31i()
1560 loadConstantValueWide(cUnit, rlResult.lowReg, rlResult.highReg, in handleFmt21h()
1702 loadPair(cUnit, tReg, rlResult.lowReg, rlResult.highReg); in handleFmt21c_Fmt31c_Fmt41c()
[all …]
|
| /dalvik/vm/compiler/ |
| D | CompilerIR.h | 40 u1 highReg:6; // 2nd physical register (if wide) member
|