/external/llvm/utils/TableGen/ |
D | CodeGenTarget.h | 174 class ComplexPattern { 181 ComplexPattern() : NumOperands(0) {} in ComplexPattern() function 182 ComplexPattern(Record *R);
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D | DAGISelMatcherEmitter.cpp | 43 DenseMap<const ComplexPattern*, unsigned> ComplexPatternMap; 44 std::vector<const ComplexPattern*> ComplexPatterns; 81 unsigned getComplexPat(const ComplexPattern &P) { in getComplexPat() 384 const ComplexPattern &Pattern = CCPM->getPattern(); in EmitMatcher() 646 const ComplexPattern &P = *ComplexPatterns[i]; in EmitPredicateFunctions()
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D | CodeGenDAGPatterns.h | 36 class ComplexPattern; variable 403 const ComplexPattern * 676 std::map<Record*, ComplexPattern, RecordPtrCmp> ComplexPatterns; 716 const ComplexPattern &getComplexPattern(Record *R) const { in getComplexPattern()
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D | DAGISelMatcherGen.cpp | 463 if (const ComplexPattern *CP = in EmitMatcherCode() 498 const ComplexPattern &CP = in EmitMatcherCode() 538 if (const ComplexPattern *CP = N->getComplexPatternInfo(CGP)) { in EmitResultOfNamedOperand()
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D | DAGISelMatcher.h | 25 class ComplexPattern; variable 659 const ComplexPattern &Pattern; 672 CheckComplexPatMatcher(const ComplexPattern &pattern, unsigned matchnumber, in CheckComplexPatMatcher() 677 const ComplexPattern &getPattern() const { return Pattern; } in getPattern()
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D | CodeGenTarget.cpp | 307 ComplexPattern::ComplexPattern(Record *R) { in ComplexPattern() function in ComplexPattern
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D | CodeGenDAGPatterns.cpp | 703 const ComplexPattern *AM = P->getComplexPatternInfo(CGP); in getPatternSize() 1328 const ComplexPattern * 1342 if (const ComplexPattern *CP = getComplexPatternInfo(CGP)) in NodeHasProperty() 2425 const ComplexPattern &CP = CDP.getComplexPattern(LeafRec); in AnalyzeNode() 2782 if (const ComplexPattern *CP = in AddPatternToMatch()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZOperands.td | 291 ComplexPattern<i64, 2, "SelectAddrRI12Only", []> { 297 ComplexPattern<i64, 2, "SelectAddrRI12", []> { 303 ComplexPattern<i64, 2, "SelectAddrRI", []> { 312 ComplexPattern<i64, 3, "SelectAddrRRI12", [], []> { 317 ComplexPattern<i64, 3, "SelectAddrRRI20", [], []> { 322 ComplexPattern<i64, 3, "SelectLAAddr", [add, sub, or, frameindex], []> {
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/external/llvm/lib/Target/CellSPU/ |
D | SPUOperands.td | 657 def dform_addr : ComplexPattern<iPTR, 2, "SelectDFormAddr", 659 def xform_addr : ComplexPattern<iPTR, 2, "SelectXFormAddr", 661 def aform_addr : ComplexPattern<iPTR, 2, "SelectAFormAddr", 663 def dform2_addr : ComplexPattern<iPTR, 2, "SelectDForm2Addr",
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 114 ComplexPattern<i32, 2, "SelectThumbAddrModeRR", []> { 123 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S1", []> { 130 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S2", []> { 137 ComplexPattern<i32, 2, "SelectThumbAddrModeRI5S4", []> { 147 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S4", []> { 157 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S2", []> { 167 ComplexPattern<i32, 2, "SelectThumbAddrModeImm5S1", []> { 177 ComplexPattern<i32, 2, "SelectThumbAddrModeSP", []> {
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D | ARMInstrInfo.td | 428 ComplexPattern<i32, 3, "SelectShifterOperandReg", 437 ComplexPattern<i32, 3, "SelectShiftShifterOperandReg", 554 ComplexPattern<i32, 2, "SelectAddrModeImm12", []> { 566 ComplexPattern<i32, 3, "SelectLdStSOReg", []> { 577 ComplexPattern<i32, 3, "SelectAddrMode2", []> { 585 ComplexPattern<i32, 2, "SelectAddrMode2Offset", 596 ComplexPattern<i32, 3, "SelectAddrMode3", []> { 604 ComplexPattern<i32, 2, "SelectAddrMode3Offset", 626 ComplexPattern<i32, 2, "SelectAddrMode5", []> { 636 ComplexPattern<i32, 2, "SelectAddrMode6", [], [SDNPWantParent]>{ [all …]
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D | ARMInstrThumb2.td | 27 ComplexPattern<i32, 2, "SelectT2ShifterOperandReg", 100 ComplexPattern<i32, 2, "SelectT2AddrModeImm12", []> { 121 ComplexPattern<i32, 2, "SelectT2AddrModeImm8", []> { 129 ComplexPattern<i32, 1, "SelectT2AddrModeImm8Offset", 150 ComplexPattern<i32, 3, "SelectT2AddrModeSoReg", []> {
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/external/llvm/lib/Target/PTX/ |
D | PTXInstrInfo.td | 136 def ADDRrr32 : ComplexPattern<i32, 2, "SelectADDRrr", [], []>; 137 def ADDRrr64 : ComplexPattern<i64, 2, "SelectADDRrr", [], []>; 138 def ADDRri32 : ComplexPattern<i32, 2, "SelectADDRri", [], []>; 139 def ADDRri64 : ComplexPattern<i64, 2, "SelectADDRri", [], []>; 140 def ADDRii32 : ComplexPattern<i32, 2, "SelectADDRii", [], []>; 141 def ADDRii64 : ComplexPattern<i64, 2, "SelectADDRii", [], []>;
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 241 def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match 242 def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent 920 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>; 922 class ComplexPattern<ValueType ty, int numops, string fn,
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/external/llvm/lib/Target/X86/ |
D | X86InstrFragmentsSIMD.td | 160 def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [], 163 def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
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D | X86InstrInfo.td | 412 def addr : ComplexPattern<iPTR, 5, "SelectAddr", [], [SDNPWantParent]>; 413 def lea32addr : ComplexPattern<i32, 5, "SelectLEAAddr", 416 def tls32addr : ComplexPattern<i32, 5, "SelectTLSADDRAddr", 419 def lea64addr : ComplexPattern<i64, 5, "SelectLEAAddr", 423 def tls64addr : ComplexPattern<i64, 5, "SelectTLSADDRAddr",
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D | X86InstrSSE.td | 42 Operand memopr, ComplexPattern mem_cpat,
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 342 def iaddr : ComplexPattern<iPTR, 2, "SelectAddrImm", [], []>; 343 def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>; 344 def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[], []>; 345 def ixaddr : ComplexPattern<iPTR, 2, "SelectAddrImmShift", [], []>; // "std" 348 def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>;
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/external/llvm/lib/Target/XCore/ |
D | XCoreInstrInfo.td | 176 def ADDRspii : ComplexPattern<i32, 2, "SelectADDRspii", [add, frameindex], []>; 177 def ADDRdpii : ComplexPattern<i32, 2, "SelectADDRdpii", [add, dprelwrapper], 179 def ADDRcpii : ComplexPattern<i32, 2, "SelectADDRcpii", [add, cprelwrapper],
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 66 def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", [], []>; 67 def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>;
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 180 def addr : ComplexPattern<iPTR, 2, "SelectAddr", [frameindex], []>; 634 // add op with mem ComplexPattern is used and the stack address copy
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeInstrInfo.td | 138 def iaddr : ComplexPattern<i32, 2, "SelectAddrRegImm", [frameindex], []>; 139 def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>;
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/external/llvm/lib/Target/Blackfin/ |
D | BlackfinInstrInfo.td | 120 def ADDRspii : ComplexPattern<i32, 2, "SelectADDRspii", [add, frameindex], []>;
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 98 def addr : ComplexPattern<iPTR, 2, "SelectAddr", [], []>;
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