| /external/javassist/src/main/javassist/bytecode/ |
| D | Opcode.java | 103 int FREM = 114; field
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 147 case ISD::FREM: in LegalizeOp()
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| D | SelectionDAGBuilder.h | 468 void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } in visitFRem()
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| D | LegalizeVectorTypes.cpp | 103 case ISD::FREM: in ScalarizeVectorResult()
492 case ISD::FREM: in SplitVectorResult()
1237 case ISD::FREM: in WidenVectorResult()
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| D | FastISel.cpp | 896 return SelectBinaryOp(I, ISD::FREM); in SelectOperator()
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| D | SelectionDAG.cpp | 2715 case ISD::FREM: in getNode()
2972 case ISD::FREM : in getNode()
2996 case ISD::FREM: in getNode()
3036 case ISD::FREM: in getNode()
5892 case ISD::FREM: return "frem"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 86 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; in SoftenFloatResult()
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| D | TargetLowering.cpp | 642 case ISD::FREM: in canOpTrap()
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| D | DAGCombiner.cpp | 1089 case ISD::FREM: return visitFREM(N); in visit()
5406 return DAG.getNode(ISD::FREM, N->getDebugLoc(), VT, N0, N1); in visitFREM()
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| D | LegalizeDAG.cpp | 3323 case ISD::FREM: in ExpandNode()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 143 setOperationAction(ISD::FREM, MVT::f32, Expand); in SystemZTargetLowering()
144 setOperationAction(ISD::FREM, MVT::f64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 79 setOperationAction(ISD::FREM, MVT::f32, Expand); in AlphaTargetLowering()
80 setOperationAction(ISD::FREM, MVT::f64, Expand); in AlphaTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 756 setOperationAction(ISD::FREM , MVT::f64, Expand); in SparcTargetLowering()
760 setOperationAction(ISD::FREM , MVT::f32, Expand); in SparcTargetLowering()
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| /external/javassist/src/main/javassist/bytecode/analysis/ |
| D | Executor.java | 360 case FREM: in execute()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 71 setOperationAction(ISD::FREM, MVT::f32, Expand); in MBlazeTargetLowering()
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| /external/javassist/src/main/javassist/compiler/ |
| D | CodeGen.java | 938 '%', DREM, FREM, LREM, IREM,
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 213 setOperationAction(ISD::FREM , MVT::f64, Expand); in SPUTargetLowering()
216 setOperationAction(ISD::FREM , MVT::f32, Expand); in SPUTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 355 def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 155 setOperationAction(ISD::FREM, VT.getSimpleVT(), Expand); in addTypeForNEON()
454 setOperationAction(ISD::FREM, MVT::v2f64, Expand); in ARMTargetLowering()
702 setOperationAction(ISD::FREM, MVT::f64, Expand); in ARMTargetLowering()
703 setOperationAction(ISD::FREM, MVT::f32, Expand); in ARMTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 126 setOperationAction(ISD::FREM , MVT::f64, Expand); in PPCTargetLowering()
131 setOperationAction(ISD::FREM , MVT::f32, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 415 setOperationAction(ISD::FREM , MVT::f32 , Expand); in X86TargetLowering()
416 setOperationAction(ISD::FREM , MVT::f64 , Expand); in X86TargetLowering()
417 setOperationAction(ISD::FREM , MVT::f80 , Expand); in X86TargetLowering()
724 setOperationAction(ISD::FREM, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
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