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Searched refs:MIOperandInfo (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/Target/SystemZ/
DSystemZOperands.td293 let MIOperandInfo = (ops ADDR64:$base, u12imm:$disp);
299 let MIOperandInfo = (ops ADDR64:$base, u12imm64:$disp);
305 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp);
314 let MIOperandInfo = (ops ADDR64:$base, u12imm64:$disp, ADDR64:$index);
319 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index);
324 let MIOperandInfo = (ops ADDR64:$base, s20imm64:$disp, ADDR64:$index);
/external/llvm/lib/Target/CellSPU/
DSPUOperands.td580 let MIOperandInfo = (ops u18imm:$calldest);
586 let MIOperandInfo = (ops s16imm:$calldest);
602 let MIOperandInfo = (ops ptr_rc:$calldest);
620 let MIOperandInfo = (ops s7imm:$imm, ptr_rc:$reg);
626 let MIOperandInfo = (ops s10imm:$imm, ptr_rc:$reg);
634 let MIOperandInfo = (ops s16imm:$imm, ptr_rc:$reg);
640 let MIOperandInfo = (ops s18imm:$imm, ptr_rc:$reg);
646 let MIOperandInfo = (ops ptr_rc:$reg_a, ptr_rc:$reg_b);
/external/llvm/utils/TableGen/
DCodeGenInstruction.h101 DagInit *MIOperandInfo; member
112 MIOperandInfo(MIOI) {} in OperandInfo()
DCodeGenInstruction.cpp185 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; in ParseOperandName()
526 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
DInstrInfoEmitter.cpp64 DagInit *MIOI = Inst.Operands[i].MIOperandInfo; in GetOperandInfo()
DAsmMatcherEmitter.cpp872 Rec = dynamic_cast<DefInit*>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); in getOperandClass()
/external/llvm/lib/Target/ARM/
DARMInstrThumb.td117 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
126 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
133 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
140 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg);
150 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
160 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
170 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm);
180 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
DARMInstrInfo.td433 let MIOperandInfo = (ops GPR, GPR, shift_imm);
441 let MIOperandInfo = (ops GPR, GPR, shift_imm);
561 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
570 let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
581 let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
589 let MIOperandInfo = (ops GPR, i32imm);
600 let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
608 let MIOperandInfo = (ops GPR, i32imm);
628 let MIOperandInfo = (ops GPR:$base, i32imm);
638 let MIOperandInfo = (ops GPR:$addr, i32imm);
[all …]
DARMInstrThumb2.td31 let MIOperandInfo = (ops rGPR, i32imm);
103 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
124 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
140 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
153 let MIOperandInfo = (ops GPR:$base, rGPR:$offsreg, i32imm:$offsimm);
163 let MIOperandInfo = (ops GPR);
/external/llvm/lib/Target/PTX/
DPTXInstrInfo.td146 let MIOperandInfo = (ops RegI32, i32imm);
150 let MIOperandInfo = (ops RegI64, i64imm);
154 let MIOperandInfo = (ops i32imm, i32imm);
158 let MIOperandInfo = (ops i64imm, i64imm);
164 let MIOperandInfo = (ops i32imm);
168 let MIOperandInfo = (ops i32imm);
/external/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td169 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
175 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
DX86InstrInfo.td250 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
277 let MIOperandInfo = (ops GR64_NOREX, i8imm, GR64_NOREX_NOSP, i32imm, i8imm);
291 let MIOperandInfo = (ops GR32_TC, i8imm, GR32_TC, i32imm, i8imm);
301 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm,
402 let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm, i8imm);
/external/llvm/include/llvm/Target/
DTarget.td508 dag MIOperandInfo = (ops);
555 /// instruction. OpTypes specifies the MIOperandInfo for the operand, and
560 let MIOperandInfo = OpTypes;
569 let MIOperandInfo = OpTypes;
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td318 let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg);
323 let MIOperandInfo = (ops ptr_rc, ptr_rc);
327 let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg);
331 let MIOperandInfo = (ops i32imm:$imm);
/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.td72 let MIOperandInfo = (ops IntRegs, IntRegs);
76 let MIOperandInfo = (ops IntRegs, i32imm);
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td140 let MIOperandInfo = (ops CPURegs, simm16);
145 let MIOperandInfo = (ops CPURegs, simm16);
/external/llvm/lib/Target/MBlaze/
DMBlazeInstrInfo.td103 let MIOperandInfo = (ops GPR, simm16);
109 let MIOperandInfo = (ops GPR, GPR);
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td76 let MIOperandInfo = (ops GR16, i16imm);
81 let MIOperandInfo = (ops GR16, i16imm);
/external/llvm/lib/Target/Blackfin/
DBlackfinInstrInfo.td125 let MIOperandInfo = (ops i32imm, i32imm);
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td185 let MIOperandInfo = (ops i32imm, i32imm);