Searched refs:SETUNE (Results 1 – 18 of 18) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 718 SETUNE, // 1 1 1 0 True if unordered or not equal enumerator
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/external/llvm/lib/Target/Alpha/ |
D | AlphaISelDAGToDAG.cpp | 322 case ISD::SETNE: case ISD::SETONE: case ISD::SETUNE: in Select() 338 case ISD::SETUNE: case ISD::SETUGT: case ISD::SETUGE: in Select()
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/external/llvm/lib/Target/CellSPU/ |
D | README.txt | 80 SETUNE unimplemented
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D | SPUISelLowering.cpp | 2599 case ISD::SETUNE: in LowerSETCC()
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 168 case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break; in getFCmpCondCode()
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeInstrFPU.td | 185 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETUNE),
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 554 case ISD::SETUNE: in getPredicateForSetCC() 594 case ISD::SETUNE: in getCRIdxForSetCC()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 475 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode; 776 (setcc node:$lhs, node:$rhs, SETUNE)>;
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 629 case ISD::SETUNE: in EmitCmp()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 621 case ISD::SETUNE: in SoftenSetCCOperands() 1309 LHSHi, RHSHi, ISD::SETUNE); in FloatExpandSetCCOperands()
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D | SelectionDAG.cpp | 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT in getSetCCOrOperation() 1478 case ISD::SETUNE: in FoldSetCC() 1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); in FoldSetCC() 6007 case ISD::SETUNE: return "setune"; in getOperationName()
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D | TargetLowering.cpp | 2368 if (Cond == ISD::SETUNE && in SimplifySetCC() 2381 if (Cond == ISD::SETUNE && in SimplifySetCC()
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D | LegalizeDAG.cpp | 1967 case ISD::SETUNE: CC1 = ISD::SETNE; CC2 = ISD::SETUO; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
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/external/llvm/lib/Target/PTX/ |
D | PTXInstrInfo.td | 748 defm SETPNEf32 : PTX_SETP_FP<RegF32, "f32", SETUNE, SETONE, "ne">; 757 defm SETPNEf64 : PTX_SETP_FP<RegF64, "f64", SETUNE, SETONE, "ne">;
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 669 case ISD::SETUNE: return SPCC::FCC_NE; in FPCondCCodeToFCC()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1041 case ISD::SETUNE: CondCode = ARMCC::NE; break; in FPCCToARMCC() 2867 else if (CC == ISD::SETUNE) in OptimizeVFPBrcond() 2914 CC == ISD::SETNE || CC == ISD::SETUNE)) { in LowerBR_CC() 3405 case ISD::SETUNE: in LowerVSETCC()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 409 case ISD::SETUNE: return Mips::FCOND_UNE; in FPCondCCodeToFCC()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 286 setCondCodeAction(ISD::SETUNE, MVT::f32, Expand); in X86TargetLowering() 287 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in X86TargetLowering() 288 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand); in X86TargetLowering() 2989 case ISD::SETUNE: return X86::COND_INVALID; in TranslateX86CC() 7596 case ISD::SETUNE: in LowerVSETCC()
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