| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
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| /external/llvm/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 82 setOperationAction(ISD::SREM, MVT::i16, Expand); in BlackfinTargetLowering()
83 setOperationAction(ISD::SREM, MVT::i32, Expand); in BlackfinTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 141 case ISD::SREM: in LegalizeOp()
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| D | SelectionDAGBuilder.h | 467 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } in visitSRem()
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| D | LegalizeVectorTypes.cpp | 108 case ISD::SREM: in ScalarizeVectorResult()
491 case ISD::SREM: in SplitVectorResult()
1244 case ISD::SREM: in WidenVectorResult()
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| D | SelectionDAG.cpp | 1987 case ISD::SREM: in ComputeMaskedBits()
2635 case ISD::SREM: in FoldConstantArithmetic()
2706 case ISD::SREM: in getNode()
3002 case ISD::SREM: in getNode()
3030 case ISD::SREM: in getNode()
5873 case ISD::SREM: return "srem"; in getOperationName()
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| D | FastISel.cpp | 892 return SelectBinaryOp(I, ISD::SREM); in SelectOperator()
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| D | LegalizeDAG.cpp | 2320 OtherOpcode = isDIV ? ISD::SREM : ISD::SDIV; in UseDivRem()
3375 case ISD::SREM: { in ExpandNode()
3378 bool isSigned = Node->getOpcode() == ISD::SREM; in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 105 case ISD::SREM: Res = PromoteIntRes_SDIV(N); break; in PromoteIntegerResult()
1053 case ISD::SREM: ExpandIntRes_SREM(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | DAGCombiner.cpp | 1056 case ISD::SREM: return visitSREM(N); in visit()
1894 return DAG.FoldConstantArithmetic(ISD::SREM, VT, N0C, N1C); in visitSREM()
2191 SDValue Res = SimplifyNodeWithTwoResults(N, ISD::SDIV, ISD::SREM); in visitSDIVREM()
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| D | TargetLowering.cpp | 645 case ISD::SREM: in canOpTrap()
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 96 setOperationAction(ISD::SREM , MVT::i64, Custom); in AlphaTargetLowering()
673 case ISD::SREM: in LowerOperation()
694 case ISD::SREM: opstr = "__remq"; break; in LowerOperation()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 101 setOperationAction(ISD::SREM, MVT::i32, Expand); in SystemZTargetLowering()
103 setOperationAction(ISD::SREM, MVT::i64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 179 setOperationAction(ISD::SREM, MVT::i8, Expand); in SPUTargetLowering()
185 setOperationAction(ISD::SREM, MVT::i16, Expand); in SPUTargetLowering()
191 setOperationAction(ISD::SREM, MVT::i32, Expand); in SPUTargetLowering()
197 setOperationAction(ISD::SREM, MVT::i64, Expand); in SPUTargetLowering()
203 setOperationAction(ISD::SREM, MVT::i128, Expand); in SPUTargetLowering()
419 setOperationAction(ISD::SREM, VT, Expand); in SPUTargetLowering()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 157 setOperationAction(ISD::SREM, MVT::i8, Expand); in MSP430TargetLowering()
163 setOperationAction(ISD::SREM, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 101 setOperationAction(ISD::SREM, MVT::i32, Expand); in MBlazeTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 716 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 313 def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 108 setOperationAction(ISD::SREM, MVT::i32, Expand); in PPCTargetLowering()
110 setOperationAction(ISD::SREM, MVT::i64, Expand); in PPCTargetLowering()
319 setOperationAction(ISD::SREM, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 116 setOperationAction(ISD::SREM, MVT::i32, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 153 setOperationAction(ISD::SREM, VT.getSimpleVT(), Expand); in addTypeForNEON()
571 setOperationAction(ISD::SREM, MVT::i32, Expand); in ARMTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 395 setOperationAction(ISD::SREM, VT, Expand); in X86TargetLowering()
713 setOperationAction(ISD::SREM, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
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