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Searched refs:TSFlags (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86MCCodeEmitter.cpp113 uint64_t TSFlags, unsigned &CurByte, raw_ostream &OS,
119 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
123 void EmitSegmentOverridePrefix(uint64_t TSFlags, unsigned &CurByte,
127 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
149 static MCFixupKind getImmFixupKind(uint64_t TSFlags) { in getImmFixupKind() argument
150 unsigned Size = X86II::getSizeOfImm(TSFlags); in getImmFixupKind()
151 bool isPCRel = X86II::isImmPCRel(TSFlags); in getImmFixupKind()
237 uint64_t TSFlags, unsigned &CurByte, in EmitMemModRMByte() argument
265 int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0; in EmitMemModRMByte()
380 void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, in EmitVEXOpcodePrefix() argument
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DX86CodeEmitter.cpp154 if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo) in determineREX()
156 if (Desc.TSFlags & X86II::REX_W) in determineREX()
175 switch (Desc.TSFlags & X86II::FormMask) { in determineREX()
616 if (Desc->TSFlags & X86II::LOCK) in emitInstruction()
620 switch (Desc->TSFlags & X86II::SegOvrMask) { in emitInstruction()
632 if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) in emitInstruction()
636 if (Desc->TSFlags & X86II::OpSize) in emitInstruction()
640 if (Desc->TSFlags & X86II::AdSize) in emitInstruction()
644 switch (Desc->TSFlags & X86II::Op0Mask) { in emitInstruction()
668 (((Desc->TSFlags & X86II::Op0Mask)-X86II::D8) in emitInstruction()
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DX86InstrInfo.h493 static inline unsigned char getBaseOpcodeFor(uint64_t TSFlags) { in getBaseOpcodeFor() argument
494 return TSFlags >> X86II::OpcodeShift; in getBaseOpcodeFor()
497 static inline bool hasImm(uint64_t TSFlags) { in hasImm() argument
498 return (TSFlags & X86II::ImmMask) != 0; in hasImm()
503 static inline unsigned getSizeOfImm(uint64_t TSFlags) { in getSizeOfImm() argument
504 switch (TSFlags & X86II::ImmMask) { in getSizeOfImm()
518 static inline unsigned isImmPCRel(uint64_t TSFlags) { in isImmPCRel() argument
519 switch (TSFlags & X86II::ImmMask) { in isImmPCRel()
541 static inline int getMemoryOperandNo(uint64_t TSFlags) { in getMemoryOperandNo() argument
542 switch (TSFlags & X86II::FormMask) { in getMemoryOperandNo()
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DX86InstrFormats.td155 // TSFlags layout should be kept in sync with X86InstrInfo.h.
156 let TSFlags{5-0} = FormBits;
157 let TSFlags{6} = hasOpSizePrefix;
158 let TSFlags{7} = hasAdSizePrefix;
159 let TSFlags{12-8} = Prefix;
160 let TSFlags{13} = hasREX_WPrefix;
161 let TSFlags{16-14} = ImmT.Value;
162 let TSFlags{19-17} = FPForm.Value;
163 let TSFlags{20} = hasLockPrefix;
164 let TSFlags{22-21} = SegOvrBits;
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/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassemblerCore.h170 static inline bool isUnaryDP(uint64_t TSFlags) { in isUnaryDP() argument
171 return (TSFlags & ARMII::UnaryDP); in isUnaryDP()
175 static inline bool isNEONDomain(uint64_t TSFlags) { in isNEONDomain() argument
176 return (TSFlags & ARMII::DomainNEON) || in isNEONDomain()
177 (TSFlags & ARMII::DomainNEONA8); in isNEONDomain()
182 static inline unsigned getAddrMode(uint64_t TSFlags) { in getAddrMode() argument
183 return (TSFlags & ARMII::AddrModeMask); in getAddrMode()
189 static inline unsigned getIndexMode(uint64_t TSFlags) { in getIndexMode() argument
190 return (TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in getIndexMode()
194 static inline bool isPrePostLdSt(uint64_t TSFlags) { in isPrePostLdSt() argument
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DARMDisassemblerCore.cpp746 (MCID.TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in DisassembleCoprocessor()
983 bool isUnary = isUnaryDP(MCID.TSFlags); in DisassembleDPFrm()
1096 bool isUnary = isUnaryDP(MCID.TSFlags); in DisassembleDPSoRegFrm()
1250 bool isPrePost = isPrePostLdSt(MCID.TSFlags); in DisassembleLdStFrm()
1313 (MCID.TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in DisassembleLdStFrm()
1385 bool isPrePost = isPrePostLdSt(MCID.TSFlags); in DisassembleLdStMiscFrm()
1456 (MCID.TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in DisassembleLdStMiscFrm()
3639 uint64_t TSFlags = ARMInsts[Opcode].TSFlags; in TryPredicateAndSBitModifier() local
3674 if (!isNEONDomain(TSFlags) && getCondField(insn) == 0xF) in TryPredicateAndSBitModifier()
/external/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp81 uint64_t TSFlags = MCID.TSFlags; in GetInstrType() local
83 isFirst = TSFlags & PPCII::PPC970_First; in GetInstrType()
84 isSingle = TSFlags & PPCII::PPC970_Single; in GetInstrType()
85 isCracked = TSFlags & PPCII::PPC970_Cracked; in GetInstrType()
86 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask); in GetInstrType()
DPPCInstrFormats.td34 let TSFlags{0} = PPC970_First;
35 let TSFlags{1} = PPC970_Single;
36 let TSFlags{2} = PPC970_Cracked;
37 let TSFlags{5-3} = PPC970_Unit;
/external/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
47 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
54 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) { in getHazardType()
DARMCodeEmitter.cpp466 unsigned Reloc = ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm) in getMachineOpValue()
546 switch (MI.getDesc().TSFlags & ARMII::FormMask) { in emitInstruction()
1153 bool isUnary = MCID.TSFlags & ARMII::UnaryDP; in emitDataProcessingInstruction()
1166 if ((MCID.TSFlags & ARMII::FormMask) == ARMII::DPSoRegFrm) { in emitDataProcessingInstruction()
1188 unsigned Form = MCID.TSFlags & ARMII::FormMask; in emitLoadStoreInstruction()
1189 bool IsPrePost = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitLoadStoreInstruction()
1272 unsigned Form = MCID.TSFlags & ARMII::FormMask; in emitMiscLoadStoreInstruction()
1273 bool IsPrePost = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitMiscLoadStoreInstruction()
1357 bool IsUpdating = (MCID.TSFlags & ARMII::IndexModeMask) != 0; in emitLoadStoreMultipleInstruction()
1710 if ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPBinaryFrm) in emitVFPArithInstruction()
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DMLxExpansionPass.cpp141 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
284 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in ExpandFPMLxInstructions()
DNEONMoveFix.cpp72 Domain = DefMI->second->getDesc().TSFlags & ARMII::DomainMask; in InsertMoves()
DARMBaseInstrInfo.cpp123 uint64_t TSFlags = MI->getDesc().TSFlags; in convertToThreeAddress() local
125 switch ((TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift) { in convertToThreeAddress()
142 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in convertToThreeAddress()
506 if ((MCID.TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) { in isPredicable()
1366 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteARMFrameIndex()
2540 unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask; in hasHighOperandLatency()
2541 unsigned UDomain = UseMI->getDesc().TSFlags & ARMII::DomainMask; in hasHighOperandLatency()
2561 unsigned DDomain = DefMI->getDesc().TSFlags & ARMII::DomainMask; in hasLowDefLatency()
DARMBaseRegisterInfo.cpp948 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in getFrameIndexInstrOffset()
1138 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in isFrameOffsetLegal()
1249 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4 || in eliminateFrameIndex()
1250 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode6) && in eliminateFrameIndex()
DARMMCCodeEmitter.cpp1293 uint64_t TSFlags = Desc.TSFlags; in EncodeInstruction() local
1294 if ((TSFlags & ARMII::FormMask) == ARMII::Pseudo) in EncodeInstruction()
DARMInstrFormats.td247 // The layout of TSFlags should be kept in sync with ARMBaseInstrInfo.h.
248 let TSFlags{4-0} = AM.Value;
249 let TSFlags{6-5} = IndexModeBits;
250 let TSFlags{12-7} = Form;
251 let TSFlags{13} = isUnaryDataProc;
252 let TSFlags{14} = canXformTo16Bit;
253 let TSFlags{17-15} = D.Value;
DThumb2InstrInfo.cpp389 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteT2FrameIndex()
DThumb1RegisterInfo.cpp397 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); in rewriteFrameIndex()
/external/llvm/lib/Target/MBlaze/
DMBlazeMCCodeEmitter.cpp182 uint64_t TSFlags = Desc.TSFlags; in EncodeInstruction() local
189 switch ((TSFlags & MBlazeII::FormMask)) { in EncodeInstruction()
DMBlazeInstrFormats.td76 // TSFlags layout should be kept in sync with MBlazeInstrInfo.h.
77 let TSFlags{5-0} = FormBits;
/external/llvm/include/llvm/MC/
DMCInstrDesc.h140 uint64_t TSFlags; // Target Specific Flag values variable
/external/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td68 let TSFlags{1-0} = Form.Value;
69 let TSFlags{4-2} = Sz.Value;
DMSP430InstrInfo.cpp301 switch (Desc.TSFlags & MSP430II::SizeMask) { in GetInstSizeInBytes()
/external/llvm/lib/Target/MBlaze/Disassembler/
DMBlazeDisassembler.cpp529 uint64_t tsFlags = MBlazeInsts[opcode].TSFlags; in getInstruction()
/external/llvm/include/llvm/Target/
DTarget.td374 /// Target-specific flags. This becomes the TSFlags field in TargetInstrDesc.
375 bits<64> TSFlags = 0;

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