| /external/openssl/crypto/bn/asm/ |
| D | ppc.pl | 116 $UDIV= "divwu"; # unsigned divide
140 $UDIV= "divdu"; # unsigned divide
1660 $UDIV r8,r3,r9 #q = h/dh
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 148 case ISD::UDIV: { in Select()
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| D | SparcInstrInfo.td | 495 defm UDIV : F3_12np<"udiv", 0b001110>;
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| /external/llvm/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 84 setOperationAction(ISD::UDIV, MVT::i16, Expand); in BlackfinTargetLowering()
85 setOperationAction(ISD::UDIV, MVT::i32, Expand); in BlackfinTargetLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 140 case ISD::UDIV: in LegalizeOp()
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| D | SelectionDAGBuilder.h | 469 void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } in visitUDiv()
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| D | FastISel.cpp | 888 return SelectBinaryOp(I, ISD::UDIV); in SelectOperator()
1057 } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) { in FastEmit_ri_()
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| D | LegalizeVectorTypes.cpp | 110 case ISD::UDIV: in ScalarizeVectorResult()
481 case ISD::UDIV: in SplitVectorResult()
1245 case ISD::UDIV: in WidenVectorResult()
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| D | SelectionDAG.cpp | 1669 case ISD::UDIV: { in ComputeMaskedBits()
2626 case ISD::UDIV: in FoldConstantArithmetic()
2700 case ISD::UDIV: in getNode()
2999 case ISD::UDIV: in getNode()
3027 case ISD::UDIV: in getNode()
5872 case ISD::UDIV: return "udiv"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 107 case ISD::UDIV: in PromoteIntegerResult()
1055 case ISD::UDIV: ExpandIntRes_UDIV(N, Lo, Hi); break; in ExpandIntegerResult()
2198 SDValue DIV = DAG.getNode(ISD::UDIV, DL, LHS.getValueType(), MUL, NotZero); in ExpandIntRes_XMULO()
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| D | DAGCombiner.cpp | 1055 case ISD::UDIV: return visitUDIV(N); in visit()
1773 return DAG.getNode(ISD::UDIV, N->getDebugLoc(), N1.getValueType(), in visitSDIV()
1848 return DAG.FoldConstantArithmetic(ISD::UDIV, VT, N0C, N1C); in visitUDIV()
1958 SDValue Div = DAG.getNode(ISD::UDIV, N->getDebugLoc(), VT, N0, N1); in visitUREM()
2198 SDValue Res = SimplifyNodeWithTwoResults(N, ISD::UDIV, ISD::UREM); in visitUDIVREM()
7219 if (N->getOpcode() == ISD::SDIV || N->getOpcode() == ISD::UDIV || in SimplifyVBinOp()
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| D | LegalizeDAG.cpp | 2322 OtherOpcode = isDIV ? ISD::UREM : ISD::UDIV; in UseDivRem()
3379 unsigned DivOpc = isSigned ? ISD::SDIV : ISD::UDIV; in ExpandNode()
3405 case ISD::UDIV: in ExpandNode()
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| D | TargetLowering.cpp | 644 case ISD::UDIV: in canOpTrap()
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 99 setOperationAction(ISD::UDIV , MVT::i64, Custom); in AlphaTargetLowering()
686 case ISD::UDIV: in LowerOperation()
695 case ISD::UDIV: opstr = "__divqu"; break; in LowerOperation()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 98 setOperationAction(ISD::UDIV, MVT::i32, Expand); in SystemZTargetLowering()
100 setOperationAction(ISD::UDIV, MVT::i64, Expand); in SystemZTargetLowering()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 182 setOperationAction(ISD::UDIV, MVT::i8, Expand); in SPUTargetLowering()
188 setOperationAction(ISD::UDIV, MVT::i16, Expand); in SPUTargetLowering()
194 setOperationAction(ISD::UDIV, MVT::i32, Expand); in SPUTargetLowering()
200 setOperationAction(ISD::UDIV, MVT::i64, Expand); in SPUTargetLowering()
206 setOperationAction(ISD::UDIV, MVT::i128, Expand); in SPUTargetLowering()
420 setOperationAction(ISD::UDIV, VT, Expand); in SPUTargetLowering()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 152 setOperationAction(ISD::UDIV, MVT::i8, Expand); in MSP430TargetLowering()
158 setOperationAction(ISD::UDIV, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 120 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MBlazeTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 151 setOperationAction(ISD::UDIV, VT.getSimpleVT(), Expand); in addTypeForNEON()
486 setOperationAction(ISD::UDIV, MVT::v4i16, Custom); in ARMTargetLowering()
487 setOperationAction(ISD::UDIV, MVT::v8i8, Custom); in ARMTargetLowering()
569 setOperationAction(ISD::UDIV, MVT::i32, Expand); in ARMTargetLowering()
4867 case ISD::UDIV: return LowerUDIV(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 577 def UDIV : Div<MipsDivRemU, 0x1b, "divu", IIIdiv>;
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| D | MipsISelLowering.cpp | 117 setOperationAction(ISD::UDIV, MVT::i32, Expand); in MipsTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 312 def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 320 setOperationAction(ISD::UDIV, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 394 setOperationAction(ISD::UDIV, VT, Expand); in X86TargetLowering()
711 setOperationAction(ISD::UDIV, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
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