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Searched refs:isBarrier (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/include/llvm/MC/
DMCInstrDesc.h288 bool isBarrier() const { in isBarrier() function
321 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch()
329 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch()
/external/llvm/lib/Target/X86/
DX86InstrControl.td19 let isTerminator = 1, isReturn = 1, isBarrier = 1,
41 let isBarrier = 1, isBranch = 1, isTerminator = 1 in {
100 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
178 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
277 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
/external/llvm/lib/Target/ARM/
DARMHazardRecognizer.cpp51 if (!LastMCID.isBarrier() && in getHazardType()
DARMInstrThumb.td364 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
374 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
467 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
530 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
569 let isBarrier = 1, isTerminator = 1 in
1245 hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1 in
1251 let isBarrier = 1, hasSideEffects = 1, isTerminator = 1, isCodeGenOnly = 1,
1370 let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
1377 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
DMLxExpansionPass.cpp277 if (MCID.isBarrier()) { in ExpandFPMLxInstructions()
DARMInstrInfo.td1306 let isBarrier = 1, isTerminator = 1 in
1381 let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
1398 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
1528 let isBarrier = 1 in {
1555 } // isBarrier = 1
1581 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
2069 let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
3858 QQQQ0, QQQQ1, QQQQ2, QQQQ3 ], hasSideEffects = 1, isBarrier = 1 in {
3867 hasSideEffects = 1, isBarrier = 1 in {
3875 let isBarrier = 1, hasSideEffects = 1, isTerminator = 1,
[all …]
/external/llvm/lib/Target/
DTargetInstrInfo.cpp137 if (MCID.isBranch() && !MCID.isBarrier()) in isUnpredicatedTerminator()
/external/llvm/lib/Target/MBlaze/
DMBlazeInstrInfo.td484 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
499 isBarrier = 1 in {
514 isBarrier = 1 in {
529 hasDelaySlot = 1, hasCtrlDep = 1, isBarrier = 1 in {
558 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
566 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
574 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
582 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1,
DMBlazeDelaySlotFiller.cpp216 desc.isCall() || desc.isReturn() || desc.isBarrier() || in findDelayInstr()
DMBlazeAsmPrinter.cpp318 return I == Pred->end() || !I->getDesc().isBarrier(); in isBlockOnlyReachableByFallthrough()
/external/llvm/lib/CodeGen/
DMachineVerifier.cpp434 if (!MBB->empty() && MBB->back().getDesc().isBarrier() && in visitMachineBasicBlockBefore()
455 } else if (!MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore()
478 } else if (MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore()
498 } else if (!MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore()
DBranchFolding.cpp553 !MBB1->back().getDesc().isBarrier() && in ProfitableToMerge()
554 !MBB2->back().getDesc().isBarrier()) in ProfitableToMerge()
DScheduleDAGInstrs.cpp159 (ExitMI->getDesc().isCall() || ExitMI->getDesc().isBarrier()); in AddSchedBarrierDeps()
DMachineBasicBlock.cpp481 return empty() || !back().getDesc().isBarrier() || in canFallThrough()
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td175 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
181 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
186 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
192 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
205 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
212 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
DPPCInstrInfo.td405 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in {
419 let isBarrier = 1 in {
485 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
492 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
497 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
503 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
511 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
518 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in
644 let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
/external/llvm/lib/Target/Sparc/
DSparcAsmPrinter.cpp242 return I == Pred->end() || !I->getDesc().isBarrier(); in isBlockOnlyReachableByFallthrough()
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td661 let isReturn = 1, isTerminator = 1, mayLoad = 1, isBarrier = 1 in {
668 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
712 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in {
952 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
957 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
962 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
1023 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
/external/llvm/utils/TableGen/
DCodeGenInstruction.h225 bool isBarrier; variable
DInstrInfoEmitter.cpp277 if (Inst.isBarrier) OS << "|(1<<MCID::Barrier)"; in emitRecord()
DCodeGenInstruction.cpp299 isBarrier = R->getValueAsBit("isBarrier"); in CodeGenInstruction()
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.cpp168 if (MCID.isBranch() && !MCID.isBarrier()) in isUnpredicatedTerminator()
/external/llvm/lib/Target/Mips/
DMipsAsmPrinter.cpp261 return !I->getDesc().isBarrier(); in isBlockOnlyReachableByFallthrough()
DMipsInstrInfo.td309 let isBranch=1, isTerminator=1, isBarrier=1, hasDelaySlot = 1 in
314 let isBranch=1, isTerminator=1, isBarrier=1, rd=0, hasDelaySlot = 1 in
569 isBarrier=1, hasCtrlDep=1, rs=0, rt=0, shamt=0 in
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp210 if (MCID.isBranch() && !MCID.isBarrier()) in isUnpredicatedTerminator()

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