1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 **************************************************************************** 11 ****************************************************************************/ 12 #ifndef _LINUX_PERF_EVENT_H 13 #define _LINUX_PERF_EVENT_H 14 15 #include <linux/types.h> 16 #include <linux/ioctl.h> 17 #include <asm/byteorder.h> 18 19 enum perf_type_id { 20 PERF_TYPE_HARDWARE = 0, 21 PERF_TYPE_SOFTWARE = 1, 22 PERF_TYPE_TRACEPOINT = 2, 23 PERF_TYPE_HW_CACHE = 3, 24 PERF_TYPE_RAW = 4, 25 PERF_TYPE_BREAKPOINT = 5, 26 27 PERF_TYPE_MAX, 28 }; 29 30 enum perf_hw_id { 31 32 PERF_COUNT_HW_CPU_CYCLES = 0, 33 PERF_COUNT_HW_INSTRUCTIONS = 1, 34 PERF_COUNT_HW_CACHE_REFERENCES = 2, 35 PERF_COUNT_HW_CACHE_MISSES = 3, 36 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 37 PERF_COUNT_HW_BRANCH_MISSES = 5, 38 PERF_COUNT_HW_BUS_CYCLES = 6, 39 40 PERF_COUNT_HW_MAX, 41 }; 42 43 enum perf_hw_cache_id { 44 PERF_COUNT_HW_CACHE_L1D = 0, 45 PERF_COUNT_HW_CACHE_L1I = 1, 46 PERF_COUNT_HW_CACHE_LL = 2, 47 PERF_COUNT_HW_CACHE_DTLB = 3, 48 PERF_COUNT_HW_CACHE_ITLB = 4, 49 PERF_COUNT_HW_CACHE_BPU = 5, 50 51 PERF_COUNT_HW_CACHE_MAX, 52 }; 53 54 enum perf_hw_cache_op_id { 55 PERF_COUNT_HW_CACHE_OP_READ = 0, 56 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 57 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 58 59 PERF_COUNT_HW_CACHE_OP_MAX, 60 }; 61 62 enum perf_hw_cache_op_result_id { 63 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 64 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 65 66 PERF_COUNT_HW_CACHE_RESULT_MAX, 67 }; 68 69 enum perf_sw_ids { 70 PERF_COUNT_SW_CPU_CLOCK = 0, 71 PERF_COUNT_SW_TASK_CLOCK = 1, 72 PERF_COUNT_SW_PAGE_FAULTS = 2, 73 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 74 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 75 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 76 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 77 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 78 PERF_COUNT_SW_EMULATION_FAULTS = 8, 79 80 PERF_COUNT_SW_MAX, 81 }; 82 83 enum perf_event_sample_format { 84 PERF_SAMPLE_IP = 1U << 0, 85 PERF_SAMPLE_TID = 1U << 1, 86 PERF_SAMPLE_TIME = 1U << 2, 87 PERF_SAMPLE_ADDR = 1U << 3, 88 PERF_SAMPLE_READ = 1U << 4, 89 PERF_SAMPLE_CALLCHAIN = 1U << 5, 90 PERF_SAMPLE_ID = 1U << 6, 91 PERF_SAMPLE_CPU = 1U << 7, 92 PERF_SAMPLE_PERIOD = 1U << 8, 93 PERF_SAMPLE_STREAM_ID = 1U << 9, 94 PERF_SAMPLE_RAW = 1U << 10, 95 96 PERF_SAMPLE_MAX = 1U << 11, 97 }; 98 99 enum perf_event_read_format { 100 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 101 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 102 PERF_FORMAT_ID = 1U << 2, 103 PERF_FORMAT_GROUP = 1U << 3, 104 105 PERF_FORMAT_MAX = 1U << 4, 106 }; 107 108 #define PERF_ATTR_SIZE_VER0 64 109 110 struct perf_event_attr { 111 112 __u32 type; 113 114 __u32 size; 115 116 __u64 config; 117 118 union { 119 __u64 sample_period; 120 __u64 sample_freq; 121 }; 122 123 __u64 sample_type; 124 __u64 read_format; 125 126 __u64 disabled : 1, 127 inherit : 1, 128 pinned : 1, 129 exclusive : 1, 130 exclude_user : 1, 131 exclude_kernel : 1, 132 exclude_hv : 1, 133 exclude_idle : 1, 134 mmap : 1, 135 comm : 1, 136 freq : 1, 137 inherit_stat : 1, 138 enable_on_exec : 1, 139 task : 1, 140 watermark : 1, 141 142 precise_ip : 2, 143 144 __reserved_1 : 47; 145 146 union { 147 __u32 wakeup_events; 148 __u32 wakeup_watermark; 149 }; 150 151 __u32 bp_type; 152 __u64 bp_addr; 153 __u64 bp_len; 154 }; 155 156 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 157 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 158 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 159 #define PERF_EVENT_IOC_RESET _IO ('$', 3) 160 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 161 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 162 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 163 164 enum perf_event_ioc_flags { 165 PERF_IOC_FLAG_GROUP = 1U << 0, 166 }; 167 168 struct perf_event_mmap_page { 169 __u32 version; 170 __u32 compat_version; 171 172 __u32 lock; 173 __u32 index; 174 __s64 offset; 175 __u64 time_enabled; 176 __u64 time_running; 177 178 __u64 __reserved[123]; 179 180 __u64 data_head; 181 __u64 data_tail; 182 }; 183 184 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 185 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 186 #define PERF_RECORD_MISC_KERNEL (1 << 0) 187 #define PERF_RECORD_MISC_USER (2 << 0) 188 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 189 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 190 #define PERF_RECORD_MISC_GUEST_USER (5 << 0) 191 192 #define PERF_RECORD_MISC_EXACT_IP (1 << 14) 193 194 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 195 196 struct perf_event_header { 197 __u32 type; 198 __u16 misc; 199 __u16 size; 200 }; 201 202 enum perf_event_type { 203 204 PERF_RECORD_MMAP = 1, 205 206 PERF_RECORD_LOST = 2, 207 208 PERF_RECORD_COMM = 3, 209 210 PERF_RECORD_EXIT = 4, 211 212 PERF_RECORD_THROTTLE = 5, 213 PERF_RECORD_UNTHROTTLE = 6, 214 215 PERF_RECORD_FORK = 7, 216 217 PERF_RECORD_READ = 8, 218 219 PERF_RECORD_SAMPLE = 9, 220 221 PERF_RECORD_MAX, 222 }; 223 224 enum perf_callchain_context { 225 PERF_CONTEXT_HV = (__u64)-32, 226 PERF_CONTEXT_KERNEL = (__u64)-128, 227 PERF_CONTEXT_USER = (__u64)-512, 228 229 PERF_CONTEXT_GUEST = (__u64)-2048, 230 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 231 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 232 233 PERF_CONTEXT_MAX = (__u64)-4095, 234 }; 235 236 #define PERF_FLAG_FD_NO_GROUP (1U << 0) 237 #define PERF_FLAG_FD_OUTPUT (1U << 1) 238 239 #endif 240 241