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1 /*
2  * Copyright (c) 2008, Google Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *  * Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  *  * Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in
12  *    the documentation and/or other materials provided with the
13  *    distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef __ASM_ARCH_MSM7200_UART_H
30 #define __ASM_ARCH_MSM7200_UART_H
31 
32 #define MSM_UART1_BASE 0xA9A00000
33 #define MSM_UART2_BASE 0xA9B00000
34 #define MSM_UART3_BASE 0xA9C00000
35 
36 #define UART_MR1         0x0000
37 
38 #define UART_MR1_AUTO_RFR_LEVEL0(n) (((n) & 0x3f) << 8)
39 #define UART_MR1_RX_RDY_CTL    (1 << 7)
40 #define UART_MR1_CTS_CTL       (1 << 6)
41 #define UART_MR1_AUTO_RFR_LEVEL1(n) ((n) & 0x3f)
42 
43 #define UART_MR2         0x0004
44 #define UART_MR2_ERROR_MODE        (1 << 6)
45 #define UART_MR2_BITS_PER_CHAR_5   (0 << 4)
46 #define UART_MR2_BITS_PER_CHAR_6   (1 << 4)
47 #define UART_MR2_BITS_PER_CHAR_7   (2 << 4)
48 #define UART_MR2_BITS_PER_CHAR_8   (3 << 4)
49 #define UART_MR2_STOP_BIT_LEN_0563 (0 << 2)
50 #define UART_MR2_STOP_BIT_LEN_1000 (1 << 2)
51 #define UART_MR2_STOP_BIT_LEN_1563 (2 << 2)
52 #define UART_MR2_STOP_BIT_LEN_2000 (3 << 2)
53 #define UART_MR2_PARITY_MODE_NONE  (0)
54 #define UART_MR2_PARITY_MODE_ODD   (1)
55 #define UART_MR2_PARITY_MODE_EVEN  (2)
56 #define UART_MR2_PARITY_MODE_SPACE (3)
57 
58 #define UART_CSR         0x0008
59 #define UART_CSR_115200  0xFF
60 #define UART_CSR_57600   0xEE
61 #define UART_CSR_38400   0xDD
62 #define UART_CSR_19200   0xBB
63 
64 #define UART_TF          0x000C
65 
66 #define UART_CR          0x0010
67 #define UART_CR_CMD_NULL           (0 << 4)
68 #define UART_CR_CMD_RESET_RX       (1 << 4)
69 #define UART_CR_CMD_RESET_TX       (2 << 4)
70 #define UART_CR_CMD_RESET_ERR      (3 << 4)
71 #define UART_CR_CMD_RESET_BCI      (4 << 4)
72 #define UART_CR_CMD_START_BREAK    (5 << 4)
73 #define UART_CR_CMD_STOP_BREAK     (6 << 4)
74 #define UART_CR_CMD_RESET_CTS_N    (7 << 4)
75 #define UART_CR_CMD_PACKET_MODE    (9 << 4)
76 #define UART_CR_CMD_MODE_RESET     (12<< 4)
77 #define UART_CR_CMD_SET_RFR_N      (13<< 4)
78 #define UART_CR_CMD_RESET_RFR_ND   (14<< 4)
79 #define UART_CR_TX_DISABLE         (1 << 3)
80 #define UART_CR_TX_ENABLE          (1 << 3)
81 #define UART_CR_RX_DISABLE         (1 << 3)
82 #define UART_CR_RX_ENABLE          (1 << 3)
83 
84 #define UART_IMR         0x0014
85 #define UART_IMR_RXLEV (1 << 4)
86 #define UART_IMR_TXLEV (1 << 0)
87 
88 #define UART_IPR         0x0018
89 #define UART_TFWR        0x001C
90 #define UART_RFWR        0x0020
91 #define UART_HCR         0x0024
92 
93 #define UART_MREG        0x0028
94 #define UART_NREG        0x002C
95 #define UART_DREG        0x0030
96 #define UART_MNDREG      0x0034
97 #define UART_IRDA        0x0038
98 #define UART_MISR_MODE   0x0040
99 #define UART_MISR_RESET  0x0044
100 #define UART_MISR_EXPORT 0x0048
101 #define UART_MISR_VAL    0x004C
102 #define UART_TEST_CTRL   0x0050
103 
104 #define UART_SR          0x0008
105 #define UART_SR_HUNT_CHAR      (1 << 7)
106 #define UART_SR_RX_BREAK       (1 << 6)
107 #define UART_SR_PAR_FRAME_ERR  (1 << 5)
108 #define UART_SR_OVERRUN        (1 << 4)
109 #define UART_SR_TX_EMPTY       (1 << 3)
110 #define UART_SR_TX_READY       (1 << 2)
111 #define UART_SR_RX_FULL        (1 << 1)
112 #define UART_SR_RX_READY       (1 << 0)
113 
114 #define UART_RF          0x000C
115 #define UART_MISR        0x0010
116 #define UART_ISR         0x0014
117 
118 
119 #endif
120