1/* 2 * Copyright (C) 2008 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <boot/arm.h> 30 31v_reset: 32 b start 33v_undefined: 34 b . 35v_swi: 36 b . 37v_prefetch_abt: 38 b . 39v_data_abt: 40 b . 41v_reserved: 42 b . 43v_irq: 44 b . 45v_fiq: 46 b . 47 48start: 49 /* save registers for main() */ 50 mov r7, r0 51 mov r8, r1 52 mov r9, r2 53 mov r10, r3 54 55 /* init stacks */ 56 ldr r0, =BOOTLOADER_STACK 57 msr cpsr_c, #(PSR_I | PSR_F | PSR_SVC) 58 mov sp, r0 59 60 /* zero the BSS */ 61 ldr r1, =BOOTLOADER_BSS 62 ldr r2, =BOOTLOADER_END 63 mov r0, #0 641: str r0, [r1], #4 65 cmp r1, r2 66 ble 1b 67 68 bl periph_2gb_open 69 70 /* restore registers for main() */ 71 mov r0, r7 72 mov r1, r8 73 mov r2, r9 74 mov r3, r10 75 76 ldr r4, =_main 77 blx r4 78 b . 79