1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd"> 2 3<html> 4 5<head> 6<title>Bytecode for the Dalvik VM</title> 7<link rel=stylesheet href="dalvik-bytecode.css"> 8</head> 9 10<body> 11 12<h1>Bytecode for the Dalvik VM</h1> 13<p>Copyright © 2007 The Android Open Source Project 14 15<h2>General Design</h2> 16 17<ul> 18<li>The machine model and calling conventions are meant to approximately 19 imitate common real architectures and C-style calling conventions: 20 <ul> 21 <li>The VM is register-based, and frames are fixed in size upon creation. 22 Each frame consists of a particular number of registers (specified by 23 the method) as well as any adjunct data needed to execute the method, 24 such as (but not limited to) the program counter and a reference to the 25 <code>.dex</code> file that contains the method. 26 </li> 27 <li>When used for bit values (such as integers and floating point 28 numbers), registers are considered 32 bits wide. Adjacent register 29 pairs are used for 64-bit values. There is no alignment requirement 30 for register pairs. 31 </li> 32 <li>When used for object references, registers are considered wide enough 33 to hold exactly one such reference. 34 </li> 35 <li>In terms of bitwise representation, <code>(Object) null == (int) 36 0</code>. 37 </li> 38 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers 39 of the method's invocation frame, in order. Wide arguments consume 40 two registers. Instance methods are passed a <code>this</code> reference 41 as their first argument. 42 </li> 43 </ul> 44<li>The storage unit in the instruction stream is a 16-bit unsigned quantity. 45 Some bits in some instructions are ignored / must-be-zero. 46</li> 47<li>Instructions aren't gratuitously limited to a particular type. For 48 example, instructions that move 32-bit register values without interpretation 49 don't have to specify whether they are moving ints or floats. 50</li> 51<li>There are separately enumerated and indexed constant pools for 52 references to strings, types, fields, and methods. 53</li> 54<li>Bitwise literal data is represented in-line in the instruction stream.</li> 55<li>Because, in practice, it is uncommon for a method to need more than 56 16 registers, and because needing more than eight registers <i>is</i> 57 reasonably common, many instructions are limited to only addressing 58 the first 16 59 registers. When reasonably possible, instructions allow references to 60 up to the first 256 registers. In addition, some instructions have variants 61 that allow for much larger register counts, including a pair of catch-all 62 <code>move</code> instructions that can address registers in the range 63 <code>v0</code> – <code>v65535</code>. 64 In cases where an instruction variant isn't 65 available to address a desired register, it is expected that the register 66 contents get moved from the original register to a low register (before the 67 operation) and/or moved from a low result register to a high register 68 (after the operation). 69</li> 70<li>There are several "pseudo-instructions" that are used to hold 71 variable-length data payloads, which are referred to by regular 72 instructions (for example, 73 <code>fill-array-data</code>). Such instructions must never be 74 encountered during the normal flow of execution. In addition, the 75 instructions must be located on even-numbered bytecode offsets (that is, 76 4-byte aligned). In order to meet this requirement, dex generation tools 77 must emit an extra <code>nop</code> instruction as a spacer if such an 78 instruction would otherwise be unaligned. Finally, though not required, 79 it is expected that most tools will choose to emit these instructions at 80 the ends of methods, since otherwise it would likely be the case that 81 additional instructions would be needed to branch around them. 82</li> 83<li>When installed on a running system, some instructions may be altered, 84 changing their format, as an install-time static linking optimization. 85 This is to allow for faster execution once linkage is known. 86 See the associated 87 <a href="instruction-formats.html">instruction formats document</a> 88 for the suggested variants. The word "suggested" is used advisedly; 89 it is not mandatory to implement these. 90</li> 91<li>Human-syntax and mnemonics: 92 <ul> 93 <li>Dest-then-source ordering for arguments.</li> 94 <li>Some opcodes have a disambiguating name suffix to indicate the type(s) 95 they operate on: 96 <ul> 97 <li>Type-general 32-bit opcodes are unmarked.</li> 98 <li>Type-general 64-bit opcodes are suffixed with <code>-wide</code>.</li> 99 <li>Type-specific opcodes are suffixed with their type (or a 100 straightforward abbreviation), one of: <code>-boolean</code> 101 <code>-byte</code> <code>-char</code> <code>-short</code> 102 <code>-int</code> <code>-long</code> <code>-float</code> 103 <code>-double</code> <code>-object</code> <code>-string</code> 104 <code>-class</code> <code>-void</code>.</li> 105 </ul> 106 </li> 107 <li>Some opcodes have a disambiguating suffix to distinguish 108 otherwise-identical operations that have different instruction layouts 109 or options. These suffixes are separated from the main names with a slash 110 ("<code>/</code>") and mainly exist at all to make there be a one-to-one 111 mapping with static constants in the code that generates and interprets 112 executables (that is, to reduce ambiguity for humans). 113 </li> 114 <li>In the descriptions here, the width of a value (indicating, e.g., the 115 range of a constant or the number of registers possibly addressed) is 116 emphasized by the use of a character per four bits of width. 117 </li> 118 <li>For example, in the instruction 119 "<code>move-wide/from16 vAA, vBBBB</code>": 120 <ul> 121 <li>"<code>move</code>" is the base opcode, indicating the base operation 122 (move a register's value).</li> 123 <li>"<code>wide</code>" is the name suffix, indicating that it operates 124 on wide (64 bit) data.</li> 125 <li>"<code>from16</code>" is the opcode suffix, indicating a variant 126 that has a 16-bit register reference as a source.</li> 127 <li>"<code>vAA</code>" is the destination register (implied by the 128 operation; again, the rule is that destination arguments always come 129 first), which must be in the range <code>v0</code> – 130 <code>v255</code>.</li> 131 <li>"<code>vBBBB</code>" is the source register, which must be in the 132 range <code>v0</code> – <code>v65535</code>.</li> 133 </ul> 134 </li> 135 </ul> 136</li> 137<li>See the <a href="instruction-formats.html">instruction formats 138 document</a> for more details about the various instruction formats 139 (listed under "Op & Format") as well as details about the opcode 140 syntax. 141</li> 142<li>See the <a href="dex-format.html"><code>.dex</code> file format 143 document</a> for more details about where the bytecode fits into 144 the bigger picture. 145</li> 146</ul> 147 148<h2>Summary of Instruction Set</h2> 149 150<table class="instruc"> 151<thead> 152<tr> 153 <th>Op & Format</th> 154 <th>Mnemonic / Syntax</th> 155 <th>Arguments</th> 156 <th>Description</th> 157</tr> 158</thead> 159<tbody> 160<tr> 161 <td>00 10x</td> 162 <td>nop</td> 163 <td> </td> 164 <td>Waste cycles. 165 <p><b>Note:</b> 166 Data-bearing pseudo-instructions are tagged with this opcode, in which 167 case the high-order byte of the opcode unit indicates the nature of 168 the data. See "<code>packed-switch-payload</code> Format", 169 "<code>sparse-switch-payload</code> Format", and 170 "<code>fill-array-data-payload</code> Format" below.</p> 171 </td> 172</tr> 173<tr> 174 <td>01 12x</td> 175 <td>move vA, vB</td> 176 <td><code>A:</code> destination register (4 bits)<br/> 177 <code>B:</code> source register (4 bits)</td> 178 <td>Move the contents of one non-object register to another.</td> 179</tr> 180<tr> 181 <td>02 22x</td> 182 <td>move/from16 vAA, vBBBB</td> 183 <td><code>A:</code> destination register (8 bits)<br/> 184 <code>B:</code> source register (16 bits)</td> 185 <td>Move the contents of one non-object register to another.</td> 186</tr> 187<tr> 188 <td>03 32x</td> 189 <td>move/16 vAAAA, vBBBB</td> 190 <td><code>A:</code> destination register (16 bits)<br/> 191 <code>B:</code> source register (16 bits)</td> 192 <td>Move the contents of one non-object register to another.</td> 193</tr> 194<tr> 195 <td>04 12x</td> 196 <td>move-wide vA, vB</td> 197 <td><code>A:</code> destination register pair (4 bits)<br/> 198 <code>B:</code> source register pair (4 bits)</td> 199 <td>Move the contents of one register-pair to another. 200 <p><b>Note:</b> 201 It is legal to move from <code>v<i>N</i></code> to either 202 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations 203 must arrange for both halves of a register pair to be read before 204 anything is written.</p> 205 </td> 206</tr> 207<tr> 208 <td>05 22x</td> 209 <td>move-wide/from16 vAA, vBBBB</td> 210 <td><code>A:</code> destination register pair (8 bits)<br/> 211 <code>B:</code> source register pair (16 bits)</td> 212 <td>Move the contents of one register-pair to another. 213 <p><b>Note:</b> 214 Implementation considerations are the same as <code>move-wide</code>, 215 above.</p> 216 </td> 217</tr> 218<tr> 219 <td>06 32x</td> 220 <td>move-wide/16 vAAAA, vBBBB</td> 221 <td><code>A:</code> destination register pair (16 bits)<br/> 222 <code>B:</code> source register pair (16 bits)</td> 223 <td>Move the contents of one register-pair to another. 224 <p><b>Note:</b> 225 Implementation considerations are the same as <code>move-wide</code>, 226 above.</p> 227 </td> 228</tr> 229<tr> 230 <td>07 12x</td> 231 <td>move-object vA, vB</td> 232 <td><code>A:</code> destination register (4 bits)<br/> 233 <code>B:</code> source register (4 bits)</td> 234 <td>Move the contents of one object-bearing register to another.</td> 235</tr> 236<tr> 237 <td>08 22x</td> 238 <td>move-object/from16 vAA, vBBBB</td> 239 <td><code>A:</code> destination register (8 bits)<br/> 240 <code>B:</code> source register (16 bits)</td> 241 <td>Move the contents of one object-bearing register to another.</td> 242</tr> 243<tr> 244 <td>09 32x</td> 245 <td>move-object/16 vAAAA, vBBBB</td> 246 <td><code>A:</code> destination register (16 bits)<br/> 247 <code>B:</code> source register (16 bits)</td> 248 <td>Move the contents of one object-bearing register to another.</td> 249</tr> 250<tr> 251 <td>0a 11x</td> 252 <td>move-result vAA</td> 253 <td><code>A:</code> destination register (8 bits)</td> 254 <td>Move the single-word non-object result of the most recent 255 <code>invoke-<i>kind</i></code> into the indicated register. 256 This must be done as the instruction immediately after an 257 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result 258 is not to be ignored; anywhere else is invalid.</td> 259</tr> 260<tr> 261 <td>0b 11x</td> 262 <td>move-result-wide vAA</td> 263 <td><code>A:</code> destination register pair (8 bits)</td> 264 <td>Move the double-word result of the most recent 265 <code>invoke-<i>kind</i></code> into the indicated register pair. 266 This must be done as the instruction immediately after an 267 <code>invoke-<i>kind</i></code> whose (double-word) result 268 is not to be ignored; anywhere else is invalid.</td> 269</tr> 270<tr> 271 <td>0c 11x</td> 272 <td>move-result-object vAA</td> 273 <td><code>A:</code> destination register (8 bits)</td> 274 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code> 275 into the indicated register. This must be done as the instruction 276 immediately after an <code>invoke-<i>kind</i></code> or 277 <code>filled-new-array</code> 278 whose (object) result is not to be ignored; anywhere else is invalid.</td> 279</tr> 280<tr> 281 <td>0d 11x</td> 282 <td>move-exception vAA</td> 283 <td><code>A:</code> destination register (8 bits)</td> 284 <td>Save a just-caught exception into the given register. This must 285 be the first instruction of any exception handler whose caught 286 exception is not to be ignored, and this instruction must <i>only</i> 287 ever occur as the first instruction of an exception handler; anywhere 288 else is invalid.</td> 289</tr> 290<tr> 291 <td>0e 10x</td> 292 <td>return-void</td> 293 <td> </td> 294 <td>Return from a <code>void</code> method.</td> 295</tr> 296<tr> 297 <td>0f 11x</td> 298 <td>return vAA</td> 299 <td><code>A:</code> return value register (8 bits)</td> 300 <td>Return from a single-width (32-bit) non-object value-returning 301 method. 302 </td> 303</tr> 304<tr> 305 <td>10 11x</td> 306 <td>return-wide vAA</td> 307 <td><code>A:</code> return value register-pair (8 bits)</td> 308 <td>Return from a double-width (64-bit) value-returning method.</td> 309</tr> 310<tr> 311 <td>11 11x</td> 312 <td>return-object vAA</td> 313 <td><code>A:</code> return value register (8 bits)</td> 314 <td>Return from an object-returning method.</td> 315</tr> 316<tr> 317 <td>12 11n</td> 318 <td>const/4 vA, #+B</td> 319 <td><code>A:</code> destination register (4 bits)<br/> 320 <code>B:</code> signed int (4 bits)</td> 321 <td>Move the given literal value (sign-extended to 32 bits) into 322 the specified register.</td> 323</tr> 324<tr> 325 <td>13 21s</td> 326 <td>const/16 vAA, #+BBBB</td> 327 <td><code>A:</code> destination register (8 bits)<br/> 328 <code>B:</code> signed int (16 bits)</td> 329 <td>Move the given literal value (sign-extended to 32 bits) into 330 the specified register.</td> 331</tr> 332<tr> 333 <td>14 31i</td> 334 <td>const vAA, #+BBBBBBBB</td> 335 <td><code>A:</code> destination register (8 bits)<br/> 336 <code>B:</code> arbitrary 32-bit constant</td> 337 <td>Move the given literal value into the specified register.</td> 338</tr> 339<tr> 340 <td>15 21h</td> 341 <td>const/high16 vAA, #+BBBB0000</td> 342 <td><code>A:</code> destination register (8 bits)<br/> 343 <code>B:</code> signed int (16 bits)</td> 344 <td>Move the given literal value (right-zero-extended to 32 bits) into 345 the specified register.</td> 346</tr> 347<tr> 348 <td>16 21s</td> 349 <td>const-wide/16 vAA, #+BBBB</td> 350 <td><code>A:</code> destination register (8 bits)<br/> 351 <code>B:</code> signed int (16 bits)</td> 352 <td>Move the given literal value (sign-extended to 64 bits) into 353 the specified register-pair.</td> 354</tr> 355<tr> 356 <td>17 31i</td> 357 <td>const-wide/32 vAA, #+BBBBBBBB</td> 358 <td><code>A:</code> destination register (8 bits)<br/> 359 <code>B:</code> signed int (32 bits)</td> 360 <td>Move the given literal value (sign-extended to 64 bits) into 361 the specified register-pair.</td> 362</tr> 363<tr> 364 <td>18 51l</td> 365 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td> 366 <td><code>A:</code> destination register (8 bits)<br/> 367 <code>B:</code> arbitrary double-width (64-bit) constant</td> 368 <td>Move the given literal value into 369 the specified register-pair.</td> 370</tr> 371<tr> 372 <td>19 21h</td> 373 <td>const-wide/high16 vAA, #+BBBB000000000000</td> 374 <td><code>A:</code> destination register (8 bits)<br/> 375 <code>B:</code> signed int (16 bits)</td> 376 <td>Move the given literal value (right-zero-extended to 64 bits) into 377 the specified register-pair.</td> 378</tr> 379<tr> 380 <td>1a 21c</td> 381 <td>const-string vAA, string@BBBB</td> 382 <td><code>A:</code> destination register (8 bits)<br/> 383 <code>B:</code> string index</td> 384 <td>Move a reference to the string specified by the given index into the 385 specified register.</td> 386</tr> 387<tr> 388 <td>1b 31c</td> 389 <td>const-string/jumbo vAA, string@BBBBBBBB</td> 390 <td><code>A:</code> destination register (8 bits)<br/> 391 <code>B:</code> string index</td> 392 <td>Move a reference to the string specified by the given index into the 393 specified register.</td> 394</tr> 395<tr> 396 <td>1c 21c</td> 397 <td>const-class vAA, type@BBBB</td> 398 <td><code>A:</code> destination register (8 bits)<br/> 399 <code>B:</code> type index</td> 400 <td>Move a reference to the class specified by the given index into the 401 specified register. In the case where the indicated type is primitive, 402 this will store a reference to the primitive type's degenerate 403 class.</td> 404</tr> 405<tr> 406 <td>1d 11x</td> 407 <td>monitor-enter vAA</td> 408 <td><code>A:</code> reference-bearing register (8 bits)</td> 409 <td>Acquire the monitor for the indicated object.</td> 410</tr> 411<tr> 412 <td>1e 11x</td> 413 <td>monitor-exit vAA</td> 414 <td><code>A:</code> reference-bearing register (8 bits)</td> 415 <td>Release the monitor for the indicated object. 416 <p><b>Note:</b> 417 If this instruction needs to throw an exception, it must do 418 so as if the pc has already advanced past the instruction. 419 It may be useful to think of this as the instruction successfully 420 executing (in a sense), and the exception getting thrown <i>after</i> 421 the instruction but <i>before</i> the next one gets a chance to 422 run. This definition makes it possible for a method to use 423 a monitor cleanup catch-all (e.g., <code>finally</code>) block as 424 the monitor cleanup for that block itself, as a way to handle the 425 arbitrary exceptions that might get thrown due to the historical 426 implementation of <code>Thread.stop()</code>, while still managing 427 to have proper monitor hygiene.</p> 428 </td> 429</tr> 430<tr> 431 <td>1f 21c</td> 432 <td>check-cast vAA, type@BBBB</td> 433 <td><code>A:</code> reference-bearing register (8 bits)<br/> 434 <code>B:</code> type index (16 bits)</td> 435 <td>Throw a <code>ClassCastException</code> if the reference in the 436 given register cannot be cast to the indicated type. 437 <p><b>Note:</b> Since <code>A</code> must always be a reference 438 (and not a primitive value), this will necessarily fail at runtime 439 (that is, it will throw an exception) if <code>B</code> refers to a 440 primitive type.</p> 441 </td> 442</tr> 443<tr> 444 <td>20 22c</td> 445 <td>instance-of vA, vB, type@CCCC</td> 446 <td><code>A:</code> destination register (4 bits)<br/> 447 <code>B:</code> reference-bearing register (4 bits)<br/> 448 <code>C:</code> type index (16 bits)</td> 449 <td>Store in the given destination register <code>1</code> 450 if the indicated reference is an instance of the given type, 451 or <code>0</code> if not. 452 <p><b>Note:</b> Since <code>B</code> must always be a reference 453 (and not a primitive value), this will always result 454 in <code>0</code> being stored if <code>C</code> refers to a primitive 455 type.</td> 456</tr> 457<tr> 458 <td>21 12x</td> 459 <td>array-length vA, vB</td> 460 <td><code>A:</code> destination register (4 bits)<br/> 461 <code>B:</code> array reference-bearing register (4 bits)</td> 462 <td>Store in the given destination register the length of the indicated 463 array, in entries</td> 464</tr> 465<tr> 466 <td>22 21c</td> 467 <td>new-instance vAA, type@BBBB</td> 468 <td><code>A:</code> destination register (8 bits)<br/> 469 <code>B:</code> type index</td> 470 <td>Construct a new instance of the indicated type, storing a 471 reference to it in the destination. The type must refer to a 472 non-array class.</td> 473</tr> 474<tr> 475 <td>23 22c</td> 476 <td>new-array vA, vB, type@CCCC</td> 477 <td><code>A:</code> destination register (8 bits)<br/> 478 <code>B:</code> size register<br/> 479 <code>C:</code> type index</td> 480 <td>Construct a new array of the indicated type and size. The type 481 must be an array type.</td> 482</tr> 483<tr> 484 <td>24 35c</td> 485 <td>filled-new-array {vC, vD, vE, vF, vG}, type@BBBB</td> 486 <td> 487 <code>A:</code> array size and argument word count (4 bits)<br/> 488 <code>B:</code> type index (16 bits)<br/> 489 <code>C..G:</code> argument registers (4 bits each) 490 </td> 491 <td>Construct an array of the given type and size, filling it with the 492 supplied contents. The type must be an array type. The array's 493 contents must be single-word (that is, 494 no arrays of <code>long</code> or <code>double</code>, but reference 495 types are acceptable). The constructed 496 instance is stored as a "result" in the same way that the method invocation 497 instructions store their results, so the constructed instance must 498 be moved to a register with an immediately subsequent 499 <code>move-result-object</code> instruction (if it is to be used).</td> 500</tr> 501<tr> 502 <td>25 3rc</td> 503 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td> 504 <td><code>A:</code> array size and argument word count (8 bits)<br/> 505 <code>B:</code> type index (16 bits)<br/> 506 <code>C:</code> first argument register (16 bits)<br/> 507 <code>N = A + C - 1</code></td> 508 <td>Construct an array of the given type and size, filling it with 509 the supplied contents. Clarifications and restrictions are the same 510 as <code>filled-new-array</code>, described above.</td> 511</tr> 512<tr> 513 <td>26 31t</td> 514 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified 515 below in "<code>fill-array-data-payload</code> Format")</i></td> 516 <td><code>A:</code> array reference (8 bits)<br/> 517 <code>B:</code> signed "branch" offset to table data pseudo-instruction 518 (32 bits) 519 </td> 520 <td>Fill the given array with the indicated data. The reference must be 521 to an array of primitives, and the data table must match it in type and 522 must contain no more elements than will fit in the array. That is, 523 the array may be larger than the table, and if so, only the initial 524 elements of the array are set, leaving the remainder alone. 525 </td> 526</tr> 527<tr> 528 <td>27 11x</td> 529 <td>throw vAA</td> 530 <td><code>A:</code> exception-bearing register (8 bits)<br/></td> 531 <td>Throw the indicated exception.</td> 532</tr> 533<tr> 534 <td>28 10t</td> 535 <td>goto +AA</td> 536 <td><code>A:</code> signed branch offset (8 bits)</td> 537 <td>Unconditionally jump to the indicated instruction. 538 <p><b>Note:</b> 539 The branch offset must not be <code>0</code>. (A spin 540 loop may be legally constructed either with <code>goto/32</code> or 541 by including a <code>nop</code> as a target before the branch.)</p> 542 </td> 543</tr> 544<tr> 545 <td>29 20t</td> 546 <td>goto/16 +AAAA</td> 547 <td><code>A:</code> signed branch offset (16 bits)<br/></td> 548 <td>Unconditionally jump to the indicated instruction. 549 <p><b>Note:</b> 550 The branch offset must not be <code>0</code>. (A spin 551 loop may be legally constructed either with <code>goto/32</code> or 552 by including a <code>nop</code> as a target before the branch.)</p> 553 </td> 554</tr> 555<tr> 556 <td>2a 30t</td> 557 <td>goto/32 +AAAAAAAA</td> 558 <td><code>A:</code> signed branch offset (32 bits)<br/></td> 559 <td>Unconditionally jump to the indicated instruction.</td> 560</tr> 561<tr> 562 <td>2b 31t</td> 563 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as 564 specified below in "<code>packed-switch-payload</code> Format")</i></td> 565 <td><code>A:</code> register to test<br/> 566 <code>B:</code> signed "branch" offset to table data pseudo-instruction 567 (32 bits) 568 </td> 569 <td>Jump to a new instruction based on the value in the 570 given register, using a table of offsets corresponding to each value 571 in a particular integral range, or fall through to the next 572 instruction if there is no match. 573 </td> 574</tr> 575<tr> 576 <td>2c 31t</td> 577 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as 578 specified below in "<code>sparse-switch-payload</code> Format")</i></td> 579 <td><code>A:</code> register to test<br/> 580 <code>B:</code> signed "branch" offset to table data pseudo-instruction 581 (32 bits) 582 </td> 583 <td>Jump to a new instruction based on the value in the given 584 register, using an ordered table of value-offset pairs, or fall 585 through to the next instruction if there is no match. 586 </td> 587</tr> 588<tr> 589 <td>2d..31 23x</td> 590 <td>cmp<i>kind</i> vAA, vBB, vCC<br/> 591 2d: cmpl-float <i>(lt bias)</i><br/> 592 2e: cmpg-float <i>(gt bias)</i><br/> 593 2f: cmpl-double <i>(lt bias)</i><br/> 594 30: cmpg-double <i>(gt bias)</i><br/> 595 31: cmp-long 596 </td> 597 <td><code>A:</code> destination register (8 bits)<br/> 598 <code>B:</code> first source register or pair<br/> 599 <code>C:</code> second source register or pair</td> 600 <td>Perform the indicated floating point or <code>long</code> comparison, 601 storing <code>0</code> if the two arguments are equal, <code>1</code> 602 if the second argument is larger, or <code>-1</code> if the first 603 argument is larger. The "bias" listed for the floating point operations 604 indicates how <code>NaN</code> comparisons are treated: "Gt bias" 605 instructions return <code>1</code> for <code>NaN</code> comparisons, 606 and "lt bias" instructions return 607 <code>-1</code>. 608 <p>For example, to check to see if floating point 609 <code>a < b</code>, then it is advisable to use 610 <code>cmpg-float</code>; a result of <code>-1</code> indicates that 611 the test was true, and the other values indicate it was false either 612 due to a valid comparison or because one or the other values was 613 <code>NaN</code>.</p> 614 </td> 615</tr> 616<tr> 617 <td>32..37 22t</td> 618 <td>if-<i>test</i> vA, vB, +CCCC<br/> 619 32: if-eq<br/> 620 33: if-ne<br/> 621 34: if-lt<br/> 622 35: if-ge<br/> 623 36: if-gt<br/> 624 37: if-le<br/> 625 </td> 626 <td><code>A:</code> first register to test (4 bits)<br/> 627 <code>B:</code> second register to test (4 bits)<br/> 628 <code>C:</code> signed branch offset (16 bits)</td> 629 <td>Branch to the given destination if the given two registers' values 630 compare as specified. 631 <p><b>Note:</b> 632 The branch offset must not be <code>0</code>. (A spin 633 loop may be legally constructed either by branching around a 634 backward <code>goto</code> or by including a <code>nop</code> as 635 a target before the branch.)</p> 636 </td> 637</tr> 638<tr> 639 <td>38..3d 21t</td> 640 <td>if-<i>test</i>z vAA, +BBBB<br/> 641 38: if-eqz<br/> 642 39: if-nez<br/> 643 3a: if-ltz<br/> 644 3b: if-gez<br/> 645 3c: if-gtz<br/> 646 3d: if-lez<br/> 647 </td> 648 <td><code>A:</code> register to test (8 bits)<br/> 649 <code>B:</code> signed branch offset (16 bits)</td> 650 <td>Branch to the given destination if the given register's value compares 651 with 0 as specified. 652 <p><b>Note:</b> 653 The branch offset must not be <code>0</code>. (A spin 654 loop may be legally constructed either by branching around a 655 backward <code>goto</code> or by including a <code>nop</code> as 656 a target before the branch.)</p> 657 </td> 658</tr> 659<tr> 660 <td>3e..43 10x</td> 661 <td><i>(unused)</i></td> 662 <td> </td> 663 <td><i>(unused)</i></td> 664</tr> 665<tr> 666 <td>44..51 23x</td> 667 <td><i>arrayop</i> vAA, vBB, vCC<br/> 668 44: aget<br/> 669 45: aget-wide<br/> 670 46: aget-object<br/> 671 47: aget-boolean<br/> 672 48: aget-byte<br/> 673 49: aget-char<br/> 674 4a: aget-short<br/> 675 4b: aput<br/> 676 4c: aput-wide<br/> 677 4d: aput-object<br/> 678 4e: aput-boolean<br/> 679 4f: aput-byte<br/> 680 50: aput-char<br/> 681 51: aput-short 682 </td> 683 <td><code>A:</code> value register or pair; may be source or dest 684 (8 bits)<br/> 685 <code>B:</code> array register (8 bits)<br/> 686 <code>C:</code> index register (8 bits)</td> 687 <td>Perform the identified array operation at the identified index of 688 the given array, loading or storing into the value register.</td> 689</tr> 690<tr> 691 <td>52..5f 22c</td> 692 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/> 693 52: iget<br/> 694 53: iget-wide<br/> 695 54: iget-object<br/> 696 55: iget-boolean<br/> 697 56: iget-byte<br/> 698 57: iget-char<br/> 699 58: iget-short<br/> 700 59: iput<br/> 701 5a: iput-wide<br/> 702 5b: iput-object<br/> 703 5c: iput-boolean<br/> 704 5d: iput-byte<br/> 705 5e: iput-char<br/> 706 5f: iput-short 707 </td> 708 <td><code>A:</code> value register or pair; may be source or dest 709 (4 bits)<br/> 710 <code>B:</code> object register (4 bits)<br/> 711 <code>C:</code> instance field reference index (16 bits)</td> 712 <td>Perform the identified object instance field operation with 713 the identified field, loading or storing into the value register. 714 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 715 altering the field argument to be a more direct offset.</p> 716 </td> 717</tr> 718<tr> 719 <td>60..6d 21c</td> 720 <td>s<i>staticop</i> vAA, field@BBBB<br/> 721 60: sget<br/> 722 61: sget-wide<br/> 723 62: sget-object<br/> 724 63: sget-boolean<br/> 725 64: sget-byte<br/> 726 65: sget-char<br/> 727 66: sget-short<br/> 728 67: sput<br/> 729 68: sput-wide<br/> 730 69: sput-object<br/> 731 6a: sput-boolean<br/> 732 6b: sput-byte<br/> 733 6c: sput-char<br/> 734 6d: sput-short 735 </td> 736 <td><code>A:</code> value register or pair; may be source or dest 737 (8 bits)<br/> 738 <code>B:</code> static field reference index (16 bits)</td> 739 <td>Perform the identified object static field operation with the identified 740 static field, loading or storing into the value register. 741 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 742 altering the field argument to be a more direct offset.</p> 743 </td> 744</tr> 745<tr> 746 <td>6e..72 35c</td> 747 <td>invoke-<i>kind</i> {vC, vD, vE, vF, vG}, meth@BBBB<br/> 748 6e: invoke-virtual<br/> 749 6f: invoke-super<br/> 750 70: invoke-direct<br/> 751 71: invoke-static<br/> 752 72: invoke-interface 753 </td> 754 <td> 755 <code>A:</code> argument word count (4 bits)<br/> 756 <code>B:</code> method reference index (16 bits)<br/> 757 <code>C..G:</code> argument registers (4 bits each) 758 </td> 759 <td>Call the indicated method. The result (if any) may be stored 760 with an appropriate <code>move-result*</code> variant as the immediately 761 subsequent instruction. 762 <p><code>invoke-virtual</code> is used to invoke a normal virtual 763 method (a method that is not <code>private</code>, <code>static</code>, 764 or <code>final</code>, and is also not a constructor).</p> 765 <p><code>invoke-super</code> is used to invoke the closest superclass's 766 virtual method (as opposed to the one with the same <code>method_id</code> 767 in the calling class). The same method restrictions hold as for 768 <code>invoke-virtual</code>.</p> 769 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code> 770 direct method (that is, an instance method that is by its nature 771 non-overridable, namely either a <code>private</code> instance method 772 or a constructor).</p> 773 <p><code>invoke-static</code> is used to invoke a <code>static</code> 774 method (which is always considered a direct method).</p> 775 <p><code>invoke-interface</code> is used to invoke an 776 <code>interface</code> method, that is, on an object whose concrete 777 class isn't known, using a <code>method_id</code> that refers to 778 an <code>interface</code>.</p> 779 <p><b>Note:</b> These opcodes are reasonable candidates for static linking, 780 altering the method argument to be a more direct offset 781 (or pair thereof).</p> 782 </td> 783</tr> 784<tr> 785 <td>73 10x</td> 786 <td><i>(unused)</i></td> 787 <td> </td> 788 <td><i>(unused)</i></td> 789</tr> 790<tr> 791 <td>74..78 3rc</td> 792 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/> 793 74: invoke-virtual/range<br/> 794 75: invoke-super/range<br/> 795 76: invoke-direct/range<br/> 796 77: invoke-static/range<br/> 797 78: invoke-interface/range 798 </td> 799 <td><code>A:</code> argument word count (8 bits)<br/> 800 <code>B:</code> method reference index (16 bits)<br/> 801 <code>C:</code> first argument register (16 bits)<br/> 802 <code>N = A + C - 1</code></td> 803 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code> 804 description above for details, caveats, and suggestions. 805 </td> 806</tr> 807<tr> 808 <td>79..7a 10x</td> 809 <td><i>(unused)</i></td> 810 <td> </td> 811 <td><i>(unused)</i></td> 812</tr> 813<tr> 814 <td>7b..8f 12x</td> 815 <td><i>unop</i> vA, vB<br/> 816 7b: neg-int<br/> 817 7c: not-int<br/> 818 7d: neg-long<br/> 819 7e: not-long<br/> 820 7f: neg-float<br/> 821 80: neg-double<br/> 822 81: int-to-long<br/> 823 82: int-to-float<br/> 824 83: int-to-double<br/> 825 84: long-to-int<br/> 826 85: long-to-float<br/> 827 86: long-to-double<br/> 828 87: float-to-int<br/> 829 88: float-to-long<br/> 830 89: float-to-double<br/> 831 8a: double-to-int<br/> 832 8b: double-to-long<br/> 833 8c: double-to-float<br/> 834 8d: int-to-byte<br/> 835 8e: int-to-char<br/> 836 8f: int-to-short 837 </td> 838 <td><code>A:</code> destination register or pair (4 bits)<br/> 839 <code>B:</code> source register or pair (4 bits)</td> 840 <td>Perform the identified unary operation on the source register, 841 storing the result in the destination register.</td> 842</tr> 843 844<tr> 845 <td>90..af 23x</td> 846 <td><i>binop</i> vAA, vBB, vCC<br/> 847 90: add-int<br/> 848 91: sub-int<br/> 849 92: mul-int<br/> 850 93: div-int<br/> 851 94: rem-int<br/> 852 95: and-int<br/> 853 96: or-int<br/> 854 97: xor-int<br/> 855 98: shl-int<br/> 856 99: shr-int<br/> 857 9a: ushr-int<br/> 858 9b: add-long<br/> 859 9c: sub-long<br/> 860 9d: mul-long<br/> 861 9e: div-long<br/> 862 9f: rem-long<br/> 863 a0: and-long<br/> 864 a1: or-long<br/> 865 a2: xor-long<br/> 866 a3: shl-long<br/> 867 a4: shr-long<br/> 868 a5: ushr-long<br/> 869 a6: add-float<br/> 870 a7: sub-float<br/> 871 a8: mul-float<br/> 872 a9: div-float<br/> 873 aa: rem-float<br/> 874 ab: add-double<br/> 875 ac: sub-double<br/> 876 ad: mul-double<br/> 877 ae: div-double<br/> 878 af: rem-double 879 </td> 880 <td><code>A:</code> destination register or pair (8 bits)<br/> 881 <code>B:</code> first source register or pair (8 bits)<br/> 882 <code>C:</code> second source register or pair (8 bits)</td> 883 <td>Perform the identified binary operation on the two source registers, 884 storing the result in the first source register.</td> 885</tr> 886<tr> 887 <td>b0..cf 12x</td> 888 <td><i>binop</i>/2addr vA, vB<br/> 889 b0: add-int/2addr<br/> 890 b1: sub-int/2addr<br/> 891 b2: mul-int/2addr<br/> 892 b3: div-int/2addr<br/> 893 b4: rem-int/2addr<br/> 894 b5: and-int/2addr<br/> 895 b6: or-int/2addr<br/> 896 b7: xor-int/2addr<br/> 897 b8: shl-int/2addr<br/> 898 b9: shr-int/2addr<br/> 899 ba: ushr-int/2addr<br/> 900 bb: add-long/2addr<br/> 901 bc: sub-long/2addr<br/> 902 bd: mul-long/2addr<br/> 903 be: div-long/2addr<br/> 904 bf: rem-long/2addr<br/> 905 c0: and-long/2addr<br/> 906 c1: or-long/2addr<br/> 907 c2: xor-long/2addr<br/> 908 c3: shl-long/2addr<br/> 909 c4: shr-long/2addr<br/> 910 c5: ushr-long/2addr<br/> 911 c6: add-float/2addr<br/> 912 c7: sub-float/2addr<br/> 913 c8: mul-float/2addr<br/> 914 c9: div-float/2addr<br/> 915 ca: rem-float/2addr<br/> 916 cb: add-double/2addr<br/> 917 cc: sub-double/2addr<br/> 918 cd: mul-double/2addr<br/> 919 ce: div-double/2addr<br/> 920 cf: rem-double/2addr 921 </td> 922 <td><code>A:</code> destination and first source register or pair 923 (4 bits)<br/> 924 <code>B:</code> second source register or pair (4 bits)</td> 925 <td>Perform the identified binary operation on the two source registers, 926 storing the result in the first source register.</td> 927</tr> 928<tr> 929 <td>d0..d7 22s</td> 930 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/> 931 d0: add-int/lit16<br/> 932 d1: rsub-int (reverse subtract)<br/> 933 d2: mul-int/lit16<br/> 934 d3: div-int/lit16<br/> 935 d4: rem-int/lit16<br/> 936 d5: and-int/lit16<br/> 937 d6: or-int/lit16<br/> 938 d7: xor-int/lit16 939 </td> 940 <td><code>A:</code> destination register (4 bits)<br/> 941 <code>B:</code> source register (4 bits)<br/> 942 <code>C:</code> signed int constant (16 bits)</td> 943 <td>Perform the indicated binary op on the indicated register (first 944 argument) and literal value (second argument), storing the result in 945 the destination register. 946 <p><b>Note:</b> 947 <code>rsub-int</code> does not have a suffix since this version is the 948 main opcode of its family. Also, see below for details on its semantics. 949 </p> 950 </td> 951</tr> 952<tr> 953 <td>d8..e2 22b</td> 954 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/> 955 d8: add-int/lit8<br/> 956 d9: rsub-int/lit8<br/> 957 da: mul-int/lit8<br/> 958 db: div-int/lit8<br/> 959 dc: rem-int/lit8<br/> 960 dd: and-int/lit8<br/> 961 de: or-int/lit8<br/> 962 df: xor-int/lit8<br/> 963 e0: shl-int/lit8<br/> 964 e1: shr-int/lit8<br/> 965 e2: ushr-int/lit8 966 </td> 967 <td><code>A:</code> destination register (8 bits)<br/> 968 <code>B:</code> source register (8 bits)<br/> 969 <code>C:</code> signed int constant (8 bits)</td> 970 <td>Perform the indicated binary op on the indicated register (first 971 argument) and literal value (second argument), storing the result 972 in the destination register. 973 <p><b>Note:</b> See below for details on the semantics of 974 <code>rsub-int</code>.</p> 975 </td> 976</tr> 977<tr> 978 <td>e3..fe 10x</td> 979 <td><i>(unused)</i></td> 980 <td> </td> 981 <td><i>(unused)</i></td> 982</tr> 983<tr> 984 <td>ff -</td> 985 <td><i>(expanded opcode)</i></td> 986 <td> </td> 987 <td>An <code>ff</code> in the primary opcode position indicates that there 988 is a secondary opcode in the high-order byte of the opcode code unit, 989 as opposed to an argument value. These expanded opcodes are detailed 990 immediately below. 991 </td> 992</tr> 993<tr> 994 <td>00ff 41c</td> 995 <td>const-class/jumbo vAAAA, type@BBBBBBBB</td> 996 <td> 997 <code>A:</code> destination register (16 bits)<br/> 998 <code>B:</code> type index (32 bits) 999 </td> 1000 <td>Move a reference to the class specified by the given index into the 1001 specified register. See <code>const-class</code> description above 1002 for details, caveats, and suggestions. 1003 </td> 1004</tr> 1005<tr> 1006 <td>01ff 41c</td> 1007 <td>check-cast/jumbo vAAAA, type@BBBBBBBB</td> 1008 <td> 1009 <code>A:</code> reference-bearing register (16 bits)<br/> 1010 <code>B:</code> type index (32 bits) 1011 </td> 1012 <td>Throw a <code>ClassCastException</code> if the reference in the 1013 given register cannot be cast to the indicated type. See 1014 <code>check-cast</code> description above for details, 1015 caveats, and suggestions. 1016 </td> 1017</tr> 1018<tr> 1019 <td>02ff 52c</td> 1020 <td>instance-of/jumbo vAAAA, vBBBB, type@CCCCCCCC</td> 1021 <td> 1022 <code>A:</code> destination register (16 bits)<br/> 1023 <code>B:</code> reference-bearing register (16 bits)<br/> 1024 <code>C:</code> type index (32 bits) 1025 </td> 1026 <td>Store in the given destination register <code>1</code> 1027 if the indicated reference is an instance of the given type, 1028 or <code>0</code> if not. See 1029 <code>instance-of</code> description above for details, 1030 caveats, and suggestions. 1031 </td> 1032</tr> 1033<tr> 1034 <td>03ff 41c</td> 1035 <td>new-instance/jumbo vAAAA, type@BBBBBBBB</td> 1036 <td> 1037 <code>A:</code> destination register (16 bits)<br/> 1038 <code>B:</code> type index (32 bits) 1039 </td> 1040 <td>Construct a new instance of the indicated type. See 1041 <code>new-instance</code> description above for details, 1042 caveats, and suggestions. 1043 </td> 1044</tr> 1045<tr> 1046 <td>04ff 52c</td> 1047 <td>new-array/jumbo vAAAA, vBBBB, type@CCCCCCCC</td> 1048 <td> 1049 <code>A:</code> destination register (16 bits)<br/> 1050 <code>B:</code> size register (16 bits)<br/> 1051 <code>C:</code> type index (32 bits) 1052 </td> 1053 <td>Construct a new array of the indicated type and size. See 1054 <code>new-array</code> description above for details, 1055 caveats, and suggestions. 1056 </td> 1057</tr> 1058<tr> 1059 <td>05ff 5rc</td> 1060 <td>filled-new-array/jumbo {vCCCC .. vNNNN}, type@BBBBBBBB</td> 1061 <td> 1062 <code>A:</code> array size and argument word count (16 bits)<br/> 1063 <code>B:</code> type index (32 bits)<br/> 1064 <code>C:</code> first argument register (16 bits)<br/> 1065 <code>N = A + C - 1</code> 1066 </td> 1067 <td>Construct an array of the given type and size, filling it with the 1068 supplied contents. See first 1069 <code>filled-new-array</code> description above for details, 1070 caveats, and suggestions. 1071 </td> 1072</tr> 1073<tr> 1074 <td>06ff..13ff 52c</td> 1075 <td>i<i>instanceop</i>/jumbo vAAAA, vBBBB, field@CCCCCCCC<br/> 1076 06ff: iget/jumbo<br/> 1077 07ff: iget-wide/jumbo<br/> 1078 08ff: iget-object/jumbo<br/> 1079 09ff: iget-boolean/jumbo<br/> 1080 0aff: iget-byte/jumbo<br/> 1081 0bff: iget-char/jumbo<br/> 1082 0cff: iget-short/jumbo<br/> 1083 0dff: iput/jumbo<br/> 1084 0eff: iput-wide/jumbo<br/> 1085 0fff: iput-object/jumbo<br/> 1086 10ff: iput-boolean/jumbo<br/> 1087 11ff: iput-byte/jumbo<br/> 1088 12ff: iput-char/jumbo<br/> 1089 13ff: iput-short/jumbo 1090 </td> 1091 <td> 1092 <code>A:</code> value register or pair; may be source or dest (16 bits)<br/> 1093 <code>B:</code> object register (16 bits)<br/> 1094 <code>C:</code> instance field reference index (32 bits) 1095 </td> 1096 <td>Perform the identified object instance field operation. See 1097 <code>i<i>instanceop</i></code> description above for details, 1098 caveats, and suggestions. 1099 </td> 1100</tr> 1101<tr> 1102 <td>14ff..21ff 41c</td> 1103 <td>s<i>staticop</i>/jumbo vAAAA, field@BBBBBBBB<br/> 1104 14ff: sget/jumbo<br/> 1105 15ff: sget-wide/jumbo<br/> 1106 16ff: sget-object/jumbo<br/> 1107 17ff: sget-boolean/jumbo<br/> 1108 18ff: sget-byte/jumbo<br/> 1109 19ff: sget-char/jumbo<br/> 1110 1aff: sget-short/jumbo<br/> 1111 1bff: sput/jumbo<br/> 1112 1cff: sput-wide/jumbo<br/> 1113 1dff: sput-object/jumbo<br/> 1114 1eff: sput-boolean/jumbo<br/> 1115 1fff: sput-byte/jumbo<br/> 1116 20ff: sput-char/jumbo<br/> 1117 21ff: sput-short/jumbo 1118 </td> 1119 <td> 1120 <code>A:</code> value register or pair; may be source or dest (16 bits)<br/> 1121 <code>B:</code> instance field reference index (32 bits) 1122 </td> 1123 <td>Perform the identified object static field operation. See 1124 <code>s<i>staticop</i></code> description above for details, 1125 caveats, and suggestions. 1126 </td> 1127</tr> 1128<tr> 1129 <td>22ff..26ff 5rc</td> 1130 <td>invoke-<i>kind</i>/jumbo {vCCCC .. vNNNN}, meth@BBBBBBBB<br/> 1131 22ff: invoke-virtual/jumbo<br/> 1132 23ff: invoke-super/jumbo<br/> 1133 24ff: invoke-direct/jumbo<br/> 1134 25ff: invoke-static/jumbo<br/> 1135 26ff: invoke-interface/jumbo 1136 </td> 1137 <td> 1138 <code>A:</code> argument word count (16 bits)<br/> 1139 <code>B:</code> method reference index (32 bits)<br/> 1140 <code>C:</code> first argument register (16 bits)<br/> 1141 <code>N = A + C - 1</code> 1142 </td> 1143 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code> 1144 description above for details, caveats, and suggestions. 1145 </td> 1146</tr> 1147</tbody> 1148</table> 1149 1150<h2><code>packed-switch-payload</code> Format</h2> 1151 1152<table class="supplement"> 1153<thead> 1154<tr> 1155 <th>Name</th> 1156 <th>Format</th> 1157 <th>Description</th> 1158</tr> 1159</thead> 1160<tbody> 1161<tr> 1162 <td>ident</td> 1163 <td>ushort = 0x0100</td> 1164 <td>identifying pseudo-opcode</td> 1165</tr> 1166<tr> 1167 <td>size</td> 1168 <td>ushort</td> 1169 <td>number of entries in the table</td> 1170</tr> 1171<tr> 1172 <td>first_key</td> 1173 <td>int</td> 1174 <td>first (and lowest) switch case value</td> 1175</tr> 1176<tr> 1177 <td>targets</td> 1178 <td>int[]</td> 1179 <td>list of <code>size</code> relative branch targets. The targets are 1180 relative to the address of the switch opcode, not of this table. 1181 </td> 1182</tr> 1183</tbody> 1184</table> 1185 1186<p><b>Note:</b> The total number of code units for an instance of this 1187table is <code>(size * 2) + 4</code>.</p> 1188 1189<h2><code>sparse-switch-payload</code> Format</h2> 1190 1191<table class="supplement"> 1192<thead> 1193<tr> 1194 <th>Name</th> 1195 <th>Format</th> 1196 <th>Description</th> 1197</tr> 1198</thead> 1199<tbody> 1200<tr> 1201 <td>ident</td> 1202 <td>ushort = 0x0200</td> 1203 <td>identifying pseudo-opcode</td> 1204</tr> 1205<tr> 1206 <td>size</td> 1207 <td>ushort</td> 1208 <td>number of entries in the table</td> 1209</tr> 1210<tr> 1211 <td>keys</td> 1212 <td>int[]</td> 1213 <td>list of <code>size</code> key values, sorted low-to-high</td> 1214</tr> 1215<tr> 1216 <td>targets</td> 1217 <td>int[]</td> 1218 <td>list of <code>size</code> relative branch targets, each corresponding 1219 to the key value at the same index. The targets are 1220 relative to the address of the switch opcode, not of this table. 1221 </td> 1222</tr> 1223</tbody> 1224</table> 1225 1226<p><b>Note:</b> The total number of code units for an instance of this 1227table is <code>(size * 4) + 2</code>.</p> 1228 1229<h2><code>fill-array-data-payload</code> Format</h2> 1230 1231<table class="supplement"> 1232<thead> 1233<tr> 1234 <th>Name</th> 1235 <th>Format</th> 1236 <th>Description</th> 1237</tr> 1238</thead> 1239<tbody> 1240<tr> 1241 <td>ident</td> 1242 <td>ushort = 0x0300</td> 1243 <td>identifying pseudo-opcode</td> 1244</tr> 1245<tr> 1246 <td>element_width</td> 1247 <td>ushort</td> 1248 <td>number of bytes in each element</td> 1249</tr> 1250<tr> 1251 <td>size</td> 1252 <td>uint</td> 1253 <td>number of elements in the table</td> 1254</tr> 1255<tr> 1256 <td>data</td> 1257 <td>ubyte[]</td> 1258 <td>data values</td> 1259</tr> 1260</tbody> 1261</table> 1262 1263<p><b>Note:</b> The total number of code units for an instance of this 1264table is <code>(size * element_width + 1) / 2 + 4</code>.</p> 1265 1266 1267<h2>Mathematical Operation Details</h2> 1268 1269<p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using 1270round-to-nearest and gradual underflow, except where stated otherwise.</p> 1271 1272<table class="math"> 1273<thead> 1274<tr> 1275 <th>Opcode</th> 1276 <th>C Semantics</th> 1277 <th>Notes</th> 1278</tr> 1279</thead> 1280<tbody> 1281<tr> 1282 <td>neg-int</td> 1283 <td>int32 a;<br/> 1284 int32 result = -a; 1285 </td> 1286 <td>Unary twos-complement.</td> 1287</tr> 1288<tr> 1289 <td>not-int</td> 1290 <td>int32 a;<br/> 1291 int32 result = ~a; 1292 </td> 1293 <td>Unary ones-complement.</td> 1294</tr> 1295<tr> 1296 <td>neg-long</td> 1297 <td>int64 a;<br/> 1298 int64 result = -a; 1299 </td> 1300 <td>Unary twos-complement.</td> 1301</tr> 1302<tr> 1303 <td>not-long</td> 1304 <td>int64 a;<br/> 1305 int64 result = ~a; 1306 </td> 1307 <td>Unary ones-complement.</td> 1308</tr> 1309<tr> 1310 <td>neg-float</td> 1311 <td>float a;<br/> 1312 float result = -a; 1313 </td> 1314 <td>Floating point negation.</td> 1315</tr> 1316<tr> 1317 <td>neg-double</td> 1318 <td>double a;<br/> 1319 double result = -a; 1320 </td> 1321 <td>Floating point negation.</td> 1322</tr> 1323<tr> 1324 <td>int-to-long</td> 1325 <td>int32 a;<br/> 1326 int64 result = (int64) a; 1327 </td> 1328 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td> 1329</tr> 1330<tr> 1331 <td>int-to-float</td> 1332 <td>int32 a;<br/> 1333 float result = (float) a; 1334 </td> 1335 <td>Conversion of <code>int32</code> to <code>float</code>, using 1336 round-to-nearest. This loses precision for some values. 1337 </td> 1338</tr> 1339<tr> 1340 <td>int-to-double</td> 1341 <td>int32 a;<br/> 1342 double result = (double) a; 1343 </td> 1344 <td>Conversion of <code>int32</code> to <code>double</code>.</td> 1345</tr> 1346<tr> 1347 <td>long-to-int</td> 1348 <td>int64 a;<br/> 1349 int32 result = (int32) a; 1350 </td> 1351 <td>Truncation of <code>int64</code> into <code>int32</code>.</td> 1352</tr> 1353<tr> 1354 <td>long-to-float</td> 1355 <td>int64 a;<br/> 1356 float result = (float) a; 1357 </td> 1358 <td>Conversion of <code>int64</code> to <code>float</code>, using 1359 round-to-nearest. This loses precision for some values. 1360 </td> 1361</tr> 1362<tr> 1363 <td>long-to-double</td> 1364 <td>int64 a;<br/> 1365 double result = (double) a; 1366 </td> 1367 <td>Conversion of <code>int64</code> to <code>double</code>, using 1368 round-to-nearest. This loses precision for some values. 1369 </td> 1370</tr> 1371<tr> 1372 <td>float-to-int</td> 1373 <td>float a;<br/> 1374 int32 result = (int32) a; 1375 </td> 1376 <td>Conversion of <code>float</code> to <code>int32</code>, using 1377 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero) 1378 convert to the integer <code>0</code>. Infinities and values with 1379 too large a magnitude to be represented get converted to either 1380 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign. 1381 </td> 1382</tr> 1383<tr> 1384 <td>float-to-long</td> 1385 <td>float a;<br/> 1386 int64 result = (int64) a; 1387 </td> 1388 <td>Conversion of <code>float</code> to <code>int64</code>, using 1389 round-toward-zero. The same special case rules as for 1390 <code>float-to-int</code> apply here, except that out-of-range values 1391 get converted to either <code>0x7fffffffffffffff</code> or 1392 <code>-0x8000000000000000</code> depending on sign. 1393 </td> 1394</tr> 1395<tr> 1396 <td>float-to-double</td> 1397 <td>float a;<br/> 1398 double result = (double) a; 1399 </td> 1400 <td>Conversion of <code>float</code> to <code>double</code>, preserving 1401 the value exactly. 1402 </td> 1403</tr> 1404<tr> 1405 <td>double-to-int</td> 1406 <td>double a;<br/> 1407 int32 result = (int32) a; 1408 </td> 1409 <td>Conversion of <code>double</code> to <code>int32</code>, using 1410 round-toward-zero. The same special case rules as for 1411 <code>float-to-int</code> apply here. 1412 </td> 1413</tr> 1414<tr> 1415 <td>double-to-long</td> 1416 <td>double a;<br/> 1417 int64 result = (int64) a; 1418 </td> 1419 <td>Conversion of <code>double</code> to <code>int64</code>, using 1420 round-toward-zero. The same special case rules as for 1421 <code>float-to-long</code> apply here. 1422 </td> 1423</tr> 1424<tr> 1425 <td>double-to-float</td> 1426 <td>double a;<br/> 1427 float result = (float) a; 1428 </td> 1429 <td>Conversion of <code>double</code> to <code>float</code>, using 1430 round-to-nearest. This loses precision for some values. 1431 </td> 1432</tr> 1433<tr> 1434 <td>int-to-byte</td> 1435 <td>int32 a;<br/> 1436 int32 result = (a << 24) >> 24; 1437 </td> 1438 <td>Truncation of <code>int32</code> to <code>int8</code>, sign 1439 extending the result. 1440 </td> 1441</tr> 1442<tr> 1443 <td>int-to-char</td> 1444 <td>int32 a;<br/> 1445 int32 result = a & 0xffff; 1446 </td> 1447 <td>Truncation of <code>int32</code> to <code>uint16</code>, without 1448 sign extension. 1449 </td> 1450</tr> 1451<tr> 1452 <td>int-to-short</td> 1453 <td>int32 a;<br/> 1454 int32 result = (a << 16) >> 16; 1455 </td> 1456 <td>Truncation of <code>int32</code> to <code>int16</code>, sign 1457 extending the result. 1458 </td> 1459</tr> 1460<tr> 1461 <td>add-int</td> 1462 <td>int32 a, b;<br/> 1463 int32 result = a + b; 1464 </td> 1465 <td>Twos-complement addition.</td> 1466</tr> 1467<tr> 1468 <td>sub-int</td> 1469 <td>int32 a, b;<br/> 1470 int32 result = a - b; 1471 </td> 1472 <td>Twos-complement subtraction.</td> 1473</tr> 1474<tr> 1475 <td>rsub-int</td> 1476 <td>int32 a, b;<br/> 1477 int32 result = b - a; 1478 </td> 1479 <td>Twos-complement reverse subtraction.</td> 1480</tr> 1481<tr> 1482 <td>mul-int</td> 1483 <td>int32 a, b;<br/> 1484 int32 result = a * b; 1485 </td> 1486 <td>Twos-complement multiplication.</td> 1487</tr> 1488<tr> 1489 <td>div-int</td> 1490 <td>int32 a, b;<br/> 1491 int32 result = a / b; 1492 </td> 1493 <td>Twos-complement division, rounded towards zero (that is, truncated to 1494 integer). This throws <code>ArithmeticException</code> if 1495 <code>b == 0</code>. 1496 </td> 1497</tr> 1498<tr> 1499 <td>rem-int</td> 1500 <td>int32 a, b;<br/> 1501 int32 result = a % b; 1502 </td> 1503 <td>Twos-complement remainder after division. The sign of the result 1504 is the same as that of <code>a</code>, and it is more precisely 1505 defined as <code>result == a - (a / b) * b</code>. This throws 1506 <code>ArithmeticException</code> if <code>b == 0</code>. 1507 </td> 1508</tr> 1509<tr> 1510 <td>and-int</td> 1511 <td>int32 a, b;<br/> 1512 int32 result = a & b; 1513 </td> 1514 <td>Bitwise AND.</td> 1515</tr> 1516<tr> 1517 <td>or-int</td> 1518 <td>int32 a, b;<br/> 1519 int32 result = a | b; 1520 </td> 1521 <td>Bitwise OR.</td> 1522</tr> 1523<tr> 1524 <td>xor-int</td> 1525 <td>int32 a, b;<br/> 1526 int32 result = a ^ b; 1527 </td> 1528 <td>Bitwise XOR.</td> 1529</tr> 1530<tr> 1531 <td>shl-int</td> 1532 <td>int32 a, b;<br/> 1533 int32 result = a << (b & 0x1f); 1534 </td> 1535 <td>Bitwise shift left (with masked argument).</td> 1536</tr> 1537<tr> 1538 <td>shr-int</td> 1539 <td>int32 a, b;<br/> 1540 int32 result = a >> (b & 0x1f); 1541 </td> 1542 <td>Bitwise signed shift right (with masked argument).</td> 1543</tr> 1544<tr> 1545 <td>ushr-int</td> 1546 <td>uint32 a, b;<br/> 1547 int32 result = a >> (b & 0x1f); 1548 </td> 1549 <td>Bitwise unsigned shift right (with masked argument).</td> 1550</tr> 1551<tr> 1552 <td>add-long</td> 1553 <td>int64 a, b;<br/> 1554 int64 result = a + b; 1555 </td> 1556 <td>Twos-complement addition.</td> 1557</tr> 1558<tr> 1559 <td>sub-long</td> 1560 <td>int64 a, b;<br/> 1561 int64 result = a - b; 1562 </td> 1563 <td>Twos-complement subtraction.</td> 1564</tr> 1565<tr> 1566 <td>mul-long</td> 1567 <td>int64 a, b;<br/> 1568 int64 result = a * b; 1569 </td> 1570 <td>Twos-complement multiplication.</td> 1571</tr> 1572<tr> 1573 <td>div-long</td> 1574 <td>int64 a, b;<br/> 1575 int64 result = a / b; 1576 </td> 1577 <td>Twos-complement division, rounded towards zero (that is, truncated to 1578 integer). This throws <code>ArithmeticException</code> if 1579 <code>b == 0</code>. 1580 </td> 1581</tr> 1582<tr> 1583 <td>rem-long</td> 1584 <td>int64 a, b;<br/> 1585 int64 result = a % b; 1586 </td> 1587 <td>Twos-complement remainder after division. The sign of the result 1588 is the same as that of <code>a</code>, and it is more precisely 1589 defined as <code>result == a - (a / b) * b</code>. This throws 1590 <code>ArithmeticException</code> if <code>b == 0</code>. 1591 </td> 1592</tr> 1593<tr> 1594 <td>and-long</td> 1595 <td>int64 a, b;<br/> 1596 int64 result = a & b; 1597 </td> 1598 <td>Bitwise AND.</td> 1599</tr> 1600<tr> 1601 <td>or-long</td> 1602 <td>int64 a, b;<br/> 1603 int64 result = a | b; 1604 </td> 1605 <td>Bitwise OR.</td> 1606</tr> 1607<tr> 1608 <td>xor-long</td> 1609 <td>int64 a, b;<br/> 1610 int64 result = a ^ b; 1611 </td> 1612 <td>Bitwise XOR.</td> 1613</tr> 1614<tr> 1615 <td>shl-long</td> 1616 <td>int64 a, b;<br/> 1617 int64 result = a << (b & 0x3f); 1618 </td> 1619 <td>Bitwise shift left (with masked argument).</td> 1620</tr> 1621<tr> 1622 <td>shr-long</td> 1623 <td>int64 a, b;<br/> 1624 int64 result = a >> (b & 0x3f); 1625 </td> 1626 <td>Bitwise signed shift right (with masked argument).</td> 1627</tr> 1628<tr> 1629 <td>ushr-long</td> 1630 <td>uint64 a, b;<br/> 1631 int64 result = a >> (b & 0x3f); 1632 </td> 1633 <td>Bitwise unsigned shift right (with masked argument).</td> 1634</tr> 1635<tr> 1636 <td>add-float</td> 1637 <td>float a, b;<br/> 1638 float result = a + b; 1639 </td> 1640 <td>Floating point addition.</td> 1641</tr> 1642<tr> 1643 <td>sub-float</td> 1644 <td>float a, b;<br/> 1645 float result = a - b; 1646 </td> 1647 <td>Floating point subtraction.</td> 1648</tr> 1649<tr> 1650 <td>mul-float</td> 1651 <td>float a, b;<br/> 1652 float result = a * b; 1653 </td> 1654 <td>Floating point multiplication.</td> 1655</tr> 1656<tr> 1657 <td>div-float</td> 1658 <td>float a, b;<br/> 1659 float result = a / b; 1660 </td> 1661 <td>Floating point division.</td> 1662</tr> 1663<tr> 1664 <td>rem-float</td> 1665 <td>float a, b;<br/> 1666 float result = a % b; 1667 </td> 1668 <td>Floating point remainder after division. This function is different 1669 than IEEE 754 remainder and is defined as 1670 <code>result == a - roundTowardZero(a / b) * b</code>. 1671 </td> 1672</tr> 1673<tr> 1674 <td>add-double</td> 1675 <td>double a, b;<br/> 1676 double result = a + b; 1677 </td> 1678 <td>Floating point addition.</td> 1679</tr> 1680<tr> 1681 <td>sub-double</td> 1682 <td>double a, b;<br/> 1683 double result = a - b; 1684 </td> 1685 <td>Floating point subtraction.</td> 1686</tr> 1687<tr> 1688 <td>mul-double</td> 1689 <td>double a, b;<br/> 1690 double result = a * b; 1691 </td> 1692 <td>Floating point multiplication.</td> 1693</tr> 1694<tr> 1695 <td>div-double</td> 1696 <td>double a, b;<br/> 1697 double result = a / b; 1698 </td> 1699 <td>Floating point division.</td> 1700</tr> 1701<tr> 1702 <td>rem-double</td> 1703 <td>double a, b;<br/> 1704 double result = a % b; 1705 </td> 1706 <td>Floating point remainder after division. This function is different 1707 than IEEE 754 remainder and is defined as 1708 <code>result == a - roundTowardZero(a / b) * b</code>. 1709 </td> 1710</tr> 1711</tbody> 1712</table> 1713 1714</body> 1715</html> 1716