1 //===- MipsSubtarget.cpp - Mips Subtarget Information -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MipsSubtarget.h"
15 #include "Mips.h"
16 #include "llvm/Target/TargetRegistry.h"
17
18 #define GET_SUBTARGETINFO_TARGET_DESC
19 #define GET_SUBTARGETINFO_CTOR
20 #include "MipsGenSubtargetInfo.inc"
21
22 using namespace llvm;
23
MipsSubtarget(const std::string & TT,const std::string & CPU,const std::string & FS,bool little)24 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
25 const std::string &FS, bool little) :
26 MipsGenSubtargetInfo(TT, CPU, FS),
27 MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
28 IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
29 HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
30 HasSwap(false), HasBitCount(false)
31 {
32 std::string CPUName = CPU;
33 if (CPUName.empty())
34 CPUName = "mips1";
35 MipsArchVersion = Mips1;
36
37 // Parse features string.
38 ParseSubtargetFeatures(CPUName, FS);
39
40 // Initialize scheduling itinerary for the specified CPU.
41 InstrItins = getInstrItineraryForCPU(CPUName);
42
43 // Is the target system Linux ?
44 if (TT.find("linux") == std::string::npos)
45 IsLinux = false;
46
47 // When only the target triple is specified and is
48 // a allegrex target, set the features. We also match
49 // big and little endian allegrex cores (dont really
50 // know if a big one exists)
51 if (TT.find("mipsallegrex") != std::string::npos ||
52 TT.find("psp") != std::string::npos) {
53 MipsABI = EABI;
54 IsSingleFloat = true;
55 MipsArchVersion = Mips2;
56 HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
57 HasSEInReg = true;
58 HasBitCount = true;
59 HasSwap = true;
60 HasCondMov = true;
61 }
62 }
63