1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides PowerPC specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "PPCMCTargetDesc.h"
15 #include "PPCMCAsmInfo.h"
16 #include "llvm/MC/MachineLocation.h"
17 #include "llvm/MC/MCInstrInfo.h"
18 #include "llvm/MC/MCRegisterInfo.h"
19 #include "llvm/MC/MCSubtargetInfo.h"
20 #include "llvm/Target/TargetRegistry.h"
21
22 #define GET_INSTRINFO_MC_DESC
23 #include "PPCGenInstrInfo.inc"
24
25 #define GET_SUBTARGETINFO_MC_DESC
26 #include "PPCGenSubtargetInfo.inc"
27
28 #define GET_REGINFO_MC_DESC
29 #include "PPCGenRegisterInfo.inc"
30
31 using namespace llvm;
32
createPPCMCInstrInfo()33 static MCInstrInfo *createPPCMCInstrInfo() {
34 MCInstrInfo *X = new MCInstrInfo();
35 InitPPCMCInstrInfo(X);
36 return X;
37 }
38
LLVMInitializePowerPCMCInstrInfo()39 extern "C" void LLVMInitializePowerPCMCInstrInfo() {
40 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
41 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
42 }
43
createPPCMCRegisterInfo(StringRef TT)44 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
45 Triple TheTriple(TT);
46 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
47 unsigned Flavour = isPPC64 ? 0 : 1;
48 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
49
50 MCRegisterInfo *X = new MCRegisterInfo();
51 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
52 return X;
53 }
54
LLVMInitializePowerPCMCRegisterInfo()55 extern "C" void LLVMInitializePowerPCMCRegisterInfo() {
56 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
57 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
58 }
59
createPPCMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)60 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
61 StringRef FS) {
62 MCSubtargetInfo *X = new MCSubtargetInfo();
63 InitPPCMCSubtargetInfo(X, TT, CPU, FS);
64 return X;
65 }
66
LLVMInitializePowerPCMCSubtargetInfo()67 extern "C" void LLVMInitializePowerPCMCSubtargetInfo() {
68 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
69 createPPCMCSubtargetInfo);
70 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
71 createPPCMCSubtargetInfo);
72 }
73
createPPCMCAsmInfo(const Target & T,StringRef TT)74 static MCAsmInfo *createPPCMCAsmInfo(const Target &T, StringRef TT) {
75 Triple TheTriple(TT);
76 bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
77
78 MCAsmInfo *MAI;
79 if (TheTriple.isOSDarwin())
80 MAI = new PPCMCAsmInfoDarwin(isPPC64);
81 else
82 MAI = new PPCLinuxMCAsmInfo(isPPC64);
83
84 // Initial state of the frame pointer is R1.
85 MachineLocation Dst(MachineLocation::VirtualFP);
86 MachineLocation Src(PPC::R1, 0);
87 MAI->addInitialFrameState(0, Dst, Src);
88
89 return MAI;
90 }
91
LLVMInitializePowerPCMCAsmInfo()92 extern "C" void LLVMInitializePowerPCMCAsmInfo() {
93 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
94 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
95 }
96
createPPCMCCodeGenInfo(StringRef TT,Reloc::Model RM)97 MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM) {
98 MCCodeGenInfo *X = new MCCodeGenInfo();
99
100 if (RM == Reloc::Default) {
101 Triple T(TT);
102 if (T.isOSDarwin())
103 RM = Reloc::DynamicNoPIC;
104 else
105 RM = Reloc::Static;
106 }
107 X->InitMCCodeGenInfo(RM);
108 return X;
109 }
110
LLVMInitializePowerPCMCCodeGenInfo()111 extern "C" void LLVMInitializePowerPCMCCodeGenInfo() {
112 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
113 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
114 }
115