1 //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the PowerPC implementation of the TargetRegisterInfo 11 // class. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef POWERPC32_REGISTERINFO_H 16 #define POWERPC32_REGISTERINFO_H 17 18 #include "PPC.h" 19 #include <map> 20 21 #define GET_REGINFO_HEADER 22 #include "PPCGenRegisterInfo.inc" 23 24 namespace llvm { 25 class PPCSubtarget; 26 class TargetInstrInfo; 27 class Type; 28 29 class PPCRegisterInfo : public PPCGenRegisterInfo { 30 std::map<unsigned, unsigned> ImmToIdxMap; 31 const PPCSubtarget &Subtarget; 32 const TargetInstrInfo &TII; 33 public: 34 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii); 35 36 /// getRegisterNumbering - Given the enum value for some register, e.g. 37 /// PPC::F14, return the number that it corresponds to (e.g. 14). 38 static unsigned getRegisterNumbering(unsigned RegEnum); 39 40 /// getPointerRegClass - Return the register class to use to hold pointers. 41 /// This is used for addressing modes. 42 virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const; 43 44 /// Code Generation virtual methods... 45 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 46 47 BitVector getReservedRegs(const MachineFunction &MF) const; 48 49 /// requiresRegisterScavenging - We require a register scavenger. 50 /// FIXME (64-bit): Should be inlined. 51 bool requiresRegisterScavenging(const MachineFunction &MF) const; 52 53 void eliminateCallFramePseudoInstr(MachineFunction &MF, 54 MachineBasicBlock &MBB, 55 MachineBasicBlock::iterator I) const; 56 57 void lowerDynamicAlloc(MachineBasicBlock::iterator II, 58 int SPAdj, RegScavenger *RS) const; 59 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, 60 int SPAdj, RegScavenger *RS) const; 61 void eliminateFrameIndex(MachineBasicBlock::iterator II, 62 int SPAdj, RegScavenger *RS = NULL) const; 63 64 // Debug information queries. 65 unsigned getFrameRegister(const MachineFunction &MF) const; 66 67 // Exception handling queries. 68 unsigned getEHExceptionRegister() const; 69 unsigned getEHHandlerRegister() const; 70 }; 71 72 } // end namespace llvm 73 74 #endif 75