1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the entry points for global functions defined in the x86 11 // target library, as used by the LLVM JIT. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef TARGET_X86_H 16 #define TARGET_X86_H 17 18 #include "MCTargetDesc/X86MCTargetDesc.h" 19 #include "llvm/Support/DataTypes.h" 20 #include "llvm/Target/TargetMachine.h" 21 22 namespace llvm { 23 24 class FunctionPass; 25 class JITCodeEmitter; 26 class MachineCodeEmitter; 27 class MCCodeEmitter; 28 class MCContext; 29 class MCInstrInfo; 30 class MCObjectWriter; 31 class MCSubtargetInfo; 32 class Target; 33 class TargetAsmBackend; 34 class X86TargetMachine; 35 class formatted_raw_ostream; 36 class raw_ostream; 37 38 /// createX86ISelDag - This pass converts a legalized DAG into a 39 /// X86-specific DAG, ready for instruction scheduling. 40 /// 41 FunctionPass *createX86ISelDag(X86TargetMachine &TM, 42 CodeGenOpt::Level OptLevel); 43 44 /// createGlobalBaseRegPass - This pass initializes a global base 45 /// register for PIC on x86-32. 46 FunctionPass* createGlobalBaseRegPass(); 47 48 /// createX86FloatingPointStackifierPass - This function returns a pass which 49 /// converts floating point register references and pseudo instructions into 50 /// floating point stack references and physical instructions. 51 /// 52 FunctionPass *createX86FloatingPointStackifierPass(); 53 54 /// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain 55 /// crossings. 56 FunctionPass *createSSEDomainFixPass(); 57 58 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code 59 /// to the specified MCE object. 60 FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM, 61 JITCodeEmitter &JCE); 62 63 MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII, 64 const MCSubtargetInfo &STI, 65 MCContext &Ctx); 66 67 TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &); 68 TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &); 69 70 /// createX86EmitCodeToMemory - Returns a pass that converts a register 71 /// allocated function into raw machine code in a dynamically 72 /// allocated chunk of memory. 73 /// 74 FunctionPass *createEmitX86CodeToMemory(); 75 76 /// createX86MaxStackAlignmentHeuristicPass - This function returns a pass 77 /// which determines whether the frame pointer register should be 78 /// reserved in case dynamic stack alignment is later required. 79 /// 80 FunctionPass *createX86MaxStackAlignmentHeuristicPass(); 81 82 83 /// createX86MachObjectWriter - Construct an X86 Mach-O object writer. 84 MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS, 85 bool Is64Bit, 86 uint32_t CPUType, 87 uint32_t CPUSubtype); 88 89 } // End llvm namespace 90 91 #endif 92