1; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts | FileCheck %s 2 3define i32 @f1() { 4; CHECK: f1 5; CHECK: mov r0, #0 6 ret i32 0 7} 8 9define i32 @f2() { 10; CHECK: f2 11; CHECK: mov r0, #255 12 ret i32 255 13} 14 15define i32 @f3() { 16; CHECK: f3 17; CHECK: mov r0, #256 18 ret i32 256 19} 20 21define i32 @f4() { 22; CHECK: f4 23; CHECK: orr{{.*}}#256 24 ret i32 257 25} 26 27define i32 @f5() { 28; CHECK: f5 29; CHECK: mov r0, #-1073741761 30 ret i32 -1073741761 31} 32 33define i32 @f6() { 34; CHECK: f6 35; CHECK: mov r0, #1008 36 ret i32 1008 37} 38 39define void @f7(i32 %a) { 40; CHECK: f7 41; CHECK: cmp r0, #65536 42 %b = icmp ugt i32 %a, 65536 43 br i1 %b, label %r, label %r 44r: 45 ret void 46} 47 48%t1 = type { <3 x float>, <3 x float> } 49 50@const1 = global %t1 { <3 x float> zeroinitializer, 51 <3 x float> <float 1.000000e+00, 52 float 2.000000e+00, 53 float 3.000000e+00> }, align 16 54; CHECK: const1 55; CHECK: .zero 16 56; CHECK: float 1.0 57; CHECK: float 2.0 58; CHECK: float 3.0 59; CHECK: .zero 4 60