1; RUN: llc -O0 < %s | FileCheck %s 2;ModuleID = 'test.c' 3target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" 4target triple = "powerpc-unknown-freebsd9.0" 5 6%struct.__va_list_tag = type { i8, i8, i16, i8*, i8* } 7 8@var1 = common global i64 0, align 8 9@var2 = common global double 0.0, align 8 10@var3 = common global i32 0, align 4 11 12define void @ppcvaargtest(%struct.__va_list_tag* %ap) nounwind { 13 entry: 14 %x = va_arg %struct.__va_list_tag* %ap, i64; Get from r5,r6 15; CHECK: lbz 4, 0(3) 16; CHECK-NEXT: lwz 5, 4(3) 17; CHECK-NEXT: rlwinm 6, 4, 0, 31, 31 18; CHECK-NEXT: cmplwi 0, 6, 0 19; CHECK-NEXT: addi 6, 4, 1 20; CHECK-NEXT: stw 3, -4(1) 21; CHECK-NEXT: stw 6, -8(1) 22; CHECK-NEXT: stw 4, -12(1) 23; CHECK-NEXT: stw 5, -16(1) 24; CHECK-NEXT: bne 0, .LBB0_2 25; CHECK-NEXT: # BB#1: # %entry 26; CHECK-NEXT: lwz 3, -12(1) 27; CHECK-NEXT: stw 3, -8(1) 28; CHECK-NEXT: .LBB0_2: # %entry 29; CHECK-NEXT: lwz 3, -8(1) 30; CHECK-NEXT: lwz 4, -4(1) 31; CHECK-NEXT: lwz 5, 8(4) 32; CHECK-NEXT: slwi 6, 3, 2 33; CHECK-NEXT: addi 7, 3, 2 34; CHECK-NEXT: cmpwi 0, 3, 8 35; CHECK-NEXT: lwz 3, -16(1) 36; CHECK-NEXT: addi 8, 3, 4 37; CHECK-NEXT: add 5, 5, 6 38; CHECK-NEXT: mfcr 0 # cr0 39; CHECK-NEXT: stw 0, -20(1) 40; CHECK-NEXT: stw 5, -24(1) 41; CHECK-NEXT: stw 3, -28(1) 42; CHECK-NEXT: stw 7, -32(1) 43; CHECK-NEXT: stw 8, -36(1) 44; CHECK-NEXT: blt 0, .LBB0_4 45; CHECK-NEXT: # BB#3: # %entry 46; CHECK-NEXT: lwz 3, -36(1) 47; CHECK-NEXT: stw 3, -28(1) 48; CHECK-NEXT: .LBB0_4: # %entry 49; CHECK-NEXT: lwz 3, -28(1) 50; CHECK-NEXT: lwz 4, -32(1) 51; CHECK-NEXT: lwz 5, -4(1) 52; CHECK-NEXT: stb 4, 0(5) 53; CHECK-NEXT: lwz 4, -24(1) 54; CHECK-NEXT: lwz 0, -20(1) 55; CHECK-NEXT: mtcrf 128, 0 56; CHECK-NEXT: stw 3, -40(1) 57; CHECK-NEXT: stw 4, -44(1) 58; CHECK-NEXT: blt 0, .LBB0_6 59; CHECK-NEXT: # BB#5: # %entry 60; CHECK-NEXT: lwz 3, -16(1) 61; CHECK-NEXT: stw 3, -44(1) 62; CHECK-NEXT: .LBB0_6: # %entry 63; CHECK-NEXT: lwz 3, -44(1) 64; CHECK-NEXT: lwz 4, -40(1) 65; CHECK-NEXT: lwz 5, -4(1) 66; CHECK-NEXT: stw 4, 4(5) 67 store i64 %x, i64* @var1, align 8 68; CHECK-NEXT: lis 4, var1@ha 69; CHECK-NEXT: lwz 6, 4(3) 70; CHECK-NEXT: lwz 3, 0(3) 71; CHECK-NEXT: la 7, var1@l(4) 72; CHECK-NEXT: stw 3, var1@l(4) 73; CHECK-NEXT: stw 6, 4(7) 74 %y = va_arg %struct.__va_list_tag* %ap, double; From f1 75; CHECK-NEXT: lbz 3, 1(5) 76; CHECK-NEXT: lwz 4, 4(5) 77; CHECK-NEXT: lwz 6, 8(5) 78; CHECK-NEXT: slwi 7, 3, 3 79; CHECK-NEXT: add 6, 6, 7 80; CHECK-NEXT: addi 7, 3, 1 81; CHECK-NEXT: cmpwi 0, 3, 8 82; CHECK-NEXT: addi 3, 4, 8 83; CHECK-NEXT: addi 6, 6, 32 84; CHECK-NEXT: mr 8, 4 85; CHECK-NEXT: mfcr 0 # cr0 86; CHECK-NEXT: stw 0, -48(1) 87; CHECK-NEXT: stw 4, -52(1) 88; CHECK-NEXT: stw 6, -56(1) 89; CHECK-NEXT: stw 7, -60(1) 90; CHECK-NEXT: stw 3, -64(1) 91; CHECK-NEXT: stw 8, -68(1) 92; CHECK-NEXT: blt 0, .LBB0_8 93; CHECK-NEXT: # BB#7: # %entry 94; CHECK-NEXT: lwz 3, -64(1) 95; CHECK-NEXT: stw 3, -68(1) 96; CHECK-NEXT: .LBB0_8: # %entry 97; CHECK-NEXT: lwz 3, -68(1) 98; CHECK-NEXT: lwz 4, -60(1) 99; CHECK-NEXT: lwz 5, -4(1) 100; CHECK-NEXT: stb 4, 1(5) 101; CHECK-NEXT: lwz 4, -56(1) 102; CHECK-NEXT: lwz 0, -48(1) 103; CHECK-NEXT: mtcrf 128, 0 104; CHECK-NEXT: stw 4, -72(1) 105; CHECK-NEXT: stw 3, -76(1) 106; CHECK-NEXT: blt 0, .LBB0_10 107; CHECK-NEXT: # BB#9: # %entry 108; CHECK-NEXT: lwz 3, -52(1) 109; CHECK-NEXT: stw 3, -72(1) 110; CHECK-NEXT: .LBB0_10: # %entry 111; CHECK-NEXT: lwz 3, -72(1) 112; CHECK-NEXT: lwz 4, -76(1) 113; CHECK-NEXT: lwz 5, -4(1) 114; CHECK-NEXT: stw 4, 4(5) 115; CHECK-NEXT: lfd 0, 0(3) 116 store double %y, double* @var2, align 8 117; CHECK-NEXT: lis 3, var2@ha 118; CHECK-NEXT: stfd 0, var2@l(3) 119 %z = va_arg %struct.__va_list_tag* %ap, i32; From r7 120; CHECK-NEXT: lbz 3, 0(5) 121; CHECK-NEXT: lwz 4, 4(5) 122; CHECK-NEXT: lwz 6, 8(5) 123; CHECK-NEXT: slwi 7, 3, 2 124; CHECK-NEXT: addi 8, 3, 1 125; CHECK-NEXT: cmpwi 0, 3, 8 126; CHECK-NEXT: addi 3, 4, 4 127; CHECK-NEXT: add 6, 6, 7 128; CHECK-NEXT: mr 7, 4 129; CHECK-NEXT: stw 6, -80(1) 130; CHECK-NEXT: stw 8, -84(1) 131; CHECK-NEXT: stw 3, -88(1) 132; CHECK-NEXT: stw 4, -92(1) 133; CHECK-NEXT: stw 7, -96(1) 134; CHECK-NEXT: mfcr 0 # cr0 135; CHECK-NEXT: stw 0, -100(1) 136; CHECK-NEXT: blt 0, .LBB0_12 137; CHECK-NEXT: # BB#11: # %entry 138; CHECK-NEXT: lwz 3, -88(1) 139; CHECK-NEXT: stw 3, -96(1) 140; CHECK-NEXT: .LBB0_12: # %entry 141; CHECK-NEXT: lwz 3, -96(1) 142; CHECK-NEXT: lwz 4, -84(1) 143; CHECK-NEXT: lwz 5, -4(1) 144; CHECK-NEXT: stb 4, 0(5) 145; CHECK-NEXT: lwz 4, -80(1) 146; CHECK-NEXT: lwz 0, -100(1) 147; CHECK-NEXT: mtcrf 128, 0 148; CHECK-NEXT: stw 4, -104(1) 149; CHECK-NEXT: stw 3, -108(1) 150; CHECK-NEXT: blt 0, .LBB0_14 151; CHECK-NEXT: # BB#13: # %entry 152; CHECK-NEXT: lwz 3, -92(1) 153; CHECK-NEXT: stw 3, -104(1) 154; CHECK-NEXT: .LBB0_14: # %entry 155; CHECK-NEXT: lwz 3, -104(1) 156; CHECK-NEXT: lwz 4, -108(1) 157; CHECK-NEXT: lwz 5, -4(1) 158; CHECK-NEXT: stw 4, 4(5) 159; CHECK-NEXT: lwz 3, 0(3) 160 store i32 %z, i32* @var3, align 4 161; CHECK-NEXT: lis 4, var3@ha 162; CHECK-NEXT: stw 3, var3@l(4) 163 ret void 164; CHECK-NEXT: stw 5, -112(1) 165; CHECK-NEXT: blr 166} 167 168