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1 /*
2  * Copyright © 2010 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 /**
25  * \file lower_vector.cpp
26  * IR lowering pass to remove some types of ir_quadop_vector
27  *
28  * \author Ian Romanick <ian.d.romanick@intel.com>
29  */
30 
31 #include "ir.h"
32 #include "ir_rvalue_visitor.h"
33 
34 class lower_vector_visitor : public ir_rvalue_visitor {
35 public:
lower_vector_visitor()36    lower_vector_visitor() : progress(false)
37    {
38       /* empty */
39    }
40 
41    void handle_rvalue(ir_rvalue **rvalue);
42 
43    /**
44     * Should SWZ-like expressions be lowered?
45     */
46    bool dont_lower_swz;
47 
48    bool progress;
49 };
50 
51 /**
52  * Determine if an IR expression tree looks like an extended swizzle
53  *
54  * Extended swizzles consist of access of a single vector source (with possible
55  * per component negation) and the constants -1, 0, or 1.
56  */
57 bool
is_extended_swizzle(ir_expression * ir)58 is_extended_swizzle(ir_expression *ir)
59 {
60    /* Track any variables that are accessed by this expression.
61     */
62    ir_variable *var = NULL;
63 
64    assert(ir->operation == ir_quadop_vector);
65 
66    for (unsigned i = 0; i < ir->type->vector_elements; i++) {
67       ir_rvalue *op = ir->operands[i];
68 
69       while (op != NULL) {
70 	 switch (op->ir_type) {
71 	 case ir_type_constant: {
72 	    const ir_constant *const c = op->as_constant();
73 
74 	    if (!c->is_one() && !c->is_zero() && !c->is_negative_one())
75 	       return false;
76 
77 	    op = NULL;
78 	    break;
79 	 }
80 
81 	 case ir_type_dereference_variable: {
82 	    ir_dereference_variable *const d = (ir_dereference_variable *) op;
83 
84 	    if ((var != NULL) && (var != d->var))
85 	       return false;
86 
87 	    var = d->var;
88 	    op = NULL;
89 	    break;
90 	 }
91 
92 	 case ir_type_expression: {
93 	    ir_expression *const ex = (ir_expression *) op;
94 
95 	    if (ex->operation != ir_unop_neg)
96 	       return false;
97 
98 	    op = ex->operands[0];
99 	    break;
100 	 }
101 
102 	 case ir_type_swizzle:
103 	    op = ((ir_swizzle *) op)->val;
104 	    break;
105 
106 	 default:
107 	    return false;
108 	 }
109       }
110    }
111 
112    return true;
113 }
114 
115 void
handle_rvalue(ir_rvalue ** rvalue)116 lower_vector_visitor::handle_rvalue(ir_rvalue **rvalue)
117 {
118    if (!*rvalue)
119       return;
120 
121    ir_expression *expr = (*rvalue)->as_expression();
122    if ((expr == NULL) || (expr->operation != ir_quadop_vector))
123       return;
124 
125    if (this->dont_lower_swz && is_extended_swizzle(expr))
126       return;
127 
128    /* FINISHME: Is this the right thing to use for the hieralloc context?
129     */
130    void *const mem_ctx = expr;
131 
132    assert(expr->type->vector_elements == expr->get_num_operands());
133 
134    /* Generate a temporary with the same type as the ir_quadop_operation.
135     */
136    ir_variable *const temp =
137       new(mem_ctx) ir_variable(expr->type, "vecop_tmp", ir_var_temporary);
138 
139    this->base_ir->insert_before(temp);
140 
141    /* Counter of the number of components collected so far.
142     */
143    unsigned assigned;
144 
145    /* Write-mask in the destination that receives counted by 'assigned'.
146     */
147    unsigned write_mask;
148 
149 
150    /* Generate upto four assignments to that variable.  Try to group component
151     * assignments together:
152     *
153     * - All constant components can be assigned at once.
154     * - All assigments of components from a single variable with the same
155     *   unary operator can be assigned at once.
156     */
157    ir_constant_data d = { { 0 } };
158 
159    assigned = 0;
160    write_mask = 0;
161    for (unsigned i = 0; i < expr->type->vector_elements; i++) {
162       const ir_constant *const c = expr->operands[i]->as_constant();
163 
164       if (c == NULL)
165 	 continue;
166 
167       switch (expr->type->base_type) {
168       case GLSL_TYPE_UINT:  d.u[assigned] = c->value.u[0]; break;
169       case GLSL_TYPE_INT:   d.i[assigned] = c->value.i[0]; break;
170       case GLSL_TYPE_FLOAT: d.f[assigned] = c->value.f[0]; break;
171       case GLSL_TYPE_BOOL:  d.b[assigned] = c->value.b[0]; break;
172       default:              assert(!"Should not get here."); break;
173       }
174 
175       write_mask |= (1U << i);
176       assigned++;
177    }
178 
179    assert((write_mask == 0) == (assigned == 0));
180 
181    /* If there were constant values, generate an assignment.
182     */
183    if (assigned > 0) {
184       ir_constant *const c =
185 	 new(mem_ctx) ir_constant(glsl_type::get_instance(expr->type->base_type,
186 							  assigned, 0),
187 				  &d);
188       ir_dereference *const lhs = new(mem_ctx) ir_dereference_variable(temp);
189       ir_assignment *const assign =
190 	 new(mem_ctx) ir_assignment(lhs, c, NULL, write_mask);
191 
192       this->base_ir->insert_before(assign);
193    }
194 
195    /* FINISHME: This should try to coalesce assignments.
196     */
197    for (unsigned i = 0; i < expr->type->vector_elements; i++) {
198       if (expr->operands[i]->ir_type == ir_type_constant)
199 	 continue;
200 
201       ir_dereference *const lhs = new(mem_ctx) ir_dereference_variable(temp);
202       ir_assignment *const assign =
203 	 new(mem_ctx) ir_assignment(lhs, expr->operands[i], NULL, (1U << i));
204 
205       this->base_ir->insert_before(assign);
206       assigned++;
207    }
208 
209    assert(assigned == expr->type->vector_elements);
210 
211    *rvalue = new(mem_ctx) ir_dereference_variable(temp);
212    this->progress = true;
213 }
214 
215 bool
lower_quadop_vector(exec_list * instructions,bool dont_lower_swz)216 lower_quadop_vector(exec_list *instructions, bool dont_lower_swz)
217 {
218    lower_vector_visitor v;
219 
220    v.dont_lower_swz = dont_lower_swz;
221    visit_list_elements(&v, instructions);
222 
223    return v.progress;
224 }
225