1# 2# AMD Athlon(tm)64 and AMD Opteron(tm) processor unit masks 3# 4# Copyright OProfile authors 5# Copyright (c) Advanced Micro Devices, 2006-2008 6# Contributed by Ray Bryant <raybry@amd.com>, and others. 7# Jason Yeh <jason.yeh at amd.com> 8# Suravee Suthikulpanit <suravee.suthikulpanit at amd.com> 9# Paul Drongowski <paul.drongowski at amd.com> 10# 11# Source : BIOS and Kernel Developer's Guide for AMD Family 11h Processors, 12# Publication# 41256, Revision 3.00, July 07, 2008 13# 14# Updated on 11 November 2008: 15# Description : Prepare for Oprofile patch submission 16# Signed off : Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> 17# 18# Updated on 20 February 2008: 19# Description : Added events for AMD Family 11h processors and proofread 20# WRT the latest BKDG 21# 22name:zero type:mandatory default:0x0 23 0x0 No unit mask 24name:moesi type:bitmask default:0x1f 25 0x01 (I)nvalid cache state 26 0x02 (S)hared cache state 27 0x04 (E)xclusive cache state 28 0x08 (O)wned cache state 29 0x10 (M)odified cache state 30 0x1f All cache states 31name:moess type:bitmask default:0x1e 32 0x01 refill from system 33 0x02 (S)hared cache state from L2 34 0x04 (E)xclusive cache state from L2 35 0x08 (O)wned cache state from L2 36 0x10 (M)odified cache state from L2 37 0x1e All cache states except Invalid 38name:fpu_ops type:bitmask default:0x3f 39 0x01 Add pipe ops 40 0x02 Multiply pipe 41 0x04 Store pipe ops 42 0x08 Add pipe load ops 43 0x10 Multiply pipe load ops 44 0x20 Store pipe load ops 45name:segregload type:bitmask default:0x7f 46 0x01 ES register 47 0x02 CS register 48 0x04 SS register 49 0x08 DS register 50 0x10 FS register 51 0x20 GS register 52 0x40 HS register 53name:ecc type:bitmask default:0x03 54 0x01 Scrubber error 55 0x02 Piggyback scrubber errors 56name:prefetch type:bitmask default:0x07 57 0x01 Load 58 0x02 Store 59 0x04 NTA 60name:fpu_instr type:bitmask default:0x0f 61 0x01 x87 instructions 62 0x02 MMX & 3DNow instructions 63 0x04 Packed SSE & SSE2 instructions 64 0x08 Packed scalar SSE & SSE2 instructions 65name:fpu_fastpath type:bitmask default:0x07 66 0x01 With low op in position 0 67 0x02 With low op in position 1 68 0x04 With low op in position 2 69name:fpu_exceptions type:bitmask default:0x0f 70 0x01 x87 reclass microfaults 71 0x02 SSE retype microfaults 72 0x04 SSE reclass microfaults 73 0x08 SSE and x87 microtraps 74name:dramaccess type:bitmask default:0xff 75 0x01 DCT0 Page hit 76 0x02 DCT0 Page miss 77 0x04 DCT0 Page conflict 78 0x08 DCT1 Page hit 79 0x10 DCT1 Page miss 80 0x20 DCT1 Page conflict 81 0x40 Write request 82 0x80 Read request 83name:dramcontroller type:bitmask default:0x0f 84 0x01 DCT Page Table Overflow 85 0x02 Number of stale table entry hits (hit on a page closed too soon) 86 0x04 Page table idle cycle limit incremented 87 0x08 Page table idle cycle limit decremented 88name:turnaround type:bitmask default:0x3f 89 0x01 DCT0 Read to write turnaround 90 0x02 DCT0 Write to read turnaround 91 0x04 DCT0 DIMM (chip select) turnaround 92 0x08 DCT1 Read to write turnaround 93 0x10 DCT1 Write to read turnaround 94 0x20 DCT1 DIMM (chip select) turnaround 95name:rbdqueue type:bitmask default:0x04 96 0x04 F2x[1,0]94[DcqBypassMax] counter reached 97name:sizecmds type:bitmask default:0x3f 98 0x01 Non-posted write byte (1-32 bytes) 99 0x02 Non-posted write DWORD (1-16 DWORDs) 100 0x04 Posted write byte (1-32 bytes) 101 0x08 Posted write DWORD (1-16 DWORDs) 102 0x10 Read byte (4 bytes) 103 0x20 Read DWORD (1-16 DWORDs) 104name:probe type:bitmask default:0x0f 105 0x01 Probe miss 106 0x02 Probe hit clean 107 0x04 Probe hit dirty without memory cancel 108 0x08 Probe hit dirty with memory cancel 109 0x10 Upstream display refresh/ISOC reads 110 0x20 Upstream non-display refresh reads 111 0x40 Upstream ISOC writes 112 0x80 Upstream non-ISOC writes 113name:l2_internal type:bitmask default:0x1f 114 0x01 IC fill 115 0x02 DC fill 116 0x04 TLB fill (page table walk) 117 0x08 Tag snoop request 118 0x10 Cancelled request 119name:l2_req_miss type:bitmask default:0x07 120 0x01 IC fill 121 0x02 DC fill 122 0x04 TLB page table walk 123name:l2_fill type:bitmask default:0x03 124 0x01 L2 fills (victims from L1 caches, TLB page table walks and data prefetches) 125 0x02 L2 writebacks to system 126name:devevents type:bitmask default:0x70 127 0x10 DEV hit 128 0x20 DEV miss 129 0x40 DEV error 130name:cpiorequests type:bitmask default:0xa2 131 0xa1 Requests Local I/O to Local I/O 132 0xa2 Requests Local I/O to Local Memory 133 0xa3 Requests Local I/O to Local (I/O or Mem) 134 0xa4 Requests Local CPU to Local I/O 135 0xa5 Requests Local (CPU or I/O) to Local I/O 136 0xa8 Requests Local CPU to Local Memory 137 0xaa Requests Local (CPU or I/O) to Local Memory 138 0xac Requests Local CPU to Local (I/O or Mem) 139 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem) 140 0x91 Requests Local I/O to Remote I/O 141 0x92 Requests Local I/O to Remote Memory 142 0x93 Requests Local I/O to Remote (I/O or Mem) 143 0x94 Requests Local CPU to Remote I/O 144 0x95 Requests Local (CPU or I/O) to Remote I/O 145 0x98 Requests Local CPU to Remote Memory 146 0x9a Requests Local (CPU or I/O) to Remote Memory 147 0x9c Requests Local CPU to Remote (I/O or Mem) 148 0x9f Requests Local (CPU or I/O) to Remote (I/O or Mem) 149 0xb1 Requests Local I/O to Any I/O 150 0xb2 Requests Local I/O to Any Memory 151 0xb3 Requests Local I/O to Any (I/O or Mem) 152 0xb4 Requests Local CPU to Any I/O 153 0xb5 Requests Local (CPU or I/O) to Any I/O 154 0xb8 Requests Local CPU to Any Memory 155 0xba Requests Local (CPU or I/O) to Any Memory 156 0xbc Requests Local CPU to Any (I/O or Mem) 157 0xbf Requests Local (CPU or I/O) to Any (I/O or Mem) 158 0x61 Requests Remote I/O to Local I/O 159 0x64 Requests Remote CPU to Local I/O 160 0x65 Requests Remote (CPU or I/O) to Local I/O 161name:cacheblock type:bitmask default:0x3d 162 0x01 Victim Block (Writeback) 163 0x04 Read Block (Dcache load miss refill) 164 0x08 Read Block Shared (Icache refill) 165 0x10 Read Block Modified (Dcache store miss refill) 166 0x20 Change to Dirty (first store to clean block already in cache) 167name:dataprefetch type:bitmask default:0x03 168 0x01 Cancelled prefetches 169 0x02 Prefetch attempts 170name:memreqtype type:bitmask default:0x83 171 0x01 Requests to non-cacheable (UC) memory 172 0x02 Requests to write-combining (WC) memory or WC buffer flushes to WB memory 173 0x80 Streaming store (SS) requests 174name:systemreadresponse type:bitmask default:0x7 175 0x01 Exclusive 176 0x02 Modified 177 0x04 Shared 178 0x08 Data Error 179name:writtentosystem type:bitmask default:0x1 180 0x01 Quadword write transfer 181# BKDG 3.28 does not include unit_mask of 0x01 for "accesses by Locked instructions" 182name:dcachemisslocked type:bitmask default:0x02 183 0x02 Data cache misses by locked instructions 184name:locked_ops type:bitmask default:0x04 185 0x01 The number of locked instructions executed 186 0x02 The number of cycles spent in speculative phase 187 0x04 The number of cycles spent in non-speculative phase (including cache miss penalty) 188name:thermalstatus type:bitmask default:0x80 189 0x01 Number of clocks MEMHOT_L is asserted 190 0x04 Number of times the HTC transitions from inactive to active 191 0x20 Number of clocks HTC P-state is inactive 192 0x40 Number of clocks HTC P-state is active 193 0x80 PROCHOT_L asserted by an external source and P-state change occurred 194name:memory_controller_requests type:bitmask default:0x78 195 0x08 32 Bytes Sized Writes 196 0x10 64 Bytes Sized Writes 197 0x20 32 Bytes Sized Reads 198 0x40 64 Bytes Sized Reads 199name:sideband_signals_and_special_cycles type:bitmask default:0x1f 200 0x01 HALT 201 0x02 STOPGRANT 202 0x04 SHUTDOWN 203 0x08 WBINVD 204 0x10 INVD 205name:interrupt_events type:bitmask default:0xff 206 0x01 Fixed 207 0x02 LPA 208 0x04 SMI 209 0x08 NMI 210 0x10 INIT 211 0x20 STARTUP 212 0x40 INT 213 0x80 EOI 214name:httransmit type:bitmask default:0x3f 215 0x01 Command DWORD sent 216 0x02 Address DWORD sent 217 0x04 Data DWORD sent 218 0x08 Buffer release DWORD sent 219 0x10 Nop DW sent (idle) 220 0x20 Per packet CRC sent 221