Lines Matching refs:getNode
1205 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1208 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
1209 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1220 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1221 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1235 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1254 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); in LowerMemOpCallTo()
1268 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
1276 if (StackPtr.getNode() == 0) in PassF64ArgInRegs()
1356 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1359 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1362 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1365 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1372 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1374 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1407 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
1420 SDValue Dst = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, in LowerCall()
1423 SDValue Src = DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg, SrcOffset); in LowerCall()
1442 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in LowerCall()
1499 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1514 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1535 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1541 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, in LowerCall()
1564 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1570 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, in LowerCall()
1619 if (InFlag.getNode()) in LowerCall()
1624 return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size()); in LowerCall()
1627 Chain = DAG.getNode(CallOpc, dl, NodeTys, &Ops[0], Ops.size()); in LowerCall()
1889 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
1896 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
1898 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
1910 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
1915 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
1931 if (Flag.getNode()) in LowerReturn()
1932 result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain, Flag); in LowerReturn()
1934 result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain); in LowerReturn()
1969 if (Copies.count(UseChain.getNode())) in isUsedByReturnOnly()
2031 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
2058 CPAddr = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, CPAddr); in LowerBlockAddress()
2065 return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel); in LowerBlockAddress()
2082 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
2089 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
2118 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
2131 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2138 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
2148 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2156 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
2185 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2192 Result = DAG.getNode(ISD::ADD, dl, PtrVT, Result, GOT); in LowerGlobalAddressELF()
2206 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
2210 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2233 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressDarwin()
2238 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, in LowerGlobalAddressDarwin()
2259 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressDarwin()
2268 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerGlobalAddressDarwin()
2292 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGLOBAL_OFFSET_TABLE()
2297 return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerGLOBAL_OFFSET_TABLE()
2304 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
2312 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
2325 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
2341 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
2349 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
2357 return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2372 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerMEMBARRIER()
2387 return DAG.getNode(ARMISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0), in LowerMEMBARRIER()
2402 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
2406 return DAG.getNode(ARMISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
2432 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
2483 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
2557 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), FIN, in VarArgStyleRegisters()
2561 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in VarArgStyleRegisters()
2618 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
2619 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
2621 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
2653 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2656 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
2658 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2661 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
2663 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2722 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
2740 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp()
2791 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
2800 Cmp = DAG.getNode(ARMISD::CMPFP, dl, MVT::Glue, LHS, RHS); in getVFPCmp()
2802 Cmp = DAG.getNode(ARMISD::CMPFPw0, dl, MVT::Glue, LHS); in getVFPCmp()
2803 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
2813 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
2819 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
2822 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0)); in duplicateCmp()
2824 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
2858 if (True.getNode() && False.getNode()) { in LowerSELECT()
2864 return DAG.getNode(ARMISD::CMOV, dl, VT, True, False, ARMcc, CCR, Cmp); in LowerSELECT()
2871 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
2892 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR,Cmp); in LowerSELECT_CC()
2901 SDValue Result = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in LowerSELECT_CC()
2907 Result = DAG.getNode(ARMISD::CMOV, dl, VT, in LowerSELECT_CC()
2917 SDNode *N = Op.getNode(); in canChangeToInt()
2967 SDValue NewPtr = DAG.getNode(ISD::ADD, Op.getDebugLoc(), in expandf64Toi32()
3007 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
3009 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
3013 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
3021 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
3022 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
3027 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops, 7); in OptimizeVFPBrcond()
3045 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
3055 if (Result.getNode()) in LowerBR_CC()
3067 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); in LowerBR_CC()
3071 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); in LowerBR_CC()
3087 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI, UId); in LowerBR_JT()
3088 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, PTy)); in LowerBR_JT()
3089 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table); in LowerBR_JT()
3095 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
3103 Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr, Table); in LowerBR_JT()
3104 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT()
3110 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT()
3121 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
3127 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
3129 Op = DAG.getNode(Op.getOpcode(), dl, MVT::v4i32, Op.getOperand(0)); in LowerVectorFP_TO_INT()
3130 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
3150 Op = DAG.getNode(Opc, dl, MVT::f32, Op.getOperand(0)); in LowerFP_TO_INT()
3151 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); in LowerFP_TO_INT()
3161 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
3167 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
3183 Op = DAG.getNode(CastOpc, dl, MVT::v4i32, Op.getOperand(0)); in LowerVectorINT_TO_FP()
3184 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
3205 Op = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); in LowerINT_TO_FP()
3206 return DAG.getNode(Opc, dl, VT, Op); in LowerINT_TO_FP()
3223 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
3227 Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3228 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
3231 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
3233 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
3235 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3236 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
3239 Tmp1 = DAG.getNode(ARMISD::VSHRu, dl, MVT::v1i64, in LowerFCOPYSIGN()
3240 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
3242 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
3243 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
3247 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
3248 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
3249 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
3251 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
3252 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
3253 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
3255 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
3256 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
3259 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
3267 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
3269 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
3274 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
3276 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
3277 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
3278 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
3279 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
3283 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
3286 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
3287 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
3288 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
3303 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
3348 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
3350 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
3352 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
3353 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
3358 SDValue Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
3361 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
3378 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
3379 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
3398 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
3400 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
3401 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
3403 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
3404 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
3405 SDValue TrueVal = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
3410 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
3411 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, in LowerShiftRightParts()
3432 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
3434 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
3435 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
3437 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
3438 SDValue Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
3440 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
3444 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
3445 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc, in LowerShiftLeftParts()
3459 SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, in LowerFLT_ROUNDS_()
3462 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
3464 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
3466 return DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
3478 SDValue rbit = DAG.getNode(ARMISD::RBIT, dl, VT, N->getOperand(0)); in LowerCTTZ()
3479 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
3495 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
3506 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
3512 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
3538 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
3540 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
3546 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), &Hi, 1); in Expand64BitShift()
3549 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
3552 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
3593 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); in LowerVSETCC()
3594 Op1 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp0, TmpOp1); in LowerVSETCC()
3602 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); in LowerVSETCC()
3603 Op1 = DAG.getNode(ARMISD::VCGE, dl, VT, TmpOp0, TmpOp1); in LowerVSETCC()
3626 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
3628 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
3632 if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) in LowerVSETCC()
3635 if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { in LowerVSETCC()
3637 Op0 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(0)); in LowerVSETCC()
3638 Op1 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(1)); in LowerVSETCC()
3650 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
3652 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) { in LowerVSETCC()
3661 if (SingleOp.getNode()) { in LowerVSETCC()
3664 Result = DAG.getNode(ARMISD::VCEQZ, dl, VT, SingleOp); break; in LowerVSETCC()
3666 Result = DAG.getNode(ARMISD::VCGEZ, dl, VT, SingleOp); break; in LowerVSETCC()
3668 Result = DAG.getNode(ARMISD::VCLEZ, dl, VT, SingleOp); break; in LowerVSETCC()
3670 Result = DAG.getNode(ARMISD::VCGTZ, dl, VT, SingleOp); break; in LowerVSETCC()
3672 Result = DAG.getNode(ARMISD::VCLTZ, dl, VT, SingleOp); break; in LowerVSETCC()
3674 Result = DAG.getNode(Opc, dl, VT, Op0, Op1); in LowerVSETCC()
3677 Result = DAG.getNode(Opc, dl, VT, Op0, Op1); in LowerVSETCC()
3837 SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32, in LowerConstantFP()
3839 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant, in LowerConstantFP()
3850 SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT, in LowerConstantFP()
3852 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
3854 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
3863 SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT, NewVal); in LowerConstantFP()
3864 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
3866 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
4097 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
4112 if (Val.getNode()) { in LowerBUILD_VECTOR()
4113 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
4114 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
4123 if (Val.getNode()) { in LowerBUILD_VECTOR()
4124 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
4125 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
4133 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
4154 if (!Value.getNode()) in LowerBUILD_VECTOR()
4160 if (!Value.getNode()) in LowerBUILD_VECTOR()
4164 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
4172 return DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
4176 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, MVT::i32, in LowerBUILD_VECTOR()
4179 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], NumElts); in LowerBUILD_VECTOR()
4181 if (Val.getNode()) in LowerBUILD_VECTOR()
4182 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
4185 if (Val.getNode()) in LowerBUILD_VECTOR()
4186 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
4212 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
4213 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); in LowerBUILD_VECTOR()
4214 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
4308 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4314 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4320 SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4323 SDValue VEXTSrc2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4326 ShuffleSrcs[i] = DAG.getNode(ARMISD::VEXT, dl, VT, VEXTSrc1, VEXTSrc2, in ReconstructShuffle()
4448 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
4451 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
4454 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
4459 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
4464 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
4469 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4473 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4477 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4495 if (V2.getNode()->getOpcode() == ISD::UNDEF) in LowerVECTOR_SHUFFLEv8i8()
4496 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
4497 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, in LowerVECTOR_SHUFFLEv8i8()
4500 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, in LowerVECTOR_SHUFFLEv8i8()
4501 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, in LowerVECTOR_SHUFFLEv8i8()
4510 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
4529 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
4543 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
4545 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
4554 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
4559 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4561 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4563 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4572 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4575 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4578 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4582 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4585 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4588 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4620 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
4621 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
4627 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
4632 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); in LowerVECTOR_SHUFFLE()
4633 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
4638 if (NewOp.getNode()) in LowerVECTOR_SHUFFLE()
4664 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
4680 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
4681 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
4684 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
4685 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
4687 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
4698 SDNode *BVN = N->getOperand(0).getNode(); in isExtendedBUILD_VECTOR()
4725 SDNode *Elt = N->getOperand(i).getNode(); in isExtendedBUILD_VECTOR()
4777 SDNode *BVN = N->getOperand(0).getNode(); in SkipExtension()
4781 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), MVT::v2i32, in SkipExtension()
4796 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), in SkipExtension()
4803 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
4804 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
4814 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
4815 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
4827 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
4828 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
4875 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
4886 SDValue N00 = SkipExtension(N0->getOperand(0).getNode(), DAG); in LowerMUL()
4887 SDValue N01 = SkipExtension(N0->getOperand(1).getNode(), DAG); in LowerMUL()
4889 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
4890 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
4891 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
4892 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
4893 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
4901 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4902 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
4903 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
4904 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
4907 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
4913 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
4914 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4916 Y = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Y, Y, Y, Y); in LowerSDIV_v4i8()
4917 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
4918 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
4920 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4921 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
4931 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4932 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
4933 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
4934 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
4939 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
4941 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
4944 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
4949 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
4950 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4952 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerSDIV_v4i16()
4953 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
4954 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
4957 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4958 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
4973 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
4974 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
4976 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
4978 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
4980 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
4982 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
4988 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
4991 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
5008 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
5009 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
5011 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
5013 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
5015 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
5017 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
5023 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
5026 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
5035 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
5036 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
5037 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
5038 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
5044 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
5046 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
5049 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
5050 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
5053 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
5058 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
5059 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
5061 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerUDIV()
5062 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
5063 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
5066 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
5067 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
5072 EVT VT = Op.getNode()->getValueType(0); in LowerADDC_ADDE_SUBC_SUBE()
5086 return DAG.getNode(Opc, Op->getDebugLoc(), VTs, Op.getOperand(0), in LowerADDC_ADDE_SUBC_SUBE()
5088 return DAG.getNode(Opc, Op->getDebugLoc(), VTs, Op.getOperand(0), in LowerADDC_ADDE_SUBC_SUBE()
5114 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceATOMIC_OP_64()
5117 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceATOMIC_OP_64()
5121 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceATOMIC_OP_64()
5124 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceATOMIC_OP_64()
5132 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, OpsF, 2)); in ReplaceATOMIC_OP_64()
5165 case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG); in LowerOperation()
5168 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); in LowerOperation()
5172 case ISD::CTTZ: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
5234 if (Res.getNode()) in ReplaceNodeResults()
6695 SDValue Result = DAG.getNode(Opc, RHS.getDebugLoc(), VT, OtherOp, RHS); in combineSelectAndUse()
6703 return DAG.getNode(ISD::SELECT, N->getDebugLoc(), VT, in combineSelectAndUse()
6737 SDNode *V = Vec.getNode(); in AddCombineToVPADDL()
6751 if (V != ExtVec0->getOperand(0).getNode() || in AddCombineToVPADDL()
6752 V != ExtVec1->getOperand(0).getNode()) in AddCombineToVPADDL()
6793 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in AddCombineToVPADDL()
6795 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, tmp); in AddCombineToVPADDL()
6808 if (Result.getNode()) in PerformADDCombineWithOperands()
6812 if (N0.getOpcode() == ISD::SELECT && N0.getNode()->hasOneUse()) { in PerformADDCombineWithOperands()
6814 if (Result.getNode()) return Result; in PerformADDCombineWithOperands()
6829 if (Result.getNode()) in PerformADDCombine()
6844 if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { in PerformSUBCombine()
6846 if (Result.getNode()) return Result; in PerformSUBCombine()
6883 return DAG.getNode(Opcode, DL, VT, in PerformVMULCombine()
6884 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
6885 DAG.getNode(ISD::MUL, DL, VT, N01, N1)); in PerformVMULCombine()
6922 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
6924 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
6930 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
6931 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
6942 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
6944 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
6950 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
6952 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
6956 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
6964 Res = DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
6973 if (N.getOpcode() != ARMISD::CMOV || !N.getNode()->hasOneUse()) in isCMOVWithZeroOrAllOnesLHS()
7010 return DAG.getNode(Opc, N->getDebugLoc(), N->getValueType(0), N0, in formConditionalOp()
7039 if (Val.getNode()) { in PerformANDCombine()
7041 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
7042 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
7043 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
7051 if (CAND.getNode()) in PerformANDCombine()
7082 if (Val.getNode()) { in PerformORCombine()
7084 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
7085 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
7086 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
7094 if (COR.getNode()) in PerformORCombine()
7121 SDValue Result = DAG.getNode(ARMISD::VBSL, dl, CanonicalVT, in PerformORCombine()
7124 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
7173 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombine()
7199 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0), in PerformORCombine()
7201 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombine()
7215 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombine()
7217 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res, in PerformORCombine()
7236 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0), in PerformORCombine()
7258 if (CXOR.getNode()) in PerformXORCombine()
7280 return DCI.DAG.getNode(ARMISD::BFI, N->getDebugLoc(), N->getValueType(0), in PerformBFICombine()
7297 SDNode *InNode = InDouble.getNode(); in PerformVMOVRRDCombine()
7313 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformVMOVRRDCombine()
7341 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
7343 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), in PerformVMOVDRRCombine()
7386 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformSTORECombine()
7415 SDValue ShuffWide = DAG.getNode(ISD::BITCAST, DL, StoreVecVT, Shuff); in PerformSTORECombine()
7424 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in PerformSTORECombine()
7430 BasePtr = DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr, in PerformSTORECombine()
7434 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &Chains[0], in PerformSTORECombine()
7443 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
7444 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
7449 StVal.getNode()->getOperand(0), BasePtr, in PerformSTORECombine()
7453 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformSTORECombine()
7455 return DAG.getStore(NewST1.getValue(0), DL, StVal.getNode()->getOperand(1), in PerformSTORECombine()
7462 StVal.getNode()->getOpcode() != ISD::EXTRACT_VECTOR_ELT) in PerformSTORECombine()
7472 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
7473 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
7476 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
7478 DCI.AddToWorklist(Vec.getNode()); in PerformSTORECombine()
7479 DCI.AddToWorklist(ExtElt.getNode()); in PerformSTORECombine()
7480 DCI.AddToWorklist(V.getNode()); in PerformSTORECombine()
7494 SDNode *Elt = N->getOperand(i).getNode(); in hasNormalLoadOperand()
7512 if (RV.getNode()) in PerformBUILD_VECTORCombine()
7525 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
7528 DCI.AddToWorklist(V.getNode()); in PerformBUILD_VECTORCombine()
7531 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops.data(), NumElts); in PerformBUILD_VECTORCombine()
7532 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
7542 SDNode *Elt = N->getOperand(1).getNode(); in PerformInsertEltCombine()
7551 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
7552 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
7554 DCI.AddToWorklist(Vec.getNode()); in PerformInsertEltCombine()
7555 DCI.AddToWorklist(V.getNode()); in PerformInsertEltCombine()
7556 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
7558 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
7594 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, N->getDebugLoc(), VT, in PerformVECTOR_SHUFFLECombine()
7628 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in CombineBaseUpdate()
7629 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in CombineBaseUpdate()
7700 if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { in CombineBaseUpdate()
7735 NewResults.push_back(SDValue(UpdN.getNode(), i)); in CombineBaseUpdate()
7737 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs+1)); // chain in CombineBaseUpdate()
7739 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in CombineBaseUpdate()
7758 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP()
7813 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
7820 VLDDupResults.push_back(SDValue(VLDDup.getNode(), n)); in CombineVLDDUP()
7821 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs)); in CombineVLDDUP()
7856 return DCI.DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Op); in PerformVDUPLANECombine()
7915 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in PerformVCVTCombine()
7935 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine()
7951 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in PerformVDIVCombine()
7964 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
8135 return DAG.getNode(VShiftOpc, N->getDebugLoc(), N->getValueType(0), in PerformIntrinsicCombine()
8152 return DAG.getNode(VShiftOpc, N->getDebugLoc(), N->getValueType(0), in PerformIntrinsicCombine()
8183 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, N0, N1); in PerformShiftCombine()
8200 return DAG.getNode(ARMISD::VSHL, N->getDebugLoc(), VT, N->getOperand(0), in PerformShiftCombine()
8209 return DAG.getNode(VShiftOpc, N->getDebugLoc(), VT, N->getOperand(0), in PerformShiftCombine()
8249 return DAG.getNode(Opc, N->getDebugLoc(), VT, Vec, Lane); in PerformExtendCombine()
8338 return DAG.getNode(Opcode, N->getDebugLoc(), N->getValueType(0), LHS, RHS); in PerformSELECT_CCCombine()
8378 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
8383 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
8387 if (Res.getNode()) { in PerformCMOVCombine()
8392 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
8395 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
8398 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
8843 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
8846 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
9230 if (Result.getNode()) { in LowerAsmOperandForConstraint()